; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:StelemRef(System.Array,long,System.Object) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp x1, x3 bhs G_M000_IG10 lsl x1, x1, #3 add x1, x1, #16 add x3, x0, x1 ldr x1, [x0] ldr x1, [x1, #0x30] cbz x2, G_M000_IG06 G_M000_IG03: ldr x4, [x2] cmp x1, x4 bne G_M000_IG08 G_M000_IG04: mov x0, x3 mov x1, x2 G_M000_IG05: ldp fp, lr, [sp], #0x10 b System.Runtime.CompilerServices.CastHelpers:WriteBarrier(byref,System.Object) G_M000_IG06: str xzr, [x3] G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: ldr x0, [x0] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 cmp x0, x4 beq G_M000_IG04 mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG09: ldp fp, lr, [sp], #0x10 br x3 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 144 1: JIT compiled System.Runtime.CompilerServices.CastHelpers:StelemRef(System.Array,long,System.Object) [Tier1, IL size=88, code size=144] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:LdelemaRef(System.Array,long,ulong):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp x1, x3 bhs G_M000_IG05 lsl x1, x1, #3 add x1, x1, #16 add x1, x0, x1 ldr x0, [x0] ldr x0, [x0, #0x30] cmp x0, x2 bne G_M000_IG04 mov x0, x1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 88 2: JIT compiled System.Runtime.CompilerServices.CastHelpers:LdelemaRef(System.Array,long,ulong) [Tier1, IL size=44, code size=88] ; Assembly listing for method System.SpanHelpers:IndexOfNullCharacter(ulong):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x1, xzr mov x2, #0xD1FFAB1E tbnz w0, #0, G_M000_IG04 G_M000_IG03: neg w2, w0 add w2, w2, w2, LSR #31 asr w2, w2, #1 mov w2, w2 and x2, x2, #7 G_M000_IG04: cmp x2, #4 blt G_M000_IG06 align [0 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG05: lsl x3, x1, #1 ldrh w4, [x0, x3] cbz w4, G_M000_IG15 add x4, x0, x3 ldrh w4, [x4, #0x02] cbz w4, G_M000_IG14 add x4, x0, x3 ldrh w4, [x4, #0x04] cbz w4, G_M000_IG13 add x3, x0, x3 ldrh w3, [x3, #0x06] cbz w3, G_M000_IG12 add x1, x1, #4 sub x2, x2, #4 cmp x2, #4 bge G_M000_IG05 G_M000_IG06: cmp x2, #0 ble G_M000_IG08 align [4 bytes for IG07] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG07: lsl x3, x1, #1 ldrh w3, [x0, x3] cbz w3, G_M000_IG15 add x1, x1, #1 sub x2, x2, #1 cmp x2, #0 bgt G_M000_IG07 G_M000_IG08: mov x2, #0xD1FFAB1E cmp x1, x2 bge G_M000_IG17 neg x2, x1 mov x3, #0xD1FFAB1E add x2, x2, x3 and x2, x2, #-8 cmp x2, #0 ble G_M000_IG10 align [0 bytes for IG09] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG09: lsl x3, x1, #1 ldr q16, [x0, x3] cmeq v16.8h, v16.8h, #0 umaxp v17.4s, v16.4s, v16.4s umov x3, v17.d[0] cmp x3, #0 bne G_M000_IG11 add x1, x1, #8 sub x2, x2, #8 cmp x2, #0 bgt G_M000_IG09 G_M000_IG10: mov x2, #0xD1FFAB1E cmp x1, x2 bge G_M000_IG17 neg x2, x1 mov x3, #0xD1FFAB1E add x2, x2, x3 b G_M000_IG04 G_M000_IG11: ldr q17, [@RWD00] and v16.16b, v16.16b, v17.16b ldr q17, [@RWD16] ushl v16.16b, v16.16b, v17.16b mov v17.16b, v16.16b addv b17, v17.8b umov w0, v17.b[0] ext v16.16b, v16.16b, v16.16b, #8 addv b16, v16.8b umov w2, v16.b[0] orr w0, w0, w2, LSL #8 rbit w0, w0 clz w0, w0 lsr w0, w0, #1 mov w0, w0 add w1, w0, w1 b G_M000_IG15 G_M000_IG12: add w1, w1, #3 b G_M000_IG15 G_M000_IG13: add w1, w1, #2 b G_M000_IG15 G_M000_IG14: add w1, w1, #1 b G_M000_IG15 G_M000_IG15: mov w0, w1 G_M000_IG16: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 RWD00 dq 8080808080808080h, 8080808080808080h RWD16 dq 00FFFEFDFCFBFAF9h, 00FFFEFDFCFBFAF9h ; Total bytes of code 392 3: JIT compiled System.SpanHelpers:IndexOfNullCharacter(ulong) [Tier1, IL size=492, code size=392] ; Assembly listing for method System.Guid:TryFormatCore[ushort](System.Span`1[ushort],byref,int):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp str xzr, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] str x3, [fp, #0xD1FFAB1E] str w4, [fp, #0xD1FFAB1E] G_M000_IG02: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG04 ldr x0, [fp, #0xD1FFAB1E] str wzr, [x0] mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG04: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1] ldr w0, [fp, #0xD1FFAB1E] asr w0, w0, #8 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x18] ldr x0, [fp, #0x18] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG05 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov w1, #2 sxtw x1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] strh w0, [x1] G_M000_IG05: ldr w0, [fp, #0xD1FFAB1E] asr w0, w0, #8 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] ldr w2, [fp, #0xD1FFAB1E] cmp w2, #0 cset x2, lt movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str q0, [fp, #0x80] str q1, [fp, #0x90] str q2, [fp, #0xA0] ldr q0, [fp, #0x80] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0x90] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xA0] str q0, [fp, #0xD1FFAB1E] b G_M000_IG06 G_M000_IG06: ldr q0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x60] str q1, [fp, #0x70] ldr q0, [fp, #0x60] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0x70] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x40] str q1, [fp, #0x50] ldr q0, [fp, #0x40] str q0, [fp, #0xF0] ldr q0, [fp, #0x50] str q0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD8] ldr w0, [fp, #0xD1FFAB1E] tbz w0, #31, G_M000_IG07 ldr q0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x20] str q1, [fp, #0x30] ldr q16, [fp, #0x20] str q16, [fp, #0xC0] ldr q16, [fp, #0x30] str q16, [fp, #0xB0] ldr x0, [fp, #0xD8] ldr q16, [fp, #0xD1FFAB1E] str q16, [x0] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 mov x2, #20 mul x1, x1, x2 ldr q16, [fp, #0xF0] str q16, [x0, x1] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 mov x2, #28 mul x1, x1, x2 ldr q16, [fp, #0xE0] str q16, [x0, x1] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 lsl x1, x1, #3 ldr q16, [fp, #0xC0] str q16, [x0, x1] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 lsl x1, x1, #4 ldr q16, [fp, #0xB0] str q16, [x0, x1] ldr x0, [fp, #0xD1FFAB1E] mov w1, #2 sxtw x1, w1 mov x2, #36 mul x1, x1, x2 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xD8] ldr q16, [fp, #0xD1FFAB1E] str q16, [x0] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 lsl x1, x1, #3 ldr q16, [fp, #0xD1FFAB1E] str q16, [x0, x1] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 lsl x1, x1, #4 ldr q16, [fp, #0xF0] str q16, [x0, x1] ldr x0, [fp, #0xD8] mov w1, #2 sxtw x1, w1 mov x2, #24 mul x1, x1, x2 ldr q16, [fp, #0xE0] str q16, [x0, x1] ldr x0, [fp, #0xD1FFAB1E] mov w1, #2 sxtw x1, w1 lsl x1, x1, #5 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] b G_M000_IG08 G_M000_IG08: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG09 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] strh w0, [x1] G_M000_IG09: str xzr, [fp, #0xD1FFAB1E] mov w0, #1 G_M000_IG10: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 820 4: JIT compiled System.Guid:TryFormatCore[ushort](System.Span`1[ushort],byref,int) [Tier0, IL size=893, code size=820] ; Assembly listing for method System.Number:UInt32ToDecChars[ushort](ulong,uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x34] cmp w0, #10 blo G_M000_IG08 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x38] mov w1, #2 sxtw x1, w1 lsl x1, x1, #1 sub x0, x0, x1 str x0, [fp, #0x38] ldr w0, [fp, #0x34] mov w1, #100 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr w0, [fp, #0x20] str w0, [fp, #0x34] ldr w0, [fp, #0x24] str w0, [fp, #0x30] ldr w0, [fp, #0x30] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #49 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x34] cmp w0, #100 bhs G_M000_IG03 ldr w0, [fp, #0x34] cmp w0, #10 blo G_M000_IG08 ldr x0, [fp, #0x38] mov w1, #2 sxtw x1, w1 lsl x1, x1, #1 sub x0, x0, x1 str x0, [fp, #0x38] ldr w0, [fp, #0x34] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr x0, [fp, #0x38] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x38] ldr w0, [fp, #0x34] add w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x28] strh w0, [x1] ldr x0, [fp, #0x38] G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 340 5: JIT compiled System.Number:UInt32ToDecChars[ushort](ulong,uint) [Tier0, IL size=114, code size=340] ; Assembly listing for method System.ArgumentOutOfRangeException:ThrowIfNegative[int](int,System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] str x1, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG03 ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 6: JIT compiled System.ArgumentOutOfRangeException:ThrowIfNegative[int](int,System.String) [Tier0, IL size=22, code size=80] ; Assembly listing for method System.SpanHelpers:IndexOfNullByte(ulong):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x1, xzr and w2, w0, #15 neg w2, w2 add w2, w2, #16 and w2, w2, #15 mov w2, w2 G_M000_IG03: cmp x2, #8 blo G_M000_IG05 align [0 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: sub x2, x2, #8 ldrb w3, [x0, x1] cbz w3, G_M000_IG13 add x3, x0, x1 ldrb w3, [x3, #0x01] cbz w3, G_M000_IG14 add x3, x0, x1 ldrb w3, [x3, #0x02] cbz w3, G_M000_IG15 add x3, x0, x1 ldrb w3, [x3, #0x03] cbz w3, G_M000_IG16 add x3, x0, x1 ldrb w3, [x3, #0x04] cbz w3, G_M000_IG17 add x3, x0, x1 ldrb w3, [x3, #0x05] cbz w3, G_M000_IG18 add x3, x0, x1 ldrb w3, [x3, #0x06] cbz w3, G_M000_IG19 add x3, x0, x1 ldrb w3, [x3, #0x07] cbz w3, G_M000_IG20 add x1, x1, #8 cmp x2, #8 bhs G_M000_IG04 G_M000_IG05: cmp x2, #4 blo G_M000_IG07 G_M000_IG06: sub x2, x2, #4 ldrb w3, [x0, x1] cbz w3, G_M000_IG13 add x3, x0, x1 ldrb w3, [x3, #0x01] cbz w3, G_M000_IG14 add x3, x0, x1 ldrb w3, [x3, #0x02] cbz w3, G_M000_IG15 add x3, x0, x1 ldrb w3, [x3, #0x03] cbz w3, G_M000_IG16 add x1, x1, #4 G_M000_IG07: cbz x2, G_M000_IG09 align [4 bytes for IG08] align [4 bytes] align [4 bytes] align [0 bytes] G_M000_IG08: sub x2, x2, #1 ldrb w3, [x0, x1] cbz w3, G_M000_IG13 add x1, x1, #1 cbnz x2, G_M000_IG08 G_M000_IG09: mov x2, #0xD1FFAB1E cmp x1, x2 bhs G_M000_IG23 neg w2, w1 movn w3, #0xD1FFAB1E LSL #16 add w2, w2, w3 and w2, w2, #0xD1FFAB1E mov w2, w2 cmp x2, x1 bls G_M000_IG11 align [0 bytes for IG10] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG10: ldr q16, [x0, x1] cmeq v16.16b, v16.16b, #0 umaxp v17.4s, v16.4s, v16.4s umov x3, v17.d[0] cmp x3, #0 bne G_M000_IG12 add x1, x1, #16 cmp x2, x1 bhi G_M000_IG10 G_M000_IG11: mov x2, #0xD1FFAB1E cmp x1, x2 bhs G_M000_IG23 neg x2, x1 mov x3, #0xD1FFAB1E add x2, x2, x3 b G_M000_IG03 G_M000_IG12: ldr q17, [@RWD00] and v16.16b, v16.16b, v17.16b ldr q17, [@RWD16] ushl v16.16b, v16.16b, v17.16b mov v17.16b, v16.16b addv b17, v17.8b umov w0, v17.b[0] ext v16.16b, v16.16b, v16.16b, #8 addv b16, v16.8b umov w2, v16.b[0] orr w0, w0, w2, LSL #8 rbit w0, w0 clz w0, w0 mov w0, w0 add w1, w0, w1 b G_M000_IG21 G_M000_IG13: b G_M000_IG21 G_M000_IG14: add w1, w1, #1 b G_M000_IG21 G_M000_IG15: add w1, w1, #2 b G_M000_IG21 G_M000_IG16: add w1, w1, #3 b G_M000_IG21 G_M000_IG17: add w1, w1, #4 b G_M000_IG21 G_M000_IG18: add w1, w1, #5 b G_M000_IG21 G_M000_IG19: add w1, w1, #6 b G_M000_IG21 G_M000_IG20: add w1, w1, #7 G_M000_IG21: mov w0, w1 G_M000_IG22: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 RWD00 dq 8080808080808080h, 8080808080808080h RWD16 dq 00FFFEFDFCFBFAF9h, 00FFFEFDFCFBFAF9h ; Total bytes of code 504 7: JIT compiled System.SpanHelpers:IndexOfNullByte(ulong) [Tier1, IL size=581, code size=504] ; Assembly listing for method System.SpanHelpers:NonPackedIndexOfValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 30 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w2, #8 bge G_M000_IG11 G_M000_IG03: mov x3, xzr cmp w2, #4 blt G_M000_IG04 sub w2, w2, #4 lsl x4, x3, #1 ldrsh w5, [x0, x4] sxth w6, w1 cmp w5, w6 beq G_M000_IG10 add x5, x4, #2 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG09 add x5, x4, #4 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG08 add x4, x4, #6 ldrsh w4, [x0, x4] cmp w4, w6 beq G_M000_IG07 add x3, x3, #4 G_M000_IG04: cmp w2, #0 ble G_M000_IG17 sxth w6, w1 align [4 bytes for IG05] align [4 bytes] align [4 bytes] align [0 bytes] G_M000_IG05: sub w2, w2, #1 lsl x1, x3, #1 ldrsh w1, [x0, x1] cmp w1, w6 beq G_M000_IG10 add x3, x3, #1 cmp w2, #0 bgt G_M000_IG05 G_M000_IG06: b G_M000_IG17 G_M000_IG07: add w3, w3, #3 b G_M000_IG15 G_M000_IG08: add w3, w3, #2 b G_M000_IG15 G_M000_IG09: add w3, w3, #1 b G_M000_IG15 G_M000_IG10: b G_M000_IG15 G_M000_IG11: sxth w6, w1 dup v16.8h, w6 mov x1, x0 sub w3, w2, #8 sbfiz x3, x3, #1, #32 add x4, x1, x3 align [0 bytes for IG12] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG12: ldr q17, [x1] cmeq v17.8h, v16.8h, v17.8h umaxp v18.4s, v17.4s, v17.4s umov x5, v18.d[0] cmp x5, #0 bne G_M000_IG14 add x1, x1, #16 cmp x1, x4 bls G_M000_IG12 G_M000_IG13: mov w0, w2 tst w0, #7 beq G_M000_IG17 ldr q17, [x4] cmeq v17.8h, v16.8h, v17.8h umaxp v16.4s, v17.4s, v17.4s umov x1, v16.d[0] cmp x1, #0 beq G_M000_IG17 lsr x0, x3, #1 ldr q16, [@RWD00] and v17.8h, v17.8h, v16.8h ldr q16, [@RWD16] ushl v16.8h, v17.8h, v16.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w3, w0, w1 b G_M000_IG15 G_M000_IG14: sub x3, x1, x0 lsr x0, x3, #1 ldr q16, [@RWD00] and v16.8h, v17.8h, v16.8h ldr q17, [@RWD16] ushl v16.8h, v16.8h, v17.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w3, w0, w1 G_M000_IG15: mov w0, w3 G_M000_IG16: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG17: movn w0, #0 G_M000_IG18: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 8000800080008000h, 8000800080008000h RWD16 dq FFF4FFF3FFF2FFF1h, FFF8FFF7FFF6FFF5h ; Total bytes of code 400 8: JIT compiled System.SpanHelpers:NonPackedIndexOfValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,int) [Tier1, IL size=843, code size=400] ; Assembly listing for method System.SpanHelpers:LastIndexOfValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 30 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w2, #8 bge G_M000_IG11 G_M000_IG03: sxtw x3, w2 sub x3, x3, #1 cmp w2, #4 blt G_M000_IG04 sub w2, w2, #4 lsl x4, x3, #1 ldrsh w5, [x0, x4] sxth w6, w1 cmp w5, w6 beq G_M000_IG10 sub x5, x4, #2 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG09 sub x5, x4, #4 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG08 sub x4, x4, #6 ldrsh w4, [x0, x4] cmp w4, w6 beq G_M000_IG07 sub x3, x3, #4 G_M000_IG04: cmp w2, #0 ble G_M000_IG17 sxth w6, w1 align [4 bytes for IG05] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG05: sub w2, w2, #1 lsl x1, x3, #1 ldrsh w1, [x0, x1] cmp w1, w6 beq G_M000_IG10 sub x3, x3, #1 cmp w2, #0 bgt G_M000_IG05 G_M000_IG06: b G_M000_IG17 G_M000_IG07: sub w3, w3, #3 b G_M000_IG15 G_M000_IG08: sub w3, w3, #2 b G_M000_IG15 G_M000_IG09: sub w3, w3, #1 b G_M000_IG15 G_M000_IG10: b G_M000_IG15 G_M000_IG11: sxth w6, w1 dup v16.8h, w6 sub w3, w2, #8 sxtw x1, w3 cmp x1, #0 ble G_M000_IG13 align [0 bytes for IG12] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG12: lsl x2, x1, #1 ldr q17, [x0, x2] cmeq v17.8h, v16.8h, v17.8h umaxp v18.4s, v17.4s, v17.4s umov x2, v18.d[0] cmp x2, #0 bne G_M000_IG14 sub x1, x1, #8 cmp x1, #0 bgt G_M000_IG12 G_M000_IG13: ldr q17, [x0] cmeq v17.8h, v16.8h, v17.8h umaxp v16.4s, v17.4s, v17.4s umov x1, v16.d[0] cmp x1, #0 beq G_M000_IG17 ldr q16, [@RWD00] and v17.8h, v17.8h, v16.8h ldr q16, [@RWD16] ushl v16.8h, v17.8h, v16.8h addv h16, v16.8h umov w0, v16.h[0] clz w0, w0 neg w0, w0 add w3, w0, #31 b G_M000_IG15 G_M000_IG14: ldr q16, [@RWD00] and v16.8h, v17.8h, v16.8h ldr q17, [@RWD16] ushl v16.8h, v16.8h, v17.8h addv h16, v16.8h umov w0, v16.h[0] clz w0, w0 neg w0, w0 add w0, w0, w1 add w3, w0, #31 G_M000_IG15: mov w0, w3 G_M000_IG16: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG17: movn w0, #0 G_M000_IG18: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 8000800080008000h, 8000800080008000h RWD16 dq FFF4FFF3FFF2FFF1h, FFF8FFF7FFF6FFF5h ; Total bytes of code 384 9: JIT compiled System.SpanHelpers:LastIndexOfValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,int) [Tier1, IL size=819, code size=384] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Level(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 10: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Level(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Message(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 11: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Message(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Task(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 12: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Task(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Opcode(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 13: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Opcode(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Version(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldrb w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 14: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Version(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Keywords(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 15: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Keywords(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method System.Number:Int64ToHexChars[ushort](ulong,ulong,int,int):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str x0, [fp, #0x58] str x1, [fp, #0x50] str w2, [fp, #0x4C] str w3, [fp, #0x48] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG08 G_M000_IG03: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #16 mov w1, #2 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr x0, [fp, #0x50] and w0, w0, #15 str w0, [fp, #0x44] ldr x0, [fp, #0x58] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x58] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr w0, [fp, #0x44] str w0, [fp, #0x2C] ldr w0, [fp, #0x44] cmp w0, #10 blt G_M000_IG06 ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] ldr w0, [fp, #0x4C] str w0, [fp, #0x18] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] mov w0, #48 str w0, [fp, #0x18] G_M000_IG07: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x18] add w0, w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x20] strh w0, [x1] ldr x0, [fp, #0x50] lsr x0, x0, #4 str x0, [fp, #0x50] G_M000_IG08: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x40] tbz w0, #31, G_M000_IG03 ldr x0, [fp, #0x50] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x58] G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 296 16: JIT compiled System.Number:Int64ToHexChars[ushort](ulong,ulong,int,int) [Tier0, IL size=67, code size=296] ; Assembly listing for method System.SpanHelpers:NonPackedIndexOfAnyInRangeUnsignedNumber[ushort,System.SpanHelpers+DontNegate`1[ushort]](byref,ushort,ushort,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x88] str w1, [fp, #0x84] str w2, [fp, #0x80] str w3, [fp, #0x7C] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x7C] cmp w0, #8 bge G_M000_IG09 ldr w0, [fp, #0x80] uxth w0, w0 ldr w1, [fp, #0x84] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x78] str wzr, [fp, #0x74] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x88] ldr w1, [fp, #0x74] sxtw x1, w1 lsl x1, x1, #1 add x0, x0, x1 str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldrh w0, [x0] ldr w1, [fp, #0x84] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x14] ldr w0, [fp, #0x14] ldr w1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG05 ldr w0, [fp, #0x74] G_M000_IG04: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG05: ldr w0, [fp, #0x74] add w0, w0, #1 str w0, [fp, #0x74] G_M000_IG06: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #24 mov w1, #90 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x74] ldr w1, [fp, #0x7C] cmp w0, w1 blt G_M000_IG03 b G_M000_IG17 G_M000_IG09: b G_M000_IG10 G_M000_IG10: ldr w0, [fp, #0x84] uxth w0, w0 dup v16.8h, w0 str q16, [fp, #0x50] ldr w0, [fp, #0x80] uxth w0, w0 ldr w1, [fp, #0x84] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 dup v16.8h, w0 str q16, [fp, #0x40] ldr x0, [fp, #0x88] str x0, [fp, #0x28] ldr x0, [fp, #0x88] ldr w1, [fp, #0x7C] sub w1, w1, #8 mov w1, w1 lsl x1, x1, #1 add x0, x0, x1 str x0, [fp, #0x20] G_M000_IG11: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #24 mov w1, #148 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr x0, [fp, #0x28] ldr q0, [x0] ldr q16, [fp, #0x50] sub v0.8h, v0.8h, v16.8h ldr q16, [fp, #0x40] cmhs v0.8h, v16.8h, v0.8h movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x30] ldr q0, [fp, #0x30] ldr q16, [fp, #0x30] umaxp v0.4s, v0.4s, v16.4s umov x0, v0.d[0] cmp x0, #0 beq G_M000_IG15 ldr x0, [fp, #0x88] ldr x1, [fp, #0x28] ldr q0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG15: ldr x0, [fp, #0x28] mov x1, #2 lsl x1, x1, #3 add x0, x0, x1 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] cmp x0, x1 blo G_M000_IG11 ldr x0, [fp, #0x20] ldr q0, [x0] ldr q16, [fp, #0x50] sub v0.8h, v0.8h, v16.8h ldr q16, [fp, #0x40] cmhs v0.8h, v16.8h, v0.8h movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x30] ldr q0, [fp, #0x30] ldr q16, [fp, #0x30] umaxp v0.4s, v0.4s, v16.4s umov x0, v0.d[0] cmp x0, #0 beq G_M000_IG17 ldr x0, [fp, #0x88] ldr x1, [fp, #0x20] ldr q0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG16: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG17: movn w0, #0 G_M000_IG18: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 708 17: JIT compiled System.SpanHelpers:NonPackedIndexOfAnyInRangeUnsignedNumber[ushort,System.SpanHelpers+DontNegate`1[ushort]](byref,ushort,ushort,int) [Tier0, IL size=294, code size=708] ; Assembly listing for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x0, x2 beq G_M000_IG10 G_M000_IG03: cmp w1, w3 csel w4, w1, w3, lo mov w4, w4 mov x5, xzr mov x6, x4 cmp x6, #16 blo G_M000_IG06 sub x6, x4, #16 cbz x6, G_M000_IG05 align [0 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: ldr q16, [x0, x5] ldr q17, [x2, x5] cmeq v16.16b, v16.16b, v17.16b uminp v16.4s, v16.4s, v16.4s umov x7, v16.d[0] cmn x7, #1 bne G_M000_IG08 add x5, x5, #16 cmp x6, x5 bhi G_M000_IG04 G_M000_IG05: mov x5, x6 ldr q16, [x0, x5] ldr q17, [x2, x5] cmeq v16.16b, v16.16b, v17.16b uminp v16.4s, v16.4s, v16.4s umov x6, v16.d[0] cmn x6, #1 bne G_M000_IG08 b G_M000_IG10 G_M000_IG06: cmp x4, #8 bls G_M000_IG08 sub x6, x4, #8 cbz x6, G_M000_IG08 align [4 bytes for IG07] align [4 bytes] align [4 bytes] align [4 bytes] G_M000_IG07: ldr x7, [x0, x5] ldr x8, [x2, x5] cmp x7, x8 bne G_M000_IG08 add x5, x5, #8 cmp x6, x5 bhi G_M000_IG07 G_M000_IG08: cmp x4, x5 bls G_M000_IG10 align [0 bytes for IG09] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG09: ldrb w6, [x2, x5] ldrb w7, [x0, x5] sub w6, w7, w6 cbnz w6, G_M000_IG12 add x5, x5, #1 cmp x4, x5 bhi G_M000_IG09 G_M000_IG10: sub w0, w1, w3 G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: mov w0, w6 G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 248 18: JIT compiled System.SpanHelpers:SequenceCompareTo(byref,int,byref,int) [Tier1, IL size=287, code size=248] ; Assembly listing for method BenchmarkDotNet.Autogenerated.UniqueProgramName:Main(System.String[]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 19: JIT compiled BenchmarkDotNet.Autogenerated.UniqueProgramName:Main(System.String[]) [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Autogenerated.UniqueProgramName:AfterAssemblyLoadingAttached(System.String[]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x1, sp, #0xD1FFAB1E str x1, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: add x2, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x58] str x0, [fp, #0xD1FFAB1E] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #3 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #3 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #3 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x90] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x90] str x2, [fp, #0xF0] G_M000_IG06: ldr x2, [fp, #0xF0] ldr x1, [fp, #0xF8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x48] ldr x1, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x40] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] str x0, [fp, #0xE0] ldr x0, [fp, #0xE8] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xE0] G_M000_IG07: ldr x0, [fp, #0xE0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG08 str wzr, [fp, #0xDC] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x08] sub w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xDC] G_M000_IG09: ldr w0, [fp, #0xDC] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG10 ldr x0, [fp, #0xD1FFAB1E] movz x11, #56 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0xA8] add x0, fp, #176 mov w1, #39 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG11: ldp q16, q17, [fp, #0xB0] stp q16, q17, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD0] str x0, [fp, #0xD1FFAB1E] G_M000_IG12: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xA8] ldr x2, [fp, #0xA8] ldr x2, [x2] ldr x2, [x2, #0x50] ldr x2, [x2, #0x38] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xA0] ldr x2, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x98] ldr x2, [fp, #0xA0] mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG20 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG14: b G_M000_IG16 G_M000_IG15: b G_M000_IG18 G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG38 G_M000_IG17: b G_M000_IG22 G_M000_IG18: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG38 G_M000_IG19: b G_M000_IG22 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG38 G_M000_IG21: nop G_M000_IG22: ldr w0, [fp, #0xD1FFAB1E] G_M000_IG23: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! ldr x1, [x1, #-0x08] str x1, [sp, #0x18] sub fp, x1, #0xD1FFAB1E G_M000_IG25: str x0, [fp, #0x80] ldr x1, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x1, [fp, #0x78] str x1, [fp, #0x70] ldr x1, [fp, #0x78] cbnz x1, G_M000_IG26 str wzr, [fp, #0x68] b G_M000_IG30 G_M000_IG26: ldr x1, [fp, #0x70] str x1, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG28 ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG27 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp x0, #0 cset x0, ne str w0, [fp, #0x6C] b G_M000_IG29 G_M000_IG27: str wzr, [fp, #0x6C] b G_M000_IG29 G_M000_IG28: mov w0, #1 str w0, [fp, #0x6C] G_M000_IG29: ldr w0, [fp, #0x6C] cmp w0, #0 cset x0, ne str w0, [fp, #0x68] G_M000_IG30: ldr w0, [fp, #0x68] G_M000_IG31: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG32: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG33: str x0, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] movz x11, #88 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x11, #96 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x11, #104 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x11, #112 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x11, #120 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x11, #128 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] movz x11, #136 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 movn w0, #0 str w0, [fp, #0xD1FFAB1E] adr x0, [G_M000_IG14] G_M000_IG34: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG35: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG36: str x0, [fp, #0x88] ldr x0, [fp, #0x88] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x11, #72 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x11, #80 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 movn w0, #0 str w0, [fp, #0xD1FFAB1E] adr x0, [G_M000_IG15] G_M000_IG37: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG38: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x11, #64 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG40: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1976 20: JIT compiled BenchmarkDotNet.Autogenerated.UniqueProgramName:AfterAssemblyLoadingAttached(System.String[]) [Tier0, IL size=406, code size=1976] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:TryGetFileHandles(System.String[],byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] G_M000_IG02: str wzr, [fp, #0x24] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x38] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG05 ldr x14, [fp, #0x38] ldr w15, [fp, #0x24] add w15, w15, #1 ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG10 add x14, x14, x15, LSL #3 add x14, x14, #16 ldr x15, [x14] ldr x14, [fp, #0x30] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x38] ldr w15, [fp, #0x24] add w15, w15, #2 ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG10 add x14, x14, x15, LSL #3 add x14, x14, #16 ldr x15, [x14] ldr x14, [fp, #0x28] bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: ldr w14, [fp, #0x24] add w14, w14, #1 str w14, [fp, #0x24] G_M000_IG06: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #16 mov w1, #39 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x24] ldr x1, [fp, #0x38] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 str xzr, [fp, #0x18] ldr x14, [fp, #0x28] str xzr, [x14] ldr x14, [fp, #0x30] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 21: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:TryGetFileHandles(System.String[],byref,byref) [Tier0, IL size=55, code size=324] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:.ctor(System.String,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] ldr x0, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x58] add x14, x14, #8 ldr x15, [fp, #0x40] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, #1 ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x80] ldr x2, [x2, #0x18] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x58] ldr x1, [fp, #0x48] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x18] ldr x2, [fp, #0x10] ldr x0, [fp, #0x38] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x58] add x14, x14, #16 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 404 22: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:.ctor(System.String,System.String) [Tier0, IL size=68, code size=404] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:OpenAnonymousPipe(System.String,int):System.IO.Stream:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] G_M000_IG02: str xzr, [fp, #0x30] ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x3C] mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 216 23: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:OpenAnonymousPipe(System.String,int) [Tier0, IL size=25, code size=216] ; Assembly listing for method System.Number:TryParseBinaryIntegerStyle[int](System.ReadOnlySpan`1[ushort],int,System.Globalization.NumberFormatInfo,byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp add x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] str xzr, [x9, #0xA0] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str x3, [fp, #0xD1FFAB1E] str x4, [fp, #0xF8] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG52 str wzr, [fp, #0xF4] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bls G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldrh w0, [x0] str w0, [fp, #0xF0] ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #1 cbz w0, G_M000_IG06 ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 G_M000_IG03: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #48 mov w1, #37 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 G_M000_IG06: str wzr, [fp, #0xEC] ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #4 cbz w0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 ldr w0, [fp, #0xF0] cmp w0, #45 bne G_M000_IG07 mov w0, #1 str w0, [fp, #0xEC] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG07: ldr w0, [fp, #0xF0] cmp w0, #43 bne G_M000_IG17 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG09 ldr w0, [fp, #0xF0] cmp w0, #45 bne G_M000_IG09 mov w0, #1 str w0, [fp, #0xEC] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG09: add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xF4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] str x1, [fp, #0x80] G_M000_IG10: ldp x0, x1, [fp, #0x78] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG11: str wzr, [fp, #0xF4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD0] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG14 G_M000_IG12: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x38] G_M000_IG13: ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] str x1, [fp, #0x50] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x48] ldr x3, [fp, #0x50] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG14 ldr x0, [fp, #0xD8] ldr w0, [x0, #0x08] ldr w1, [fp, #0xF4] add w0, w0, w1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG14: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG17 G_M000_IG15: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x58] G_M000_IG16: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] str x1, [fp, #0x70] ldr x0, [fp, #0x58] ldr x1, [fp, #0x60] ldr x2, [fp, #0x68] ldr x3, [fp, #0x70] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG17 mov w0, #1 str w0, [fp, #0xEC] ldr x0, [fp, #0xD0] ldr w0, [x0, #0x08] ldr w1, [fp, #0xF4] add w0, w0, w1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq ldr w1, [fp, #0xEC] and w0, w0, w1 str w0, [fp, #0xE8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG52 ldr w0, [fp, #0xF0] cmp w0, #48 bne G_M000_IG21 G_M000_IG18: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG20: ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG43 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] cmp w0, #48 beq G_M000_IG18 ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG21 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG56 str wzr, [fp, #0xE8] b G_M000_IG56 G_M000_IG21: ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] str wzr, [fp, #0xCC] b G_M000_IG24 G_M000_IG22: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blo G_M000_IG23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG43 b G_M000_IG40 G_M000_IG23: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG56 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE4] ldr w0, [fp, #0xCC] add w0, w0, #1 str w0, [fp, #0xCC] G_M000_IG24: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG26 G_M000_IG25: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sub w0, w0, #2 ldr w1, [fp, #0xCC] cmp w0, w1 bgt G_M000_IG22 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blo G_M000_IG27 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG43 b G_M000_IG40 G_M000_IG27: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG56 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG31 ldr w0, [fp, #0xE8] str w0, [fp, #0x94] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x28] ldr w1, [fp, #0x28] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG29 ldr w0, [fp, #0x94] str w0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG28 ldr w0, [fp, #0x88] str w0, [fp, #0x90] ldr w0, [fp, #0xF0] cmp w0, #53 cset x0, gt str w0, [fp, #0x8C] b G_M000_IG30 G_M000_IG28: ldr w0, [fp, #0x88] str w0, [fp, #0x90] str wzr, [fp, #0x8C] b G_M000_IG30 G_M000_IG29: ldr w0, [fp, #0x94] str w0, [fp, #0x90] mov w0, #1 str w0, [fp, #0x8C] G_M000_IG30: ldr w0, [fp, #0x90] ldr w1, [fp, #0x8C] orr w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xE8] b G_M000_IG32 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x20] ldr w1, [fp, #0x20] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE8] G_M000_IG32: ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG35 ldr w0, [fp, #0xE8] str w0, [fp, #0xB0] ldr w0, [fp, #0xE4] str w0, [fp, #0xAC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0xA8] ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG33 ldr w0, [fp, #0xB0] str w0, [fp, #0xA4] ldr w0, [fp, #0xAC] str w0, [fp, #0xA0] ldr w0, [fp, #0xA8] str w0, [fp, #0x9C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x98] b G_M000_IG34 G_M000_IG33: ldr w0, [fp, #0xB0] str w0, [fp, #0xA4] ldr w0, [fp, #0xAC] str w0, [fp, #0xA0] ldr w0, [fp, #0xA8] str w0, [fp, #0x9C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x98] G_M000_IG34: ldr w0, [fp, #0x9C] ldr w1, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr w0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xA4] orr w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xE8] G_M000_IG35: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG40 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG37 G_M000_IG36: mov w0, #1 str w0, [fp, #0xE8] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG55 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] G_M000_IG37: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG39 G_M000_IG38: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG39: ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG36 b G_M000_IG56 G_M000_IG40: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG42 G_M000_IG41: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG42: ldr w0, [fp, #0xE8] cbnz w0, G_M000_IG55 G_M000_IG43: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG44 ldr x0, [fp, #0xF8] ldr w1, [fp, #0xE4] str w1, [x0] b G_M000_IG47 G_M000_IG44: ldr x0, [fp, #0xF8] str x0, [fp, #0xC0] ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG45 ldr x0, [fp, #0xC0] str x0, [fp, #0xB8] ldr w0, [fp, #0xE4] str w0, [fp, #0xB4] b G_M000_IG46 G_M000_IG45: ldr x0, [fp, #0xC0] str x0, [fp, #0xB8] ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xB4] G_M000_IG46: ldr x0, [fp, #0xB8] ldr w1, [fp, #0xB4] str w1, [x0] G_M000_IG47: str wzr, [fp, #0xE0] G_M000_IG48: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG50 G_M000_IG49: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG50: ldr w0, [fp, #0xE0] G_M000_IG51: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG52: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG54 G_M000_IG53: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG54: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0xF8] str w0, [x1] mov w0, #1 str w0, [fp, #0xE0] b G_M000_IG48 G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0xF8] str w0, [x1] mov w0, #2 str w0, [fp, #0xE0] b G_M000_IG48 G_M000_IG56: ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG62 ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #2 cbz w0, G_M000_IG52 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] b G_M000_IG58 G_M000_IG57: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG61 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] G_M000_IG58: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG60 G_M000_IG59: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG60: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG57 G_M000_IG61: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG40 G_M000_IG62: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xF4] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG40 b G_M000_IG52 G_M000_IG63: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 3308 24: JIT compiled System.Number:TryParseBinaryIntegerStyle[int](System.ReadOnlySpan`1[ushort],int,System.Globalization.NumberFormatInfo,byref) [Tier0, IL size=1142, code size=3308] ; Assembly listing for method System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 25: JIT compiled System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned() [Tier0, IL size=2, code size=20] ; Assembly listing for method System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_MaxDigitCount():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #10 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 26: JIT compiled System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_MaxDigitCount() [Tier0, IL size=3, code size=20] ; Assembly listing for method System.Int32:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] mov w1, #10 mul w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 27: JIT compiled System.Int32:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(int) [Tier0, IL size=5, code size=32] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #24 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 28: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:.cctor() [Tier0, IL size=13, code size=92] ; Assembly listing for method System.ArgumentOutOfRangeException:ThrowIfNegativeOrZero[int](int,System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] str x1, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 29: JIT compiled System.ArgumentOutOfRangeException:ThrowIfNegativeOrZero[int](int,System.String) [Tier0, IL size=36, code size=108] ; Assembly listing for method BenchmarkDotNet.Engines.HostExtensions:BeforeAnythingElse(BenchmarkDotNet.Engines.IHost) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #144 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov w1, #1 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 30: JIT compiled BenchmarkDotNet.Engines.HostExtensions:BeforeAnythingElse(BenchmarkDotNet.Engines.IHost) [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:SendSignal(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] str w1, [fp, #0x44] G_M000_IG02: ldr w0, [fp, #0x44] cmp w0, #4 bne G_M000_IG03 mov w0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x44] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x38] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG05 ldr x0, [fp, #0x38] cbnz x0, G_M000_IG04 ldr w0, [fp, #0x44] cmp w0, #4 beq G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 344 31: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:SendSignal(int) [Tier0, IL size=72, code size=344] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals:ToMessage(int):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str w0, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 32: JIT compiled BenchmarkDotNet.Engines.Engine+Signals:ToMessage(int) [Tier0, IL size=12, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x38] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x38] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x38] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x15, [fp, #0x38] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x3, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 556 33: JIT compiled BenchmarkDotNet.Engines.Engine+Signals:.cctor() [Tier0, IL size=106, code size=556] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, wzr mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 34: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:.ctor() [Tier0, IL size=9, code size=52] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x24] tbz w0, #31, G_M000_IG03 mov w0, #22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x24] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: b G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0x18] cbz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x14, [fp, #0x18] cmp x0, x14 beq G_M000_IG06 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 35: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]) [Tier0, IL size=136, code size=188] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:Add(int,System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldr x2, [fp, #0x18] mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str w0, [fp, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 36: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:Add(int,System.__Canon) [Tier0, IL size=11, code size=68] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:TryInsert(int,System.__Canon,ubyte):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x78] str x0, [fp, #0x70] str w1, [fp, #0x6C] str x2, [fp, #0x60] str w3, [fp, #0x5C] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x70] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] str x0, [fp, #0x50] ldr x0, [fp, #0x70] ldr x0, [x0, #0x18] str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG05 ldr x0, [fp, #0x48] ldr w1, [fp, #0x6C] movz x11, #160 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str w0, [fp, #0x20] b G_M000_IG06 G_M000_IG05: add x0, fp, #108 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x20] G_M000_IG06: ldr w0, [fp, #0x20] str w0, [fp, #0x44] str wzr, [fp, #0x40] ldr x0, [fp, #0x70] ldr w1, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr w0, [x0] sub w0, w0, #1 str w0, [fp, #0x34] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG13 G_M000_IG07: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #24 mov w1, #125 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w0, [fp, #0x34] ldr x1, [fp, #0x50] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG21 ldr x0, [fp, #0x50] ldr w1, [fp, #0x34] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x08] ldr w1, [fp, #0x44] cmp w0, w1 bne G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x50] ldr w2, [fp, #0x34] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG28 mov w3, #24 madd x1, x2, x3, x1 add x1, x1, #16 ldr w1, [x1, #0x10] ldr w2, [fp, #0x6C] ldr x3, [fp, #0x10] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 cbz w0, G_M000_IG12 ldr w14, [fp, #0x5C] uxtb w14, w14 cmp w14, #1 bne G_M000_IG10 ldr x14, [fp, #0x50] ldr w15, [fp, #0x34] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG28 mov w12, #24 madd x14, x15, x12, x14 add x14, x14, #16 ldr x15, [fp, #0x60] bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG26 G_M000_IG10: ldr w0, [fp, #0x5C] uxtb w0, w0 cmp w0, #2 bne G_M000_IG11 ldr w0, [fp, #0x6C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: b G_M000_IG18 G_M000_IG12: ldr x0, [fp, #0x50] ldr w1, [fp, #0x34] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x0C] str w0, [fp, #0x34] ldr w0, [fp, #0x40] add w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] ldr x1, [fp, #0x50] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG07 G_M000_IG13: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #24 mov w1, #241 bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr w1, [fp, #0x34] ldr x0, [fp, #0x50] ldr w0, [x0, #0x08] cmp w1, w0 bhs G_M000_IG21 ldr x1, [fp, #0x50] ldr w0, [fp, #0x34] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG28 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1, #0x08] ldr w0, [fp, #0x44] cmp w1, w0 bne G_M000_IG20 ldr x1, [fp, #0x50] ldr w0, [fp, #0x34] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG28 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1, #0x10] ldr x0, [fp, #0x48] ldr w2, [fp, #0x6C] movz x11, #152 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 cbz w0, G_M000_IG20 ldr w14, [fp, #0x5C] uxtb w14, w14 cmp w14, #1 bne G_M000_IG16 ldr x14, [fp, #0x50] ldr w15, [fp, #0x34] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG28 mov w12, #24 madd x14, x15, x12, x14 add x14, x14, #16 ldr x15, [fp, #0x60] bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG26 G_M000_IG16: ldr w0, [fp, #0x5C] uxtb w0, w0 cmp w0, #2 bne G_M000_IG17 ldr w0, [fp, #0x6C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG17: b G_M000_IG18 G_M000_IG18: mov w0, wzr G_M000_IG19: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: ldr x0, [fp, #0x50] ldr w1, [fp, #0x34] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x0C] str w0, [fp, #0x34] ldr w0, [fp, #0x40] add w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] ldr x1, [fp, #0x50] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG13 G_M000_IG21: ldr x0, [fp, #0x70] ldr w0, [x0, #0x40] cmp w0, #0 ble G_M000_IG22 ldr x0, [fp, #0x70] ldr w0, [x0, #0x3C] str w0, [fp, #0x30] ldr x0, [fp, #0x50] ldr x1, [fp, #0x70] ldr w1, [x1, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x0C] neg w0, w0 sub w0, w0, #3 ldr x1, [fp, #0x70] str w0, [x1, #0x3C] ldr x0, [fp, #0x70] ldr w0, [x0, #0x40] sub w0, w0, #1 ldr x1, [fp, #0x70] str w0, [x1, #0x40] b G_M000_IG24 G_M000_IG22: ldr x0, [fp, #0x70] ldr w0, [x0, #0x38] str w0, [fp, #0x24] ldr w0, [fp, #0x24] ldr x1, [fp, #0x50] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x70] ldr w1, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] G_M000_IG23: ldr w14, [fp, #0x24] str w14, [fp, #0x30] ldr w14, [fp, #0x24] add w14, w14, #1 ldr x15, [fp, #0x70] str w14, [x15, #0x38] ldr x14, [fp, #0x70] ldr x14, [x14, #0x10] str x14, [fp, #0x50] G_M000_IG24: ldr x14, [fp, #0x50] ldr w15, [fp, #0x30] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG28 mov w12, #24 madd x14, x15, x12, x14 add x14, x14, #16 str x14, [fp, #0x28] ldr x14, [fp, #0x28] ldr w15, [fp, #0x44] str w15, [x14, #0x08] ldr x14, [fp, #0x38] ldr w14, [x14] sub w14, w14, #1 ldr x15, [fp, #0x28] str w14, [x15, #0x0C] ldr x14, [fp, #0x28] ldr w15, [fp, #0x6C] str w15, [x14, #0x10] ldr x14, [fp, #0x28] ldr x15, [fp, #0x60] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w0, [fp, #0x30] add w0, w0, #1 ldr x1, [fp, #0x38] str w0, [x1] ldr x0, [fp, #0x70] ldr w0, [x0, #0x44] add w0, w0, #1 ldr x1, [fp, #0x70] str w0, [x1, #0x44] b G_M000_IG25 G_M000_IG25: b G_M000_IG26 G_M000_IG26: mov w0, #1 G_M000_IG27: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1432 37: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:TryInsert(int,System.__Canon,ubyte) [Tier0, IL size=569, code size=1432] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:Initialize(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str x0, [fp, #0x48] str x0, [fp, #0x40] str w1, [fp, #0x3C] G_M000_IG02: ldr w0, [fp, #0x3C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x38] ldr w1, [fp, #0x38] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x30] ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x18] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x18] str x1, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr w1, [fp, #0x38] sxtw x1, w1 ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x28] ldr x0, [fp, #0x40] movn w1, #0 str w1, [x0, #0x3C] ldr w0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x40] str x0, [x14, #0x30] ldr x14, [fp, #0x40] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x40] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x38] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 272 38: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:Initialize(int) [Tier0, IL size=56, code size=272] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:GetBucket(uint):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x2, [fp, #0x28] ldr x2, [x2, #0x08] str x2, [fp, #0x18] ldr x2, [fp, #0x28] ldr x2, [x2, #0x30] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] ldr w0, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x18] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG04 add x0, x1, x0, LSL #2 add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 112 39: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:GetBucket(uint) [Tier0, IL size=29, code size=112] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:Resize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x18] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 40: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:Resize() [Tier0, IL size=19, code size=84] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:Resize(int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x50] str xzr, [fp, #0x40] str xzr, [fp, #0x38] str xzr, [fp, #0x28] str x0, [fp, #0x68] str x0, [fp, #0x60] str w1, [fp, #0x5C] str w2, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x60] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x10] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x18] str x1, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr w1, [fp, #0x5C] sxtw x1, w1 ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x50] ldr x0, [fp, #0x60] ldr w0, [x0, #0x38] str w0, [fp, #0x4C] ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x1, [fp, #0x50] ldr w2, [fp, #0x4C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w1, #0xD1FFAB1E str w1, [fp, #0x18] b G_M000_IG06 G_M000_IG06: ldr w1, [fp, #0x5C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x60] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x5C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x60] str x0, [x1, #0x30] str wzr, [fp, #0x30] b G_M000_IG09 G_M000_IG07: ldr x1, [fp, #0x50] ldr w0, [fp, #0x30] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1, #0x0C] cmn w1, #1 blt G_M000_IG08 ldr x1, [fp, #0x50] ldr w0, [fp, #0x30] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1, #0x08] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x14, [fp, #0x50] ldr w15, [fp, #0x30] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG13 mov w12, #24 madd x14, x15, x12, x14 add x14, x14, #16 add x14, x14, #12 ldr x15, [fp, #0x28] ldr w15, [x15] sub w15, w15, #1 str w15, [x14] ldr w14, [fp, #0x30] add w14, w14, #1 ldr x15, [fp, #0x28] str w14, [x15] G_M000_IG08: ldr w14, [fp, #0x30] add w14, w14, #1 str w14, [fp, #0x30] G_M000_IG09: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #24 mov w1, #241 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w1, [fp, #0x30] ldr w0, [fp, #0x4C] cmp w1, w0 blt G_M000_IG07 ldr x14, [fp, #0x60] add x14, x14, #16 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF G_M000_IG12: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 552 41: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:Resize(int,bool) [Tier0, IL size=254, code size=552] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 42: JIT compiled BenchmarkDotNet.Engines.Engine+Signals+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 43: JIT compiled BenchmarkDotNet.Engines.Engine+Signals+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:ToDictionary[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.Collections.Generic.KeyValuePair`2[int,System.__Canon]],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],int]):System.Collections.Generic.Dictionary`2[System.__Canon,int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] str x3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] mov x4, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 44: JIT compiled System.Linq.Enumerable:ToDictionary[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.Collections.Generic.KeyValuePair`2[int,System.__Canon]],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],int]) [Tier0, IL size=10, code size=136] ; Assembly listing for method System.Linq.Enumerable:ToDictionary[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.Collections.Generic.KeyValuePair`2[int,System.__Canon]],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],int],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):System.Collections.Generic.Dictionary`2[System.__Canon,int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #48 mov x10, #128 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) add x5, sp, #0xD1FFAB1E str x5, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] str x3, [fp, #0xD1FFAB1E] str x4, [fp, #0xD1FFAB1E] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG05 mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0xD0] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xD0] G_M000_IG08: ldr x0, [fp, #0xD0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG37 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x0, [x0, #0x18] cmp x0, #64 ble G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0x30] ldr x0, [x0, #0x40] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x30] ldr x0, [x0, #0x40] str x0, [fp, #0x80] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x80] G_M000_IG12: ldr x0, [fp, #0x80] str x0, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] ldr x11, [fp, #0x78] ldr x1, [fp, #0x78] ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x48] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG15: ldr x0, [fp, #0x48] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x50] G_M000_IG16: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x18] cmp x0, #72 ble G_M000_IG20 G_M000_IG18: ldr x0, [fp, #0x28] ldr x0, [x0, #0x48] cbz x0, G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x28] ldr x0, [x0, #0x48] str x0, [fp, #0x70] b G_M000_IG21 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x70] G_M000_IG21: ldr x0, [fp, #0x70] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF8] ldr x0, [fp, #0xF8] cbz x0, G_M000_IG27 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x18] cmp x0, #96 ble G_M000_IG24 G_M000_IG22: ldr x0, [fp, #0x20] ldr x0, [x0, #0x60] cbz x0, G_M000_IG24 G_M000_IG23: ldr x0, [fp, #0x20] ldr x0, [x0, #0x60] str x0, [fp, #0x58] b G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG25: ldr x0, [fp, #0x58] ldr x1, [fp, #0xF8] ldr x2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] ldr x4, [fp, #0xD1FFAB1E] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG26: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] cmp x0, #80 ble G_M000_IG30 G_M000_IG28: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] cbz x0, G_M000_IG30 G_M000_IG29: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] str x0, [fp, #0x68] b G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x68] G_M000_IG31: ldr x0, [fp, #0x68] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF0] ldr x0, [fp, #0xF0] cbz x0, G_M000_IG37 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x18] cmp x0, #88 ble G_M000_IG34 G_M000_IG32: ldr x0, [fp, #0x10] ldr x0, [x0, #0x58] cbz x0, G_M000_IG34 G_M000_IG33: ldr x0, [fp, #0x10] ldr x0, [x0, #0x58] str x0, [fp, #0x60] b G_M000_IG35 G_M000_IG34: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x60] G_M000_IG35: ldr x0, [fp, #0x60] ldr x1, [fp, #0xF0] ldr x2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] ldr x4, [fp, #0xD1FFAB1E] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG36: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG39 G_M000_IG38: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0xC0] b G_M000_IG40 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xC0] G_M000_IG40: ldr x0, [fp, #0xC0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr w1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xC8] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x30] cbz x0, G_M000_IG42 G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x30] str x0, [fp, #0xB8] b G_M000_IG43 G_M000_IG42: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xB8] G_M000_IG43: ldr x0, [fp, #0xB8] str x0, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] ldr x11, [fp, #0xB0] ldr x1, [fp, #0xB0] ldr x1, [x1] blr x1 str x0, [fp, #0xE8] G_M000_IG44: b G_M000_IG51 G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x38] cbz x0, G_M000_IG47 G_M000_IG46: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x38] str x0, [fp, #0xA8] b G_M000_IG48 G_M000_IG47: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xA8] G_M000_IG48: ldr x0, [fp, #0xA8] str x0, [fp, #0xA0] ldr x0, [fp, #0xE8] ldr x11, [fp, #0xA0] ldr x1, [fp, #0xA0] ldr x1, [x1] blr x1 str x0, [fp, #0x90] str x1, [fp, #0x98] G_M000_IG49: ldp x0, x1, [fp, #0x90] stp x0, x1, [fp, #0xD8] G_M000_IG50: ldr x1, [fp, #0xD8] ldr x2, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3, #0x18] blr x3 str x0, [fp, #0x88] ldr x1, [fp, #0xD8] ldr x2, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3, #0x18] blr x3 str w0, [fp, #0x3C] ldr w2, [fp, #0x3C] ldr x1, [fp, #0x88] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG51: ldr w0, [fp, #0x40] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #0 bgt G_M000_IG53 G_M000_IG52: add x0, fp, #64 mov w1, #150 bl CORINFO_HELP_PATCHPOINT G_M000_IG53: ldr x0, [fp, #0xE8] movz x11, #168 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG45 b G_M000_IG54 G_M000_IG54: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG58 G_M000_IG55: nop G_M000_IG56: ldr x0, [fp, #0xD1FFAB1E] G_M000_IG57: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG58: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG59: ldr x0, [fp, #0xE8] cbz x0, G_M000_IG60 ldr x0, [fp, #0xE8] movz x11, #176 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG60: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1560 45: JIT compiled System.Linq.Enumerable:ToDictionary[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.Collections.Generic.KeyValuePair`2[int,System.__Canon]],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],System.__Canon],System.Func`2[System.Collections.Generic.KeyValuePair`2[int,System.__Canon],int],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=175, code size=1560] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x38] ldr x1, [fp, #0x18] ldr w1, [x1, #0x40] sub w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 46: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:get_Count() [Tier0, IL size=14, code size=40] ; Assembly listing for method System.Collections.Generic.Dictionary`2[System.__Canon,int]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x40] str xzr, [fp, #0x38] str x0, [fp, #0x68] str x0, [fp, #0x60] str w1, [fp, #0x5C] str x2, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x5C] tbz w0, #31, G_M000_IG03 mov w0, #22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x5C] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x60] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x14, [fp, #0x60] str x14, [fp, #0x40] ldr x14, [fp, #0x50] str x14, [fp, #0x38] ldr x14, [fp, #0x50] cbnz x14, G_M000_IG08 ldr x14, [fp, #0x60] ldr x14, [x14] str x14, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] str x0, [fp, #0x28] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG07: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] G_M000_IG08: ldr x14, [fp, #0x40] add x14, x14, #24 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x60] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG13 ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG13 ldr x0, [fp, #0x60] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG11: ldr x0, [fp, #0x30] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x60] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG12: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG13: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 500 47: JIT compiled System.Collections.Generic.Dictionary`2[System.__Canon,int]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=136, code size=500] ; Assembly listing for method System.Collections.Generic.Dictionary`2[System.__Canon,int]:Initialize(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str x0, [fp, #0x48] str x0, [fp, #0x40] str w1, [fp, #0x3C] G_M000_IG02: ldr w0, [fp, #0x3C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x38] ldr w1, [fp, #0x38] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x30] ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x18] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x28] str x1, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr w1, [fp, #0x38] sxtw x1, w1 ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x28] ldr x0, [fp, #0x40] movn w1, #0 str w1, [x0, #0x3C] ldr w0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x40] str x0, [x14, #0x30] ldr x14, [fp, #0x40] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x40] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x38] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 272 48: JIT compiled System.Collections.Generic.Dictionary`2[System.__Canon,int]:Initialize(int) [Tier0, IL size=56, code size=272] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:System.Collections.Generic.IEnumerable>.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.Collections.Generic.KeyValuePair`2[int,System.__Canon]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x28] str x0, [fp, #0x48] str x0, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] str x0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x8, [fp, #0x28] add x8, x8, #8 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] str x0, [fp, #0x38] ldr x0, [fp, #0x38] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] str x0, [fp, #0x30] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG10: ldr x0, [fp, #0x30] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] str x0, [fp, #0x38] ldr x0, [fp, #0x38] G_M000_IG11: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 304 49: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:System.Collections.Generic.IEnumerable>.GetEnumerator() [Tier0, IL size=30, code size=304] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:GetEnumerator():System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x58] str x0, [fp, #0x50] str x8, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG05: add x0, fp, #32 ldr x1, [fp, #0x18] ldr x2, [fp, #0x50] mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x48] add x13, fp, #32 bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 192 50: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:GetEnumerator() [Tier0, IL size=8, code size=192] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:.ctor(System.Collections.Generic.Dictionary`2[int,System.__Canon],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str w3, [fp, #0x14] G_M000_IG02: ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x18] ldr w0, [x0, #0x44] ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] str wzr, [x0, #0x0C] ldr x0, [fp, #0x28] ldr w1, [fp, #0x14] str w1, [x0, #0x10] ldr x0, [fp, #0x28] stp xzr, xzr, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 51: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:.ctor(System.Collections.Generic.Dictionary`2[int,System.__Canon],int) [Tier0, IL size=46, code size=88] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x1, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr x0, [fp, #0x50] ldr w0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x1, [x1] ldr w1, [x1, #0x44] cmp w0, w1 beq G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG08 G_M000_IG03: ldr x0, [fp, #0x50] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x30] ldr x0, [fp, #0x50] ldr w0, [x0, #0x0C] str w0, [fp, #0x3C] ldr w0, [fp, #0x3C] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1, #0x0C] ldr x0, [fp, #0x30] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG12 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr w0, [x0, #0x0C] cmn w0, #1 blt G_M000_IG08 stp xzr, xzr, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG05 G_M000_IG04: ldr x3, [fp, #0x48] ldr x3, [x3, #0x30] ldr x3, [x3] ldr x3, [x3, #0x18] str x3, [fp, #0x18] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG06: ldr x3, [fp, #0x40] ldr x3, [x3] ldr x2, [fp, #0x40] ldr w2, [x2, #0x10] add x0, fp, #32 ldr x1, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x50] add x14, x14, #24 add x13, fp, #32 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG08: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #16 mov w1, #94 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0x50] ldr w0, [x0, #0x0C] ldr x1, [fp, #0x50] ldr x1, [x1] ldr w1, [x1, #0x38] cmp w0, w1 blo G_M000_IG03 ldr x0, [fp, #0x50] ldr x0, [x0] ldr w0, [x0, #0x38] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1, #0x0C] ldr x0, [fp, #0x50] stp xzr, xzr, [x0, #0x18] mov w0, wzr G_M000_IG11: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 456 52: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:MoveNext() [Tier0, IL size=146, code size=456] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:.ctor(int,System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str x3, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x28] ldr w15, [fp, #0x1C] str w15, [x14, #0x08] ldr x14, [fp, #0x28] ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 56 53: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:.ctor(int,System.__Canon) [Tier0, IL size=15, code size=56] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:get_Current():System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] G_M000_IG03: ldp x1, x2, [x0, #0x18] stp x1, x2, [fp, #0x10] G_M000_IG04: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 48 54: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:get_Current() [Tier0, IL size=7, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals+<>c:<.cctor>b__5_0(System.Collections.Generic.KeyValuePair`2[int,System.String]):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 55: JIT compiled BenchmarkDotNet.Engines.Engine+Signals+<>c:<.cctor>b__5_0(System.Collections.Generic.KeyValuePair`2[int,System.String]) [Tier0, IL size=8, code size=64] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:get_Value():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 56: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:get_Value() [Tier0, IL size=7, code size=32] ; Assembly listing for method BenchmarkDotNet.Engines.Engine+Signals+<>c:<.cctor>b__5_1(System.Collections.Generic.KeyValuePair`2[int,System.String]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 57: JIT compiled BenchmarkDotNet.Engines.Engine+Signals+<>c:<.cctor>b__5_1(System.Collections.Generic.KeyValuePair`2[int,System.String]) [Tier0, IL size=8, code size=64] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:get_Key():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 58: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.__Canon]:get_Key() [Tier0, IL size=7, code size=32] ; Assembly listing for method System.Collections.Generic.Dictionary`2[System.__Canon,int]:Add(System.__Canon,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str w0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 59: JIT compiled System.Collections.Generic.Dictionary`2[System.__Canon,int]:Add(System.__Canon,int) [Tier0, IL size=11, code size=68] ; Assembly listing for method System.Collections.Generic.Dictionary`2[System.__Canon,int]:TryInsert(System.__Canon,int,ubyte):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp str xzr, [fp, #0x98] str xzr, [fp, #0x90] str xzr, [fp, #0x80] str xzr, [fp, #0x70] str x0, [fp, #0xB8] str x0, [fp, #0xB0] str x1, [fp, #0xA8] str w2, [fp, #0xA4] str w3, [fp, #0xA0] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr x0, [fp, #0xA8] cbnz x0, G_M000_IG03 mov w0, #4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x08] cbnz x0, G_M000_IG04 ldr x0, [fp, #0xB0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] str x0, [fp, #0x98] ldr x0, [fp, #0xB0] ldr x0, [x0, #0x18] str x0, [fp, #0x90] b G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x30] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x30] str x0, [fp, #0x60] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x60] G_M000_IG08: ldr x0, [fp, #0x60] str x0, [fp, #0x58] ldr x0, [fp, #0x90] ldr x11, [fp, #0x58] ldr x1, [fp, #0xA8] ldr x2, [fp, #0x58] ldr x2, [x2] blr x2 str w0, [fp, #0x54] b G_M000_IG09 G_M000_IG09: ldr w0, [fp, #0x54] str w0, [fp, #0x8C] str wzr, [fp, #0x88] ldr x0, [fp, #0xB0] ldr w1, [fp, #0x8C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr w0, [x0] sub w0, w0, #1 str w0, [fp, #0x7C] b G_M000_IG10 G_M000_IG10: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #48 mov w1, #241 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr w0, [fp, #0x7C] ldr x1, [fp, #0x98] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG24 ldr x0, [fp, #0x98] ldr w1, [fp, #0x7C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x08] ldr w1, [fp, #0x8C] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x38] cbz x0, G_M000_IG14 G_M000_IG13: ldr x1, [fp, #0x20] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x38] str x1, [fp, #0x48] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x48] G_M000_IG15: ldr x1, [fp, #0x48] str x1, [fp, #0x40] ldr x1, [fp, #0x98] ldr w0, [fp, #0x7C] ldr w11, [x1, #0x08] cmp w0, w11 bhs G_M000_IG30 mov w11, #24 madd x1, x0, x11, x1 add x1, x1, #16 ldr x1, [x1] ldr x0, [fp, #0x90] ldr x11, [fp, #0x40] ldr x2, [fp, #0xA8] ldr x3, [fp, #0x40] ldr x3, [x3] blr x3 cbz w0, G_M000_IG23 ldr w0, [fp, #0xA0] uxtb w0, w0 cmp w0, #1 bne G_M000_IG17 ldr x0, [fp, #0x98] ldr w1, [fp, #0x7C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w1, [fp, #0xA4] str w1, [x0, #0x10] mov w0, #1 G_M000_IG16: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG17: ldr w0, [fp, #0xA0] uxtb w0, w0 cmp w0, #2 bne G_M000_IG21 ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x40] cbz x0, G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x40] str x0, [fp, #0x38] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x38] G_M000_IG20: ldr x0, [fp, #0x38] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: mov w0, wzr G_M000_IG22: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG23: ldr x0, [fp, #0x98] ldr w1, [fp, #0x7C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x0C] str w0, [fp, #0x7C] ldr w0, [fp, #0x88] add w0, w0, #1 str w0, [fp, #0x88] ldr w0, [fp, #0x88] ldr x1, [fp, #0x98] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG10 G_M000_IG24: ldr x0, [fp, #0xB0] ldr w0, [x0, #0x40] cmp w0, #0 ble G_M000_IG25 ldr x0, [fp, #0xB0] ldr w0, [x0, #0x3C] str w0, [fp, #0x78] ldr x0, [fp, #0x98] ldr x1, [fp, #0xB0] ldr w1, [x1, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x0C] neg w0, w0 sub w0, w0, #3 ldr x1, [fp, #0xB0] str w0, [x1, #0x3C] ldr x0, [fp, #0xB0] ldr w0, [x0, #0x40] sub w0, w0, #1 ldr x1, [fp, #0xB0] str w0, [x1, #0x40] b G_M000_IG27 G_M000_IG25: ldr x0, [fp, #0xB0] ldr w0, [x0, #0x38] str w0, [fp, #0x6C] ldr w0, [fp, #0x6C] ldr x1, [fp, #0x98] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG26 ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB0] ldr w1, [fp, #0x8C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x80] G_M000_IG26: ldr w14, [fp, #0x6C] str w14, [fp, #0x78] ldr w14, [fp, #0x6C] add w14, w14, #1 ldr x15, [fp, #0xB0] str w14, [x15, #0x38] ldr x14, [fp, #0xB0] ldr x14, [x14, #0x10] str x14, [fp, #0x98] G_M000_IG27: ldr x14, [fp, #0x98] ldr w15, [fp, #0x78] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG30 mov w12, #24 madd x14, x15, x12, x14 add x14, x14, #16 str x14, [fp, #0x70] ldr x14, [fp, #0x70] ldr w15, [fp, #0x8C] str w15, [x14, #0x08] ldr x14, [fp, #0x80] ldr w14, [x14] sub w14, w14, #1 ldr x15, [fp, #0x70] str w14, [x15, #0x0C] ldr x14, [fp, #0x70] ldr x15, [fp, #0xA8] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x1, [fp, #0x70] ldr w0, [fp, #0xA4] str w0, [x1, #0x10] ldr w1, [fp, #0x78] add w1, w1, #1 ldr x0, [fp, #0x80] str w1, [x0] ldr x1, [fp, #0xB0] ldr w1, [x1, #0x44] add w1, w1, #1 ldr x0, [fp, #0xB0] str w1, [x0, #0x44] ldr w1, [fp, #0x88] cmp w1, #100 bls G_M000_IG28 ldr x1, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG28 ldr x1, [fp, #0x98] ldr w1, [x1, #0x08] ldr x0, [fp, #0xB0] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG28: mov w0, #1 G_M000_IG29: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG30: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1360 60: JIT compiled System.Collections.Generic.Dictionary`2[System.__Canon,int]:TryInsert(System.__Canon,int,ubyte) [Tier0, IL size=569, code size=1360] ; Assembly listing for method System.Collections.Generic.Dictionary`2[System.__Canon,int]:GetBucket(uint):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x2, [fp, #0x28] ldr x2, [x2, #0x08] str x2, [fp, #0x18] ldr x2, [fp, #0x28] ldr x2, [x2, #0x30] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] ldr w0, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x18] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG04 add x0, x1, x0, LSL #2 add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 112 61: JIT compiled System.Collections.Generic.Dictionary`2[System.__Canon,int]:GetBucket(uint) [Tier0, IL size=29, code size=112] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 62: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.__Canon]:Dispose() [Tier0, IL size=1, code size=24] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:get_Item(int):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] cbz x0, G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr w0, [fp, #0x24] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str xzr, [fp, #0x10] ldr x0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 63: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:get_Item(int) [Tier0, IL size=39, code size=120] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.__Canon]:FindValue(int):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x78] str x0, [fp, #0x70] str w1, [fp, #0x6C] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG03 G_M000_IG03: str xzr, [fp, #0x60] ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] cbz x0, G_M000_IG19 ldr x0, [fp, #0x70] ldr x0, [x0, #0x18] str x0, [fp, #0x50] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG08 add x0, fp, #108 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x4C] ldr x0, [fp, #0x70] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0x48] ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] str x0, [fp, #0x40] str wzr, [fp, #0x3C] ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #99 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x48] ldr x1, [fp, #0x40] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG19 ldr x0, [fp, #0x40] ldr w1, [fp, #0x48] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG20 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 str x0, [fp, #0x60] ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] ldr w1, [fp, #0x4C] cmp w0, w1 bne G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x60] ldr w1, [x1, #0x10] ldr w2, [fp, #0x6C] ldr x3, [fp, #0x10] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 cbnz w0, G_M000_IG14 G_M000_IG07: ldr x0, [fp, #0x60] ldr w0, [x0, #0x0C] str w0, [fp, #0x48] ldr w0, [fp, #0x3C] add w0, w0, #1 str w0, [fp, #0x3C] ldr w0, [fp, #0x3C] ldr x1, [fp, #0x40] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG04 b G_M000_IG13 G_M000_IG08: ldr x0, [fp, #0x50] ldr w1, [fp, #0x6C] movz x11, #216 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str w0, [fp, #0x38] ldr x0, [fp, #0x70] ldr w1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0x34] ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] str x0, [fp, #0x28] str wzr, [fp, #0x24] ldr w0, [fp, #0x34] sub w0, w0, #1 str w0, [fp, #0x34] G_M000_IG09: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #24 mov w1, #212 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w1, [fp, #0x34] ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] cmp w1, w0 bhs G_M000_IG19 ldr x1, [fp, #0x28] ldr w0, [fp, #0x34] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG20 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 str x1, [fp, #0x60] ldr x1, [fp, #0x60] ldr w1, [x1, #0x08] ldr w0, [fp, #0x38] cmp w1, w0 bne G_M000_IG12 ldr x1, [fp, #0x60] ldr w1, [x1, #0x10] ldr x0, [fp, #0x50] ldr w2, [fp, #0x6C] movz x11, #224 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 cbnz w0, G_M000_IG14 G_M000_IG12: ldr x0, [fp, #0x60] ldr w0, [x0, #0x0C] str w0, [fp, #0x34] ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x24] ldr w0, [fp, #0x24] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG09 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG14: ldr x0, [fp, #0x60] ldrsb wzr, [x0] ldr x0, [fp, #0x60] str x0, [fp, #0x58] G_M000_IG15: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #24 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr x0, [fp, #0x58] G_M000_IG18: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG19: str xzr, [fp, #0x58] b G_M000_IG15 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 800 64: JIT compiled System.Collections.Generic.Dictionary`2[int,System.__Canon]:FindValue(int) [Tier0, IL size=299, code size=800] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:get_Default():System.Collections.Generic.EqualityComparer`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #30 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 65: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:get_Default() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 66: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:.cctor() [Tier0, IL size=26, code size=112] ; Assembly listing for method System.Collections.Generic.EnumEqualityComparer`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 67: JIT compiled System.Collections.Generic.EnumEqualityComparer`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 68: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.EnumEqualityComparer`1[int]:Equals(int,int):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x14] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 69: JIT compiled System.Collections.Generic.EnumEqualityComparer`1[int]:Equals(int,int) [Tier0, IL size=8, code size=56] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:EnumEquals[int](int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] str w1, [fp, #0x18] G_M000_IG02: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x18] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 70: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:EnumEquals[int](int,int) [Tier0, IL size=5, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:WriteLine(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 71: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:WriteLine(System.String) [Tier0, IL size=13, code size=68] ; Assembly listing for method System.SpanHelpers:NonPackedIndexOfAnyValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,short,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 19 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w3, #8 bge G_M000_IG22 G_M000_IG03: mov x4, xzr cmp w3, #4 blt G_M000_IG13 sxth w5, w1 align [0 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: sub w3, w3, #4 lsl x6, x4, #1 add x6, x0, x6 ldrsh w7, [x6] cmp w7, w5 beq G_M000_IG21 G_M000_IG05: sxth w8, w2 cmp w7, w8 cset x7, eq tst w7, #255 bne G_M000_IG21 G_M000_IG06: ldrsh w7, [x6, #0x02] cmp w7, w5 beq G_M000_IG20 G_M000_IG07: cmp w7, w8 cset x7, eq tst w7, #255 bne G_M000_IG20 G_M000_IG08: ldrsh w7, [x6, #0x04] cmp w7, w5 beq G_M000_IG19 G_M000_IG09: cmp w7, w8 cset x7, eq tst w7, #255 bne G_M000_IG19 G_M000_IG10: ldrsh w7, [x6, #0x06] cmp w7, w5 beq G_M000_IG18 G_M000_IG11: cmp w7, w8 cset x7, eq tst w7, #255 bne G_M000_IG18 G_M000_IG12: add x4, x4, #4 cmp w3, #4 bge G_M000_IG04 G_M000_IG13: cmp w3, #0 ble G_M000_IG28 sxth w5, w1 align [4 bytes for IG14] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG14: sub w3, w3, #1 lsl x8, x4, #1 ldrsh w7, [x0, x8] cmp w7, w5 beq G_M000_IG21 G_M000_IG15: sxth w8, w2 cmp w7, w8 cset x1, eq tst w1, #255 bne G_M000_IG21 G_M000_IG16: add x4, x4, #1 cmp w3, #0 bgt G_M000_IG14 G_M000_IG17: b G_M000_IG28 G_M000_IG18: add w4, w4, #3 b G_M000_IG26 G_M000_IG19: add w4, w4, #2 b G_M000_IG26 G_M000_IG20: add w4, w4, #1 b G_M000_IG26 G_M000_IG21: b G_M000_IG26 G_M000_IG22: sxth w5, w1 dup v16.8h, w5 sxth w8, w2 dup v17.8h, w8 mov x1, x0 sub w4, w3, #8 sbfiz x2, x4, #1, #32 add x4, x1, x2 align [0 bytes for IG23] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG23: ldr q18, [x1] cmeq v19.8h, v16.8h, v18.8h cmeq v18.8h, v17.8h, v18.8h orr v18.8h, v19.8h, v18.8h umaxp v19.4s, v18.4s, v18.4s umov x5, v19.d[0] cmp x5, #0 bne G_M000_IG25 add x1, x1, #16 cmp x1, x4 bls G_M000_IG23 G_M000_IG24: mov w0, w3 tst w0, #7 beq G_M000_IG28 ldr q18, [x4] cmeq v16.8h, v16.8h, v18.8h cmeq v17.8h, v17.8h, v18.8h orr v18.8h, v16.8h, v17.8h umaxp v16.4s, v18.4s, v18.4s umov x1, v16.d[0] cmp x1, #0 beq G_M000_IG28 lsr x0, x2, #1 ldr q16, [@RWD00] and v18.8h, v18.8h, v16.8h ldr q16, [@RWD16] ushl v16.8h, v18.8h, v16.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w4, w0, w1 b G_M000_IG26 G_M000_IG25: sub x4, x1, x0 lsr x0, x4, #1 ldr q16, [@RWD00] and v16.8h, v18.8h, v16.8h ldr q17, [@RWD16] ushl v16.8h, v16.8h, v17.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w4, w0, w1 G_M000_IG26: mov w0, w4 G_M000_IG27: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG28: movn w0, #0 G_M000_IG29: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 8000800080008000h, 8000800080008000h RWD16 dq FFF4FFF3FFF2FFF1h, FFF8FFF7FFF6FFF5h ; Total bytes of code 508 72: JIT compiled System.SpanHelpers:NonPackedIndexOfAnyValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,short,int) [Tier1, IL size=1156, code size=508] ; Assembly listing for method BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 73: JIT compiled BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 74: JIT compiled BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:SkipWhile[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG07: ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG08: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 75: JIT compiled System.Linq.Enumerable:SkipWhile[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]) [Tier0, IL size=28, code size=188] ; Assembly listing for method System.Linq.Enumerable:SkipWhileIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x18] add x14, x14, #40 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 172 76: JIT compiled System.Linq.Enumerable:SkipWhileIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]) [Tier0, IL size=22, code size=172] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x38] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x3C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 77: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method System.Linq.Enumerable:Skip[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],int):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str x0, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str w2, [fp, #0x54] G_M000_IG02: ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x54] cmp w0, #0 bgt G_M000_IG13 ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x20] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x20] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG10 ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG09: ldr x0, [fp, #0x18] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0x58] G_M000_IG11: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG12: str wzr, [fp, #0x54] b G_M000_IG21 G_M000_IG13: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x40] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x40] G_M000_IG16: ldr x0, [fp, #0x40] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG21 ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x30] b G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x30] G_M000_IG19: ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x11, [fp, #0x28] ldr w1, [fp, #0x54] ldr x2, [fp, #0x28] ldr x2, [x2] blr x2 G_M000_IG20: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG21: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x38] b G_M000_IG24 G_M000_IG23: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG24: ldr x0, [fp, #0x38] ldr x1, [fp, #0x58] ldr w2, [fp, #0x54] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG25: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 576 78: JIT compiled System.Linq.Enumerable:Skip[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],int) [Tier0, IL size=63, code size=576] ; Assembly listing for method System.Linq.Enumerable:SkipIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],int):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x40] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str w2, [fp, #0x54] G_M000_IG02: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x38] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x60] movz x1, #72 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG05: ldr x0, [fp, #0x38] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG10 ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x18] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG08: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x58] ldr w2, [fp, #0x54] movn w3, #0 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] str x0, [fp, #0x40] ldr x0, [fp, #0x40] G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG13: ldr x0, [fp, #0x28] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x48] ldr w2, [fp, #0x54] movn w3, #0xD1FFAB1E LSL #16 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x30] str x0, [fp, #0x40] ldr x0, [fp, #0x40] G_M000_IG14: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 396 79: JIT compiled System.Linq.Enumerable:SkipIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],int) [Tier0, IL size=36, code size=396] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] str w1, [x0, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] str w1, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 80: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],int,int) [Tier0, IL size=28, code size=96] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 81: JIT compiled System.Linq.Enumerable+Iterator`1[System.__Canon]:.ctor() [Tier0, IL size=18, code size=56] ; Assembly listing for method System.Linq.Enumerable:FirstOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x2, [fp, #0x30] ldr x2, [x2, #0x10] ldr x2, [x2, #0x10] str x2, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: add x2, fp, #32 ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 82: JIT compiled System.Linq.Enumerable:FirstOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=9, code size=120] ; Assembly listing for method System.Linq.Enumerable:TryGetFirst[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],byref):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xE0]! mov fp, sp add x9, fp, #144 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] add x3, sp, #224 str x3, [fp, #0xD8] str x0, [fp, #0xD0] str x0, [fp, #0xC8] str x1, [fp, #0xC0] str x2, [fp, #0xB8] G_M000_IG02: ldr x0, [fp, #0xC0] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x88] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x88] G_M000_IG06: ldr x0, [fp, #0x88] ldr x1, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] cbz x0, G_M000_IG12 ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] cmp x0, #64 ble G_M000_IG09 G_M000_IG07: ldr x0, [fp, #0x28] ldr x0, [x0, #0x40] cbz x0, G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x28] ldr x0, [x0, #0x40] str x0, [fp, #0x38] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG10: ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0xB0] ldr x11, [fp, #0x30] ldr x1, [fp, #0xB8] ldr x2, [fp, #0x30] ldr x2, [x2] blr x2 G_M000_IG11: ldp fp, lr, [sp], #0xE0 ret lr G_M000_IG12: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x80] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x80] G_M000_IG15: ldr x0, [fp, #0x80] ldr x1, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xA8] ldr x0, [fp, #0xA8] cbz x0, G_M000_IG25 ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x08] cmp x0, #48 ble G_M000_IG18 G_M000_IG16: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] cbz x0, G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] str x0, [fp, #0x58] b G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG19: ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0xA8] ldr x11, [fp, #0x50] ldr x1, [fp, #0x50] ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG38 ldr x0, [fp, #0xB8] mov w1, #1 strb w1, [x0] ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] cmp x0, #56 ble G_M000_IG22 G_M000_IG20: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] cbz x0, G_M000_IG22 G_M000_IG21: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] str x0, [fp, #0x48] b G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG23: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0xA8] ldr x11, [fp, #0x40] mov w1, wzr ldr x2, [fp, #0x40] ldr x2, [x2] blr x2 G_M000_IG24: ldp fp, lr, [sp], #0xE0 ret lr G_M000_IG25: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG27 G_M000_IG26: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x78] b G_M000_IG28 G_M000_IG27: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x78] G_M000_IG28: ldr x0, [fp, #0x78] str x0, [fp, #0x70] ldr x0, [fp, #0xC0] ldr x11, [fp, #0x70] ldr x1, [fp, #0x70] ldr x1, [x1] blr x1 str x0, [fp, #0xA0] G_M000_IG29: ldr x0, [fp, #0xA0] movz x11, #232 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbz w0, G_M000_IG33 ldr x0, [fp, #0xB8] mov w11, #1 strb w11, [x0] ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x68] b G_M000_IG32 G_M000_IG31: ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x68] G_M000_IG32: ldr x0, [fp, #0x68] str x0, [fp, #0x60] ldr x0, [fp, #0xA0] ldr x11, [fp, #0x60] ldr x1, [fp, #0x60] ldr x1, [x1] blr x1 str x0, [fp, #0x98] b G_M000_IG34 G_M000_IG33: b G_M000_IG36 G_M000_IG34: ldr x0, [fp, #0xD8] bl G_M000_IG42 G_M000_IG35: b G_M000_IG40 G_M000_IG36: ldr x0, [fp, #0xD8] bl G_M000_IG42 G_M000_IG37: nop G_M000_IG38: ldr x0, [fp, #0xB8] strb wzr, [x0] str xzr, [fp, #0x90] ldr x0, [fp, #0x90] G_M000_IG39: ldp fp, lr, [sp], #0xE0 ret lr G_M000_IG40: ldr x0, [fp, #0x98] G_M000_IG41: ldp fp, lr, [sp], #0xE0 ret lr G_M000_IG42: stp fp, lr, [sp, #-0x20]! add x3, fp, #224 str x3, [sp, #0x18] G_M000_IG43: ldr x0, [fp, #0xA0] cbz x0, G_M000_IG44 ldr x0, [fp, #0xA0] movz x11, #240 movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG44: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 992 83: JIT compiled System.Linq.Enumerable:TryGetFirst[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],byref) [Tier0, IL size=113, code size=992] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:TryGetFirst(byref):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str xzr, [fp, #0x58] str xzr, [fp, #0x50] str xzr, [fp, #0x48] add x2, sp, #128 str x2, [fp, #0x78] str x0, [fp, #0x70] str x0, [fp, #0x68] str x1, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x68] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x40] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG05: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x68] ldr x0, [x0, #0x18] ldr x11, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] blr x1 str x0, [fp, #0x58] G_M000_IG06: ldr x0, [fp, #0x68] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG10 ldr x0, [fp, #0x58] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbz w0, G_M000_IG10 ldr x0, [fp, #0x60] mov w11, #1 strb w11, [x0] ldr x0, [fp, #0x68] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x30] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG09: ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x58] ldr x11, [fp, #0x28] ldr x1, [fp, #0x28] ldr x1, [x1] blr x1 str x0, [fp, #0x50] b G_M000_IG11 G_M000_IG10: b G_M000_IG13 G_M000_IG11: ldr x0, [fp, #0x78] bl G_M000_IG19 G_M000_IG12: b G_M000_IG17 G_M000_IG13: ldr x0, [fp, #0x78] bl G_M000_IG19 G_M000_IG14: nop G_M000_IG15: ldr x0, [fp, #0x60] strb wzr, [x0] str xzr, [fp, #0x48] ldr x0, [fp, #0x48] G_M000_IG16: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG17: ldr x0, [fp, #0x50] G_M000_IG18: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG19: stp fp, lr, [sp, #-0x20]! add x3, fp, #128 str x3, [sp, #0x18] G_M000_IG20: ldr x0, [fp, #0x58] cbz x0, G_M000_IG21 ldr x0, [fp, #0x58] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG21: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 460 84: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:TryGetFirst(byref) [Tier0, IL size=68, code size=460] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldr w0, [x0, #0x38] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x30] ldr w0, [x0, #0x3C] str w0, [fp, #0x1C] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x1C] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x30] str wzr, [x0, #0x38] ldr x0, [fp, #0x30] str x0, [fp, #0x28] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] str x14, [fp, #0x28] G_M000_IG04: ldr x14, [fp, #0x30] ldr x15, [x14, #0x18] ldr x14, [fp, #0x28] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x30] ldr x15, [x14, #0x28] ldr x14, [fp, #0x28] add x14, x14, #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 192 85: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=67, code size=192] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipBeforeFirst(System.Collections.Generic.IEnumerator`1[System.__Canon]):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0] ldr x1, [fp, #0x20] ldr w1, [x1, #0x28] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 86: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipBeforeFirst(System.Collections.Generic.IEnumerator`1[System.__Canon]) [Tier0, IL size=13, code size=68] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipBefore(int,System.Collections.Generic.IEnumerator`1[System.__Canon]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str w1, [fp, #0x1C] str x2, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x20] ldr w1, [fp, #0x1C] ldr x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w1, [fp, #0x1C] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 76 87: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipBefore(int,System.Collections.Generic.IEnumerator`1[System.__Canon]) [Tier0, IL size=11, code size=76] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipAndCount(int,System.Collections.Generic.IEnumerator`1[System.__Canon]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str w1, [fp, #0x1C] str x2, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x20] ldr w1, [fp, #0x1C] ldr x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 88: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipAndCount(int,System.Collections.Generic.IEnumerator`1[System.__Canon]) [Tier0, IL size=8, code size=64] ; Assembly listing for method System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipAndCount(uint,System.Collections.Generic.IEnumerator`1[System.__Canon]):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str w1, [fp, #0x2C] str x2, [fp, #0x20] G_M000_IG02: str wzr, [fp, #0x1C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x20] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG05 ldr w0, [fp, #0x1C] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: ldr w0, [fp, #0x1C] add w0, w0, #1 str w0, [fp, #0x1C] G_M000_IG06: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #16 mov w1, #18 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x1C] ldr w11, [fp, #0x2C] cmp w0, w11 blo G_M000_IG03 ldr w0, [fp, #0x2C] G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 156 89: JIT compiled System.Linq.Enumerable+EnumerablePartition`1[System.__Canon]:SkipAndCount(uint,System.Collections.Generic.IEnumerator`1[System.__Canon]) [Tier0, IL size=24, code size=156] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x10] add x1, sp, #144 str x1, [fp, #0x88] str x0, [fp, #0x80] str x0, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x78] ldr w0, [x0, #0x38] str w0, [fp, #0x70] mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr w0, [fp, #0x70] cmp w0, #2 bhi G_M000_IG03 ldr w0, [fp, #0x70] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: str wzr, [fp, #0x74] b G_M000_IG26 G_M000_IG04: ldr x0, [fp, #0x78] movn w1, #0 str w1, [x0, #0x38] ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x50] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x50] G_M000_IG07: ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr x11, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] blr x1 ldr x14, [fp, #0x78] add x14, x14, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] movn w1, #2 str w1, [x0, #0x38] b G_M000_IG21 G_M000_IG08: ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x40] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG11: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] ldr x11, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x78] ldr x0, [x0, #0x20] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x68] ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 cbnz w0, G_M000_IG21 ldr x14, [fp, #0x78] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] mov w1, #1 str w1, [x0, #0x38] mov w1, #1 str w1, [fp, #0x74] b G_M000_IG26 G_M000_IG12: ldr x0, [fp, #0x78] movn w1, #2 str w1, [x0, #0x38] b G_M000_IG18 G_M000_IG13: ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x60] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x60] G_M000_IG16: ldr x0, [fp, #0x60] str x0, [fp, #0x58] ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] ldr x11, [fp, #0x58] ldr x1, [fp, #0x58] ldr x1, [x1] blr x1 ldr x14, [fp, #0x78] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] mov w1, #2 str w1, [x0, #0x38] mov w0, #1 str w0, [fp, #0x74] b G_M000_IG26 G_M000_IG17: ldr x0, [fp, #0x78] movn w1, #2 str w1, [x0, #0x38] G_M000_IG18: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #48 mov w1, #156 bl CORINFO_HELP_PATCHPOINT G_M000_IG20: ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG13 str wzr, [fp, #0x74] b G_M000_IG24 G_M000_IG21: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG23 G_M000_IG22: add x0, fp, #48 mov w1, #173 bl CORINFO_HELP_PATCHPOINT G_M000_IG23: ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG08 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG26 G_M000_IG25: ldr x0, [fp, #0x78] str xzr, [x0, #0x30] str wzr, [fp, #0x74] b G_M000_IG26 G_M000_IG26: ldr w0, [fp, #0x74] G_M000_IG27: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG28: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG29: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG30: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 ; Total bytes of code 904 90: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:MoveNext() [Tier0, IL size=222, code size=904] ; Assembly listing for method BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:b__1_0(System.String):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 91: JIT compiled BenchmarkDotNet.Autogenerated.UniqueProgramName+<>c:b__1_0(System.String) [Tier0, IL size=12, code size=60] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 92: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp add x1, sp, #48 str x1, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr w0, [x0, #0x38] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmn w0, #3 beq G_M000_IG03 ldr w0, [fp, #0x1C] sub w0, w0, #1 cmp w0, #1 bhi G_M000_IG06 G_M000_IG03: b G_M000_IG04 G_M000_IG04: ldr x0, [fp, #0x28] bl G_M000_IG07 G_M000_IG05: nop G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #48 str x3, [sp, #0x18] G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 128 93: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:System.IDisposable.Dispose() [Tier0, IL size=29, code size=128] ; Assembly listing for method System.Linq.Enumerable+d__248`1[System.__Canon]:<>m__Finally1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movn w11, #0 str w11, [x0, #0x38] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] cbz x0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 94: JIT compiled System.Linq.Enumerable+d__248`1[System.__Canon]:<>m__Finally1() [Tier0, IL size=27, code size=72] ; Assembly listing for method (dynamicClass):InvokeStub_EventSourceAttribute.set_Guid(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 95: JIT compiled (dynamicClass):InvokeStub_EventSourceAttribute.set_Guid(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventSourceAttribute.set_Name(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 96: JIT compiled (dynamicClass):InvokeStub_EventSourceAttribute.set_Name(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:Run(BenchmarkDotNet.Engines.IHost,System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xD0] ldr x0, [fp, #0xD0] ldr x1, [fp, #0xD0] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0xD8] G_M000_IG03: b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC0] ldr x1, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG05: ldr w0, [fp, #0xD8] sub w0, w0, #1 str w0, [fp, #0xD8] ldr w0, [fp, #0xD8] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #216 mov w1, #56 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG21 G_M000_IG09: nop G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x98] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0xA8] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xB8] ldr x0, [fp, #0xA0] ldr x1, [fp, #0x98] add x2, fp, #168 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str xzr, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr d0, [@RWD00] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x90] ldr x0, [fp, #0x90] ldr x1, [fp, #0xD1FFAB1E] mov w2, #20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x88] ldr x0, [fp, #0x88] ldr x1, [fp, #0xD1FFAB1E] mov w2, #15 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr x1, [fp, #0xD1FFAB1E] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x78] ldr x1, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E G_M000_IG11: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG13 G_M000_IG12: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF8] ldr x0, [fp, #0xF8] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF0] ldr x0, [fp, #0xF0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG14: movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xE0] ldr x0, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xE0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] G_M000_IG15: add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x10] G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x18] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [fp, #0x20] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x60] G_M000_IG17: ldr x0, [fp, #0x10] add x1, fp, #24 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 b G_M000_IG18 G_M000_IG18: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG24 G_M000_IG19: nop G_M000_IG20: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG21: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG23 ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG23: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr RWD00 dq 41ADCD6500000000h ; 250000000 ; Total bytes of code 2552 97: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:Run(BenchmarkDotNet.Engines.IHost,System.String) [Tier0, IL size=488, code size=2552] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] str x0, [fp, #0xA8] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xA8] add x14, x14, #64 ldr x15, [fp, #0xA0] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] ldr x0, [fp, #0x98] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0xA8] add x14, x14, #16 ldr x15, [fp, #0x98] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x90] ldr x0, [fp, #0xA8] str x0, [fp, #0x88] ldr x0, [fp, #0x90] str x0, [fp, #0x80] ldr x0, [fp, #0x90] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] str x14, [fp, #0x80] G_M000_IG03: ldr x14, [fp, #0x88] add x14, x14, #24 ldr x15, [fp, #0x80] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0xA8] str x0, [fp, #0x70] ldr x0, [fp, #0x78] str x0, [fp, #0x68] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x30] str x14, [fp, #0x68] G_M000_IG04: ldr x14, [fp, #0x70] add x14, x14, #32 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x60] ldr x0, [fp, #0xA8] str x0, [fp, #0x58] ldr x0, [fp, #0x60] str x0, [fp, #0x50] ldr x0, [fp, #0x60] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #6 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x38] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] str x14, [fp, #0x50] G_M000_IG05: ldr x14, [fp, #0x58] add x14, x14, #40 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0xA8] add x14, x14, #48 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0xA8] add x14, x14, #56 ldr x15, [fp, #0x40] bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 1048 98: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:.ctor() [Tier0, IL size=183, code size=1048] ; Assembly listing for method BenchmarkDotNet.Engines.Consumer:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 99: JIT compiled BenchmarkDotNet.Engines.Consumer:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarksGame.RegexRedux_1:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 100: JIT compiled BenchmarksGame.RegexRedux_1:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 101: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 102: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:WriteLine():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x1, [x1] ldr x1, [x1, #0x60] ldr x1, [x1, #0x08] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 103: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:WriteLine() [Tier0, IL size=12, code size=60] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetCurrent():BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 104: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetCurrent() [Tier0, IL size=6, code size=68] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x4C] ldr w1, [fp, #0x4C] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 bl System.Runtime.GCSettings:get_IsServerGC():bool str w0, [fp, #0x34] ldr w1, [fp, #0x34] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x1, ne str w1, [fp, #0x30] ldr w1, [fp, #0x30] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 bl System.Diagnostics.Debugger:get_IsAttached():bool str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 624 105: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:.ctor() [Tier0, IL size=131, code size=624] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetArchitecture():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str wzr, [fp, #0x2C] str xzr, [fp, #0x20] str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x2C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w1, [fp, #0x2C] str w1, [x0, #0x08] ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 106: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetArchitecture() [Tier0, IL size=20, code size=116] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetCurrentPlatform():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str wzr, [fp, #0x2C] str xzr, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x2C] ldr w0, [fp, #0x2C] cmp w0, #8 bhi G_M000_IG03 ldr w0, [fp, #0x2C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG19 G_M000_IG04: b G_M000_IG05 G_M000_IG05: mov w0, #3 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: b G_M000_IG08 G_M000_IG08: mov w0, #4 G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG10: b G_M000_IG11 G_M000_IG11: mov w0, #2 G_M000_IG12: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG13: mov w0, #1 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG14: mov w0, #5 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG15: mov w0, #6 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG16: mov w0, #7 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG17: mov w0, #8 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG18: mov w0, #9 str w0, [fp, #0x1C] b G_M000_IG20 G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG20: ldr w0, [fp, #0x1C] G_M000_IG21: ldp fp, lr, [sp], #0x30 ret lr RWD00 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 ; Total bytes of code 268 107: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetCurrentPlatform() [Tier0, IL size=75, code size=268] ; Assembly listing for method System.UInt64:CreateTruncating[uint](uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: b G_M000_IG03 G_M000_IG03: add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr x0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 108: JIT compiled System.UInt64:CreateTruncating[uint](uint) [Tier0, IL size=74, code size=112] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_Architecture(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 109: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_Architecture(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetRuntimeVersion():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xD0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] stp xzr, xzr, [x9, #0xA0] str xzr, [x9, #0xB0] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG03 str xzr, [fp, #0x40] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] G_M000_IG04: ldr x0, [fp, #0x40] str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] cbz x0, G_M000_IG05 ldr x0, [fp, #0xC8] mov w1, #43 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xC4] ldr w0, [fp, #0xC4] cmn w0, #1 beq G_M000_IG05 ldr x0, [fp, #0xC8] ldr w2, [fp, #0xC4] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xC8] G_M000_IG05: ldr x1, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x98] ldr x0, [fp, #0x98] str x0, [fp, #0x90] ldr x0, [fp, #0x98] cbnz x0, G_M000_IG07 str xzr, [fp, #0x88] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #56 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x88] G_M000_IG08: ldr x0, [fp, #0x88] str x0, [fp, #0xB8] ldr x0, [fp, #0xB8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG16 ldr x0, [fp, #0xB8] mov x1, xzr mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x80] ldr x0, [fp, #0x80] str x0, [fp, #0x78] ldr x0, [fp, #0x80] cbnz x0, G_M000_IG09 str xzr, [fp, #0x70] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x70] G_M000_IG10: ldr x0, [fp, #0x70] str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] cbz x0, G_M000_IG11 ldr x0, [fp, #0xB0] mov w1, #40 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xAC] ldr x0, [fp, #0xB0] mov w1, #41 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xA8] ldr w2, [fp, #0xAC] cmn w2, #1 beq G_M000_IG11 ldr w2, [fp, #0xA8] cmn w2, #1 beq G_M000_IG11 ldr w2, [fp, #0xA8] ldr w1, [fp, #0xAC] sub w2, w2, w1 sub w2, w2, #1 ldr w1, [fp, #0xAC] add w1, w1, #1 ldr x0, [fp, #0xB0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x68] ldr x0, [fp, #0x68] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG19 add x0, x0, x1, LSL #1 add x0, x0, #16 mov w1, #32 strh w1, [x0] ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] ldr w0, [x0, #0x08] cmp w0, #2 ble G_M000_IG11 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x58] ldr x0, [fp, #0xB0] ldr w2, [fp, #0xAC] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0x58] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x58] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x2, [fp, #0xA0] mov w0, wzr ldr w1, [x2, #0x08] cmp w0, w1 bhs G_M000_IG19 add x2, x2, x0, LSL #3 add x2, x2, #16 ldr x2, [x2] ldr x0, [fp, #0x58] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x58] mov x1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x2, [fp, #0xA0] mov w0, #1 ldr w1, [x2, #0x08] cmp w0, w1 bhs G_M000_IG19 add x2, x2, x0, LSL #3 add x2, x2, #16 ldr x2, [x2] ldr x0, [fp, #0x58] mov x1, #4 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x58] mov x1, #5 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xB0] G_M000_IG11: ldr x1, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG14 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG15 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x38] b G_M000_IG17 G_M000_IG17: ldr x0, [fp, #0x38] G_M000_IG18: ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1496 110: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetRuntimeVersion() [Tier0, IL size=371, code size=1496] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsWasm():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 111: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsWasm() [Tier0, IL size=6, code size=36] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsOldMono():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #231 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 112: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsOldMono() [Tier0, IL size=6, code size=52] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str wzr, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp x0, #0 cset x0, ne movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 strb w0, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp x0, #0 cset x0, ne movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 strb w0, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq str w0, [fp, #0x1C] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x1C] G_M000_IG04: ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 strb w0, [x1] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 216 113: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:.cctor() [Tier0, IL size=66, code size=216] ; Assembly listing for method System.Buffers.ProbabilisticMap:IndexOfAny[System.SpanHelpers+DontNegate`1[ushort]](byref,int,byref,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x78] str w1, [fp, #0x74] str x2, [fp, #0x68] str w3, [fp, #0x64] G_M000_IG02: stp xzr, xzr, [fp, #0x20] add x0, fp, #32 ldr x1, [fp, #0x68] ldr w2, [fp, #0x64] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp x0, x1, [fp, #0x20] stp x0, x1, [fp, #0x50] G_M000_IG04: mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr w0, [fp, #0x74] ldr w1, [fp, #0x64] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG12 ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] sxtw x1, w1 lsl x1, x1, #1 add x0, x0, x1 str x0, [fp, #0x40] ldr x0, [fp, #0x78] str x0, [fp, #0x38] b G_M000_IG08 G_M000_IG05: ldr x0, [fp, #0x38] ldrh w0, [x0] str w0, [fp, #0x34] ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] ldr w2, [fp, #0x34] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 ldr x0, [fp, #0x38] ldr x2, [fp, #0x78] sub x0, x0, x2 lsr x0, x0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG07: ldr x0, [fp, #0x38] add x0, x0, #2 str x0, [fp, #0x38] G_M000_IG08: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #16 mov w1, #74 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] cmp x0, x1 bne G_M000_IG05 movn w0, #0 G_M000_IG11: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG12: b G_M000_IG13 G_M000_IG13: ldr x2, [fp, #0x50] ldr x3, [fp, #0x58] add x4, fp, #72 ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cbz w0, G_M000_IG15 ldr w0, [fp, #0x48] G_M000_IG14: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG15: ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] ldr x2, [fp, #0x68] ldr w3, [fp, #0x64] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG16: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 440 114: JIT compiled System.Buffers.ProbabilisticMap:IndexOfAny[System.SpanHelpers+DontNegate`1[ushort]](byref,int,byref,int) [Tier0, IL size=148, code size=440] ; Assembly listing for method System.Buffers.IndexOfAnyAsciiSearcher:IndexOfAnyLookup[System.Buffers.IndexOfAnyAsciiSearcher+DontNegate,System.Buffers.IndexOfAnyAsciiSearcher+Default](System.Runtime.Intrinsics.Vector128`1[short],System.Runtime.Intrinsics.Vector128`1[short],System.Runtime.Intrinsics.Vector128`1[ubyte]):System.Runtime.Intrinsics.Vector128`1[ubyte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp str q0, [fp, #0xB0] str q1, [fp, #0xA0] str q2, [fp, #0x90] G_M000_IG02: b G_M000_IG03 G_M000_IG03: ldr q0, [fp, #0xB0] uqxtn v0.8b, v0.8h ldr q1, [fp, #0xA0] uqxtn2 v0.16b, v1.8h str q0, [fp, #0x30] b G_M000_IG04 G_M000_IG04: ldr q0, [fp, #0x30] str q0, [fp, #0x80] ldr q0, [fp, #0x80] ldr q1, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 ldr q0, [fp, #0xB0] ldr q1, [@RWD00] cmhi v0.8h, v1.8h, v0.8h str q0, [fp, #0x60] ldr q0, [fp, #0xA0] ldr q1, [@RWD00] cmhi v0.8h, v1.8h, v0.8h str q0, [fp, #0x50] ldr q0, [fp, #0x60] ldr q1, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0x20] ldr q0, [fp, #0x20] str q0, [fp, #0x10] b G_M000_IG05 G_M000_IG05: ldr q0, [fp, #0x10] str q0, [fp, #0x40] ldr q0, [fp, #0x70] ldr q16, [fp, #0x40] and v0.16b, v0.16b, v16.16b str q0, [fp, #0x70] G_M000_IG06: ldr q0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG07: ldp fp, lr, [sp], #0xC0 ret lr RWD00 dq 0080008000800080h, 0080008000800080h ; Total bytes of code 244 115: JIT compiled System.Buffers.IndexOfAnyAsciiSearcher:IndexOfAnyLookup[System.Buffers.IndexOfAnyAsciiSearcher+DontNegate,System.Buffers.IndexOfAnyAsciiSearcher+Default](System.Runtime.Intrinsics.Vector128`1[short],System.Runtime.Intrinsics.Vector128`1[short],System.Runtime.Intrinsics.Vector128`1[ubyte]) [Tier0, IL size=158, code size=244] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsMono():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #231 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 116: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsMono() [Tier0, IL size=6, code size=52] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsNewMono():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 117: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsNewMono() [Tier0, IL size=6, code size=32] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsFullFramework():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 118: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsFullFramework() [Tier0, IL size=2, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsNetCore():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #5 bge G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x30] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 cset x0, eq G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 260 119: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsNetCore() [Tier0, IL size=62, code size=260] ; Assembly listing for method System.SpanHelpers:NonPackedIndexOfAnyValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,short,short,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 24 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w4, #8 bge G_M000_IG22 G_M000_IG03: mov x5, xzr cmp w4, #4 blt G_M000_IG13 sxth w6, w1 align [0 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: sub w4, w4, #4 lsl x7, x5, #1 add x7, x0, x7 ldrsh w8, [x7] cmp w8, w6 beq G_M000_IG21 G_M000_IG05: sxth w9, w2 cmp w8, w9 beq G_M000_IG21 sxth w10, w3 cmp w8, w10 cset x8, eq tst w8, #255 bne G_M000_IG21 G_M000_IG06: ldrsh w8, [x7, #0x02] cmp w8, w6 ccmp w8, w9, z, ne beq G_M000_IG20 G_M000_IG07: cmp w8, w10 cset x8, eq tst w8, #255 bne G_M000_IG20 G_M000_IG08: ldrsh w8, [x7, #0x04] cmp w8, w6 ccmp w8, w9, z, ne beq G_M000_IG19 G_M000_IG09: cmp w8, w10 cset x8, eq tst w8, #255 bne G_M000_IG19 G_M000_IG10: ldrsh w8, [x7, #0x06] cmp w8, w6 ccmp w8, w9, z, ne beq G_M000_IG18 G_M000_IG11: cmp w8, w10 cset x8, eq tst w8, #255 bne G_M000_IG18 G_M000_IG12: add x5, x5, #4 cmp w4, #4 bge G_M000_IG04 G_M000_IG13: cmp w4, #0 ble G_M000_IG28 sxth w6, w1 align [0 bytes for IG14] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG14: sub w4, w4, #1 lsl x9, x5, #1 ldrsh w8, [x0, x9] cmp w8, w6 beq G_M000_IG21 G_M000_IG15: sxth w9, w2 cmp w8, w9 beq G_M000_IG21 sxth w10, w3 cmp w8, w10 cset x1, eq tst w1, #255 bne G_M000_IG21 G_M000_IG16: add x5, x5, #1 cmp w4, #0 bgt G_M000_IG14 G_M000_IG17: b G_M000_IG28 G_M000_IG18: add w5, w5, #3 b G_M000_IG26 G_M000_IG19: add w5, w5, #2 b G_M000_IG26 G_M000_IG20: add w5, w5, #1 b G_M000_IG26 G_M000_IG21: b G_M000_IG26 G_M000_IG22: sxth w6, w1 dup v16.8h, w6 sxth w9, w2 dup v17.8h, w9 sxth w10, w3 dup v18.8h, w10 mov x1, x0 sub w5, w4, #8 sbfiz x2, x5, #1, #32 add x3, x1, x2 align [4 bytes for IG23] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG23: ldr q19, [x1] cmeq v20.8h, v16.8h, v19.8h cmeq v21.8h, v17.8h, v19.8h orr v20.8h, v20.8h, v21.8h cmeq v19.8h, v18.8h, v19.8h orr v19.8h, v20.8h, v19.8h umaxp v20.4s, v19.4s, v19.4s umov x5, v20.d[0] cmp x5, #0 bne G_M000_IG25 add x1, x1, #16 cmp x1, x3 bls G_M000_IG23 G_M000_IG24: mov w0, w4 tst w0, #7 beq G_M000_IG28 ldr q19, [x3] cmeq v16.8h, v16.8h, v19.8h cmeq v17.8h, v17.8h, v19.8h orr v16.8h, v16.8h, v17.8h cmeq v17.8h, v18.8h, v19.8h orr v19.8h, v16.8h, v17.8h umaxp v16.4s, v19.4s, v19.4s umov x1, v16.d[0] cmp x1, #0 beq G_M000_IG28 lsr x0, x2, #1 ldr q16, [@RWD00] and v19.8h, v19.8h, v16.8h ldr q16, [@RWD16] ushl v16.8h, v19.8h, v16.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w5, w0, w1 b G_M000_IG26 G_M000_IG25: sub x5, x1, x0 lsr x0, x5, #1 ldr q16, [@RWD00] and v16.8h, v19.8h, v16.8h ldr q17, [@RWD16] ushl v16.8h, v16.8h, v17.8h addv h16, v16.8h umov w1, v16.h[0] rbit w1, w1 clz w1, w1 add w5, w0, w1 G_M000_IG26: mov w0, w5 G_M000_IG27: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG28: movn w0, #0 G_M000_IG29: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 8000800080008000h, 8000800080008000h RWD16 dq FFF4FFF3FFF2FFF1h, FFF8FFF7FFF6FFF5h ; Total bytes of code 568 120: JIT compiled System.SpanHelpers:NonPackedIndexOfAnyValueType[short,System.SpanHelpers+DontNegate`1[short]](byref,short,short,short,int) [Tier1, IL size=1399, code size=568] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetNetCoreVersion():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x30] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xA8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x30] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xA0] add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x98] str x0, [fp, #0x50] ldr x0, [fp, #0x58] mov w1, #5 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 add x0, fp, #112 mov w1, #8 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 ldr x2, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #112 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG04: ldr x0, [fp, #0x98] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x60] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x98] ldr x1, [fp, #0x98] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x60] G_M000_IG06: ldr x0, [fp, #0x60] str x0, [fp, #0x68] add x0, fp, #112 mov w1, #30 mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #112 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #112 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 1100 121: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetNetCoreVersion() [Tier0, IL size=285, code size=1100] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetVersionInfo(System.String):System.Diagnostics.FileVersionInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] G_M000_IG03: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] bl CORINFO_HELP_THROW G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 220 122: JIT compiled System.Diagnostics.FileVersionInfo:GetVersionInfo(System.String) [Tier0, IL size=38, code size=220] ; Assembly listing for method System.SpanHelpers:NonPackedContainsValueType[short](byref,short,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 13 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w2, #8 bge G_M000_IG07 G_M000_IG03: mov x3, xzr cmp w2, #4 blt G_M000_IG04 sub w2, w2, #4 lsl x4, x3, #1 ldrsh w5, [x0, x4] sxth w6, w1 cmp w5, w6 beq G_M000_IG10 add x5, x4, #2 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG10 add x5, x4, #4 ldrsh w5, [x0, x5] cmp w5, w6 beq G_M000_IG10 add x4, x4, #6 ldrsh w4, [x0, x4] cmp w4, w6 beq G_M000_IG10 add x3, x3, #4 G_M000_IG04: cmp w2, #0 ble G_M000_IG12 sxth w6, w1 align [4 bytes for IG05] align [4 bytes] align [4 bytes] align [0 bytes] G_M000_IG05: sub w2, w2, #1 lsl x1, x3, #1 ldrsh w1, [x0, x1] cmp w1, w6 beq G_M000_IG10 add x3, x3, #1 cmp w2, #0 bgt G_M000_IG05 G_M000_IG06: b G_M000_IG12 G_M000_IG07: sxth w6, w1 dup v16.8h, w6 sub w1, w2, #8 ubfiz x1, x1, #1, #32 add x1, x0, x1 align [0 bytes for IG08] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG08: ldr q17, [x0] cmeq v17.8h, v16.8h, v17.8h umaxp v17.4s, v17.4s, v17.4s umov x3, v17.d[0] cmp x3, #0 bne G_M000_IG10 add x0, x0, #16 cmp x0, x1 bls G_M000_IG08 G_M000_IG09: mov w0, w2 tst w0, #7 beq G_M000_IG12 ldr q17, [x1] cmeq v16.8h, v16.8h, v17.8h umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 beq G_M000_IG12 G_M000_IG10: mov w0, #1 G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: mov w0, wzr G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 280 123: JIT compiled System.SpanHelpers:NonPackedContainsValueType[short](byref,short,int) [Tier1, IL size=601, code size=280] ; Assembly listing for method System.Diagnostics.FileVersionInfo:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x18] add x2, sp, #96 str x2, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] add x14, x14, #8 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x50] ldr x1, [x1, #0x08] add x2, fp, #56 mov w0, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x44] ldr w0, [fp, #0x44] cbz w0, G_M000_IG11 ldr w0, [fp, #0x44] mov w0, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] G_M000_IG03: ldr x1, [fp, #0x50] ldr x1, [x1, #0x08] ldr w3, [fp, #0x44] ldr x4, [fp, #0x30] mov w0, #3 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbz w0, G_M000_IG08 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x28] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x30] ldr x0, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG07 ldr w0, [fp, #0x28] movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG04 ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG07 G_M000_IG04: ldr w0, [fp, #0x28] movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG05 ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG07 G_M000_IG05: ldr w0, [fp, #0x28] mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG06 ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x24] b G_M000_IG08 G_M000_IG06: str wzr, [fp, #0x24] b G_M000_IG08 G_M000_IG07: mov w0, #1 str w0, [fp, #0x24] G_M000_IG08: b G_M000_IG09 G_M000_IG09: ldr x0, [fp, #0x58] bl G_M000_IG12 G_M000_IG10: nop G_M000_IG11: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG12: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG13: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 576 124: JIT compiled System.Diagnostics.FileVersionInfo:.ctor(System.String) [Tier0, IL size=168, code size=576] ; Assembly listing for method Interop+Version:GetFileVersionInfoSizeEx(uint,System.String,byref):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xC0] stp x21, x22, [sp, #0xD0] stp x23, x24, [sp, #0xE0] stp x25, x26, [sp, #0xF0] stp x27, x28, [sp, #0xD1FFAB1E] mov fp, sp str xzr, [fp, #0x90] str xzr, [fp, #0x80] str w0, [fp, #0xBC] str x1, [fp, #0xB0] str x2, [fp, #0xA8] G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME str x0, [fp, #0x70] mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldr x0, [fp, #0xA8] str x0, [fp, #0x90] ldr x0, [fp, #0x90] str x0, [fp, #0x68] ldr x0, [fp, #0x68] str x0, [fp, #0x98] ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x80] ldr x0, [fp, #0x80] str x0, [fp, #0x60] ldr x0, [fp, #0x60] str x0, [fp, #0x88] ldr w0, [fp, #0xBC] ldr x1, [fp, #0x88] ldr x2, [fp, #0x98] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #0x30] adr x3, [G_M000_IG05] str x3, [fp, #0x48] ldr x3, [fp, #0x70] add x4, fp, #32 str x4, [x3, #0x10] ldr x3, [fp, #0x70] strb wzr, [x3, #0x0C] G_M000_IG03: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG04: blr x3 G_M000_IG05: mov w19, w0 ldr x0, [fp, #0x70] mov w1, #1 strb w1, [x0, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x70] ldr x1, [fp, #0x28] str x1, [x0, #0x10] str w19, [fp, #0xA4] str xzr, [fp, #0x80] str xzr, [fp, #0x90] ldr w0, [fp, #0xA4] str w0, [fp, #0x7C] b G_M000_IG07 G_M000_IG07: ldr w0, [fp, #0x7C] G_M000_IG08: ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xF0] ldp x23, x24, [sp, #0xE0] ldp x21, x22, [sp, #0xD0] ldp x19, x20, [sp, #0xC0] ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 336 125: JIT compiled Interop+Version:GetFileVersionInfoSizeEx(uint,System.String,byref) [Tier0, IL size=41, code size=336] ; Assembly listing for method Interop+Version:GetFileVersionInfoEx(uint,System.String,uint,uint,ulong):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x100]! stp x19, x20, [sp, #0xB0] stp x21, x22, [sp, #0xC0] stp x23, x24, [sp, #0xD0] stp x25, x26, [sp, #0xE0] stp x27, x28, [sp, #0xF0] mov fp, sp str xzr, [fp, #0x78] str w0, [fp, #0xAC] str x1, [fp, #0xA0] str w2, [fp, #0x9C] str w3, [fp, #0x98] str x4, [fp, #0x90] G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME str x0, [fp, #0x68] mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] ldr x0, [fp, #0x78] str x0, [fp, #0x60] ldr x0, [fp, #0x60] str x0, [fp, #0x80] ldr w0, [fp, #0xAC] ldr x1, [fp, #0x80] ldr w2, [fp, #0x9C] ldr w3, [fp, #0x98] ldr x4, [fp, #0x90] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #0x30] adr x5, [G_M000_IG05] str x5, [fp, #0x48] ldr x5, [fp, #0x68] add x6, fp, #32 str x6, [x5, #0x10] ldr x5, [fp, #0x68] strb wzr, [x5, #0x0C] G_M000_IG03: movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] G_M000_IG04: blr x5 G_M000_IG05: mov w19, w0 ldr x0, [fp, #0x68] mov w1, #1 strb w1, [x0, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x68] ldr x1, [fp, #0x28] str x1, [x0, #0x10] str w19, [fp, #0x88] str xzr, [fp, #0x78] ldr w0, [fp, #0x88] cmp w0, #0 cset x0, ne str w0, [fp, #0x8C] ldr w0, [fp, #0x8C] str w0, [fp, #0x74] b G_M000_IG07 G_M000_IG07: ldr w0, [fp, #0x74] uxtb w0, w0 G_M000_IG08: ldp x27, x28, [sp, #0xF0] ldp x25, x26, [sp, #0xE0] ldp x23, x24, [sp, #0xD0] ldp x21, x22, [sp, #0xC0] ldp x19, x20, [sp, #0xB0] ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 340 126: JIT compiled Interop+Version:GetFileVersionInfoEx(uint,System.String,uint,uint,ulong) [Tier0, IL size=32, code size=340] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetLanguageAndCodePage(ulong):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] G_M000_IG02: add x2, fp, #32 add x3, fp, #24 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG04 ldr x0, [fp, #0x20] ldrh w0, [x0] lsl w0, w0, #16 ldr x1, [fp, #0x20] mov w2, #2 sxtw x2, w2 ldrh w1, [x1, x2] add w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 127: JIT compiled System.Diagnostics.FileVersionInfo:GetLanguageAndCodePage(ulong) [Tier0, IL size=34, code size=116] ; Assembly listing for method Interop+Version:VerQueryValue(ulong,System.String,byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xE0] stp x21, x22, [sp, #0xF0] stp x23, x24, [sp, #0xD1FFAB1E] stp x25, x26, [sp, #0xD1FFAB1E] stp x27, x28, [sp, #0xD1FFAB1E] mov fp, sp str xzr, [fp, #0xA8] str xzr, [fp, #0x98] str xzr, [fp, #0x88] str x0, [fp, #0xD8] str x1, [fp, #0xD0] str x2, [fp, #0xC8] str x3, [fp, #0xC0] G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME str x0, [fp, #0x78] mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldr x0, [fp, #0xC8] str xzr, [x0] ldr x0, [fp, #0xC0] str x0, [fp, #0xA8] ldr x0, [fp, #0xA8] str x0, [fp, #0x70] ldr x0, [fp, #0x70] str x0, [fp, #0xB0] ldr x0, [fp, #0xC8] str x0, [fp, #0x98] ldr x0, [fp, #0x98] str x0, [fp, #0x68] ldr x0, [fp, #0x68] str x0, [fp, #0xA0] ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x88] ldr x0, [fp, #0x88] str x0, [fp, #0x60] ldr x0, [fp, #0x60] str x0, [fp, #0x90] ldr x0, [fp, #0xD8] ldr x1, [fp, #0x90] ldr x2, [fp, #0xA0] ldr x3, [fp, #0xB0] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x30] adr x4, [G_M000_IG05] str x4, [fp, #0x48] ldr x4, [fp, #0x78] add x5, fp, #32 str x5, [x4, #0x10] ldr x4, [fp, #0x78] strb wzr, [x4, #0x0C] G_M000_IG03: movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG04: blr x4 G_M000_IG05: mov w19, w0 ldr x0, [fp, #0x78] mov w1, #1 strb w1, [x0, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x78] ldr x1, [fp, #0x28] str x1, [x0, #0x10] str w19, [fp, #0xB8] str xzr, [fp, #0x88] str xzr, [fp, #0x98] str xzr, [fp, #0xA8] ldr w0, [fp, #0xB8] cmp w0, #0 cset x0, ne str w0, [fp, #0xBC] ldr w0, [fp, #0xBC] str w0, [fp, #0x84] b G_M000_IG07 G_M000_IG07: ldr w0, [fp, #0x84] uxtb w0, w0 G_M000_IG08: ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xF0] ldp x19, x20, [sp, #0xE0] ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 404 128: JIT compiled Interop+Version:VerQueryValue(ulong,System.String,byref,byref) [Tier0, IL size=69, code size=404] ; Assembly listing for method System.Number:Int32ToHexChars[ushort](ulong,uint,int,int):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str x0, [fp, #0x58] str w1, [fp, #0x54] str w2, [fp, #0x50] str w3, [fp, #0x4C] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG08 G_M000_IG03: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #16 mov w1, #2 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr w0, [fp, #0x54] and w0, w0, #15 str w0, [fp, #0x48] ldr x0, [fp, #0x58] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x58] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr w0, [fp, #0x48] str w0, [fp, #0x2C] ldr w0, [fp, #0x48] cmp w0, #10 blt G_M000_IG06 ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] ldr w0, [fp, #0x50] str w0, [fp, #0x18] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] mov w0, #48 str w0, [fp, #0x18] G_M000_IG07: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x18] add w0, w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x20] strh w0, [x1] ldr w0, [fp, #0x54] lsr w0, w0, #4 str w0, [fp, #0x54] G_M000_IG08: ldr w0, [fp, #0x4C] sub w0, w0, #1 str w0, [fp, #0x44] ldr w0, [fp, #0x4C] sub w0, w0, #1 str w0, [fp, #0x4C] ldr w0, [fp, #0x44] tbz w0, #31, G_M000_IG03 ldr w0, [fp, #0x54] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x58] G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 296 129: JIT compiled System.Number:Int32ToHexChars[ushort](ulong,uint,int,int) [Tier0, IL size=66, code size=296] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetVersionInfoForCodePage(ulong,System.String):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp, #0xD1FFAB1E] add fp, sp, #0xD1FFAB1E movi v16.16b, #0 sub x9, fp, #0xD1FFAB1E mov x10, #184 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E str x3, [fp, xip1] str x0, [fp, #-0x08] str x1, [fp, #-0x10] str x2, [fp, #-0x18] G_M000_IG02: stp xzr, xzr, [fp, #-0xB0] sub x0, fp, #176 ldp x1, xzr, [sp], #0xD1FFAB1E mov x1, sp mov w2, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp x0, x4, [fp, #-0xB0] stp x0, x4, [fp, #-0x70] G_M000_IG04: ldp x0, x4, [fp, #-0x70] stp x0, x4, [fp, #-0x28] G_M000_IG05: str xzr, [fp, #-0x78] G_M000_IG06: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG07: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #31 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xB8] ldr x1, [fp, #-0xB8] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG08: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG09: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #35 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xC0] ldr x1, [fp, #-0xC0] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG10: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG11: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #31 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xC8] ldr x1, [fp, #-0xC8] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG12: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG13: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #32 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xD0] ldr x1, [fp, #-0xD0] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG14: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG15: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #34 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xD8] ldr x1, [fp, #-0xD8] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG16: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG17: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #36 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xE0] ldr x1, [fp, #-0xE0] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #56 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG18: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG19: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #31 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xE8] ldr x1, [fp, #-0xE8] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #64 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG20: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG21: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #34 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xF0] ldr x1, [fp, #-0xF0] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #72 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG22: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG23: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #28 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0xF8] ldr x1, [fp, #-0xF8] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #80 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG24: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG25: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #35 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #-0x100] ldr x1, [fp, #-0x100] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #88 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG26: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG27: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #32 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x1, [fp, xip1] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #96 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #-0x78] G_M000_IG28: ldp x0, x4, [fp, #-0x28] stp x0, x4, [fp, #-0x70] G_M000_IG29: ldr x4, [fp, #-0x70] ldr x5, [fp, #-0x68] sub x0, fp, #160 ldr x3, [fp, #-0x78] mov w1, #32 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 ldr x1, [fp, #-0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x70] ldr x2, [fp, #-0x68] sub x3, fp, #160 ldr x0, [fp, #-0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x1, [fp, xip1] ldr x0, [fp, #-0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #-0x08] add x14, x14, #104 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #-0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #-0x08] add x14, x14, #112 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF sub x8, fp, #96 ldr x0, [fp, #-0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #-0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x78] ldr w0, [fp, #-0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x7C] ldr w0, [fp, #-0x54] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x80] ldr w0, [fp, #-0x54] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x84] ldr w0, [fp, #-0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x88] ldr w0, [fp, #-0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x8C] ldr w0, [fp, #-0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x90] ldr w0, [fp, #-0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x08] str w0, [x1, #0x94] ldr w0, [fp, #-0x44] and w0, w0, #1 cmp w0, #0 cset x0, ne ldr x1, [fp, #-0x08] strb w0, [x1, #0x98] ldr w0, [fp, #-0x44] and w0, w0, #4 cmp w0, #0 cset x0, ne ldr x1, [fp, #-0x08] strb w0, [x1, #0x99] ldr w0, [fp, #-0x44] and w0, w0, #8 cmp w0, #0 cset x0, ne ldr x1, [fp, #-0x08] strb w0, [x1, #0x9A] ldr w0, [fp, #-0x44] and w0, w0, #2 cmp w0, #0 cset x0, ne ldr x1, [fp, #-0x08] strb w0, [x1, #0x9B] ldr w0, [fp, #-0x44] and w0, w0, #32 cmp w0, #0 cset x0, ne ldr x1, [fp, #-0x08] strb w0, [x1, #0x9C] ldr x0, [fp, #-0x08] ldr x0, [x0, #0x20] movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E G_M000_IG30: ldr xip1, [fp, xip1] cmp xip0, xip1 beq G_M000_IG31 bl CORINFO_HELP_FAIL_FAST G_M000_IG31: sub sp, fp, #0xD1FFAB1E ldp fp, lr, [sp, #0xD1FFAB1E] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 3568 130: JIT compiled System.Diagnostics.FileVersionInfo:GetVersionInfoForCodePage(ulong,System.String) [Tier0, IL size=1107, code size=3568] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetFileVersionString(ulong,System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: add x2, fp, #24 add x3, fp, #16 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] cbz x0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 131: JIT compiled System.Diagnostics.FileVersionInfo:GetFileVersionString(ulong,System.String) [Tier0, IL size=31, code size=116] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetFileVersionLanguage(ulong):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #224 stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] stp fp, lr, [sp, #0xD0] add fp, sp, #208 str xzr, [fp, #-0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #-0x88] str x0, [fp, #-0x58] G_M000_IG02: sub x0, fp, #200 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME str x0, [fp, #-0x80] mov x0, sp str x0, [fp, #-0xA8] mov x0, fp str x0, [fp, #-0x98] ldr x0, [fp, #-0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 lsr w0, w0, #16 str w0, [fp, #-0x5C] ldp x0, xzr, [sp], #0xD1FFAB1E mov x0, sp str x0, [fp, #-0x68] ldr w0, [fp, #-0x5C] ldr x1, [fp, #-0x68] mov w2, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #-0xB8] adr x3, [G_M000_IG05] str x3, [fp, #-0xA0] ldr x3, [fp, #-0x80] sub x4, fp, #200 str x4, [x3, #0x10] ldr x3, [fp, #-0x80] strb wzr, [x3, #0x0C] G_M000_IG03: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG04: blr x3 G_M000_IG05: mov w19, w0 ldr x0, [fp, #-0x80] mov w1, #1 strb w1, [x0, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #-0x80] ldr x2, [fp, #-0xC0] str x2, [x0, #0x10] str w19, [fp, #-0x6C] ldr x0, [fp, #-0x68] ldr w2, [fp, #-0x6C] mov w1, wzr bl System.String:.ctor(ulong,int,int):this str x0, [fp, #-0x78] b G_M000_IG07 G_M000_IG07: ldr x0, [fp, #-0x78] movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x88] cmp xip0, xip1 beq G_M000_IG08 bl CORINFO_HELP_FAIL_FAST G_M000_IG08: sub sp, fp, #208 ldp fp, lr, [sp, #0xD0] ldp x27, x28, [sp, #0xC0] ldp x25, x26, [sp, #0xB0] ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] add sp, sp, #224 ret lr ; Total bytes of code 360 132: JIT compiled System.Diagnostics.FileVersionInfo:GetFileVersionLanguage(ulong) [Tier0, IL size=41, code size=360] ; Assembly listing for method System.Diagnostics.FileVersionInfo:GetFixedFileInfo(ulong):Interop+Version+VS_FIXEDFILEINFO ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str x0, [fp, #0x60] str x8, [fp, #0x68] G_M000_IG02: add x2, fp, #88 add x3, fp, #80 ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG04 ldr x0, [fp, #0x58] ldr x1, [fp, #0x68] ldp q16, q17, [x0] stp q16, q17, [x1] ldr q16, [x0, #0x20] str q16, [x1, #0x20] ldr w2, [x0, #0x30] str w2, [x1, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG04: stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] stp xzr, xzr, [fp, #0x38] str wzr, [fp, #0x48] ldr x0, [fp, #0x68] G_M000_IG05: add x1, fp, #24 ldp q16, q17, [x1] stp q16, q17, [x0] ldr q16, [x1, #0x20] str q16, [x0, #0x20] ldr w2, [x1, #0x30] str w2, [x0, #0x30] G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 160 133: JIT compiled System.Diagnostics.FileVersionInfo:GetFixedFileInfo(ulong) [Tier0, IL size=34, code size=160] ; Assembly listing for method System.Diagnostics.FileVersionInfo:HIWORD(uint):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] lsr w0, w0, #16 and w0, w0, #0xD1FFAB1E G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 134: JIT compiled System.Diagnostics.FileVersionInfo:HIWORD(uint) [Tier0, IL size=11, code size=32] ; Assembly listing for method System.Diagnostics.FileVersionInfo:LOWORD(uint):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] and w0, w0, #0xD1FFAB1E G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 135: JIT compiled System.Diagnostics.FileVersionInfo:LOWORD(uint) [Tier0, IL size=8, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.CoreRuntime:TryGetVersion(byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str x0, [fp, #0x88] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #5 blt G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x14, [fp, #0x88] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG11 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 b G_M000_IG11 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x30] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x80] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x78] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x78] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG05 b G_M000_IG11 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x70] ldr x1, [fp, #0x70] str x1, [fp, #0x68] ldr x1, [fp, #0x70] cbnz x1, G_M000_IG06 str xzr, [fp, #0x50] b G_M000_IG08 G_M000_IG06: ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x0, [fp, #0x60] str x0, [fp, #0x58] ldr x0, [fp, #0x60] cbnz x0, G_M000_IG07 str xzr, [fp, #0x50] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] G_M000_IG08: ldr x0, [fp, #0x50] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG09 b G_M000_IG11 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x4C] b G_M000_IG16 G_M000_IG10: b G_M000_IG11 G_M000_IG11: mov w0, #1 G_M000_IG12: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG13: ldr x0, [fp, #0x88] str xzr, [x0] b G_M000_IG14 G_M000_IG14: mov w0, wzr G_M000_IG15: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG16: ldr w0, [fp, #0x4C] uxtb w0, w0 G_M000_IG17: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 776 136: JIT compiled BenchmarkDotNet.Environments.CoreRuntime:TryGetVersion(byref) [Tier0, IL size=173, code size=776] ; Assembly listing for method System.Version:TryFormatCore[ushort](System.Span`1[ushort],int,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0xB8] str x1, [fp, #0xA8] str x2, [fp, #0xB0] str w3, [fp, #0xA4] str x4, [fp, #0x98] G_M000_IG02: ldr w0, [fp, #0xA4] str w0, [fp, #0x90] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x90] cmp w0, #4 bhi G_M000_IG04 ldr w0, [fp, #0x90] cmp w0, #3 bhs G_M000_IG05 b G_M000_IG09 G_M000_IG03: ldr w0, [fp, #0x90] cmp w0, #4 beq G_M000_IG08 b G_M000_IG09 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG09 G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #30 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x10] cmn w0, #1 bne G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x14] cmn w0, #1 bne G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: str wzr, [fp, #0x94] str wzr, [fp, #0x8C] b G_M000_IG27 G_M000_IG10: ldr w0, [fp, #0x8C] cbz w0, G_M000_IG15 add x0, fp, #168 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG12 ldr x0, [fp, #0x98] str wzr, [x0] mov w0, wzr G_M000_IG11: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG12: ldr w0, [fp, #0xB0] cmp w0, #0 bls G_M000_IG31 ldr x0, [fp, #0xA8] str x0, [fp, #0x30] mov w0, #46 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x30] strh w0, [x1] add x0, fp, #168 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] str x1, [fp, #0x28] G_M000_IG13: ldp x0, x1, [fp, #0x20] stp x0, x1, [fp, #0xA8] G_M000_IG14: ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] G_M000_IG15: ldr w0, [fp, #0x8C] cmp w0, #2 bhi G_M000_IG16 ldr w0, [fp, #0x8C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG16: b G_M000_IG20 G_M000_IG17: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x08] str w0, [fp, #0x78] b G_M000_IG21 G_M000_IG18: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x0C] str w0, [fp, #0x78] b G_M000_IG21 G_M000_IG19: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x10] str w0, [fp, #0x78] b G_M000_IG21 G_M000_IG20: ldr x0, [fp, #0xB8] ldr w0, [x0, #0x14] str w0, [fp, #0x78] G_M000_IG21: ldr w0, [fp, #0x78] str w0, [fp, #0x88] b G_M000_IG22 G_M000_IG22: ldr w0, [fp, #0x88] str w0, [fp, #0x70] ldr x0, [fp, #0xA8] ldr x1, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] str x1, [fp, #0x58] stp xzr, xzr, [fp, #0x60] ldr x1, [fp, #0x50] ldr x2, [fp, #0x58] ldr x4, [fp, #0x60] ldr x5, [fp, #0x68] add x3, fp, #128 add x0, fp, #112 mov x6, xzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 str w0, [fp, #0x4C] ldr w0, [fp, #0x4C] uxtb w0, w0 str w0, [fp, #0x7C] ldr w0, [fp, #0x7C] cbnz w0, G_M000_IG24 ldr x0, [fp, #0x98] str wzr, [x0] mov w0, wzr G_M000_IG23: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG24: ldr w0, [fp, #0x94] ldr w1, [fp, #0x80] add w0, w0, w1 str w0, [fp, #0x94] add x0, fp, #168 ldr w1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] str x1, [fp, #0x40] G_M000_IG25: ldp x0, x1, [fp, #0x38] stp x0, x1, [fp, #0xA8] G_M000_IG26: ldr w0, [fp, #0x8C] add w0, w0, #1 str w0, [fp, #0x8C] G_M000_IG27: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG29 G_M000_IG28: add x0, fp, #24 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG29: ldr w0, [fp, #0x8C] ldr w1, [fp, #0xA4] cmp w0, w1 blt G_M000_IG10 ldr x0, [fp, #0x98] ldr w1, [fp, #0x94] str w1, [x0] mov w0, #1 G_M000_IG30: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG31: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 ; Total bytes of code 868 137: JIT compiled System.Version:TryFormatCore[ushort](System.Span`1[ushort],int,byref) [Tier0, IL size=331, code size=868] ; Assembly listing for method System.Diagnostics.FileVersionInfo:get_FileVersion():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 138: JIT compiled System.Diagnostics.FileVersionInfo:get_FileVersion() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_RuntimeVersion(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #24 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 139: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_RuntimeVersion(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetConfiguration():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 strh w0, [fp, #0x18] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 172 140: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetConfiguration() [Tier0, IL size=47, code size=172] ; Assembly listing for method BenchmarkDotNet.Extensions.AssemblyExtensions:IsDebug(System.Reflection.Assembly):System.Nullable`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 141: JIT compiled BenchmarkDotNet.Extensions.AssemblyExtensions:IsDebug(System.Reflection.Assembly) [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Extensions.AssemblyExtensions:GetDebuggableAttribute(System.Reflection.Assembly):System.Diagnostics.DebuggableAttribute ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG04 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 152 142: JIT compiled BenchmarkDotNet.Extensions.AssemblyExtensions:GetDebuggableAttribute(System.Reflection.Assembly) [Tier0, IL size=22, code size=152] ; Assembly listing for method System.Linq.Enumerable:OfType[System.__Canon](System.Collections.IEnumerable):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG06: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 148 143: JIT compiled System.Linq.Enumerable:OfType[System.__Canon](System.Collections.IEnumerable) [Tier0, IL size=17, code size=148] ; Assembly listing for method System.Linq.Enumerable:OfTypeIterator[System.__Canon](System.Collections.IEnumerable):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 152 144: JIT compiled System.Linq.Enumerable:OfTypeIterator[System.__Canon](System.Collections.IEnumerable) [Tier0, IL size=15, code size=152] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x28] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 145: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method System.Linq.Enumerable:SingleOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x2, [fp, #0x30] ldr x2, [x2, #0x10] ldr x2, [x2, #0x10] str x2, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: add x2, fp, #32 ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 146: JIT compiled System.Linq.Enumerable:SingleOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=9, code size=120] ; Assembly listing for method System.Linq.Enumerable:TryGetSingle[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],byref):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #104 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] add x3, sp, #192 str x3, [fp, #0xB8] str x0, [fp, #0xB0] str x0, [fp, #0xA8] str x1, [fp, #0xA0] str x2, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0xA0] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x60] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x60] G_M000_IG06: ldr x0, [fp, #0x60] ldr x1, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x90] ldr x0, [fp, #0x90] cbz x0, G_M000_IG18 ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x38] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG09: ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x90] ldr x11, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] blr x1 str w0, [fp, #0x8C] ldr w0, [fp, #0x8C] cbz w0, G_M000_IG10 ldr w0, [fp, #0x8C] cmp w0, #1 beq G_M000_IG12 b G_M000_IG34 G_M000_IG10: ldr x0, [fp, #0x98] strb wzr, [x0] str xzr, [fp, #0x80] ldr x0, [fp, #0x80] G_M000_IG11: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG12: ldr x0, [fp, #0x98] mov w1, #1 strb w1, [x0] ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] cmp x0, #48 ble G_M000_IG15 G_M000_IG13: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] cbz x0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] str x0, [fp, #0x28] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG16: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x90] ldr x11, [fp, #0x20] mov w1, wzr ldr x2, [fp, #0x20] ldr x2, [x2] blr x2 G_M000_IG17: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG18: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x58] b G_M000_IG21 G_M000_IG20: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG21: ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0xA0] ldr x11, [fp, #0x50] ldr x1, [fp, #0x50] ldr x1, [x1] blr x1 str x0, [fp, #0x78] G_M000_IG22: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG23 ldr x0, [fp, #0x98] strb wzr, [x0] str xzr, [fp, #0x80] b G_M000_IG28 G_M000_IG23: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x48] b G_M000_IG26 G_M000_IG25: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG26: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x78] ldr x11, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG27 ldr x0, [fp, #0x98] mov w1, #1 strb w1, [x0] ldr x0, [fp, #0x70] str x0, [fp, #0x80] b G_M000_IG30 G_M000_IG27: b G_M000_IG32 G_M000_IG28: ldr x0, [fp, #0xB8] bl G_M000_IG38 G_M000_IG29: b G_M000_IG36 G_M000_IG30: ldr x0, [fp, #0xB8] bl G_M000_IG38 G_M000_IG31: b G_M000_IG36 G_M000_IG32: ldr x0, [fp, #0xB8] bl G_M000_IG38 G_M000_IG33: nop G_M000_IG34: ldr x0, [fp, #0x98] strb wzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str xzr, [fp, #0x68] ldr x0, [fp, #0x68] G_M000_IG35: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG36: ldr x0, [fp, #0x80] G_M000_IG37: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG38: stp fp, lr, [sp, #-0x20]! add x3, fp, #192 str x3, [sp, #0x18] G_M000_IG39: ldr x0, [fp, #0x78] cbz x0, G_M000_IG40 ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG40: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 880 147: JIT compiled System.Linq.Enumerable:TryGetSingle[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],byref) [Tier0, IL size=147, code size=880] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldr w0, [x0, #0x28] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x30] ldr w0, [x0, #0x2C] str w0, [fp, #0x1C] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x1C] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x30] str wzr, [x0, #0x28] ldr x0, [fp, #0x30] str x0, [fp, #0x28] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] str x14, [fp, #0x28] G_M000_IG04: ldr x14, [fp, #0x30] ldr x15, [x14, #0x18] ldr x14, [fp, #0x28] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 172 148: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=55, code size=172] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] add x1, sp, #80 str x1, [fp, #0x48] str x0, [fp, #0x40] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldr w0, [x0, #0x28] str w0, [fp, #0x30] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x30] cbz w0, G_M000_IG03 ldr w0, [fp, #0x30] cmp w0, #1 beq G_M000_IG05 str wzr, [fp, #0x34] b G_M000_IG09 G_M000_IG03: ldr x0, [fp, #0x38] movn w11, #0 str w11, [x0, #0x28] ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x14, [fp, #0x38] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] movn w1, #2 str w1, [x0, #0x28] b G_M000_IG06 G_M000_IG04: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x38] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG06 ldr x0, [fp, #0x38] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] mov w1, #1 str w1, [x0, #0x28] mov w1, #1 str w1, [fp, #0x34] b G_M000_IG09 G_M000_IG05: ldr x0, [fp, #0x38] movn w1, #2 str w1, [x0, #0x28] G_M000_IG06: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #24 mov w1, #105 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] str xzr, [x0, #0x20] str wzr, [fp, #0x34] b G_M000_IG09 G_M000_IG09: ldr w0, [fp, #0x34] G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: stp fp, lr, [sp, #-0x20]! add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG12: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG13: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 496 149: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:MoveNext() [Tier0, IL size=144, code size=496] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 150: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:<>m__Finally1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] movn w0, #0 str w0, [x1, #0x28] ldr x1, [fp, #0x18] ldr x1, [x1, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbz x0, G_M000_IG03 ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 151: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:<>m__Finally1() [Tier0, IL size=29, code size=112] ; Assembly listing for method System.Linq.Enumerable+d__65`1[System.__Canon]:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp add x1, sp, #48 str x1, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr w0, [x0, #0x28] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmn w0, #3 beq G_M000_IG03 ldr w0, [fp, #0x1C] cmp w0, #1 bne G_M000_IG06 G_M000_IG03: b G_M000_IG04 G_M000_IG04: ldr x0, [fp, #0x28] bl G_M000_IG07 G_M000_IG05: nop G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #48 str x3, [sp, #0x18] G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 124 152: JIT compiled System.Linq.Enumerable+d__65`1[System.__Canon]:System.IDisposable.Dispose() [Tier0, IL size=27, code size=124] ; Assembly listing for method BenchmarkDotNet.Extensions.AssemblyExtensions:IsJitTrackingEnabled(System.Diagnostics.DebuggableAttribute):System.Nullable`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG04 strh wzr, [fp, #0x20] ldr w0, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: strh wzr, [fp, #0x18] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] add x0, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 153: JIT compiled BenchmarkDotNet.Extensions.AssemblyExtensions:IsJitTrackingEnabled(System.Diagnostics.DebuggableAttribute) [Tier0, IL size=25, code size=112] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_Configuration(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 154: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_Configuration(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:HasRyuJit():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, eq G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 276 155: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:HasRyuJit() [Tier0, IL size=59, code size=276] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HasRyuJit(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x39] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 156: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HasRyuJit(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetJitInfo():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 G_M000_IG06: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG09 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG11: ldr x0, [fp, #0x18] G_M000_IG12: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 336 157: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetJitInfo() [Tier0, IL size=92, code size=336] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsNativeAOT():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #5 blt G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x30] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 208 158: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsNativeAOT() [Tier0, IL size=51, code size=208] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsNetNative():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 159: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsNetNative() [Tier0, IL size=17, code size=88] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsAot():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 160: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsAot() [Tier0, IL size=9, code size=44] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_JitInfo(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 161: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_JitInfo(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetShortInfo():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG11 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] b G_M000_IG14 G_M000_IG14: ldr x0, [fp, #0x18] G_M000_IG15: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 536 162: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetShortInfo() [Tier0, IL size=149, code size=536] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Avx2Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 163: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Avx2Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86AvxSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 164: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86AvxSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse42Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 165: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse42Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse41Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 166: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse41Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Ssse3Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 167: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Ssse3Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse3Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 168: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse3Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse2Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 169: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86Sse2Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86SseSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 170: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86SseSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86BaseSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 171: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsX86BaseSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmAdvSimdSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 172: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmAdvSimdSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HardwareIntrinsicsShort(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #40 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 173: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HardwareIntrinsicsShort(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_IsServerGC(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x3A] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 174: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_IsServerGC(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_IsConcurrentGC(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x3B] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 175: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_IsConcurrentGC(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HasAttachedDebugger(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 176: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_HasAttachedDebugger(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x0, [x1] stp xzr, xzr, [fp, #0x10] stp xzr, xzr, [fp, #0x20] add x0, fp, #16 mov w1, wzr mov w2, wzr mov w3, wzr mov x4, xzr mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldp q16, q17, [fp, #0x10] stp q16, q17, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 124 177: JIT compiled BenchmarkDotNet.Engines.GcStats:.cctor() [Tier0, IL size=28, code size=124] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:CalculateAllocationQuantumSize():long ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str wzr, [fp, #0x24] str xzr, [fp, #0x18] G_M000_IG02: str wzr, [fp, #0x24] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] G_M000_IG03: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #16 mov w1, #2 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x24] ldr w0, [fp, #0x20] cmp w0, #10 ble G_M000_IG06 mov x0, #0xD1FFAB1E str x0, [fp, #0x28] b G_M000_IG07 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x28] sub x0, x0, x1 str x0, [fp, #0x28] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] cmp x0, #0 ble G_M000_IG03 G_M000_IG07: ldr x0, [fp, #0x28] G_M000_IG08: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 332 178: JIT compiled BenchmarkDotNet.Engines.GcStats:CalculateAllocationQuantumSize() [Tier0, IL size=68, code size=332] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:.ctor(int,int,int,long,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] str w3, [fp, #0x2C] str x4, [fp, #0x20] str x5, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] str w1, [x0] ldr x0, [fp, #0x38] ldr w1, [fp, #0x30] str w1, [x0, #0x04] ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] str w1, [x0, #0x08] ldr x0, [fp, #0x38] ldr x1, [fp, #0x20] str x1, [x0, #0x10] ldr x0, [fp, #0x38] ldr x1, [fp, #0x18] str x1, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 100 179: JIT compiled BenchmarkDotNet.Engines.GcStats:.ctor(int,int,int,long,long) [Tier0, IL size=38, code size=100] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_GCAllocationQuantum(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] str x1, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 180: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_GCAllocationQuantum(long) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:get_IsRunningInContainer():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 181: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:get_IsRunningInContainer() [Tier0, IL size=21, code size=92] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_InDocker(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x3C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 182: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:set_InDocker(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:ToFormattedString():System.Collections.Generic.IEnumerable`1[System.String]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x10] add x14, x14, #16 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 183: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:ToFormattedString() [Tier0, IL size=15, code size=92] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x18] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x1C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 184: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.String]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x1C] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x28] str wzr, [x0, #0x18] ldr x0, [fp, #0x28] str x0, [fp, #0x20] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] str x14, [fp, #0x20] ldr x14, [fp, #0x28] ldr x15, [x14, #0x10] ldr x14, [fp, #0x20] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 172 185: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=55, code size=172] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] ldr w0, [x0, #0x18] str w0, [fp, #0x44] ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] str x0, [fp, #0x38] ldr w0, [fp, #0x44] cmp w0, #4 bhi G_M000_IG03 ldr w0, [fp, #0x44] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG11 G_M000_IG04: ldr x0, [fp, #0x48] movn w1, #0 str w1, [x0, #0x18] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x48] mov w1, #1 str w1, [x0, #0x18] b G_M000_IG08 G_M000_IG05: ldr x0, [fp, #0x48] movn w1, #0 str w1, [x0, #0x18] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x48] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] mov w1, #2 str w1, [x0, #0x18] b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x48] movn w1, #0 str w1, [x0, #0x18] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x3, [fp, #0x18] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x48] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] mov w1, #3 str w1, [x0, #0x18] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x48] movn w1, #0 str w1, [x0, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x3, [fp, #0x10] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x48] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] mov w1, #4 str w1, [x0, #0x18] b G_M000_IG08 G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: ldr x0, [fp, #0x48] movn w1, #0 str w1, [x0, #0x18] b G_M000_IG11 G_M000_IG11: mov w0, wzr G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 612 186: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:MoveNext() [Tier0, IL size=217, code size=612] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.Collections.Generic.IEnumerator.get_Current():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 187: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetRuntimeInfo():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] str x0, [fp, #0xB8] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x80] ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x2, [fp, #0x50] ldr x0, [fp, #0x80] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0x80] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x2, [fp, #0x40] ldr x0, [fp, #0x80] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x2, [fp, #0x38] ldr x0, [fp, #0x80] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x70] ldr x0, [fp, #0x80] str x0, [fp, #0x68] ldr x0, [fp, #0x78] str x0, [fp, #0x60] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x58] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x58] str x2, [fp, #0x60] G_M000_IG03: ldr x2, [fp, #0x60] ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB0] add x0, fp, #136 mov w1, #3 mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 ldr x1, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 820 188: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetRuntimeInfo() [Tier0, IL size=164, code size=820] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_JitInfo():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 189: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_JitInfo() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_HardwareIntrinsicsShort():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 190: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_HardwareIntrinsicsShort() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetConfigurationFlag():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 208 191: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetConfigurationFlag() [Tier0, IL size=49, code size=208] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_Configuration():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 192: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_Configuration() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetDebuggerFlag():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 193: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetDebuggerFlag() [Tier0, IL size=20, code size=80] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_HasAttachedDebugger():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 194: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_HasAttachedDebugger() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 195: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 196: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Where[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str xzr, [x9, #0x70] str x0, [fp, #0xB8] str x0, [fp, #0xB0] str x1, [fp, #0xA8] str x2, [fp, #0xA0] G_M000_IG02: ldr x0, [fp, #0xA8] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xA0] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x78] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x78] G_M000_IG07: ldr x0, [fp, #0x78] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x98] ldr x0, [fp, #0x98] cbz x0, G_M000_IG08 ldr x0, [fp, #0x98] ldr x1, [fp, #0xA0] ldr x2, [fp, #0x98] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x10] blr x2 str x0, [fp, #0x28] b G_M000_IG33 G_M000_IG08: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x70] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x70] G_M000_IG11: ldr x0, [fp, #0x70] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x90] ldr x0, [fp, #0x90] cbz x0, G_M000_IG21 ldr x0, [fp, #0x90] ldr w0, [x0, #0x08] cbz w0, G_M000_IG16 ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x08] cmp x0, #64 ble G_M000_IG14 G_M000_IG12: ldr x0, [fp, #0x20] ldr x0, [x0, #0x40] cbz x0, G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0x20] ldr x0, [x0, #0x40] str x0, [fp, #0x30] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x30] G_M000_IG15: ldr x0, [fp, #0x30] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x90] ldr x2, [fp, #0xA0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] str x0, [fp, #0x80] ldr x0, [fp, #0x80] str x0, [fp, #0x28] b G_M000_IG33 G_M000_IG16: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] cmp x0, #56 ble G_M000_IG19 G_M000_IG17: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] cbz x0, G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] str x0, [fp, #0x40] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x40] G_M000_IG20: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] b G_M000_IG33 G_M000_IG21: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x68] b G_M000_IG24 G_M000_IG23: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x68] G_M000_IG24: ldr x0, [fp, #0x68] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x88] ldr x0, [fp, #0x88] cbz x0, G_M000_IG29 ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] cmp x0, #48 ble G_M000_IG27 G_M000_IG25: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] cbz x0, G_M000_IG27 G_M000_IG26: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] str x0, [fp, #0x48] b G_M000_IG28 G_M000_IG27: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG28: ldr x0, [fp, #0x48] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr x1, [fp, #0x88] ldr x2, [fp, #0xA0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x50] str x0, [fp, #0x28] b G_M000_IG33 G_M000_IG29: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0xB0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x58] b G_M000_IG32 G_M000_IG31: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG32: ldr x0, [fp, #0x58] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] ldr x1, [fp, #0xA8] ldr x2, [fp, #0xA0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x60] str x0, [fp, #0x28] b G_M000_IG33 G_M000_IG33: ldr x0, [fp, #0x28] G_M000_IG34: ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 984 197: JIT compiled System.Linq.Enumerable:Where[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]) [Tier0, IL size=94, code size=984] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:.ctor(System.__Canon[],System.Func`2[System.__Canon,bool]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 198: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:.ctor(System.__Canon[],System.Func`2[System.__Canon,bool]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[System.__Canon]:GetEnumerator():System.Collections.Generic.IEnumerator`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 beq G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, #1 str w1, [x0, #0x14] ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 199: JIT compiled System.Linq.Enumerable+Iterator`1[System.__Canon]:GetEnumerator() [Tier0, IL size=40, code size=132] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x0, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] ldr w0, [x0, #0x14] sub w0, w0, #1 str w0, [fp, #0x3C] ldr x0, [fp, #0x40] ldr x0, [x0, #0x18] str x0, [fp, #0x30] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0x30] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x40] ldr w0, [x0, #0x14] str w0, [fp, #0x24] ldr w0, [fp, #0x24] add w0, w0, #1 ldr x1, [fp, #0x40] str w0, [x1, #0x14] ldr w0, [fp, #0x24] str w0, [fp, #0x3C] ldr x0, [fp, #0x40] ldr x0, [x0, #0x20] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x28] ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG05 ldr x14, [fp, #0x40] add x14, x14, #8 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #67 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w0, [fp, #0x3C] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 mov w0, wzr G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 308 200: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:MoveNext() [Tier0, IL size=81, code size=308] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:b__54_0(System.String):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 201: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+<>c:b__54_0(System.String) [Tier0, IL size=12, code size=60] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[System.__Canon]:get_Current():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 202: JIT compiled System.Linq.Enumerable+Iterator`1[System.__Canon]:get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[System.__Canon]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] str xzr, [x0, #0x08] ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 203: JIT compiled System.Linq.Enumerable+Iterator`1[System.__Canon]:Dispose() [Tier0, IL size=20, code size=40] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_RuntimeVersion():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 204: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_RuntimeVersion() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_Architecture():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 205: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_Architecture() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetGcConcurrentFlag():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 206: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetGcConcurrentFlag() [Tier0, IL size=20, code size=80] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_IsConcurrentGC():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x3B] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 207: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_IsConcurrentGC() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetGcServerFlag():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 208: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:GetGcServerFlag() [Tier0, IL size=20, code size=80] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_IsServerGC():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x3A] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 209: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:get_IsServerGC() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetFullInfo(int):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 210: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetFullInfo(int) [Tier0, IL size=17, code size=88] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:g__GetCurrentProcessInstructionSets|2_0(int):System.Collections.Generic.IEnumerable`1[System.String] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str w0, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] str w1, [x0, #0x1C] ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 211: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:g__GetCurrentProcessInstructionSets|2_0(int) [Tier0, IL size=15, code size=88] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x10] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 212: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.String]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x28] str wzr, [x0, #0x10] ldr x0, [fp, #0x28] str x0, [fp, #0x20] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str x0, [fp, #0x20] G_M000_IG04: ldr x0, [fp, #0x28] ldr w0, [x0, #0x1C] ldr x1, [fp, #0x20] str w0, [x1, #0x18] ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 213: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=55, code size=168] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str wzr, [fp, #0x14] str wzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #26 bhi G_M000_IG03 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG61 G_M000_IG04: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] ldr x0, [fp, #0x18] ldr w0, [x0, #0x18] str w0, [fp, #0x10] ldr w0, [fp, #0x10] sub w0, w0, #1 cmp w0, #1 bls G_M000_IG05 ldr w0, [fp, #0x10] cmp w0, #4 beq G_M000_IG41 b G_M000_IG59 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #1 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG06: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG09 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #2 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG08: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG11 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #3 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG10: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG13 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #4 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG12: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG15 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #5 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG14: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG17 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #6 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG16: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG19 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #7 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG18: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG21 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #8 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG20: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG23 G_M000_IG21: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG23 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #9 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG22: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG25 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #10 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG24: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG27 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #11 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG26: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG27: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG29 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #12 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG28: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG29: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG31 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #13 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG30: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG33 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #14 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG32: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG33: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG35 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #15 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG34: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG35: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG37 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #16 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG36: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG37: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG39 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #17 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG38: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG39: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG60 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #18 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG40: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG60 G_M000_IG41: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG43 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #19 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG42: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG45 G_M000_IG43: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG45 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #20 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG44: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG45: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG47 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #21 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG46: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG49 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #22 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG48: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG49: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG51 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #23 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG50: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG51: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG53 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #24 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG52: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG53: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG55 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #25 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG54: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG60 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] ldr x0, [fp, #0x18] mov w1, #26 str w1, [x0, #0x10] b G_M000_IG56 G_M000_IG56: mov w0, #1 G_M000_IG57: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG58: ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x10] b G_M000_IG60 G_M000_IG59: b G_M000_IG61 G_M000_IG60: b G_M000_IG61 G_M000_IG61: mov w0, wzr G_M000_IG62: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG32 - G_M000_IG02 dd G_M000_IG34 - G_M000_IG02 dd G_M000_IG36 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG40 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG44 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG48 - G_M000_IG02 dd G_M000_IG50 - G_M000_IG02 dd G_M000_IG52 - G_M000_IG02 dd G_M000_IG54 - G_M000_IG02 dd G_M000_IG58 - G_M000_IG02 ; Total bytes of code 2080 214: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:MoveNext() [Tier0, IL size=1104, code size=2080] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.Collections.Generic.IEnumerator.get_Current():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 215: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmAesSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 216: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmAesSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmCrc32Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 217: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmCrc32Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmDpSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 218: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmDpSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmRdmSupported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 219: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmRdmSupported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmSha1Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 220: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmSha1Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmSha256Supported():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 221: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:get_IsArmSha256Supported() [Tier0, IL size=6, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 222: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics+<g__GetCurrentProcessInstructionSets|2_0>d:System.IDisposable.Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetVectorSize():System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] G_M000_IG02: b G_M000_IG03 G_M000_IG03: add x0, fp, #24 mov w1, #11 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #24 mov w1, #8 lsl w1, w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 160 223: JIT compiled BenchmarkDotNet.Portability.Cpu.HardwareIntrinsics:GetVectorSize() [Tier0, IL size=57, code size=160] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 224: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__49:System.IDisposable.Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 225: JIT compiled BenchmarkDotNet.Jobs.Job:.ctor() [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x68] str x1, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x68] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x50] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x50] ldr x1, [fp, #0x68] ldr x2, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x40] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x40] ldr x1, [fp, #0x68] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x30] ldr x1, [fp, #0x68] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] ldr x1, [fp, #0x68] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x10] ldr x1, [fp, #0x68] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 672 226: JIT compiled BenchmarkDotNet.Jobs.Job:.ctor(System.String) [Tier0, IL size=88, code size=672] ; Assembly listing for method BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 227: JIT compiled BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.ctor(System.String) [Tier0, IL size=8, code size=52] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 228: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:.ctor(System.String) [Tier0, IL size=8, code size=52] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 156 229: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:.ctor(System.String) [Tier0, IL size=27, code size=156] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 136 230: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:.ctor() [Tier0, IL size=25, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:set_Owner(BenchmarkDotNet.Characteristics.CharacteristicObject):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 231: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:set_Owner(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] stp xzr, xzr, [x9, #0xA0] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x60] ldr x2, [fp, #0x60] ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x58] ldr x2, [fp, #0x58] ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x50] ldr x2, [fp, #0x50] ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG03: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x40] ldr x2, [fp, #0x40] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x38] ldr x2, [fp, #0x38] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x30] ldr x2, [fp, #0x30] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG04: str x2, [fp, #0x28] ldr x2, [fp, #0x28] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x70] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x68] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 1904 232: JIT compiled BenchmarkDotNet.Jobs.Job:.cctor() [Tier0, IL size=341, code size=1904] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[System.__Canon](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 233: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[System.__Canon](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.__Canon](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x28] str xzr, [fp, #0x30] ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x2, [fp, #0x28] ldr x4, [fp, #0x30] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 188 234: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.__Canon](System.String) [Tier0, IL size=29, code size=188] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:.ctor(System.String,System.Type,System.Func`3[System.__Canon,System.__Canon,System.__Canon],System.__Canon,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] str x3, [fp, #0x28] str x4, [fp, #0x20] str w5, [fp, #0x1C] str w6, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w5, [fp, #0x1C] uxtb w5, w5 ldr w6, [fp, #0x18] uxtb w6, w6 ldr x1, [fp, #0x38] ldr x0, [fp, #0x40] ldr x3, [fp, #0x30] ldr x4, [fp, #0x20] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x40] add x14, x14, #48 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x40] add x14, x14, #56 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 168 235: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:.ctor(System.String,System.Type,System.Func`3[System.__Canon,System.__Canon,System.__Canon],System.__Canon,bool,bool) [Tier0, IL size=45, code size=168] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:.ctor(System.String,System.Type,System.Type,System.Object,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x68] str x1, [fp, #0x60] str x2, [fp, #0x58] str x3, [fp, #0x50] str x4, [fp, #0x48] str w5, [fp, #0x44] str w6, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG04: ldr x14, [fp, #0x58] cbnz x14, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG06: ldr x14, [fp, #0x50] cbnz x14, G_M000_IG08 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW G_M000_IG08: ldr x14, [fp, #0x68] add x14, x14, #8 ldr x15, [fp, #0x60] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x68] add x14, x14, #16 ldr x15, [fp, #0x58] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x68] add x14, x14, #24 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x68] add x14, x14, #32 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x68] ldr w1, [fp, #0x44] strb w1, [x0, #0x28] ldr x0, [fp, #0x68] ldr w1, [fp, #0x40] strb w1, [x0, #0x29] G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 468 236: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:.ctor(System.String,System.Type,System.Type,System.Object,bool,bool) [Tier0, IL size=111, code size=468] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #1 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #1 mov w3, #2 movz x4, #0xD1FFAB1E G_M000_IG03: movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #2 mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #2 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 976 237: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:.cctor() [Tier0, IL size=209, code size=976] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 238: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 239: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] str w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] str w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 240: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 241: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 242: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] str w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] str w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 243: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[long](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[long] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 244: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[long](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,long](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[long] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str xzr, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr x4, [fp, #0x20] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 245: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,long](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[long]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,long,long],long,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str x4, [fp, #0x28] str w5, [fp, #0x24] str w6, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr x6, [fp, #0x28] str x6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x20] uxtb w6, w6 ldr w5, [fp, #0x24] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr x1, [fp, #0x28] str x1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 246: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[long]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,long,long],long,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[System.Nullable`1[System.Guid]](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 247: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[System.Nullable`1[System.Guid]](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.Nullable`1[System.Guid]](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x48] stp xzr, xzr, [fp, #0x50] str wzr, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x40] str x0, [fp, #0x20] ldr x0, [fp, #0x68] str x0, [fp, #0x18] ldr x0, [fp, #0x48] str x0, [fp, #0x10] ldp x0, x1, [fp, #0x50] stp x0, x1, [fp, #0x28] ldr w0, [fp, #0x60] str w0, [fp, #0x38] ldr x0, [fp, #0x20] ldr x1, [fp, #0x18] ldr x2, [fp, #0x10] add x4, fp, #40 mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x40] G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 192 248: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.Nullable`1[System.Guid]](System.String) [Tier0, IL size=29, code size=192] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,System.Nullable`1[System.Guid],System.Nullable`1[System.Guid]],System.Nullable`1[System.Guid],bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str x4, [fp, #0x28] str w5, [fp, #0x24] str w6, [fp, #0x20] G_M000_IG02: ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX_NULLABLE str x0, [fp, #0x18] ldr x4, [fp, #0x18] ldr w5, [fp, #0x24] uxtb w5, w5 ldr w6, [fp, #0x20] uxtb w6, w6 ldr x1, [fp, #0x40] ldr x3, [fp, #0x38] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] ldr x1, [fp, #0x48] ldp x2, x3, [x0] stp x2, x3, [x1, #0x38] ldr w2, [x0, #0x10] str w2, [x1, #0x48] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 176 249: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,System.Nullable`1[System.Guid],System.Nullable`1[System.Guid]],System.Nullable`1[System.Guid],bool,bool) [Tier0, IL size=45, code size=176] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 250: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[bool](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 251: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,bool](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[bool]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,bool,bool],bool,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] strb w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] strb w1, [x0, #0x2A] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 252: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[bool]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,bool,bool],bool,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:.ctor(System.String,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 253: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:.ctor(System.String,int,int) [Tier0, IL size=22, code size=116] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 180 254: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:.ctor(System.String) [Tier0, IL size=24, code size=180] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x2, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 176 255: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:.cctor() [Tier0, IL size=34, code size=176] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.__Canon](System.String,System.Func`3[System.__Canon,System.__Canon,System.__Canon],System.__Canon,bool):BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] str x2, [fp, #0x40] str x3, [fp, #0x38] str w4, [fp, #0x34] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG05: ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr w5, [fp, #0x34] uxtb w5, w5 ldr x1, [fp, #0x48] ldr x0, [fp, #0x28] ldr x3, [fp, #0x40] ldr x4, [fp, #0x38] mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 196 256: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,System.__Canon](System.String,System.Func`3[System.__Canon,System.__Canon,System.__Canon],System.__Canon,bool) [Tier0, IL size=21, code size=196] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] ldr x2, [fp, #0x30] ldr x3, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 152 257: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,System.__Canon) [Tier0, IL size=9, code size=152] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] ldr x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 258: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],System.__Canon) [Tier0, IL size=14, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue(BenchmarkDotNet.Characteristics.Characteristic,System.Object):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG05 ldr x0, [fp, #0x40] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] cmp x0, x1 beq G_M000_IG06 ldr x0, [fp, #0x30] cbz x0, G_M000_IG03 ldr x0, [fp, #0x30] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr x0, [fp, #0x28] cbz x0, G_M000_IG06 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x28] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 436 259: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue(BenchmarkDotNet.Characteristics.Characteristic,System.Object) [Tier0, IL size=88, code size=436] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:AssertNotFrozen():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: add x0, fp, #48 mov w1, #55 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 ldr x2, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG04: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 336 260: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:AssertNotFrozen() [Tier0, IL size=64, code size=336] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:get_Frozen():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x28] ldrb w0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 261: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:get_Frozen() [Tier0, IL size=23, code size=112] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:get_Owner():BenchmarkDotNet.Characteristics.CharacteristicObject:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 262: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:get_Owner() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_HasChildCharacteristics():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 263: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_HasChildCharacteristics() [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_CharacteristicType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 264: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_CharacteristicType() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:IsCharacteristicObjectSubclass(System.Type):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0xB0] ldr x2, [x2, #0x18] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 265: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:IsCharacteristicObjectSubclass(System.Type) [Tier0, IL size=22, code size=88] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValueCore(BenchmarkDotNet.Characteristics.Characteristic,System.Object):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! str x19, [sp, #0x98] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str x0, [fp, #0x90] str x1, [fp, #0x88] str x2, [fp, #0x80] G_M000_IG02: ldr x0, [fp, #0x88] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x19, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp x19, x0 beq G_M000_IG03 ldr x0, [fp, #0x80] cbnz x0, G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG04: ldr x19, [sp, #0x98] ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG05: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG09 ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG07 G_M000_IG06: add x0, fp, #80 mov w1, #41 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x40] ldr x1, [fp, #0x40] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #80 ldr x2, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x38] ldr x1, [fp, #0x38] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #80 ldr x2, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x30] ldr x1, [fp, #0x30] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x48] bl CORINFO_HELP_THROW G_M000_IG07: ldr x0, [fp, #0x90] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] ldr x1, [fp, #0x88] ldr x2, [fp, #0x78] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG08: ldr x19, [sp, #0x98] ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG09: ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG10: ldr x19, [sp, #0x98] ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 888 266: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValueCore(BenchmarkDotNet.Characteristics.Characteristic,System.Object) [Tier0, IL size=191, code size=888] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsAssignable(BenchmarkDotNet.Characteristics.Characteristic,System.Object) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! str x19, [sp, #0x98] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str x0, [fp, #0x90] str x1, [fp, #0x88] G_M000_IG02: ldr x19, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp x19, x0 beq G_M000_IG03 ldr x0, [fp, #0x88] cbnz x0, G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] bl CORINFO_HELP_THROW G_M000_IG05: ldr x19, [sp, #0x98] ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG06: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x88] ldr x2, [fp, #0x38] ldr x2, [x2] ldr x2, [x2, #0xA0] ldr x2, [x2, #0x08] blr x2 cbnz w0, G_M000_IG08 G_M000_IG07: add x0, fp, #96 mov w1, #42 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x30] ldr x1, [fp, #0x30] add x0, fp, #96 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #96 ldr x2, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #96 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #96 ldr x2, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #96 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #96 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x50] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x48] bl CORINFO_HELP_THROW G_M000_IG08: ldr x19, [sp, #0x98] ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 728 267: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsAssignable(BenchmarkDotNet.Characteristics.Characteristic,System.Object) [Tier0, IL size=133, code size=728] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 268: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Jobs.GcMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 269: JIT compiled BenchmarkDotNet.Jobs.GcMode:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 270: JIT compiled BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 271: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue(BenchmarkDotNet.Characteristics.Characteristic):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] add x2, fp, #24 ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] G_M000_IG03: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 124 272: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=31, code size=124] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveCore(BenchmarkDotNet.Characteristics.Characteristic,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr x3, [fp, #0x20] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 60 273: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveCore(BenchmarkDotNet.Characteristics.Characteristic,System.Object) [Tier0, IL size=9, code size=60] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] str x2, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 ldr x0, [fp, #0x50] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x50] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x48] ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x3, [fp, #0x38] ldr x3, [x3, #0x18] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 320 274: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=320] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_Resolver():System.Func`3[System.__Canon,System.__Canon,System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 275: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp x0, x1 beq G_M000_IG04 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 276: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=17, code size=92] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_FallbackValue():System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 277: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_FallbackValue() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:get_OwnerOrSelf():BenchmarkDotNet.Characteristics.CharacteristicObject:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG03: ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 278: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:get_OwnerOrSelf() [Tier0, IL size=12, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:AttachToOwner(BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #128 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) add x3, sp, #240 str x3, [fp, #0xE8] str x0, [fp, #0xE0] str x1, [fp, #0xD8] str x2, [fp, #0xD0] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x38] ldr x0, [fp, #0xD8] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x40] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0xE0] ldr x1, [fp, #0xE0] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cbz w0, G_M000_IG06 G_M000_IG05: add x0, fp, #168 mov w1, #59 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #168 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #168 ldr x2, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #168 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] add x0, fp, #168 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0xE0] ldr x0, [x0, #0x08] str x0, [fp, #0x68] ldr x0, [fp, #0xD8] ldr x1, [fp, #0xD0] ldr x2, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 add x8, fp, #128 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG07: b G_M000_IG11 G_M000_IG08: add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] str x1, [fp, #0x60] G_M000_IG09: ldp x0, x1, [fp, #0x58] stp x0, x1, [fp, #0x70] G_M000_IG10: add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x50] ldr x0, [fp, #0xD8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG11: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #56 mov w1, #139 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG08 b G_M000_IG14 G_M000_IG14: ldr x0, [fp, #0xE8] bl G_M000_IG17 G_M000_IG15: nop G_M000_IG16: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG17: stp fp, lr, [sp, #-0x20]! add x3, fp, #240 str x3, [sp, #0x18] G_M000_IG18: add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 912 279: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:AttachToOwner(BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=165, code size=912] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:get_IsPropertyBag():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 280: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:get_IsPropertyBag() [Tier0, IL size=2, code size=24] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsNonFrozenRoot():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 281: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsNonFrozenRoot() [Tier0, IL size=13, code size=68] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsRoot():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x0, G_M000_IG04 G_M000_IG03: add x0, fp, #80 mov w1, #45 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x40] ldr x1, [fp, #0x40] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #80 ldr x2, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x38] ldr x1, [fp, #0x38] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x2, [fp, #0x30] add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] bl CORINFO_HELP_THROW G_M000_IG04: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 520 282: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:AssertIsRoot() [Tier0, IL size=99, code size=520] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValueOnAttach(BenchmarkDotNet.Characteristics.Characteristic,System.Object):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG04 ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG03 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 252 283: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValueOnAttach(BenchmarkDotNet.Characteristics.Characteristic,System.Object) [Tier0, IL size=48, code size=252] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetOwnerCore(BenchmarkDotNet.Characteristics.CharacteristicObject):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] ldr x15, [x14, #0x08] ldr x14, [fp, #0x28] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] strb wzr, [x0, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 232 284: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetOwnerCore(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=53, code size=232] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:set_Jit(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 285: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:set_Jit(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 286: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w0, [fp, #0x1C] str w0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 287: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:set_Platform(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 288: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:set_Platform(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 289: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w0, [fp, #0x1C] str w0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 290: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:Freeze():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 291: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:Freeze() [Tier0, IL size=12, code size=108] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:FreezeCore():BenchmarkDotNet.Characteristics.CharacteristicObject:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldrb w0, [x0, #0x18] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x18] mov w1, #1 strb w1, [x0, #0x18] G_M000_IG03: ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 292: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:FreezeCore() [Tier0, IL size=23, code size=72] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:.ctor(System.String,BenchmarkDotNet.Characteristics.CharacteristicObject):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 293: JIT compiled BenchmarkDotNet.Jobs.Job:.ctor(System.String,BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=16, code size=84] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 294: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:.ctor() [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 295: JIT compiled BenchmarkDotNet.Jobs.RunMode:.ctor() [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:.ctor(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 296: JIT compiled BenchmarkDotNet.Jobs.RunMode:.ctor(System.String) [Tier0, IL size=8, code size=52] ; Assembly listing for method BenchmarkDotNet.Jobs.InfrastructureMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 297: JIT compiled BenchmarkDotNet.Jobs.InfrastructureMode:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.AccuracyMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 298: JIT compiled BenchmarkDotNet.Jobs.AccuracyMode:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.MetaMode:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 299: JIT compiled BenchmarkDotNet.Jobs.MetaMode:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:Apply(BenchmarkDotNet.Characteristics.CharacteristicObject):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 116 300: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:Apply(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=13, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ApplyCore(BenchmarkDotNet.Characteristics.CharacteristicObject):BenchmarkDotNet.Characteristics.CharacteristicObject:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 301: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ApplyCore(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=15, code size=92] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsToApply(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x38] bl System.Object:GetType():System.Type:this str x0, [fp, #0x20] ldr x0, [fp, #0x30] ldr wzr, [x0] bl System.Object:GetType():System.Type:this str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG03 ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cbnz w0, G_M000_IG03 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] G_M000_IG03: ldr x0, [fp, #0x28] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 236 302: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsToApply(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=49, code size=236] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsToApply():System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] str x0, [fp, #0xA8] G_M000_IG02: ldr x0, [fp, #0xA8] ldr x1, [fp, #0xA8] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cbnz w0, G_M000_IG05 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x48] ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x48] str x0, [fp, #0x30] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x28] str x2, [fp, #0x30] G_M000_IG03: ldr x2, [fp, #0x30] ldr x1, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG05: ldr x0, [fp, #0xA8] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x98] ldr x0, [fp, #0x90] str x0, [fp, #0x88] ldr x0, [fp, #0x98] str x0, [fp, #0x80] ldr x0, [fp, #0x98] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x50] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x50] str x2, [fp, #0x80] G_M000_IG06: ldr x2, [fp, #0x80] ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0x70] str x0, [fp, #0x68] ldr x0, [fp, #0x78] str x0, [fp, #0x60] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x58] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x58] str x2, [fp, #0x60] G_M000_IG07: ldr x2, [fp, #0x60] ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] G_M000_IG08: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 920 303: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsToApply() [Tier0, IL size=137, code size=920] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristics(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Characteristics.Characteristic] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr wzr, [x0] bl System.Object:GetType():System.Type:this movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 304: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristics(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=12, code size=52] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristics(System.Type):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Characteristics.Characteristic] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x20] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 248 305: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristics(System.Type) [Tier0, IL size=38, code size=248] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 204 306: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:.cctor() [Tier0, IL size=31, code size=204] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG05: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x30] mov w2, #31 mov w3, #1 mov x4, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 172 307: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:.ctor() [Tier0, IL size=16, code size=172] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:get_DefaultConcurrencyLevel():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 308: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:get_DefaultConcurrencyLevel() [Tier0, IL size=6, code size=40] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:.ctor(int,int,bool,System.Collections.Generic.IEqualityComparer`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp add x9, fp, #64 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str xzr, [x9, #0x80] str x0, [fp, #0xE8] str x0, [fp, #0xE0] str w1, [fp, #0xDC] str w2, [fp, #0xD8] str w3, [fp, #0xD4] str x4, [fp, #0xC8] G_M000_IG02: ldr x0, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, #0xD1FFAB1E str w0, [fp, #0x50] ldr w0, [fp, #0xDC] cmp w0, #0 bgt G_M000_IG08 ldr w0, [fp, #0xDC] cmn w0, #1 beq G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x40] ldr x1, [fp, #0x48] ldr x2, [fp, #0x40] ldr x0, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x58] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x38] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x60] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x60] G_M000_IG07: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xDC] G_M000_IG08: ldr w0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD8] ldr w1, [fp, #0xDC] cmp w0, w1 bge G_M000_IG09 ldr w0, [fp, #0xDC] str w0, [fp, #0xD8] G_M000_IG09: ldr w0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD8] ldr w1, [fp, #0xDC] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xC0] ldr x0, [fp, #0xC0] ldr x2, [fp, #0xC0] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, #1 str w0, [fp, #0xAC] b G_M000_IG11 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xAC] sxtw x1, w1 ldr x0, [fp, #0xC0] ldr x2, [fp, #0x98] bl CORINFO_HELP_ARRADDR_ST ldr w1, [fp, #0xAC] add w1, w1, #1 str w1, [fp, #0xAC] G_M000_IG11: ldr w0, [fp, #0x50] sub w0, w0, #1 str w0, [fp, #0x50] ldr w0, [fp, #0x50] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #80 mov w1, #90 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr w0, [fp, #0xAC] ldr x1, [fp, #0xC0] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG10 ldr x1, [fp, #0xC0] ldr w1, [x1, #0x08] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0xB8] ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG15 G_M000_IG14: ldr x1, [fp, #0x30] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x20] str x1, [fp, #0x90] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x90] G_M000_IG16: ldr w1, [fp, #0xD8] sxtw x1, w1 ldr x0, [fp, #0x90] bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0xB0] b G_M000_IG17 G_M000_IG17: ldr x0, [fp, #0xC8] cbnz x0, G_M000_IG21 ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] str x0, [fp, #0x68] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x68] G_M000_IG20: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC8] G_M000_IG21: ldr x0, [fp, #0xE0] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG25 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] cbz x0, G_M000_IG25 ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x38] cbz x0, G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x38] str x0, [fp, #0x70] b G_M000_IG24 G_M000_IG23: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x70] G_M000_IG24: ldr x0, [fp, #0x70] ldr x1, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC8] b G_M000_IG29 G_M000_IG25: ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG27 G_M000_IG26: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] str x0, [fp, #0x88] b G_M000_IG28 G_M000_IG27: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x88] G_M000_IG28: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xC8] cmp x0, x1 bne G_M000_IG29 ldr x0, [fp, #0xE0] mov w1, #1 strb w1, [x0, #0x15] G_M000_IG29: ldr x0, [fp, #0xE0] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x30] cbz x0, G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x30] str x0, [fp, #0x78] b G_M000_IG32 G_M000_IG31: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x78] G_M000_IG32: ldr x0, [fp, #0x78] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr x1, [fp, #0xB0] ldr x2, [fp, #0xC0] ldr x3, [fp, #0xB8] ldr x4, [fp, #0xC8] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0xE0] add x14, x14, #8 ldr x15, [fp, #0x80] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xE0] ldr w1, [fp, #0xD4] strb w1, [x0, #0x14] ldr x0, [fp, #0xB0] ldr w0, [x0, #0x08] ldr x1, [fp, #0xC0] ldr w1, [x1, #0x08] cmp w1, #0 beq G_M000_IG36 cmn w1, #1 bne G_M000_IG33 cmp w0, #1 bvs G_M000_IG35 G_M000_IG33: sdiv w0, w0, w1 ldr x1, [fp, #0xE0] str w0, [x1, #0x10] G_M000_IG34: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG35: bl CORINFO_HELP_OVERFLOW G_M000_IG36: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 1412 309: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:.ctor(int,int,bool,System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=264, code size=1412] ; Assembly listing for method System.Collections.HashHelpers:GetPrime(int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str w0, [fp, #0x6C] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x28] ldr w0, [fp, #0x6C] tbz w0, #31, G_M000_IG04 G_M000_IG03: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] str x1, [fp, #0x40] G_M000_IG05: ldp x0, x1, [fp, #0x38] stp x0, x1, [fp, #0x58] G_M000_IG06: str wzr, [fp, #0x54] b G_M000_IG10 G_M000_IG07: ldr w0, [fp, #0x54] ldr w1, [fp, #0x60] cmp w0, w1 bhs G_M000_IG20 ldr x0, [fp, #0x58] ldr w1, [fp, #0x54] mov w1, w1 lsl x1, x1, #2 ldr w0, [x0, x1] str w0, [fp, #0x50] ldr w0, [fp, #0x50] ldr w1, [fp, #0x6C] cmp w0, w1 blt G_M000_IG09 ldr w0, [fp, #0x50] G_M000_IG08: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG09: ldr w0, [fp, #0x54] add w0, w0, #1 str w0, [fp, #0x54] G_M000_IG10: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #40 mov w1, #45 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr w0, [fp, #0x54] ldr w1, [fp, #0x60] cmp w0, w1 blt G_M000_IG07 ldr w0, [fp, #0x6C] orr w0, w0, #1 str w0, [fp, #0x4C] b G_M000_IG16 G_M000_IG13: ldr w0, [fp, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG15 ldr w0, [fp, #0x4C] sub w0, w0, #1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] mov w1, #101 sdiv w0, w0, w1 mov w1, #101 mul w0, w0, w1 ldr w1, [fp, #0x1C] sub w0, w1, w0 cbz w0, G_M000_IG15 ldr w0, [fp, #0x4C] G_M000_IG14: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG15: ldr w0, [fp, #0x4C] add w0, w0, #2 str w0, [fp, #0x4C] G_M000_IG16: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #40 mov w1, #83 bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr w0, [fp, #0x4C] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 blt G_M000_IG13 ldr w0, [fp, #0x6C] G_M000_IG19: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 488 310: JIT compiled System.Collections.HashHelpers:GetPrime(int) [Tier0, IL size=93, code size=488] ; Assembly listing for method System.Collections.HashHelpers:get_Primes():System.ReadOnlySpan`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_FIELDDESC_TO_STUBRUNTIMEFIELD str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 311: JIT compiled System.Collections.HashHelpers:get_Primes() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon]:.ctor(System.Collections.Concurrent.ConcurrentDictionary`2+VolatileNode[System.__Canon,System.__Canon][],System.Object[],int[],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str x3, [fp, #0x20] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #32 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #8 bne G_M000_IG03 ldr x0, [fp, #0x30] ldr w0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x38] str x0, [x1, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 312: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon]:.ctor(System.Collections.Concurrent.ConcurrentDictionary`2+VolatileNode[System.__Canon,System.__Canon][],System.Object[],int[],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=58, code size=188] ; Assembly listing for method System.Collections.HashHelpers:GetFastModMultiplier(uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: movn x0, #0 ldr w1, [fp, #0x1C] mov w1, w1 cmp x1, #0 beq G_M000_IG04 udiv x0, x0, x1 add x0, x0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 56 313: JIT compiled System.Collections.HashHelpers:GetFastModMultiplier(uint) [Tier0, IL size=9, code size=56] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetOrAdd(System.__Canon,System.Func`2[System.__Canon,System.__Canon]):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str xzr, [fp, #0x58] str xzr, [fp, #0x50] str xzr, [fp, #0x40] str xzr, [fp, #0x20] str x0, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] str x2, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x68] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x60] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] dmb ishld str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x50] ldr x0, [fp, #0x70] ldr x1, [fp, #0x50] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x4C] ldr x0, [fp, #0x70] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x4, [fp, #0x18] ldr x4, [x4, #0x30] ldr x4, [x4] ldr x4, [x4, #0x18] str x4, [fp, #0x38] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x38] G_M000_IG07: add x4, fp, #64 ldr x0, [fp, #0x38] ldr x1, [fp, #0x58] ldr x2, [fp, #0x68] ldr w3, [fp, #0x4C] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbnz w0, G_M000_IG08 str xzr, [fp, #0x30] add x0, fp, #48 ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x68] ldr x2, [fp, #0x60] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x20] ldr x4, [fp, #0x20] add x7, fp, #64 ldr x1, [fp, #0x58] ldr x2, [fp, #0x68] ldr x3, [fp, #0x28] ldr x0, [fp, #0x70] mov w5, wzr mov w6, #1 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 G_M000_IG08: ldr x0, [fp, #0x40] G_M000_IG09: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 428 314: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetOrAdd(System.__Canon,System.Func`2[System.__Canon,System.__Canon]) [Tier0, IL size=91, code size=428] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetHashCode(System.Collections.Generic.IEqualityComparer`1[System.__Canon],System.__Canon):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] G_M000_IG02: b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x40] ldrb w0, [x0, #0x15] cbnz w0, G_M000_IG08 ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x40] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x40] str x0, [fp, #0x28] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG06: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x38] ldr x11, [fp, #0x20] ldr x1, [fp, #0x30] ldr x2, [fp, #0x20] ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x18] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 192 315: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetHashCode(System.Collections.Generic.IEqualityComparer`1[System.__Canon],System.__Canon) [Tier0, IL size=72, code size=192] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:TryGetValueInternal(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],System.__Canon,int,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x28] str x0, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str x2, [fp, #0x50] str w3, [fp, #0x4C] str x4, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x38] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x60] ldr x1, [fp, #0x58] ldr w2, [fp, #0x4C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] b G_M000_IG10 G_M000_IG04: ldr w0, [fp, #0x4C] ldr x1, [fp, #0x28] ldr w1, [x1, #0x20] cmp w0, w1 bne G_M000_IG09 ldr x0, [fp, #0x60] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x48] cbz x0, G_M000_IG06 G_M000_IG05: ldr x1, [fp, #0x60] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x48] str x1, [fp, #0x20] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG07: ldr x1, [fp, #0x20] str x1, [fp, #0x18] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] ldr x0, [fp, #0x38] ldr x11, [fp, #0x18] ldr x2, [fp, #0x50] ldr x3, [fp, #0x18] ldr x3, [x3] blr x3 cbz w0, G_M000_IG09 ldr x14, [fp, #0x28] ldr x15, [x14, #0x10] ldr x14, [fp, #0x40] bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG09: ldr x0, [fp, #0x28] ldr x0, [x0, #0x18] dmb ishld str x0, [fp, #0x28] G_M000_IG10: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #16 mov w1, #150 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x40] str xzr, [x0] mov w0, wzr G_M000_IG13: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 348 316: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:TryGetValueInternal(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],System.__Canon,int,byref) [Tier0, IL size=162, code size=348] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetBucket(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],int):System.Collections.Concurrent.ConcurrentDictionary`2+Node[System.__Canon,System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #8 bne G_M000_IG04 ldr x2, [fp, #0x30] ldr x2, [x2, #0x28] ldr x1, [fp, #0x20] ldr w1, [x1, #0x08] ldr w0, [fp, #0x2C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x20] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG06 add x0, x1, x0, LSL #3 add x0, x0, #16 ldar x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] ldr x0, [fp, #0x20] ldr w0, [x0, #0x08] str w0, [fp, #0x18] ldr w0, [fp, #0x1C] ldr w1, [fp, #0x18] cmp w1, #0 beq G_M000_IG07 udiv w0, w0, w1 ldr w1, [fp, #0x18] mul w0, w0, w1 ldr w1, [fp, #0x1C] sub w0, w1, w0 ldr x1, [fp, #0x20] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG06 add x0, x1, x0, LSL #3 add x0, x0, #16 ldar x0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG07: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 244 317: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetBucket(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],int) [Tier0, IL size=63, code size=244] ; Assembly listing for method System.Collections.HashHelpers:FastMod(uint,uint,ulong):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str w0, [fp, #0x2C] str w1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr w1, [fp, #0x2C] mov w1, w1 mul x0, x0, x1 lsr x0, x0, #32 add x0, x0, #1 ldr w1, [fp, #0x28] mov w1, w1 mul x0, x0, x1 lsr x0, x0, #32 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 76 318: JIT compiled System.Collections.HashHelpers:FastMod(uint,uint,ulong) [Tier0, IL size=20, code size=76] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristicsCore(System.Type):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Characteristics.Characteristic] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 319: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:GetAllCharacteristicsCore(System.Type) [Tier0, IL size=25, code size=188] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:FillAllCharacteristicsCore(System.Type,System.Collections.Generic.List`1[BenchmarkDotNet.Characteristics.Characteristic],System.Collections.Generic.HashSet`1[BenchmarkDotNet.Characteristics.Characteristic]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] add x3, sp, #192 str x3, [fp, #0xB8] str x0, [fp, #0xB0] str x1, [fp, #0xA8] str x2, [fp, #0xA0] G_M000_IG02: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0x98] str x0, [fp, #0x70] ldr x0, [fp, #0x78] str x0, [fp, #0x68] mov w0, #0xD1FFAB1E str w0, [fp, #0x38] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x40] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x40] str x2, [fp, #0x68] G_M000_IG03: ldr x2, [fp, #0x68] ldr x1, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x90] G_M000_IG04: b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x88] ldr x0, [fp, #0xA0] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG06 ldr x0, [fp, #0xA8] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #56 mov w1, #75 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG05 b G_M000_IG09 G_M000_IG09: ldr x0, [fp, #0xB8] bl G_M000_IG21 G_M000_IG10: nop G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x60] ldr x0, [fp, #0x98] str x0, [fp, #0x58] ldr x0, [fp, #0x60] str x0, [fp, #0x50] ldr x0, [fp, #0x60] cbnz x0, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x48] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x48] str x2, [fp, #0x50] G_M000_IG12: ldr x2, [fp, #0x50] ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x90] G_M000_IG13: b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x80] ldr x0, [fp, #0xA0] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG15 ldr x0, [fp, #0xA8] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0xA8] ldr x2, [fp, #0xA0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #56 mov w1, #176 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG14 b G_M000_IG18 G_M000_IG18: ldr x0, [fp, #0xB8] bl G_M000_IG24 G_M000_IG19: nop G_M000_IG20: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG21: stp fp, lr, [sp, #-0x20]! add x3, fp, #192 str x3, [sp, #0x18] G_M000_IG22: ldr x0, [fp, #0x90] cbz x0, G_M000_IG23 ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG23: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #192 str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0x90] cbz x0, G_M000_IG26 ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1196 320: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:FillAllCharacteristicsCore(System.Type,System.Collections.Generic.List`1[BenchmarkDotNet.Characteristics.Characteristic],System.Collections.Generic.HashSet`1[BenchmarkDotNet.Characteristics.Characteristic]) [Tier0, IL size=197, code size=1196] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:GetThisTypeCharacteristics(System.Type):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Characteristics.Characteristic] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x20] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 208 321: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:GetThisTypeCharacteristics(System.Type) [Tier0, IL size=38, code size=208] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:GetThisTypeCharacteristicsCore(System.Type):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Characteristics.Characteristic] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] ldr x0, [fp, #0x60] mov w1, #120 ldr x2, [fp, #0x60] ldr x2, [x2] ldr x2, [x2, #0x80] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x68] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x68] str x2, [fp, #0xD1FFAB1E] G_M000_IG03: ldr x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x70] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x70] str x2, [fp, #0xD1FFAB1E] G_M000_IG04: ldr x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x48] mov w1, #120 ldr x2, [fp, #0x48] ldr x2, [x2] ldr x2, [x2, #0x90] ldr x2, [x2, #0x38] blr x2 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x78] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x78] str x2, [fp, #0xD1FFAB1E] G_M000_IG05: ldr x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xF0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xE8] ldr x0, [fp, #0xF0] str x0, [fp, #0xE0] ldr x0, [fp, #0xF8] str x0, [fp, #0xD8] ldr x0, [fp, #0xF8] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x80] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x80] str x2, [fp, #0xD8] G_M000_IG06: ldr x2, [fp, #0xD8] ldr x1, [fp, #0xE0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xE8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD0] ldr x0, [fp, #0xC8] str x0, [fp, #0xC0] ldr x0, [fp, #0xD0] str x0, [fp, #0xB8] ldr x0, [fp, #0xD0] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x88] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x88] str x2, [fp, #0xB8] G_M000_IG07: ldr x2, [fp, #0xB8] ldr x1, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xA8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xB0] ldr x0, [fp, #0xA8] str x0, [fp, #0xA0] ldr x0, [fp, #0xB0] str x0, [fp, #0x98] ldr x0, [fp, #0xB0] cbnz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x90] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x90] str x2, [fp, #0x98] G_M000_IG08: ldr x2, [fp, #0x98] ldr x1, [fp, #0xA0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1860 322: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:GetThisTypeCharacteristicsCore(System.Type) [Tier0, IL size=260, code size=1860] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 323: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 324: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Select[System.__Canon,System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #48 mov x10, #144 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp xzr, xzr, [x9, #0x20] str x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 mov w0, #15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0xE0] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xE0] G_M000_IG07: ldr x0, [fp, #0xE0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG15 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x68] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x68] G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] cmp x0, #112 ble G_M000_IG13 G_M000_IG11: ldr x0, [fp, #0x48] ldr x0, [x0, #0x70] cbz x0, G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x48] ldr x0, [x0, #0x70] str x0, [fp, #0x60] b G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x60] G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0x68] ldr x2, [fp, #0x60] bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x58] blr x2 str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG15: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG17 G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0xD8] b G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xD8] G_M000_IG18: ldr x0, [fp, #0xD8] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG46 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] cmp x0, #64 ble G_M000_IG21 G_M000_IG19: ldr x0, [fp, #0x40] ldr x0, [x0, #0x40] cbz x0, G_M000_IG21 G_M000_IG20: ldr x0, [fp, #0x40] ldr x0, [x0, #0x40] str x0, [fp, #0xB0] b G_M000_IG22 G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xB0] G_M000_IG22: ldr x0, [fp, #0xB0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG32 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] cbz w0, G_M000_IG27 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] cmp x0, #104 ble G_M000_IG25 G_M000_IG23: ldr x0, [fp, #0x38] ldr x0, [x0, #0x68] cbz x0, G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0x38] ldr x0, [x0, #0x68] str x0, [fp, #0x70] b G_M000_IG26 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x70] G_M000_IG26: ldr x0, [fp, #0x70] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] ldr x0, [fp, #0x78] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x78] str x0, [fp, #0xF0] ldr x0, [fp, #0xF0] str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] cmp x0, #96 ble G_M000_IG30 G_M000_IG28: ldr x0, [fp, #0x30] ldr x0, [x0, #0x60] cbz x0, G_M000_IG30 G_M000_IG29: ldr x0, [fp, #0x30] ldr x0, [x0, #0x60] str x0, [fp, #0x80] b G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x80] G_M000_IG31: ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x10] cmp x0, #72 ble G_M000_IG35 G_M000_IG33: ldr x0, [fp, #0x28] ldr x0, [x0, #0x48] cbz x0, G_M000_IG35 G_M000_IG34: ldr x0, [fp, #0x28] ldr x0, [x0, #0x48] str x0, [fp, #0xA8] b G_M000_IG36 G_M000_IG35: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xA8] G_M000_IG36: ldr x0, [fp, #0xA8] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF8] ldr x0, [fp, #0xF8] cbz x0, G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] cmp x0, #88 ble G_M000_IG39 G_M000_IG37: ldr x0, [fp, #0x20] ldr x0, [x0, #0x58] cbz x0, G_M000_IG39 G_M000_IG38: ldr x0, [fp, #0x20] ldr x0, [x0, #0x58] str x0, [fp, #0x88] b G_M000_IG40 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x88] G_M000_IG40: ldr x0, [fp, #0x88] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] ldr x0, [fp, #0x90] ldr x1, [fp, #0xF8] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x90] str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] cmp x0, #80 ble G_M000_IG44 G_M000_IG42: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] cbz x0, G_M000_IG44 G_M000_IG43: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] str x0, [fp, #0x98] b G_M000_IG45 G_M000_IG44: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x98] G_M000_IG45: ldr x0, [fp, #0x98] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xA0] str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG46: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG48 G_M000_IG47: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0xD0] b G_M000_IG49 G_M000_IG48: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xD0] G_M000_IG49: ldr x0, [fp, #0xD0] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG54 str xzr, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x10] cmp x0, #56 ble G_M000_IG52 G_M000_IG50: ldr x0, [fp, #0x10] ldr x0, [x0, #0x38] cbz x0, G_M000_IG52 G_M000_IG51: ldr x3, [fp, #0x10] ldr x3, [x3, #0x38] str x3, [fp, #0xB8] b G_M000_IG53 G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xB8] G_M000_IG53: add x3, fp, #232 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xE8] cbz x0, G_M000_IG54 ldr x0, [fp, #0xE8] str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG54: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x30] cbz x0, G_M000_IG56 G_M000_IG55: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x30] str x0, [fp, #0xC0] b G_M000_IG57 G_M000_IG56: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0xC0] G_M000_IG57: ldr x0, [fp, #0xC0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xC8] str x0, [fp, #0x50] b G_M000_IG58 G_M000_IG58: ldr x0, [fp, #0x50] G_M000_IG59: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1652 325: JIT compiled System.Linq.Enumerable:Select[System.__Canon,System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon]) [Tier0, IL size=146, code size=1652] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:Select[System.__Canon](System.Func`2[System.__Canon,System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x1, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x30] ldr x2, [x2, #0x20] ldr x1, [fp, #0x30] ldr x1, [x1, #0x18] ldr x0, [fp, #0x18] ldr x3, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 156 326: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:Select[System.__Canon](System.Func`2[System.__Canon,System.__Canon]) [Tier0, IL size=19, code size=156] ; Assembly listing for method System.Linq.Enumerable+WhereSelectArrayIterator`2[System.__Canon,System.__Canon]:.ctor(System.__Canon[],System.Func`2[System.__Canon,bool],System.Func`2[System.__Canon,System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #40 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 327: JIT compiled System.Linq.Enumerable+WhereSelectArrayIterator`2[System.__Canon,System.__Canon]:.ctor(System.__Canon[],System.Func`2[System.__Canon,bool],System.Func`2[System.__Canon,System.__Canon]) [Tier0, IL size=28, code size=104] ; Assembly listing for method System.Linq.Enumerable:Empty[System.__Canon]():System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 328: JIT compiled System.Linq.Enumerable:Empty[System.__Canon]() [Tier0, IL size=6, code size=96] ; Assembly listing for method System.Linq.EmptyPartition`1[System.__Canon]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x15, [fp, #0x18] mov x14, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 329: JIT compiled System.Linq.EmptyPartition`1[System.__Canon]:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Linq.EmptyPartition`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 330: JIT compiled System.Linq.EmptyPartition`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:CreateSelectIPartitionIterator[System.__Canon,System.__Canon](System.Func`2[System.__Canon,System.__Canon],System.Linq.IPartition`1[System.__Canon],byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] str x2, [fp, #0x60] str x3, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x48] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG05: ldr x0, [fp, #0x58] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG09 ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x28] str x0, [fp, #0x18] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG08: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x60] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x20] str x14, [fp, #0x50] ldr x14, [fp, #0x40] str x14, [fp, #0x30] ldr x14, [fp, #0x50] str x14, [fp, #0x28] b G_M000_IG13 G_M000_IG09: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x38] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG12: ldr x0, [fp, #0x40] str x0, [fp, #0x30] ldr x0, [fp, #0x38] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] str x0, [fp, #0x28] G_M000_IG13: ldr x14, [fp, #0x30] ldr x15, [fp, #0x28] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG14: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 384 331: JIT compiled System.Linq.Enumerable:CreateSelectIPartitionIterator[System.__Canon,System.__Canon](System.Func`2[System.__Canon,System.__Canon],System.Linq.IPartition`1[System.__Canon],byref) [Tier0, IL size=27, code size=384] ; Assembly listing for method System.Linq.Enumerable:Concat[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] cbnz x0, G_M000_IG03 mov w0, #4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x30] cbnz x0, G_M000_IG04 mov w0, #14 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x20] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG07: ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG12 ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x10] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG10: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] G_M000_IG11: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] ldr x2, [x2] ldr x2, [x2, #0x50] ldr x2, [x2, #0x10] blr x2 G_M000_IG13: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 348 332: JIT compiled System.Linq.Enumerable:Concat[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=45, code size=348] ; Assembly listing for method System.Linq.Enumerable+Concat2Iterator`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #40 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 333: JIT compiled System.Linq.Enumerable+Concat2Iterator`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 334: JIT compiled System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Distinct[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 335: JIT compiled System.Linq.Enumerable:Distinct[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=8, code size=120] ; Assembly listing for method System.Linq.Enumerable:Distinct[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG06: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 176 336: JIT compiled System.Linq.Enumerable:Distinct[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=18, code size=176] ; Assembly listing for method System.Linq.Enumerable+DistinctIterator`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 337: JIT compiled System.Linq.Enumerable+DistinctIterator`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable:OrderBy[System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]):System.Linq.IOrderedEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] mov x3, xzr mov w4, wzr mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x18] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 156 338: JIT compiled System.Linq.Enumerable:OrderBy[System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]) [Tier0, IL size=11, code size=156] ; Assembly listing for method System.Linq.OrderedEnumerable`2[System.__Canon,int]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int],System.Collections.Generic.IComparer`1[int],bool,System.Linq.OrderedEnumerable`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str x5, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x40] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x38] cbnz x0, G_M000_IG04 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x14, [fp, #0x48] add x14, x14, #16 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x48] add x14, x14, #24 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] str x0, [fp, #0x18] ldr x0, [fp, #0x30] str x0, [fp, #0x10] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] G_M000_IG05: ldr x14, [fp, #0x18] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] strb w1, [x0, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 248 339: JIT compiled System.Linq.OrderedEnumerable`2[System.__Canon,int]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int],System.Collections.Generic.IComparer`1[int],bool,System.Linq.OrderedEnumerable`1[System.__Canon]) [Tier0, IL size=67, code size=248] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 340: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=14, code size=64] ; Assembly listing for method System.Linq.Enumerable:ThenBy[System.__Canon,System.__Canon](System.Linq.IOrderedEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon]):System.Linq.IOrderedEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG06: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x20] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG09: ldr x0, [fp, #0x38] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] mov x2, xzr mov w3, wzr ldr x4, [fp, #0x18] blr x4 G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 228 341: JIT compiled System.Linq.Enumerable:ThenBy[System.__Canon,System.__Canon](System.Linq.IOrderedEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon]) [Tier0, IL size=20, code size=228] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:System.Linq.IOrderedEnumerable.CreateOrderedEnumerable[System.__Canon](System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool):System.Linq.IOrderedEnumerable`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x1, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] str x3, [fp, #0x28] str w4, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x1, [x1, #0x08] ldr w4, [fp, #0x24] uxtb w4, w4 ldr x0, [fp, #0x18] ldr x2, [fp, #0x30] ldr x3, [fp, #0x28] ldr x5, [fp, #0x40] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x18] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 172 342: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:System.Linq.IOrderedEnumerable.CreateOrderedEnumerable[System.__Canon](System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool) [Tier0, IL size=16, code size=172] ; Assembly listing for method System.Linq.OrderedEnumerable`2[System.__Canon,System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool,System.Linq.OrderedEnumerable`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str x0, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str x2, [fp, #0x50] str x3, [fp, #0x48] str w4, [fp, #0x44] str x5, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x60] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x50] cbnz x0, G_M000_IG04 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x14, [fp, #0x60] add x14, x14, #16 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x60] add x14, x14, #24 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x60] str x14, [fp, #0x30] ldr x14, [fp, #0x48] str x14, [fp, #0x28] ldr x14, [fp, #0x48] cbnz x14, G_M000_IG08 ldr x14, [fp, #0x60] ldr x14, [x14] str x14, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x20] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG07: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] G_M000_IG08: ldr x14, [fp, #0x30] add x14, x14, #32 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x60] ldr w1, [fp, #0x44] strb w1, [x0, #0x28] G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 336 343: JIT compiled System.Linq.OrderedEnumerable`2[System.__Canon,System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool,System.Linq.OrderedEnumerable`1[System.__Canon]) [Tier0, IL size=67, code size=336] ; Assembly listing for method System.Linq.Enumerable:ToArray[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]):System.__Canon[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x28] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG06: ldr x0, [fp, #0x28] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG11 ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG09: ldr x0, [fp, #0x10] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x20] b G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG14: ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x30] ldr x11, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] blr x1 G_M000_IG15: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 348 344: JIT compiled System.Linq.Enumerable:ToArray[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=34, code size=348] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:ToArray():System.__Canon[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x88] str x0, [fp, #0x80] G_M000_IG02: ldr x0, [fp, #0x80] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x2, [fp, #0x20] ldr x2, [x2, #0x30] ldr x2, [x2] ldr x2, [x2, #0x10] str x2, [fp, #0x58] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x58] G_M000_IG05: ldr x2, [fp, #0x80] ldr x2, [x2, #0x08] add x0, fp, #112 ldr x1, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x78] str w0, [fp, #0x6C] ldr w0, [fp, #0x6C] cbnz w0, G_M000_IG07 ldr x0, [fp, #0x70] G_M000_IG06: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG07: ldr x0, [fp, #0x80] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG09 G_M000_IG08: ldr x1, [fp, #0x18] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x18] str x1, [fp, #0x50] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x50] G_M000_IG10: ldr w1, [fp, #0x6C] sxtw x1, w1 ldr x0, [fp, #0x50] bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x60] ldr x0, [fp, #0x80] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] str x0, [fp, #0x48] b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x48] G_M000_IG13: ldp x0, x1, [fp, #0x70] stp x0, x1, [fp, #0x28] G_M000_IG14: ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] str x1, [fp, #0x40] ldr x3, [fp, #0x38] ldr x4, [fp, #0x40] ldr x1, [fp, #0x28] ldr x2, [fp, #0x30] ldr x0, [fp, #0x80] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x60] G_M000_IG15: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 460 345: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:ToArray() [Tier0, IL size=52, code size=460] ; Assembly listing for method System.Linq.Buffer`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x40] str x1, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str x2, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x58] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x38] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x38] G_M000_IG05: ldr x0, [fp, #0x38] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG11 ldr x0, [fp, #0x58] ldr x0, [x0, #0x30] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] cmp x0, #32 ble G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] str x0, [fp, #0x28] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG09: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x11, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x14, [fp, #0x60] ldr x15, [fp, #0x40] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x40] ldr w0, [x0, #0x08] ldr x1, [fp, #0x60] str w0, [x1, #0x08] G_M000_IG10: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG11: ldr x0, [fp, #0x58] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG13 G_M000_IG12: ldr x2, [fp, #0x58] ldr x2, [x2, #0x30] ldr x2, [x2] ldr x2, [x2, #0x18] str x2, [fp, #0x30] b G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG14: ldr x2, [fp, #0x60] ldrsb wzr, [x2] ldr x2, [fp, #0x60] add x2, x2, #8 ldr x0, [fp, #0x30] ldr x1, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x60] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG15: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 424 346: JIT compiled System.Linq.Buffer`1[System.__Canon]:.ctor(System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=53, code size=424] ; Assembly listing for method System.Linq.Enumerable+DistinctIterator`1[System.__Canon]:ToArray():System.__Canon[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x38] str x0, [fp, #0x48] str x0, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG05: ldr x0, [fp, #0x30] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x2, [fp, #0x40] ldr x2, [x2, #0x20] ldr x1, [fp, #0x40] ldr x1, [x1, #0x18] ldr x0, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG08: ldr x0, [fp, #0x28] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 268 347: JIT compiled System.Linq.Enumerable+DistinctIterator`1[System.__Canon]:ToArray() [Tier0, IL size=23, code size=268] ; Assembly listing for method System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x78] str xzr, [fp, #0x30] str x0, [fp, #0x88] str x0, [fp, #0x80] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x38] ldr x0, [fp, #0x80] ldr w0, [x0, #0x14] cmp w0, #1 bne G_M000_IG06 ldr x0, [fp, #0x80] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x48] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x48] G_M000_IG05: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x80] mov w1, wzr ldr x2, [fp, #0x80] ldr x2, [x2] ldr x2, [x2, #0x50] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x11, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x80] mov w1, #2 str w1, [x0, #0x14] G_M000_IG06: ldr x0, [fp, #0x80] ldr w0, [x0, #0x14] cmp w0, #1 ble G_M000_IG19 G_M000_IG07: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #56 mov w1, #43 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr x0, [fp, #0x80] ldr x0, [x0, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbz w0, G_M000_IG14 ldr x1, [fp, #0x80] ldr x1, [x1] str x1, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x58] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x58] G_M000_IG12: ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x80] ldr x0, [x0, #0x18] ldr x11, [fp, #0x50] ldr x1, [fp, #0x50] ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov w0, #1 G_M000_IG13: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG14: ldr x1, [fp, #0x80] ldr w1, [x1, #0x14] str w1, [fp, #0x74] ldr w1, [fp, #0x74] add w1, w1, #1 ldr x0, [fp, #0x80] str w1, [x0, #0x14] ldr w1, [fp, #0x74] sub w1, w1, #1 ldr x0, [fp, #0x80] ldr x2, [fp, #0x80] ldr x2, [x2] ldr x2, [x2, #0x50] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x78] ldr x0, [fp, #0x78] cbz x0, G_M000_IG18 ldr x0, [fp, #0x80] ldr x0, [x0, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0x80] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x68] b G_M000_IG17 G_M000_IG16: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x68] G_M000_IG17: ldr x0, [fp, #0x68] str x0, [fp, #0x60] ldr x0, [fp, #0x78] ldr x11, [fp, #0x60] ldr x1, [fp, #0x60] ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG07 G_M000_IG18: ldr x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 G_M000_IG19: mov w0, wzr G_M000_IG20: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 704 348: JIT compiled System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:MoveNext() [Tier0, IL size=137, code size=704] ; Assembly listing for method System.Linq.Enumerable+Concat2Iterator`1[System.__Canon]:GetEnumerable(int):System.Collections.Generic.IEnumerable`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr w0, [fp, #0x24] cbz w0, G_M000_IG03 ldr w0, [fp, #0x24] cmp w0, #1 beq G_M000_IG04 b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0x28] ldr x0, [x0, #0x20] str x0, [fp, #0x18] b G_M000_IG06 G_M000_IG04: ldr x0, [fp, #0x28] ldr x0, [x0, #0x28] str x0, [fp, #0x18] b G_M000_IG06 G_M000_IG05: str xzr, [fp, #0x18] G_M000_IG06: ldr x0, [fp, #0x18] G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 349: JIT compiled System.Linq.Enumerable+Concat2Iterator`1[System.__Canon]:GetEnumerable(int) [Tier0, IL size=31, code size=92] ; Assembly listing for method System.Linq.Enumerable+WhereSelectArrayIterator`2[System.__Canon,System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x38] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x0, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x50] ldr w0, [x0, #0x14] sub w0, w0, #1 str w0, [fp, #0x4C] ldr x0, [fp, #0x50] ldr x0, [x0, #0x18] str x0, [fp, #0x40] mov w0, #0xD1FFAB1E str w0, [fp, #0x28] b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0x40] ldr w1, [fp, #0x4C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0x38] ldr x0, [fp, #0x50] ldr w0, [x0, #0x14] str w0, [fp, #0x34] ldr w0, [fp, #0x34] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1, #0x14] ldr w0, [fp, #0x34] str w0, [fp, #0x4C] ldr x0, [fp, #0x50] ldr x0, [x0, #0x20] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x2, [fp, #0x20] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG05 ldr x0, [fp, #0x50] ldr x0, [x0, #0x28] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x2, [fp, #0x18] ldr x2, [x2, #0x18] blr x2 ldr x14, [fp, #0x50] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG05: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #40 mov w1, #78 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w0, [fp, #0x4C] ldr x1, [fp, #0x40] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr x0, [fp, #0x50] ldr x1, [fp, #0x50] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 mov w0, wzr G_M000_IG08: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 350: JIT compiled System.Linq.Enumerable+WhereSelectArrayIterator`2[System.__Canon,System.__Canon]:MoveNext() [Tier0, IL size=92, code size=348] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_0(System.Reflection.FieldInfo):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x18] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 351: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_0(System.Reflection.FieldInfo) [Tier0, IL size=12, code size=68] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:IsCharacteristicSubclass(System.Type):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0xB0] ldr x2, [x2, #0x18] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 352: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:IsCharacteristicSubclass(System.Type) [Tier0, IL size=22, code size=88] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_1(System.Reflection.FieldInfo):BenchmarkDotNet.Characteristics.Characteristic:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] mov x1, xzr ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x58] ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 353: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_1(System.Reflection.FieldInfo) [Tier0, IL size=19, code size=132] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:AssertHasValue(System.Reflection.MemberInfo,BenchmarkDotNet.Characteristics.Characteristic):BenchmarkDotNet.Characteristics.Characteristic ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str x0, [fp, #0x98] str x1, [fp, #0x90] G_M000_IG02: ldr x0, [fp, #0x98] cbnz x0, G_M000_IG03 str xzr, [fp, #0x60] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x98] ldr x1, [fp, #0x98] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 str x0, [fp, #0x60] G_M000_IG04: ldr x0, [fp, #0x60] cbnz x0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x50] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0x90] cbnz x0, G_M000_IG08 G_M000_IG07: add x0, fp, #104 mov w1, #22 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x40] ldr x1, [fp, #0x40] add x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] ldr x1, [fp, #0x98] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 str x0, [fp, #0x30] ldr x1, [fp, #0x30] add x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] ldr x1, [fp, #0x98] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] add x0, fp, #104 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] bl CORINFO_HELP_THROW G_M000_IG08: ldr x0, [fp, #0x90] G_M000_IG09: ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 616 354: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:AssertHasValue(System.Reflection.MemberInfo,BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=126, code size=616] ; Assembly listing for method System.Linq.EmptyPartition`1[System.__Canon]:GetEnumerator():System.Collections.Generic.IEnumerator`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 355: JIT compiled System.Linq.EmptyPartition`1[System.__Canon]:GetEnumerator() [Tier0, IL size=2, code size=24] ; Assembly listing for method System.Linq.EmptyPartition`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 356: JIT compiled System.Linq.EmptyPartition`1[System.__Canon]:MoveNext() [Tier0, IL size=2, code size=24] ; Assembly listing for method System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] cbz x0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0x18] str xzr, [x0, #0x18] G_M000_IG03: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 357: JIT compiled System.Linq.Enumerable+ConcatIterator`1[System.__Canon]:Dispose() [Tier0, IL size=33, code size=92] ; Assembly listing for method System.Linq.EmptyPartition`1[System.__Canon]:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 358: JIT compiled System.Linq.EmptyPartition`1[System.__Canon]:System.IDisposable.Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method System.Linq.Enumerable:HashSetToArray[System.__Canon](System.Collections.Generic.HashSet`1[System.__Canon]):System.__Canon[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw x1, w0 str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 180 359: JIT compiled System.Linq.Enumerable:HashSetToArray[System.__Canon](System.Collections.Generic.HashSet`1[System.__Canon]) [Tier0, IL size=21, code size=180] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:Fill(System.Linq.Buffer`1[System.__Canon],System.Span`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x40] str x2, [fp, #0x48] str x3, [fp, #0x30] str x4, [fp, #0x38] G_M000_IG02: ldr x1, [fp, #0x40] ldr x2, [fp, #0x48] ldr x0, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] str wzr, [fp, #0x24] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG04 G_M000_IG03: ldr w14, [fp, #0x24] ldr w15, [fp, #0x38] cmp w14, w15 bhs G_M000_IG08 ldr x14, [fp, #0x30] ldr w15, [fp, #0x24] mov w15, w15 lsl x15, x15, #3 add x14, x14, x15 ldr x15, [fp, #0x28] ldr w12, [fp, #0x24] ldr wip0, [x15, #0x08] cmp w12, wip0 bhs G_M000_IG08 add x15, x15, x12, LSL #2 add x15, x15, #16 ldr w15, [x15] ldr x12, [fp, #0x40] ldr wip0, [x12, #0x08] cmp w15, wip0 bhs G_M000_IG08 add x15, x12, x15, LSL #3 add x15, x15, #16 ldr x15, [x15] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x24] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #43 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w14, [fp, #0x24] ldr w15, [fp, #0x38] cmp w14, w15 blt G_M000_IG03 G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 268 360: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:Fill(System.Linq.Buffer`1[System.__Canon],System.Span`1[System.__Canon]) [Tier0, IL size=54, code size=268] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:SortedMap(System.Linq.Buffer`1[System.__Canon]):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr w2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 361: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:SortedMap(System.Linq.Buffer`1[System.__Canon]) [Tier0, IL size=24, code size=96] ; Assembly listing for method System.Linq.OrderedEnumerable`1[System.__Canon]:GetEnumerableSorter():System.Linq.EnumerableSorter`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov x1, xzr ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x28] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 362: JIT compiled System.Linq.OrderedEnumerable`1[System.__Canon]:GetEnumerableSorter() [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Linq.OrderedEnumerable`2[System.__Canon,System.__Canon]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[System.__Canon]):System.Linq.EnumerableSorter`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x60] ldr x0, [x0, #0x20] str x0, [fp, #0x50] ldr x0, [fp, #0x60] ldr x0, [x0] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x50] cmp x0, x1 bne G_M000_IG06 ldr x0, [fp, #0x60] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x28] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x28] str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] G_M000_IG06: ldr x0, [fp, #0x60] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] str x0, [fp, #0x38] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x38] G_M000_IG09: ldr x0, [fp, #0x38] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x3, [fp, #0x60] ldrb w3, [x3, #0x28] ldr x1, [fp, #0x60] ldr x1, [x1, #0x18] ldr x0, [fp, #0x40] ldr x2, [fp, #0x50] ldr x4, [fp, #0x58] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x40] str x0, [fp, #0x48] ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] cbz x0, G_M000_IG10 ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x48] ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0x48] G_M000_IG10: ldr x0, [fp, #0x48] G_M000_IG11: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 488 363: JIT compiled System.Linq.OrderedEnumerable`2[System.__Canon,System.__Canon]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[System.__Canon]) [Tier0, IL size=96, code size=488] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:.ctor(System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool,System.Linq.EnumerableSorter`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str w3, [fp, #0x24] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] ldr w15, [fp, #0x24] strb w15, [x14, #0x28] ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 364: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:.ctor(System.Func`2[System.__Canon,System.__Canon],System.Collections.Generic.IComparer`1[System.__Canon],bool,System.Linq.EnumerableSorter`1[System.__Canon]) [Tier0, IL size=36, code size=120] ; Assembly listing for method System.Linq.EnumerableSorter`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 365: JIT compiled System.Linq.EnumerableSorter`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.OrderedEnumerable`2[System.__Canon,int]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[System.__Canon]):System.Linq.EnumerableSorter`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0, #0x20] str x0, [fp, #0x40] b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x50] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG06: ldr x0, [fp, #0x28] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x3, [fp, #0x50] ldrb w3, [x3, #0x28] ldr x1, [fp, #0x50] ldr x1, [x1, #0x18] ldr x0, [fp, #0x30] ldr x2, [fp, #0x40] ldr x4, [fp, #0x48] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x30] str x0, [fp, #0x38] ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] cbz x0, G_M000_IG07 ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0x38] G_M000_IG07: ldr x0, [fp, #0x38] G_M000_IG08: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 268 366: JIT compiled System.Linq.OrderedEnumerable`2[System.__Canon,int]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[System.__Canon]) [Tier0, IL size=96, code size=268] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,int]:.ctor(System.Func`2[System.__Canon,int],System.Collections.Generic.IComparer`1[int],bool,System.Linq.EnumerableSorter`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str w3, [fp, #0x24] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] ldr w15, [fp, #0x24] strb w15, [x14, #0x28] ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 367: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,int]:.ctor(System.Func`2[System.__Canon,int],System.Collections.Generic.IComparer`1[int],bool,System.Linq.EnumerableSorter`1[System.__Canon]) [Tier0, IL size=36, code size=120] ; Assembly listing for method System.Linq.EnumerableSorter`1[System.__Canon]:Sort(System.__Canon[],int):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr w3, [fp, #0x1C] sub w3, w3, #1 ldr x0, [fp, #0x28] ldr x1, [fp, #0x10] mov w2, wzr ldr x4, [fp, #0x28] ldr x4, [x4] ldr x4, [x4, #0x40] ldr x4, [x4, #0x30] blr x4 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 368: JIT compiled System.Linq.EnumerableSorter`1[System.__Canon]:Sort(System.__Canon[],int) [Tier0, IL size=22, code size=112] ; Assembly listing for method System.Linq.EnumerableSorter`1[System.__Canon]:ComputeMap(System.__Canon[],int):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str w2, [fp, #0x34] G_M000_IG02: ldr x0, [fp, #0x40] ldr x1, [fp, #0x38] ldr w2, [fp, #0x34] ldr x3, [fp, #0x40] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w1, [fp, #0x34] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x28] str wzr, [fp, #0x24] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x24] str w1, [x0] ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x24] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #27 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x24] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 ldr x0, [fp, #0x28] G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 228 369: JIT compiled System.Linq.EnumerableSorter`1[System.__Canon]:ComputeMap(System.__Canon[],int) [Tier0, IL size=35, code size=228] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,int]:ComputeKeys(System.__Canon[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str xzr, [fp, #0x58] str xzr, [fp, #0x50] str xzr, [fp, #0x38] str xzr, [fp, #0x30] str x0, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] str w2, [fp, #0x64] G_M000_IG02: ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] str x0, [fp, #0x58] ldr x0, [fp, #0x70] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x40] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG05: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0x40] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x1, [x0] ldr x0, [fp, #0x58] cmp x1, x0 beq G_M000_IG10 ldr w1, [fp, #0x64] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x50] str wzr, [fp, #0x4C] b G_M000_IG07 G_M000_IG06: ldr x1, [fp, #0x68] ldr w0, [fp, #0x4C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG15 add x1, x1, x0, LSL #3 add x1, x1, #16 ldr x1, [x1] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x2, [fp, #0x58] ldr x2, [x2, #0x18] blr x2 str w0, [fp, #0x2C] ldr x14, [fp, #0x50] ldr w15, [fp, #0x4C] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG15 add x14, x14, x15, LSL #2 add x14, x14, #16 ldr w15, [fp, #0x2C] str w15, [x14] ldr w14, [fp, #0x4C] add w14, w14, #1 str w14, [fp, #0x4C] G_M000_IG07: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #32 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w1, [fp, #0x4C] ldr x0, [fp, #0x50] ldr w0, [x0, #0x08] cmp w1, w0 blt G_M000_IG06 ldr x14, [fp, #0x70] add x14, x14, #32 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF b G_M000_IG11 G_M000_IG10: ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x70] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG11: ldr x0, [fp, #0x70] ldr x0, [x0, #0x18] str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x38] cbnz x0, G_M000_IG13 G_M000_IG12: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG13: ldr x0, [fp, #0x30] ldr x1, [fp, #0x68] ldr w2, [fp, #0x64] ldr x3, [fp, #0x30] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 G_M000_IG14: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 516 370: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,int]:ComputeKeys(System.__Canon[],int) [Tier0, IL size=96, code size=516] ; Assembly listing for method System.Linq.EnumerableSorter`1[System.__Canon]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x28] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x28] G_M000_IG05: ldr x0, [fp, #0x30] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x30] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x18] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG08: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x28] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x1, [x0] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x15, [fp, #0x20] mov x14, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 256 371: JIT compiled System.Linq.EnumerableSorter`1[System.__Canon]:.cctor() [Tier0, IL size=22, code size=256] ; Assembly listing for method System.Linq.EnumerableSorter`1+<>c[System.__Canon]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x15, [fp, #0x18] mov x14, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 372: JIT compiled System.Linq.EnumerableSorter`1+<>c[System.__Canon]:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Linq.EnumerableSorter`1+<>c[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 373: JIT compiled System.Linq.EnumerableSorter`1+<>c[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_4(BenchmarkDotNet.Characteristics.Characteristic):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 374: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_4(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=12, code size=72] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:ComputeKeys(System.__Canon[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x98] str x0, [fp, #0x90] str x1, [fp, #0x88] str w2, [fp, #0x84] G_M000_IG02: ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] str x0, [fp, #0x78] ldr x0, [fp, #0x90] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x60] G_M000_IG05: mov w0, #0xD1FFAB1E str w0, [fp, #0x38] ldr x0, [fp, #0x60] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] ldr x1, [fp, #0x78] cmp x0, x1 beq G_M000_IG13 ldr x0, [fp, #0x90] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] cbz x0, G_M000_IG07 G_M000_IG06: ldr x1, [fp, #0x20] ldr x1, [x1, #0x30] ldr x1, [x1, #0x08] ldr x1, [x1, #0x20] str x1, [fp, #0x40] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG08: ldr w1, [fp, #0x84] sxtw x1, w1 ldr x0, [fp, #0x40] bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x70] str wzr, [fp, #0x6C] b G_M000_IG10 G_M000_IG09: ldr x1, [fp, #0x88] ldr w0, [fp, #0x6C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG21 add x1, x1, x0, LSL #3 add x1, x1, #16 ldr x1, [x1] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x2, [fp, #0x78] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr w1, [fp, #0x6C] sxtw x1, w1 ldr x0, [fp, #0x70] bl CORINFO_HELP_ARRADDR_ST ldr w14, [fp, #0x6C] add w14, w14, #1 str w14, [fp, #0x6C] G_M000_IG10: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #56 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr w1, [fp, #0x6C] ldr x0, [fp, #0x70] ldr w0, [x0, #0x08] cmp w1, w0 blt G_M000_IG09 ldr x14, [fp, #0x90] add x14, x14, #32 ldr x15, [fp, #0x70] bl CORINFO_HELP_ASSIGN_REF b G_M000_IG17 G_M000_IG13: ldr x0, [fp, #0x90] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] cbz x0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] str x0, [fp, #0x58] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x58] G_M000_IG16: ldr x0, [fp, #0x58] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x90] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG17: ldr x0, [fp, #0x90] ldr x0, [x0, #0x18] str x0, [fp, #0x50] ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG19 G_M000_IG18: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG19: ldr x0, [fp, #0x48] ldr x1, [fp, #0x88] ldr w2, [fp, #0x84] ldr x3, [fp, #0x48] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 G_M000_IG20: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG21: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 648 375: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:ComputeKeys(System.__Canon[],int) [Tier0, IL size=96, code size=648] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_5(BenchmarkDotNet.Characteristics.Characteristic):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 376: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__8_5(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=7, code size=52] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_Id():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 377: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_Id() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,int]:QuickSort(int[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] str w2, [fp, #0x64] str w3, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x70] ldr x0, [x0, #0x18] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x70] ldr x0, [x0, #0x10] str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0x30] cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x70] ldrb w0, [x0, #0x28] cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] str x0, [fp, #0x58] b G_M000_IG08 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x3, [fp, #0x28] str x3, [fp, #0x58] b G_M000_IG08 G_M000_IG04: ldr x3, [fp, #0x70] ldr x3, [x3] str x3, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x18] str x0, [fp, #0x50] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x50] G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x70] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x70] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x48] str x0, [fp, #0x58] G_M000_IG08: stp xzr, xzr, [fp, #0x38] ldr w3, [fp, #0x60] ldr w0, [fp, #0x64] sub w3, w3, w0 add w3, w3, #1 add x0, fp, #56 ldr x1, [fp, #0x68] ldr w2, [fp, #0x64] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 516 378: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,int]:QuickSort(int[],int,int) [Tier0, IL size=109, code size=516] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,int]:CompareAnyKeys(int,int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x2, [fp, #0x28] ldr w1, [fp, #0x30] ldr w11, [x2, #0x08] cmp w1, w11 bhs G_M000_IG10 add x2, x2, x1, LSL #2 add x2, x2, #16 ldr w2, [x2] ldr x1, [fp, #0x28] ldr w11, [fp, #0x34] ldr w3, [x1, #0x08] cmp w11, w3 bhs G_M000_IG10 add x1, x1, x11, LSL #2 add x1, x1, #16 ldr w1, [x1] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 str w0, [fp, #0x24] ldr w0, [fp, #0x24] cbnz w0, G_M000_IG06 ldr x0, [fp, #0x38] ldr x0, [x0, #0x18] cbnz x0, G_M000_IG04 ldr w0, [fp, #0x34] ldr w1, [fp, #0x30] sub w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x0, [fp, #0x38] ldr x0, [x0, #0x18] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w1, [fp, #0x34] ldr w2, [fp, #0x30] ldr x3, [fp, #0x10] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x0, [fp, #0x38] ldrb w0, [x0, #0x28] ldr w1, [fp, #0x24] cmp w1, #0 cset x1, gt cmp w0, w1 bne G_M000_IG08 movn w0, #0 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 300 379: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,int]:CompareAnyKeys(int,int) [Tier0, IL size=78, code size=300] ; Assembly listing for method System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:CompareAnyKeys(int,int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x0, [fp, #0x50] str w1, [fp, #0x4C] str w2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0, #0x20] str x0, [fp, #0x40] ldr x0, [fp, #0x50] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x28] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x28] str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG05: ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x2, [fp, #0x40] ldr w1, [fp, #0x48] ldr w11, [x2, #0x08] cmp w1, w11 bhs G_M000_IG13 add x2, x2, x1, LSL #3 add x2, x2, #16 ldr x2, [x2] ldr x1, [fp, #0x40] ldr w11, [fp, #0x4C] ldr w3, [x1, #0x08] cmp w11, w3 bhs G_M000_IG13 add x1, x1, x11, LSL #3 add x1, x1, #16 ldr x1, [x1] ldr x11, [fp, #0x28] ldr x3, [fp, #0x28] ldr x3, [x3] blr x3 str w0, [fp, #0x3C] ldr w0, [fp, #0x3C] cbnz w0, G_M000_IG09 ldr x0, [fp, #0x50] ldr x0, [x0, #0x18] cbnz x0, G_M000_IG07 ldr w0, [fp, #0x4C] ldr w1, [fp, #0x48] sub w0, w0, w1 G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG07: ldr x0, [fp, #0x50] ldr x0, [x0, #0x18] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0x4C] ldr w2, [fp, #0x48] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 G_M000_IG08: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG09: ldr x0, [fp, #0x50] ldrb w0, [x0, #0x28] ldr w1, [fp, #0x3C] cmp w1, #0 cset x1, gt cmp w0, w1 bne G_M000_IG11 movn w0, #0 G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG11: mov w0, #1 G_M000_IG12: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 388 380: JIT compiled System.Linq.EnumerableSorter`2[System.__Canon,System.__Canon]:CompareAnyKeys(int,int) [Tier0, IL size=78, code size=388] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:TryAddInternal(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],System.__Canon,System.Nullable`1[int],System.__Canon,bool,bool,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp add x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] add x8, sp, #0xD1FFAB1E str x8, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xF8] str x3, [fp, #0xF0] str x4, [fp, #0xE8] str w5, [fp, #0xE4] str w6, [fp, #0xE0] str x7, [fp, #0xD8] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD0] ldr x0, [fp, #0xF0] str x0, [fp, #0xC0] mov w0, #0xD1FFAB1E str w0, [fp, #0x30] add x0, fp, #192 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD0] ldr x2, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x68] b G_M000_IG04 G_M000_IG03: add x0, fp, #192 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x68] G_M000_IG04: ldr w0, [fp, #0x68] str w0, [fp, #0xCC] G_M000_IG05: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #48 mov w1, #36 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x18] str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG09 G_M000_IG08: ldr x3, [fp, #0x28] ldr x3, [x3, #0x30] ldr x3, [x3] ldr x3, [x3, #0x18] str x3, [fp, #0x60] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x60] G_M000_IG10: add x3, fp, #168 ldr x0, [fp, #0x60] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xCC] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0xB0] str wzr, [fp, #0xA4] str wzr, [fp, #0xA0] str wzr, [fp, #0x98] G_M000_IG11: ldr w0, [fp, #0xE0] uxtb w0, w0 cbz w0, G_M000_IG12 ldr x0, [fp, #0xB8] ldr w1, [fp, #0xA8] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG14 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] add x1, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] dmb ishld cmp x0, x1 beq G_M000_IG16 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] dmb ishld str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD0] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] cmp x0, x1 beq G_M000_IG13 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD0] ldr x2, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0xCC] G_M000_IG13: b G_M000_IG37 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG15: bl CORINFO_HELP_OVERFLOW G_M000_IG16: str wzr, [fp, #0x94] str xzr, [fp, #0x88] ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x78] b G_M000_IG26 G_M000_IG17: ldr w0, [fp, #0xCC] ldr x1, [fp, #0x78] ldr w1, [x1, #0x20] cmp w0, w1 bne G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x58] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x58] G_M000_IG20: ldr x0, [fp, #0x58] ldr x1, [fp, #0xD0] ldr x2, [fp, #0x78] ldr x3, [fp, #0xF8] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG25 ldr w14, [fp, #0xE4] uxtb w14, w14 cbz w14, G_M000_IG23 b G_M000_IG21 G_M000_IG21: ldr x14, [fp, #0x78] add x14, x14, #16 ldr x15, [fp, #0xE8] bl CORINFO_HELP_ASSIGN_REF b G_M000_IG22 G_M000_IG22: ldr x14, [fp, #0xD8] ldr x15, [fp, #0xE8] bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG24 G_M000_IG23: ldr x14, [fp, #0x78] ldr x15, [x14, #0x10] ldr x14, [fp, #0xD8] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG24: str wzr, [fp, #0x6C] b G_M000_IG41 G_M000_IG25: ldr x0, [fp, #0x78] str x0, [fp, #0x88] ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] ldr x0, [fp, #0x78] ldr x0, [x0, #0x18] dmb ishld str x0, [fp, #0x78] G_M000_IG26: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG28 G_M000_IG27: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG28: ldr x0, [fp, #0x78] cbnz x0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x50] cbz x0, G_M000_IG30 G_M000_IG29: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x50] str x0, [fp, #0x48] b G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x48] G_M000_IG31: ldr x0, [fp, #0x48] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x4, [fp, #0xB0] ldr x4, [x4] ldr x0, [fp, #0x50] ldr x1, [fp, #0xF8] ldr x2, [fp, #0xE8] ldr w3, [fp, #0xCC] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x50] str x0, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x58] cbz x0, G_M000_IG33 G_M000_IG32: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x58] str x0, [fp, #0x40] b G_M000_IG34 G_M000_IG33: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG34: ldr x0, [fp, #0x40] ldr x1, [fp, #0xB0] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] ldr w0, [fp, #0xA8] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #2 add x1, x1, #16 str x1, [fp, #0x38] ldr x1, [fp, #0x38] ldr w1, [x1] adds w1, w1, #1 bvs G_M000_IG15 ldr x0, [fp, #0x38] str w1, [x0] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] ldr w0, [fp, #0xA8] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x10] cmp w1, w0 ble G_M000_IG35 mov w1, #1 str w1, [fp, #0xA4] G_M000_IG35: ldr w1, [fp, #0x94] cmp w1, #100 bls G_M000_IG36 ldr x1, [fp, #0xD0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG36 mov w0, #1 str w0, [fp, #0xA0] G_M000_IG36: b G_M000_IG39 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG48 G_M000_IG38: b G_M000_IG05 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG48 G_M000_IG40: b G_M000_IG43 G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG48 G_M000_IG42: b G_M000_IG46 G_M000_IG43: ldr w0, [fp, #0xA4] ldr w1, [fp, #0xA0] orr w0, w0, w1 cbz w0, G_M000_IG44 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xA4] ldr w3, [fp, #0xA0] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG44: ldr x14, [fp, #0xD8] ldr x15, [fp, #0xE8] bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, #1 G_M000_IG45: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG46: ldr w0, [fp, #0x6C] G_M000_IG47: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG48: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG49: ldr w0, [fp, #0x98] uxtb w0, w0 cbz w0, G_M000_IG50 ldr x0, [fp, #0xB8] ldr w1, [fp, #0xA8] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG51 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] bl System.Threading.Monitor:Exit(System.Object) G_M000_IG50: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG51: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1540 381: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:TryAddInternal(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],System.__Canon,System.Nullable`1[int],System.__Canon,bool,bool,byref) [Tier0, IL size=478, code size=1540] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetBucketAndLock(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],int,byref):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] str x3, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #8 bne G_M000_IG03 ldr x2, [fp, #0x40] ldr x2, [x2, #0x28] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] ldr w0, [fp, #0x3C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x24] b G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x3C] str w0, [fp, #0x20] ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] str w0, [fp, #0x1C] ldr w0, [fp, #0x20] ldr w1, [fp, #0x1C] cmp w1, #0 beq G_M000_IG06 udiv w0, w0, w1 ldr w1, [fp, #0x1C] mul w0, w0, w1 ldr w1, [fp, #0x20] sub w0, w1, w0 str w0, [fp, #0x24] G_M000_IG04: ldr x0, [fp, #0x30] ldr w1, [fp, #0x24] str w1, [fp, #0x18] ldr x1, [fp, #0x40] ldr x1, [x1, #0x18] ldr w1, [x1, #0x08] str w1, [fp, #0x14] ldr w1, [fp, #0x18] ldr w2, [fp, #0x14] cmp w2, #0 beq G_M000_IG06 udiv w1, w1, w2 ldr w2, [fp, #0x14] mul w1, w1, w2 ldr w2, [fp, #0x18] sub w1, w2, w1 str w1, [x0] ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG07 add x0, x0, x1, LSL #3 add x0, x0, #16 G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: bl CORINFO_HELP_THROWDIVZERO G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 292 382: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2[System.__Canon,System.__Canon]:GetBucketAndLock(System.Collections.Concurrent.ConcurrentDictionary`2+Tables[System.__Canon,System.__Canon],int,byref) [Tier0, IL size=64, code size=292] ; Assembly listing for method System.Collections.Concurrent.ConcurrentDictionary`2+Node[System.__Canon,System.__Canon]:.ctor(System.__Canon,System.__Canon,int,System.Collections.Concurrent.ConcurrentDictionary`2+Node[System.__Canon,System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str w3, [fp, #0x24] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] ldr w1, [fp, #0x24] str w1, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 383: JIT compiled System.Collections.Concurrent.ConcurrentDictionary`2+Node[System.__Canon,System.__Canon]:.ctor(System.__Canon,System.__Canon,int,System.Collections.Concurrent.ConcurrentDictionary`2+Node[System.__Canon,System.__Canon]) [Tier0, IL size=38, code size=120] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__13_0(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 384: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__13_0(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=10, code size=60] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__13_1(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 385: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper+<>c:b__13_1(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=7, code size=52] ; Assembly listing for method BenchmarkDotNet.Jobs.GcMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 592 386: JIT compiled BenchmarkDotNet.Jobs.GcMode:.cctor() [Tier0, IL size=136, code size=592] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 387: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 388: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] str w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] str w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 389: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 390: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 391: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.AccuracyMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 464 392: JIT compiled BenchmarkDotNet.Jobs.AccuracyMode:.cctor() [Tier0, IL size=106, code size=464] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[double](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 393: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[double](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,double](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str xzr, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr d0, [fp, #0x20] mov x3, xzr mov w4, wzr mov w5, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 394: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,double](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[double]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,double,double],double,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x24] str w5, [fp, #0x20] str d0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr d16, [fp, #0x28] str d16, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x20] uxtb w6, w6 ldr w5, [fp, #0x24] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr d16, [fp, #0x28] str d16, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 395: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[double]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,double,double],double,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[Perfolizer.Horology.TimeInterval](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 396: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[Perfolizer.Horology.TimeInterval](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,Perfolizer.Horology.TimeInterval](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str xzr, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr d0, [fp, #0x20] mov x3, xzr mov w4, wzr mov w5, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 397: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,Perfolizer.Horology.TimeInterval](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval],Perfolizer.Horology.TimeInterval,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x24] str w5, [fp, #0x20] str d0, [fp, #0x28] G_M000_IG02: add x1, fp, #40 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX str x0, [fp, #0x18] ldr x4, [fp, #0x18] ldr w5, [fp, #0x24] uxtb w5, w5 ldr w6, [fp, #0x20] uxtb w6, w6 ldr x1, [fp, #0x40] ldr x3, [fp, #0x38] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr x1, [fp, #0x28] str x1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 164 398: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval],Perfolizer.Horology.TimeInterval,bool,bool) [Tier0, IL size=45, code size=164] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 399: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[int](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 400: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] str w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] str w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 401: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Jobs.InfrastructureMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #164 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #164 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 632 402: JIT compiled BenchmarkDotNet.Jobs.InfrastructureMode:.cctor() [Tier0, IL size=121, code size=632] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 160 403: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.cctor() [Tier0, IL size=23, code size=160] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.ctor(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr w2, [fp, #0x24] uxtb w2, w2 ldr x0, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 404: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.ctor(bool) [Tier0, IL size=13, code size=100] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.ctor(System.TimeSpan,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr w2, [fp, #0x2C] uxtb w2, w2 ldr x0, [fp, #0x10] ldr x1, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr x4, [fp, #0x10] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 232 405: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitToolchain:.ctor(System.TimeSpan,bool) [Tier0, IL size=29, code size=232] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitGenerator:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 406: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitGenerator:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitBuilder:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 407: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitBuilder:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitExecutor:.ctor(System.TimeSpan,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #162 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x1, [x0] str x1, [fp, #0x20] G_M000_IG03: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] str x1, [x0, #0x10] ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] strb w1, [x0, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 160 408: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitExecutor:.ctor(System.TimeSpan,bool) [Tier0, IL size=41, code size=160] ; Assembly listing for method BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitExecutor:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: fmov d0, #1.0000 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x0, [x1] fmov d0, #5.0000 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x0, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 96 409: JIT compiled BenchmarkDotNet.Toolchains.InProcess.Emit.InProcessEmitExecutor:.cctor() [Tier0, IL size=39, code size=96] ; Assembly listing for method BenchmarkDotNet.Toolchains.Toolchain:.ctor(System.String,BenchmarkDotNet.Toolchains.IGenerator,BenchmarkDotNet.Toolchains.IBuilder,BenchmarkDotNet.Toolchains.IExecutor):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str x3, [fp, #0x20] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 124 410: JIT compiled BenchmarkDotNet.Toolchains.Toolchain:.ctor(System.String,BenchmarkDotNet.Toolchains.IGenerator,BenchmarkDotNet.Toolchains.IBuilder,BenchmarkDotNet.Toolchains.IExecutor) [Tier0, IL size=36, code size=124] ; Assembly listing for method BenchmarkDotNet.Jobs.InfrastructureMode:.ctor(BenchmarkDotNet.Toolchains.IToolchain):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 411: JIT compiled BenchmarkDotNet.Jobs.InfrastructureMode:.ctor(BenchmarkDotNet.Toolchains.IToolchain) [Tier0, IL size=14, code size=76] ; Assembly listing for method BenchmarkDotNet.Jobs.InfrastructureMode:set_Toolchain(BenchmarkDotNet.Toolchains.IToolchain):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 412: JIT compiled BenchmarkDotNet.Jobs.InfrastructureMode:set_Toolchain(BenchmarkDotNet.Toolchains.IToolchain) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Jobs.MetaMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 208 413: JIT compiled BenchmarkDotNet.Jobs.MetaMode:.cctor() [Tier0, IL size=46, code size=208] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateHiddenCharacteristic[bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 414: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateHiddenCharacteristic[bool](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:CreateHidden[System.__Canon,bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, #1 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 415: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:CreateHidden[System.__Canon,bool](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateIgnoreOnApplyCharacteristic[bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 416: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateIgnoreOnApplyCharacteristic[bool](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:CreateIgnoreOnApply[System.__Canon,bool](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str wzr, [fp, #0x24] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str wzr, [fp, #0x24] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, #1 mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 417: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:CreateIgnoreOnApply[System.__Canon,bool](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E G_M000_IG03: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x30] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x30] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x28] mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x28] mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E G_M000_IG04: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x20] mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x20] mov w1, #100 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x18] mov w1, #30 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x18] mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 1868 418: JIT compiled BenchmarkDotNet.Jobs.RunMode:.cctor() [Tier0, IL size=410, code size=1868] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String,int):BenchmarkDotNet.Characteristics.Characteristic`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str w2, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x28] ldr x0, [fp, #0x18] ldr w4, [fp, #0x24] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 132 419: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,int](System.String,int) [Tier0, IL size=21, code size=132] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str w5, [fp, #0x28] str w6, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr w6, [fp, #0x2C] str w6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x24] uxtb w6, w6 ldr w5, [fp, #0x28] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] str w1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 420: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int],int,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[long](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[long] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 421: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject`1[System.__Canon]:CreateCharacteristic[long](System.String) [Tier0, IL size=7, code size=116] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,long](System.String):BenchmarkDotNet.Characteristics.Characteristic`1[long] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE str x0, [fp, #0x18] str xzr, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] ldr x4, [fp, #0x20] mov x3, xzr mov w5, wzr mov w6, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 136 422: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:Create[System.__Canon,long](System.String) [Tier0, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[long]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,long,long],long,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str x4, [fp, #0x28] str w5, [fp, #0x24] str w6, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x10] ldr x4, [fp, #0x18] ldr x6, [fp, #0x28] str x6, [x4, #0x08] ldr x4, [fp, #0x18] ldr w6, [fp, #0x20] uxtb w6, w6 ldr w5, [fp, #0x24] uxtb w5, w5 ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x10] ldr x3, [fp, #0x38] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr x14, [fp, #0x48] add x14, x14, #48 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr x1, [fp, #0x28] str x1, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 423: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[long]:.ctor(System.String,System.Type,System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,long,long],long,bool,bool) [Tier0, IL size=45, code size=184] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_LaunchCount(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 424: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_LaunchCount(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 425: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w0, [fp, #0x1C] str w0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 426: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_WarmupCount(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 427: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_WarmupCount(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_IterationCount(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 428: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_IterationCount(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_RunStrategy(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 429: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_RunStrategy(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 430: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,int) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w0, [fp, #0x1C] str w0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 431: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_UnrollFactor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 432: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_UnrollFactor(int) [Tier0, IL size=13, code size=104] ; Assembly listing for method System.Linq.Enumerable:Intersect[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 128 433: JIT compiled System.Linq.Enumerable:Intersect[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon]) [Tier0, IL size=9, code size=128] ; Assembly listing for method System.Linq.Enumerable:Intersect[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] str x3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 mov w0, #4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 mov w0, #14 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x10] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG07: ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG08: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 196 434: JIT compiled System.Linq.Enumerable:Intersect[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=28, code size=196] ; Assembly listing for method System.Linq.Enumerable:IntersectIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]):System.Collections.Generic.IEnumerable`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] str x3, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] add x14, x14, #56 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x20] add x14, x14, #24 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x20] add x14, x14, #40 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 192 435: JIT compiled System.Linq.Enumerable:IntersectIterator[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEnumerable`1[System.__Canon],System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier0, IL size=29, code size=192] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x50] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x54] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 436: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ApplyCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]):BenchmarkDotNet.Characteristics.CharacteristicObject:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] add x3, sp, #96 str x3, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] str x2, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x38] G_M000_IG05: b G_M000_IG09 G_M000_IG06: ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] add x2, fp, #40 ldr x1, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG09 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG09 ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbz x0, G_M000_IG07 ldr x0, [fp, #0x20] ldr wzr, [x0] bl System.Object:GetType():System.Type:this movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] G_M000_IG07: ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x50] ldr x1, [fp, #0x30] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #24 mov w1, #107 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG06 b G_M000_IG12 G_M000_IG12: ldr x0, [fp, #0x58] bl G_M000_IG16 G_M000_IG13: nop G_M000_IG14: ldr x0, [fp, #0x50] G_M000_IG15: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG16: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG17: ldr x0, [fp, #0x38] cbz x0, G_M000_IG18 ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG18: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 596 437: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ApplyCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]) [Tier0, IL size=129, code size=596] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x38] str x0, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldr w0, [x0, #0x50] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x30] ldr w0, [x0, #0x54] str w0, [fp, #0x1C] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x1C] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x30] str wzr, [x0, #0x50] ldr x0, [fp, #0x30] str x0, [fp, #0x28] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x20] str x14, [fp, #0x28] G_M000_IG04: ldr x14, [fp, #0x30] ldr x15, [x14, #0x38] ldr x14, [fp, #0x28] add x14, x14, #48 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x30] ldr x15, [x14, #0x18] ldr x14, [fp, #0x28] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x30] ldr x15, [x14, #0x28] ldr x14, [fp, #0x28] add x14, x14, #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 212 438: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=79, code size=212] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x60] add x1, sp, #144 str x1, [fp, #0x88] str x0, [fp, #0x80] str x0, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x78] ldr w0, [x0, #0x50] str w0, [fp, #0x70] mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr w0, [fp, #0x70] cbz w0, G_M000_IG03 ldr w0, [fp, #0x70] cmp w0, #1 beq G_M000_IG14 str wzr, [fp, #0x74] b G_M000_IG18 G_M000_IG03: ldr x0, [fp, #0x78] movn w1, #0 str w1, [x0, #0x50] ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x58] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x58] G_M000_IG06: ldr x0, [fp, #0x58] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x2, [fp, #0x78] ldr x2, [x2, #0x20] ldr x1, [fp, #0x78] ldr x1, [x1, #0x10] ldr x0, [fp, #0x60] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x78] add x14, x14, #64 ldr x15, [fp, #0x60] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x50] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x50] G_M000_IG09: ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] ldr x11, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] blr x1 ldr x14, [fp, #0x78] add x14, x14, #72 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] movn w1, #2 str w1, [x0, #0x50] b G_M000_IG15 G_M000_IG10: ldr x0, [fp, #0x78] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] str x0, [fp, #0x40] b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x40] G_M000_IG13: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x78] ldr x0, [x0, #0x48] ldr x11, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x78] ldr x0, [x0, #0x40] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG15 ldr x14, [fp, #0x78] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] mov w1, #1 str w1, [x0, #0x50] mov w1, #1 str w1, [fp, #0x74] b G_M000_IG18 G_M000_IG14: ldr x0, [fp, #0x78] movn w1, #2 str w1, [x0, #0x50] G_M000_IG15: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #48 mov w1, #130 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr x0, [fp, #0x78] ldr x0, [x0, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG10 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x78] str xzr, [x0, #0x48] str wzr, [fp, #0x74] b G_M000_IG18 G_M000_IG18: ldr w0, [fp, #0x74] G_M000_IG19: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG20: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG21: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 756 439: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:MoveNext() [Tier0, IL size=169, code size=756] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:b__24_2(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 440: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject+<>c:b__24_2(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=10, code size=60] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_IgnoreOnApply():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 441: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_IgnoreOnApply() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 442: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:HasValue(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] add x2, fp, #24 ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp x0, x1 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 443: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:HasValue(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=30, code size=112] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:<>m__Finally1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movn w11, #0 str w11, [x0, #0x50] ldr x0, [fp, #0x18] ldr x0, [x0, #0x48] cbz x0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x0, [x0, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 444: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:<>m__Finally1() [Tier0, IL size=27, code size=72] ; Assembly listing for method System.Linq.Enumerable+d__123`1[System.__Canon]:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp add x1, sp, #48 str x1, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr w0, [x0, #0x50] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmn w0, #3 beq G_M000_IG03 ldr w0, [fp, #0x1C] cmp w0, #1 bne G_M000_IG06 G_M000_IG03: b G_M000_IG04 G_M000_IG04: ldr x0, [fp, #0x28] bl G_M000_IG07 G_M000_IG05: nop G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #48 str x3, [sp, #0x18] G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 124 445: JIT compiled System.Linq.Enumerable+d__123`1[System.__Canon]:System.IDisposable.Dispose() [Tier0, IL size=27, code size=124] ; Assembly listing for method System.Nullable`1[System.Guid]:.ctor(System.Guid):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] str w1, [x0, #0x04] ldr x1, [fp, #0x1C] str x1, [x0, #0x08] ldr w1, [fp, #0x24] str w1, [x0, #0x10] ldr x0, [fp, #0x28] mov w1, #1 strb w1, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 446: JIT compiled System.Nullable`1[System.Guid]:.ctor(System.Guid) [Tier0, IL size=15, code size=68] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Nullable`1[System.Guid]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x40] str x0, [fp, #0x18] ldr x0, [fp, #0x48] str x0, [fp, #0x10] ldr x0, [fp, #0x38] ldp x1, x2, [x0] stp x1, x2, [fp, #0x20] ldr w1, [x0, #0x10] str w1, [fp, #0x30] ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] add x2, fp, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 108 447: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Nullable`1[System.Guid]) [Tier0, IL size=9, code size=108] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[System.Nullable`1[System.Guid]](BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]],System.Nullable`1[System.Guid]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX_NULLABLE str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 448: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[System.Nullable`1[System.Guid]](BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]],System.Nullable`1[System.Guid]) [Tier0, IL size=14, code size=88] ; Assembly listing for method Perfolizer.Horology.TimeInterval:.ctor(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr d16, [fp, #0x10] str d16, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 449: JIT compiled Perfolizer.Horology.TimeInterval:.ctor(double) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,Perfolizer.Horology.TimeInterval):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str d0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr d0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 450: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,Perfolizer.Horology.TimeInterval) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],Perfolizer.Horology.TimeInterval):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str d0, [fp, #0x18] G_M000_IG02: add x1, fp, #24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 451: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],Perfolizer.Horology.TimeInterval) [Tier0, IL size=14, code size=88] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:get_DisplayInfo():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x2, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 252 452: JIT compiled BenchmarkDotNet.Jobs.Job:get_DisplayInfo() [Tier0, IL size=56, code size=252] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveId(BenchmarkDotNet.Characteristics.CharacteristicObject,System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x38] ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] G_M000_IG05: ldr x0, [fp, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 284 453: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveId(BenchmarkDotNet.Characteristics.CharacteristicObject,System.String) [Tier0, IL size=61, code size=284] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 288 454: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:.cctor() [Tier0, IL size=41, code size=288] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DefaultPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 455: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DefaultPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 456: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 457: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+FolderPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 458: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+FolderPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+SourceCodePresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 459: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+SourceCodePresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:ToPresentation(BenchmarkDotNet.Characteristics.CharacteristicObject):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x38] ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x40] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x1, [x1, #0x08] ldr x0, [fp, #0x48] mov w2, wzr ldr x3, [fp, #0x48] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x20] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 288 460: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:ToPresentation(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=56, code size=288] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter+<>c__DisplayClass2_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 461: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter+<>c__DisplayClass2_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:GetPresentableCharacteristics(BenchmarkDotNet.Characteristics.CharacteristicObject,bool):System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr w1, [fp, #0x3C] strb w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x20] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 240 462: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter:GetPresentableCharacteristics(BenchmarkDotNet.Characteristics.CharacteristicObject,bool) [Tier0, IL size=37, code size=240] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+<>c__DisplayClass5_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 463: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+<>c__DisplayClass5_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsWithValues():System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Characteristics.Characteristic]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x20] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x48] ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x48] str x0, [fp, #0x30] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x28] str x2, [fp, #0x30] G_M000_IG05: ldr x2, [fp, #0x30] ldr x1, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x50] ldr x0, [fp, #0x50] G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 428 464: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetCharacteristicsWithValues() [Tier0, IL size=82, code size=428] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:Where(System.Func`2[System.__Canon,bool]):System.Collections.Generic.IEnumerable`1[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x30] G_M000_IG05: ldr x0, [fp, #0x40] ldr x0, [x0, #0x18] str x0, [fp, #0x28] ldr x0, [fp, #0x40] ldr x0, [x0] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x1, [fp, #0x40] ldr x1, [x1, #0x20] ldr x0, [fp, #0x30] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x28] ldr x0, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 224 465: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[System.__Canon]:Where(System.Func`2[System.__Canon,bool]) [Tier0, IL size=24, code size=224] ; Assembly listing for method System.Linq.Utilities:CombinePredicates[System.__Canon](System.Func`2[System.__Canon,bool],System.Func`2[System.__Canon,bool]):System.Func`2[System.__Canon,bool] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] str x2, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x28] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG05: ldr x0, [fp, #0x28] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x30] str x14, [fp, #0x38] ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x40] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x18] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG08: ldr x0, [fp, #0x18] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 296 466: JIT compiled System.Linq.Utilities:CombinePredicates[System.__Canon](System.Func`2[System.__Canon,bool],System.Func`2[System.__Canon,bool]) [Tier0, IL size=33, code size=296] ; Assembly listing for method System.Linq.Utilities+<>c__DisplayClass1_0`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 467: JIT compiled System.Linq.Utilities+<>c__DisplayClass1_0`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Utilities+<>c__DisplayClass1_0`1[System.__Canon]:b__0(System.__Canon):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] ldr x2, [fp, #0x18] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x28] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 468: JIT compiled System.Linq.Utilities+<>c__DisplayClass1_0`1[System.__Canon]:b__0(System.__Canon) [Tier0, IL size=29, code size=120] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+<>c__DisplayClass5_0:b__0(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldrb w1, [x1, #0x08] ldr x0, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 469: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+<>c__DisplayClass5_0:b__0(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicHelper:IsPresentableCharacteristic(BenchmarkDotNet.Characteristics.Characteristic,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG06 ldr w0, [fp, #0x14] uxtb w0, w0 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 160 470: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicHelper:IsPresentableCharacteristic(BenchmarkDotNet.Characteristics.Characteristic,bool) [Tier0, IL size=33, code size=160] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_DontShowInSummary():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x29] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 471: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_DontShowInSummary() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter+<>c__DisplayClass2_0:b__0(BenchmarkDotNet.Characteristics.Characteristic):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x1, [x1, #0x08] ldr x2, [fp, #0x30] ldr x3, [fp, #0x20] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 472: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter+<>c__DisplayClass2_0:b__0(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=34, code size=188] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 68 473: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicSetPresenter+DisplayPresenter:.cctor() [Tier0, IL size=11, code size=68] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 288 474: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter:.cctor() [Tier0, IL size=41, code size=288] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 475: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 476: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+FolderCharacteristicPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 477: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+FolderCharacteristicPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+SourceCodeCharacteristicPresenter:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 478: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+SourceCodeCharacteristicPresenter:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] G_M000_IG02: ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp x1, x0 bne G_M000_IG04 ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbz x0, G_M000_IG04 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] ldr x2, [fp, #0x28] ldr x3, [fp, #0x38] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 272 479: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=55, code size=272] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 480: JIT compiled BenchmarkDotNet.Characteristics.Characteristic:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str xzr, [x9, #0x80] str x0, [fp, #0xA8] str x1, [fp, #0xA0] str x2, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 ldr x0, [fp, #0xA8] ldr x1, [fp, #0xA0] ldr x2, [fp, #0x98] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x40] ldr x2, [fp, #0x40] add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_UNBOX_NULLABLE add x1, fp, #72 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX_NULLABLE G_M000_IG03: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG04: ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x90] ldr x0, [fp, #0xA8] ldr x1, [fp, #0xA0] ldr x2, [fp, #0x98] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x38] ldr x2, [fp, #0x38] add x0, fp, #120 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_UNBOX_NULLABLE ldr x0, [fp, #0x90] str x0, [fp, #0x18] ldr x0, [fp, #0xA0] str x0, [fp, #0x10] ldp x0, x1, [fp, #0x78] stp x0, x1, [fp, #0x20] ldr w0, [fp, #0x88] str w0, [fp, #0x30] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] add x2, fp, #32 add x8, fp, #96 ldr x3, [fp, #0x18] ldr x3, [x3, #0x18] blr x3 add x1, fp, #96 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX_NULLABLE G_M000_IG05: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 344 481: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=344] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,System.Nullable`1[System.Guid],System.Nullable`1[System.Guid]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 482: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(System.Object,BenchmarkDotNet.Characteristics.Characteristic):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] G_M000_IG02: ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG04 ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbz x0, G_M000_IG04 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp x1, x0 bne G_M000_IG06 ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG06 ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x0] str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 352 483: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(System.Object,BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=67, code size=352] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(System.Object):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x1, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x40] cbnz x0, G_M000_IG03 str xzr, [fp, #0x30] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov x1, xzr ldr x3, [x11] blr x3 str x0, [fp, #0x30] G_M000_IG04: ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG07 ldr x0, [fp, #0x48] cbnz x0, G_M000_IG05 str xzr, [fp, #0x20] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG07 movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x28] G_M000_IG07: ldr x0, [fp, #0x28] G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 272 484: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicPresenter+DefaultCharacteristicPresenter:ToPresentation(System.Object) [Tier0, IL size=50, code size=272] ; Assembly listing for method BenchmarkDotNet.Helpers.DefaultCultureInfo:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x1, [x1] ldr x1, [x1, #0x58] ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x10] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 228 485: JIT compiled BenchmarkDotNet.Helpers.DefaultCultureInfo:.cctor() [Tier0, IL size=41, code size=228] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d0, [x0] str d0, [fp, #0x18] ldr d0, [fp, #0x18] ldr x1, [fp, #0x50] ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 ldr x0, [fp, #0x38] str d0, [x0, #0x08] ldr x0, [fp, #0x38] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 344 486: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=344] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 487: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #85 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 488: JIT compiled Perfolizer.Horology.TimeInterval:ToString() [Tier0, IL size=18, code size=108] ; Assembly listing for method Perfolizer.Common.DefaultCultureInfo:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x1, [x1] ldr x1, [x1, #0x58] ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x10] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 228 489: JIT compiled Perfolizer.Common.DefaultCultureInfo:.cctor() [Tier0, IL size=41, code size=228] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToString(System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] ldr x4, [fp, #0x10] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] mov x1, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 72 490: JIT compiled Perfolizer.Horology.TimeInterval:ToString(System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation) [Tier0, IL size=11, code size=72] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToString(Perfolizer.Horology.TimeUnit,System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x98] str x1, [fp, #0x90] str x2, [fp, #0x88] str x3, [fp, #0x80] str x4, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x90] str x0, [fp, #0x60] ldr x0, [fp, #0x90] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x38] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x30] ldr x0, [fp, #0x38] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x30] str d16, [x0] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] G_M000_IG03: ldr x0, [fp, #0x60] str x0, [fp, #0x90] ldr x0, [fp, #0x88] str x0, [fp, #0x58] ldr x0, [fp, #0x88] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x58] G_M000_IG04: ldr x0, [fp, #0x58] str x0, [fp, #0x88] ldr x0, [fp, #0x80] str x0, [fp, #0x50] ldr x0, [fp, #0x80] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x50] G_M000_IG05: ldr x0, [fp, #0x50] str x0, [fp, #0x80] ldr x0, [fp, #0x78] str x0, [fp, #0x48] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #87 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x48] G_M000_IG06: ldr x0, [fp, #0x48] str x0, [fp, #0x78] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #82 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] ldr d0, [fp, #0x28] ldr x0, [fp, #0x20] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0x70] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x68] add x0, fp, #112 ldr x1, [fp, #0x80] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x2, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG08: add x0, fp, #112 ldr x1, [fp, #0x80] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 708 491: JIT compiled Perfolizer.Horology.TimeInterval:ToString(Perfolizer.Horology.TimeUnit,System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation) [Tier0, IL size=141, code size=708] ; Assembly listing for method Perfolizer.Horology.TimeInterval:get_Nanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 492: JIT compiled Perfolizer.Horology.TimeInterval:get_Nanoseconds() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.TimeUnit:GetBestTimeUnit(double[]):Perfolizer.Horology.TimeUnit ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0x48] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #82 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #82 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x38] str wzr, [fp, #0x34] b G_M000_IG08 G_M000_IG05: ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG12 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x1, #0xD1FFAB1E mul x0, x0, x1 scvtf d16, x0 ldr d17, [fp, #0x40] fcmp d16, d17 ble G_M000_IG07 ldr x0, [fp, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG08: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #32 mov w1, #54 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0x34] ldr x1, [fp, #0x38] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #82 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 428 493: JIT compiled Perfolizer.Horology.TimeUnit:GetBestTimeUnit(double[]) [Tier0, IL size=71, code size=428] ; Assembly listing for method System.Linq.Enumerable:Min(System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 494: JIT compiled System.Linq.Enumerable:Min(System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:MinFloat[double](System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x30] add x1, sp, #112 str x1, [fp, #0x68] str x0, [fp, #0x60] G_M000_IG02: mov w1, #0xD1FFAB1E str w1, [fp, #0x18] add x1, fp, #72 ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG12 add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr w0, [fp, #0x50] cmp w0, #0 bls G_M000_IG30 ldr x0, [fp, #0x48] ldr d16, [x0] str d16, [fp, #0x58] mov w0, #1 str w0, [fp, #0x44] b G_M000_IG08 G_M000_IG04: ldr w0, [fp, #0x44] ldr w1, [fp, #0x50] cmp w0, w1 bhs G_M000_IG30 ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] mov w1, w1 lsl x1, x1, #3 ldr d0, [x0, x1] str d0, [fp, #0x38] ldr d0, [fp, #0x38] ldr d1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 ldr d0, [fp, #0x38] str d0, [fp, #0x58] b G_M000_IG07 G_M000_IG05: ldr d0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 ldr d0, [fp, #0x38] G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG07: ldr w0, [fp, #0x44] add w0, w0, #1 str w0, [fp, #0x44] G_M000_IG08: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #24 mov w1, #95 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0x44] ldr w1, [fp, #0x50] cmp w0, w1 blo G_M000_IG04 ldr d0, [fp, #0x58] G_M000_IG11: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG12: ldr x0, [fp, #0x60] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x30] G_M000_IG13: ldr x0, [fp, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG14 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG14: ldr x0, [fp, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x58] ldr d0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG17 ldr d16, [fp, #0x58] str d16, [fp, #0x28] b G_M000_IG20 G_M000_IG15: ldr x0, [fp, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x20] ldr d0, [fp, #0x20] ldr d1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG16 ldr d0, [fp, #0x20] str d0, [fp, #0x58] b G_M000_IG17 G_M000_IG16: ldr d0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG17 ldr d16, [fp, #0x20] str d16, [fp, #0x28] b G_M000_IG24 G_M000_IG17: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG19 G_M000_IG18: add x0, fp, #24 mov w1, #207 bl CORINFO_HELP_PATCHPOINT G_M000_IG19: ldr x0, [fp, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG15 b G_M000_IG22 G_M000_IG20: ldr x0, [fp, #0x68] bl G_M000_IG31 G_M000_IG21: b G_M000_IG28 G_M000_IG22: ldr x0, [fp, #0x68] bl G_M000_IG31 G_M000_IG23: b G_M000_IG26 G_M000_IG24: ldr x0, [fp, #0x68] bl G_M000_IG31 G_M000_IG25: b G_M000_IG28 G_M000_IG26: ldr d0, [fp, #0x58] G_M000_IG27: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG28: ldr d0, [fp, #0x28] G_M000_IG29: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG30: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG31: stp fp, lr, [sp, #-0x20]! add x3, fp, #112 str x3, [sp, #0x18] G_M000_IG32: ldr x0, [fp, #0x30] cbz x0, G_M000_IG33 ldr x0, [fp, #0x30] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG33: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 796 495: JIT compiled System.Linq.Enumerable:MinFloat[double](System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=235, code size=796] ; Assembly listing for method System.Linq.Enumerable:TryGetSpan[double](System.Collections.Generic.IEnumerable`1[double],byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: mov w0, #1 str w0, [fp, #0x4C] ldr x0, [fp, #0x58] ldr wzr, [x0] bl System.Object:GetType():System.Type:this movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x14, [fp, #0x50] add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG06 G_M000_IG04: ldr x0, [fp, #0x58] ldr wzr, [x0] bl System.Object:GetType():System.Type:this movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG05 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] str x1, [fp, #0x40] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x14, [fp, #0x50] add x13, fp, #40 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x50] stp xzr, xzr, [x0] str wzr, [fp, #0x4C] G_M000_IG06: ldr w0, [fp, #0x4C] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 308 496: JIT compiled System.Linq.Enumerable:TryGetSpan[double](System.Collections.Generic.IEnumerable`1[double],byref) [Tier0, IL size=112, code size=308] ; Assembly listing for method Perfolizer.Horology.TimeUnit:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x68] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x3, #0xD1FFAB1E movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x60] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #15 LSL #16 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x58] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x50] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x3, #60 mul x3, x0, x3 str x3, [fp, #0x28] ldr x3, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x48] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x3, #60 mul x3, x0, x3 str x3, [fp, #0x20] ldr x3, [fp, #0x20] ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x40] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x3, #24 mul x3, x0, x3 str x3, [fp, #0x18] ldr x3, [fp, #0x18] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x15, [fp, #0x38] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #7 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #4 bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #5 bl CORINFO_HELP_ARRADDR_ST movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr x0, [fp, #0x30] mov x1, #6 bl CORINFO_HELP_ARRADDR_ST ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 1080 497: JIT compiled Perfolizer.Horology.TimeUnit:.cctor() [Tier0, IL size=270, code size=1080] ; Assembly listing for method Perfolizer.Horology.TimeUnit:.ctor(System.String,System.String,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #16 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] ldr x1, [fp, #0x10] str x1, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 498: JIT compiled Perfolizer.Horology.TimeUnit:.ctor(System.String,System.String,long) [Tier0, IL size=28, code size=100] ; Assembly listing for method Perfolizer.Horology.TimeUnit:get_NanosecondAmount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 499: JIT compiled Perfolizer.Horology.TimeUnit:get_NanosecondAmount() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Common.UnitPresentation:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, #1 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] mov w1, wzr mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 168 500: JIT compiled Perfolizer.Common.UnitPresentation:.cctor() [Tier0, IL size=25, code size=168] ; Assembly listing for method Perfolizer.Common.UnitPresentation:.ctor(bool,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x14] uxtb w1, w1 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 501: JIT compiled Perfolizer.Common.UnitPresentation:.ctor(bool,int) [Tier0, IL size=21, code size=112] ; Assembly listing for method Perfolizer.Common.UnitPresentation:set_IsVisible(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 502: JIT compiled Perfolizer.Common.UnitPresentation:set_IsVisible(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method Perfolizer.Common.UnitPresentation:set_MinUnitWidth(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 503: JIT compiled Perfolizer.Common.UnitPresentation:set_MinUnitWidth(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method Perfolizer.Horology.TimeUnit:Convert(double,Perfolizer.Horology.TimeUnit,Perfolizer.Horology.TimeUnit):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x30] str x1, [fp, #0x28] str d0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 scvtf d16, x0 ldr d17, [fp, #0x38] fmul d16, d16, d17 str d16, [fp, #0x20] ldr x0, [fp, #0x28] str x0, [fp, #0x18] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x10] ldr x0, [fp, #0x10] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x38] str d16, [x0] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] G_M000_IG03: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 scvtf d0, x0 ldr d16, [fp, #0x20] fdiv d0, d16, d0 G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 232 504: JIT compiled Perfolizer.Horology.TimeUnit:Convert(double,Perfolizer.Horology.TimeUnit,Perfolizer.Horology.TimeUnit) [Tier0, IL size=37, code size=232] ; Assembly listing for method Perfolizer.Common.UnitPresentation:get_IsVisible():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 505: JIT compiled Perfolizer.Common.UnitPresentation:get_IsVisible() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.TimeUnit:get_Name():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 506: JIT compiled Perfolizer.Horology.TimeUnit:get_Name() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Common.UnitPresentation:get_MinUnitWidth():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 507: JIT compiled Perfolizer.Common.UnitPresentation:get_MinUnitWidth() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Number:FormatNumber[ushort](byref,byref,int,System.Globalization.NumberFormatInfo) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str x0, [fp, #0x98] str x1, [fp, #0x90] str w2, [fp, #0x8C] str x3, [fp, #0x80] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x90] ldrb w0, [x0, #0x08] cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x58] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x60] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x1, [fp, #0x60] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x0, x1, x0, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0x58] G_M000_IG04: ldr x0, [fp, #0x58] str x0, [fp, #0x78] ldr x0, [fp, #0x78] str x0, [fp, #0x70] str wzr, [fp, #0x6C] b G_M000_IG10 G_M000_IG05: ldr x0, [fp, #0x70] ldr w1, [fp, #0x6C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG14 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #35 beq G_M000_IG06 ldr w0, [fp, #0x68] cmp w0, #45 beq G_M000_IG07 b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x80] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x48] str x1, [fp, #0x50] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] str x1, [fp, #0x38] ldr x4, [fp, #0x48] ldr x5, [fp, #0x50] ldr x6, [fp, #0x30] ldr x7, [fp, #0x38] ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr w2, [fp, #0x8C] ldr x3, [fp, #0x40] movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 b G_M000_IG09 G_M000_IG07: ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x28] ldr x0, [fp, #0x98] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG09 G_M000_IG08: ldr w0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr w0, [fp, #0x6C] add w0, w0, #1 str w0, [fp, #0x6C] G_M000_IG10: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #24 mov w1, #118 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr x0, [fp, #0x70] ldr w0, [x0, #0x08] ldr w1, [fp, #0x6C] cmp w0, w1 bgt G_M000_IG05 G_M000_IG13: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 604 508: JIT compiled System.Number:FormatNumber[ushort](byref,byref,int,System.Globalization.NumberFormatInfo) [Tier0, IL size=128, code size=604] ; Assembly listing for method System.Globalization.NumberFormatInfo:NumberGroupSeparatorTChar[ushort]():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x38] ldr x0, [x0, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] str x1, [fp, #0x18] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 509: JIT compiled System.Globalization.NumberFormatInfo:NumberGroupSeparatorTChar[ushort]() [Tier0, IL size=95, code size=120] ; Assembly listing for method System.Number:FormatFixed[ushort](byref,byref,int,int[],System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp add x9, fp, #80 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str xzr, [x9, #0x80] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str x3, [fp, #0xD1FFAB1E] str x4, [fp, #0xD1FFAB1E] str x5, [fp, #0xD1FFAB1E] str x6, [fp, #0xD1FFAB1E] str x7, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x04] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 ble G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG26 str wzr, [fp, #0xFC] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xF8] str wzr, [fp, #0xF4] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] cbz w0, G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xFC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG44 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0xE4] b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xFC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG44 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] cbz w0, G_M000_IG08 ldr w0, [fp, #0xF8] ldr w1, [fp, #0xD1FFAB1E] add w0, w0, w1 str w0, [fp, #0xF8] ldr w0, [fp, #0xFC] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x08] sub w1, w1, #1 cmp w0, w1 bge G_M000_IG04 ldr w0, [fp, #0xFC] add w0, w0, #1 str w0, [fp, #0xFC] G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xFC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG44 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] ldr w1, [fp, #0xE4] add w0, w0, w1 str w0, [fp, #0xE4] ldr w0, [fp, #0xE4] ldr w1, [fp, #0xF8] orr w0, w0, w1 tbz w0, #31, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #48 mov w1, #96 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xE4] cmp w0, w1 bgt G_M000_IG03 G_M000_IG08: ldr w0, [fp, #0xE4] cbz w0, G_M000_IG09 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG44 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0x38] b G_M000_IG10 G_M000_IG09: str wzr, [fp, #0x38] G_M000_IG10: ldr w0, [fp, #0x38] str w0, [fp, #0xF4] G_M000_IG11: str wzr, [fp, #0xFC] str wzr, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xEC] ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xEC] cmp w0, w1 blt G_M000_IG12 ldr w0, [fp, #0xEC] str w0, [fp, #0x64] b G_M000_IG13 G_M000_IG12: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0x64] G_M000_IG13: ldr w0, [fp, #0x64] str w0, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] str x1, [fp, #0x58] ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD0] ldr x0, [fp, #0xD0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0xD8] ldr x0, [fp, #0xD8] ldr w1, [fp, #0xF8] sxtw x1, w1 mov w2, #2 sxtw x2, w2 mul x1, x1, x2 add x0, x0, x1 mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0xC8] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xC4] b G_M000_IG23 G_M000_IG14: ldr x0, [fp, #0xC8] str x0, [fp, #0xB8] ldr x0, [fp, #0xB8] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0xC8] ldr x0, [fp, #0xB8] str x0, [fp, #0x48] ldr w0, [fp, #0xC4] ldr w1, [fp, #0xE8] cmp w0, w1 blt G_M000_IG15 ldr x0, [fp, #0x48] str x0, [fp, #0x40] mov w0, #48 str w0, [fp, #0x3C] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xC4] ldrb w0, [x0, w1, SXTW #2] str w0, [fp, #0x3C] G_M000_IG16: ldr w0, [fp, #0x3C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x40] strh w0, [x1] ldr w0, [fp, #0xF4] cmp w0, #0 ble G_M000_IG22 ldr w0, [fp, #0xF0] add w0, w0, #1 str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] ldr w1, [fp, #0xF4] cmp w0, w1 bne G_M000_IG22 ldr w0, [fp, #0xC4] cbz w0, G_M000_IG22 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xB4] b G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0xC8] str x0, [fp, #0xB8] ldr x0, [fp, #0xB8] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0xC8] ldr w0, [fp, #0xB4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG44 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xB4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] ldr x1, [fp, #0xB8] strh w0, [x1] ldr w0, [fp, #0xB4] sub w0, w0, #1 str w0, [fp, #0xB4] G_M000_IG18: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG20: ldr w0, [fp, #0xB4] tbz w0, #31, G_M000_IG17 ldr w0, [fp, #0xFC] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x08] sub w1, w1, #1 cmp w0, w1 bge G_M000_IG21 ldr w0, [fp, #0xFC] add w0, w0, #1 str w0, [fp, #0xFC] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xFC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG44 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0xF4] G_M000_IG21: str wzr, [fp, #0xF0] G_M000_IG22: ldr w0, [fp, #0xC4] sub w0, w0, #1 str w0, [fp, #0xC4] G_M000_IG23: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG25 G_M000_IG24: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG25: ldr w0, [fp, #0xC4] tbz w0, #31, G_M000_IG14 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xE8] sxtw x1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD0] b G_M000_IG32 G_M000_IG26: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG28 G_M000_IG27: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0] cbnz w0, G_M000_IG29 ldr x0, [fp, #0x80] str x0, [fp, #0x70] mov w0, #48 str w0, [fp, #0x6C] b G_M000_IG30 G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 mov w1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0x80] str x0, [fp, #0x70] ldr x0, [fp, #0x78] ldrb w0, [x0] str w0, [fp, #0x6C] G_M000_IG30: ldr w0, [fp, #0x6C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG26 b G_M000_IG32 G_M000_IG31: mov w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x20] ldr w1, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG32: ldr w1, [fp, #0xD1FFAB1E] cmp w1, #0 ble G_M000_IG43 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0xD1FFAB1E] tbz w0, #31, G_M000_IG40 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 ble G_M000_IG40 ldr w0, [fp, #0xD1FFAB1E] neg w0, w0 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xB0] str wzr, [fp, #0xAC] b G_M000_IG34 G_M000_IG33: mov w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xAC] add w0, w0, #1 str w0, [fp, #0xAC] G_M000_IG34: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG36 G_M000_IG35: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG36: ldr w0, [fp, #0xAC] ldr w1, [fp, #0xB0] cmp w0, w1 blt G_M000_IG33 ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xB0] add w0, w0, w1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xB0] sub w0, w0, w1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG40 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0] cbnz w0, G_M000_IG38 ldr x0, [fp, #0xA0] str x0, [fp, #0x90] mov w0, #48 str w0, [fp, #0x8C] b G_M000_IG39 G_M000_IG38: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 mov w1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xA0] str x0, [fp, #0x90] ldr x0, [fp, #0x98] ldrb w0, [x0] str w0, [fp, #0x8C] G_M000_IG39: ldr w0, [fp, #0x8C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG40: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG42 G_M000_IG41: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG42: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG37 G_M000_IG43: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG44: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1940 510: JIT compiled System.Number:FormatFixed[ushort](byref,byref,int,int[],System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]) [Tier0, IL size=542, code size=1940] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w2, [x0] str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr x1, [fp, #0x40] ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr x3, [fp, #0x30] ldr x3, [x3, #0x18] blr x3 ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 356 511: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=356] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 512: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_FallbackValue():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 513: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_FallbackValue() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:get_ResolvedId():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 120 514: JIT compiled BenchmarkDotNet.Jobs.Job:get_ResolvedId() [Tier0, IL size=27, code size=120] ; Assembly listing for method BenchmarkDotNet.Jobs.JobIdGenerator:GenerateRandomId(BenchmarkDotNet.Jobs.Job):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x68] ldr x2, [fp, #0x28] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x60] mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr x0, [fp, #0x60] movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x18] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] str x0, [fp, #0x58] movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x50] str wzr, [fp, #0x4C] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x58] mov w1, #26 ldr x2, [fp, #0x58] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x28] blr x2 add w0, w0, #65 uxth w0, w0 str w0, [fp, #0x40] add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] ldr w1, [fp, #0x4C] add w1, w1, #1 str w1, [fp, #0x4C] G_M000_IG06: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #48 mov w1, #85 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x4C] cmp w0, #6 blt G_M000_IG05 ldr x1, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 464 515: JIT compiled BenchmarkDotNet.Jobs.JobIdGenerator:GenerateRandomId(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=101, code size=464] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:Validate(BenchmarkDotNet.Jobs.Job):System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Validators.ValidationError] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x10] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 516: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo:Validate(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=15, code size=92] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x20] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 517: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method BenchmarkDotNet.Validators.ValidationErrorReporter:ReportIfAny(System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Validators.ValidationError],BenchmarkDotNet.Engines.IHost):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str wzr, [fp, #0x34] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x10] add x2, sp, #80 str x2, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] G_M000_IG02: str wzr, [fp, #0x34] ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x28] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] G_M000_IG03: b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 mov w0, #1 str w0, [fp, #0x34] G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #32 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0x48] bl G_M000_IG12 G_M000_IG09: nop G_M000_IG10: ldr w0, [fp, #0x34] G_M000_IG11: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: stp fp, lr, [sp, #-0x20]! add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG13: ldr x0, [fp, #0x28] cbz x0, G_M000_IG14 ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 324 518: JIT compiled BenchmarkDotNet.Validators.ValidationErrorReporter:ReportIfAny(System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Validators.ValidationError],BenchmarkDotNet.Engines.IHost) [Tier0, IL size=54, code size=324] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[BenchmarkDotNet.Validators.ValidationError]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x20] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x24] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x28] str wzr, [x0, #0x20] ldr x0, [fp, #0x28] str x0, [fp, #0x20] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] str x14, [fp, #0x20] G_M000_IG04: ldr x14, [fp, #0x28] ldr x15, [x14, #0x18] ldr x14, [fp, #0x20] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 172 519: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=55, code size=172] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] ldr w0, [x0, #0x20] str w0, [fp, #0x64] ldr w0, [fp, #0x64] cmp w0, #2 bhi G_M000_IG03 ldr w0, [fp, #0x64] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG05: ldr x0, [fp, #0x68] movn w1, #0 str w1, [x0, #0x20] ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bne G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x68] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x68] mov w1, #1 str w1, [x0, #0x20] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG07: ldr x0, [fp, #0x68] movn w1, #0 str w1, [x0, #0x20] G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x58] ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG11 ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG11 add x0, fp, #48 mov w1, #51 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 ldr x2, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x28] mov w1, #1 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x68] add x14, x14, #8 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x68] mov w1, #2 str w1, [x0, #0x20] mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: ldr x0, [fp, #0x68] movn w1, #0 str w1, [x0, #0x20] G_M000_IG11: mov w0, wzr G_M000_IG12: ldp fp, lr, [sp], #0x70 ret lr RWD00 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 696 520: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:MoveNext() [Tier0, IL size=195, code size=696] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:get_Environment():BenchmarkDotNet.Jobs.EnvironmentMode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 521: JIT compiled BenchmarkDotNet.Jobs.Job:get_Environment() [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 144 522: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=144] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x1, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x10] ldr x0, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 104 523: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]) [Tier0, IL size=13, code size=104] ; Assembly listing for method BenchmarkDotNet.Jobs.EnvironmentMode:get_Jit():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 524: JIT compiled BenchmarkDotNet.Jobs.EnvironmentMode:get_Jit() [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 525: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 526: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=13, code size=100] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w2, [x0] str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr x1, [fp, #0x40] ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr x3, [fp, #0x30] ldr x3, [x3, #0x18] blr x3 ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 356 527: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=356] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 528: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Portability.RuntimeInformation:GetCurrentRuntime():BenchmarkDotNet.Environments.Runtime ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] b G_M000_IG10 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG10: ldr x0, [fp, #0x20] G_M000_IG11: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 548 529: JIT compiled BenchmarkDotNet.Portability.RuntimeInformation:GetCurrentRuntime() [Tier0, IL size=109, code size=548] ; Assembly listing for method BenchmarkDotNet.Environments.CoreRuntime:GetCurrentVersion():BenchmarkDotNet.Environments.CoreRuntime ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG04: add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 268 530: JIT compiled BenchmarkDotNet.Environments.CoreRuntime:GetCurrentVersion() [Tier0, IL size=45, code size=268] ; Assembly listing for method BenchmarkDotNet.Environments.CoreRuntime:FromVersion(System.Version):BenchmarkDotNet.Environments.CoreRuntime ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str x0, [fp, #0xA8] G_M000_IG02: ldr x0, [fp, #0xA8] str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] cbz x0, G_M000_IG10 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bne G_M000_IG03 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG03: ldr x0, [fp, #0xA0] str x0, [fp, #0x98] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bne G_M000_IG04 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG04: ldr x0, [fp, #0xA0] str x0, [fp, #0x90] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bne G_M000_IG05 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bne G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG05: ldr x0, [fp, #0xA0] str x0, [fp, #0x88] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #3 bne G_M000_IG06 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG06: ldr x0, [fp, #0xA0] str x0, [fp, #0x80] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #3 bne G_M000_IG07 ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG07: ldr x0, [fp, #0xA0] str x0, [fp, #0x78] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #5 bne G_M000_IG08 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG08: ldr x0, [fp, #0xA0] str x0, [fp, #0x70] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #6 bne G_M000_IG09 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0xA0] str x0, [fp, #0x68] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #7 bne G_M000_IG10 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG10: add x0, fp, #64 mov w1, #4 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] add x0, fp, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x28] ldr w1, [fp, #0x28] add x0, fp, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] add x0, fp, #64 mov w1, #6 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] add x0, fp, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x20] ldr w1, [fp, #0x20] add x0, fp, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] b G_M000_IG11 G_M000_IG11: ldr x0, [fp, #0x30] G_M000_IG12: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 1632 531: JIT compiled BenchmarkDotNet.Environments.CoreRuntime:FromVersion(System.Version) [Tier0, IL size=374, code size=1632] ; Assembly listing for method BenchmarkDotNet.Environments.CoreRuntime:CreateForNewVersion(System.String,System.String):BenchmarkDotNet.Environments.CoreRuntime ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x3, [fp, #0x40] ldr x2, [fp, #0x48] mov w1, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x38] G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 316 532: JIT compiled BenchmarkDotNet.Environments.CoreRuntime:CreateForNewVersion(System.String,System.String) [Tier0, IL size=47, code size=316] ; Assembly listing for method BenchmarkDotNet.Environments.CoreRuntime:.ctor(int,System.String,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldr x2, [fp, #0x18] ldr x3, [fp, #0x10] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 533: JIT compiled BenchmarkDotNet.Environments.CoreRuntime:.ctor(int,System.String,System.String) [Tier0, IL size=10, code size=68] ; Assembly listing for method BenchmarkDotNet.Environments.Runtime:.ctor(int,System.String,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str w1, [fp, #0x44] str x2, [fp, #0x38] str x3, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG06: ldr x14, [fp, #0x48] ldr w15, [fp, #0x44] str w15, [x14, #0x18] ldr x14, [fp, #0x48] add x14, x14, #16 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x48] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 332 534: JIT compiled BenchmarkDotNet.Environments.Runtime:.ctor(int,System.String,System.String) [Tier0, IL size=66, code size=332] ; Assembly listing for method BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 535: JIT compiled BenchmarkDotNet.Environments.BenchmarkEnvironmentInfo+d__55:System.IDisposable.Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, wzr bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x18] add x14, x14, #72 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] mov x1, #1 str x1, [x0, #0x78] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 536: JIT compiled BenchmarkDotNet.Engines.EngineParameters:.ctor() [Tier0, IL size=26, code size=104] ; Assembly listing for method BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr x0, [x0, #0x30] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x20] bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE str x0, [fp, #0x10] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x14, [fp, #0x10] mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 537: JIT compiled BenchmarkDotNet.Jobs.JobMode`1[System.__Canon]:.cctor() [Tier0, IL size=21, code size=168] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_Host(BenchmarkDotNet.Engines.IHost):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 538: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_Host(BenchmarkDotNet.Engines.IHost) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_WorkloadActionUnroll(System.Action`1[long]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #24 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 539: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_WorkloadActionUnroll(System.Action`1[long]) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_WorkloadActionNoUnroll(System.Action`1[long]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 540: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_WorkloadActionNoUnroll(System.Action`1[long]) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_Dummy1Action(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 541: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_Dummy1Action(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_Dummy2Action(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #40 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 542: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_Dummy2Action(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_Dummy3Action(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #48 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 543: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_Dummy3Action(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_OverheadActionNoUnroll(System.Action`1[long]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #56 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 544: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_OverheadActionNoUnroll(System.Action`1[long]) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_OverheadActionUnroll(System.Action`1[long]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #64 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 545: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_OverheadActionUnroll(System.Action`1[long]) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_GlobalSetupAction(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #80 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 546: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_GlobalSetupAction(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_GlobalCleanupAction(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #88 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 547: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_GlobalCleanupAction(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_IterationSetupAction(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #96 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 548: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_IterationSetupAction(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_IterationCleanupAction(System.Action):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #104 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 549: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_IterationCleanupAction(System.Action) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_TargetJob(BenchmarkDotNet.Jobs.Job):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #72 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 550: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_TargetJob(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_OperationsPerInvoke(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] str x1, [x0, #0x78] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 551: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_OperationsPerInvoke(long) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_MeasureExtraStats(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x80] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 552: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_MeasureExtraStats(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:set_BenchmarkName(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #112 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 553: JIT compiled BenchmarkDotNet.Engines.EngineParameters:set_BenchmarkName(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.EngineFactory:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 554: JIT compiled BenchmarkDotNet.Engines.EngineFactory:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.EngineFactory:CreateReadyToRun(BenchmarkDotNet.Engines.EngineParameters):BenchmarkDotNet.Engines.IEngine:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x90] ldr x1, [fp, #0x90] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x88] ldr x1, [fp, #0x88] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG08 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB0] bl CORINFO_HELP_THROW G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG10 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB8] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] bl CORINFO_HELP_THROW G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG12 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC0] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xC0] bl CORINFO_HELP_THROW G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG14 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr x0, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xC8] bl CORINFO_HELP_THROW G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG16 G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD0] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0xD0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD0] bl CORINFO_HELP_THROW G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG18 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD8] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD8] bl CORINFO_HELP_THROW G_M000_IG18: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG19 b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] blr x1 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG21 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x98] b G_M000_IG27 G_M000_IG21: str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG22 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x54] ldr w3, [fp, #0x54] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x98] b G_M000_IG27 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w2, #1 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str d0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] fmov d16, #1.5000 fcmp d0, d16 bhs G_M000_IG24 fmov d0, #10.0000 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0xF0] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xF0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG24 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xEC] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xEC] mov w2, #1 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str d0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str d0, [fp, #0xE0] ldr d0, [fp, #0xE0] ldr d1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0xD1FFAB1E] G_M000_IG24: ldr d16, [fp, #0xD1FFAB1E] fmov d17, #1.5000 fcmp d16, d17 bhs G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x98] b G_M000_IG27 G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x48] ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] ldr x0, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] bl System.Math:Ceiling(double):double fcvtzs w0, d0 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bge G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x3, [fp, #0x18] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0x98] b G_M000_IG27 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x98] b G_M000_IG27 G_M000_IG27: ldr x0, [fp, #0x98] G_M000_IG28: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 2264 555: JIT compiled BenchmarkDotNet.Engines.EngineFactory:CreateReadyToRun(BenchmarkDotNet.Engines.EngineParameters) [Tier0, IL size=453, code size=2264] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_WorkloadActionNoUnroll():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 556: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_WorkloadActionNoUnroll() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_WorkloadActionUnroll():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 557: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_WorkloadActionUnroll() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_Dummy1Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 558: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_Dummy1Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_Dummy2Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 559: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_Dummy2Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_Dummy3Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 560: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_Dummy3Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_OverheadActionNoUnroll():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 561: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_OverheadActionNoUnroll() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_OverheadActionUnroll():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x40] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 562: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_OverheadActionUnroll() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_TargetJob():BenchmarkDotNet.Jobs.Job:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x48] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 563: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_TargetJob() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_GlobalSetupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 564: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_GlobalSetupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarksGame.RegexRedux_1:Setup():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] add x1, sp, #96 str x1, [fp, #0x58] str x0, [fp, #0x50] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x40] G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str x0, [fp, #0x38] G_M000_IG04: ldr x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x20] blr x1 ldr x14, [fp, #0x50] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0x58] bl G_M000_IG10 G_M000_IG06: nop G_M000_IG07: ldr x0, [fp, #0x58] bl G_M000_IG13 G_M000_IG08: nop G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG10: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG11: ldr x0, [fp, #0x38] cbz x0, G_M000_IG12 ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG12: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG13: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG14: ldr x0, [fp, #0x40] cbz x0, G_M000_IG15 ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG15: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 404 565: JIT compiled BenchmarksGame.RegexRedux_1:Setup() [Tier0, IL size=62, code size=404] ; Assembly listing for method BenchmarksGame.RegexReduxHelpers:.ctor(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x14] uxtb w0, w0 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] movz w1, #0xD1FFAB1E movk w1, #2 LSL #16 str w1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] mov w1, #152 str w1, [x0, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 192 566: JIT compiled BenchmarksGame.RegexReduxHelpers:.ctor(bool) [Tier0, IL size=65, code size=192] ; Assembly listing for method BenchmarksGame.InputFileHelper:FindInputFile(System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x28] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0x30] G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 288 567: JIT compiled BenchmarksGame.InputFileHelper:FindInputFile(System.String) [Tier0, IL size=48, code size=288] ; Assembly listing for method BenchmarksGame.InputFileHelper:GetFullPath(System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #5 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x20] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] mov x1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] mov x1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] ldr x2, [fp, #0x28] mov x1, #4 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 204 568: JIT compiled BenchmarksGame.InputFileHelper:GetFullPath(System.String) [Tier0, IL size=48, code size=204] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_NeedsJitting():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x2, [fp, #0x18] ldr x1, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 176 569: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_NeedsJitting() [Tier0, IL size=27, code size=176] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #202 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x28] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 236 570: JIT compiled BenchmarkDotNet.Engines.EngineParameters:.cctor() [Tier0, IL size=33, code size=236] ; Assembly listing for method BenchmarkDotNet.Running.BenchmarkRunnerClean:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x28] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 236 571: JIT compiled BenchmarkDotNet.Running.BenchmarkRunnerClean:.cctor() [Tier0, IL size=33, code size=236] ; Assembly listing for method BenchmarkDotNet.Environments.EnvironmentResolver:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x2, [fp, #0x20] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 240 572: JIT compiled BenchmarkDotNet.Environments.EnvironmentResolver:.cctor() [Tier0, IL size=33, code size=240] ; Assembly listing for method BenchmarkDotNet.Environments.EnvironmentResolver:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #184 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xF8] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xE8] ldr x0, [fp, #0xF0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xF0] ldr x2, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xE0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD8] ldr x0, [fp, #0xE0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD8] ldr x2, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC8] ldr x0, [fp, #0xD0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xC8] ldr x2, [fp, #0xD0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xB8] ldr x0, [fp, #0xC0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xC0] ldr x2, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xA8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xA0] ldr x0, [fp, #0xA8] str x0, [fp, #0x98] ldr x0, [fp, #0xB0] str x0, [fp, #0x90] ldr x0, [fp, #0xB0] cbnz x0, G_M000_IG04 movz x0, #160 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] str x0, [fp, #0x90] G_M000_IG04: ldr x0, [fp, #0xA0] ldr x1, [fp, #0x98] ldr x2, [fp, #0x90] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x88] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x78] ldr x0, [fp, #0x80] str x0, [fp, #0x70] ldr x0, [fp, #0x88] str x0, [fp, #0x68] ldr x0, [fp, #0x88] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] str x0, [fp, #0x68] G_M000_IG05: ldr x0, [fp, #0x78] ldr x1, [fp, #0x70] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x50] ldr x0, [fp, #0x58] str x0, [fp, #0x48] ldr x0, [fp, #0x60] str x0, [fp, #0x40] ldr x0, [fp, #0x60] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x38] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] str x0, [fp, #0x40] G_M000_IG06: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1544 573: JIT compiled BenchmarkDotNet.Environments.EnvironmentResolver:.ctor() [Tier0, IL size=248, code size=1544] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 574: JIT compiled BenchmarkDotNet.Characteristics.Resolver:.ctor() [Tier0, IL size=18, code size=108] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 575: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 576: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],System.Func`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x1, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] str x2, [fp, #0x40] str x3, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG05: ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x50] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x40] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 280 577: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],System.Func`1[System.__Canon]) [Tier0, IL size=38, code size=280] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 578: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 579: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 580: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],System.Func`1[long]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 581: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],System.Func`1[long]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[long]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 582: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[long]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Environments.EnvironmentResolver+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 583: JIT compiled BenchmarkDotNet.Environments.EnvironmentResolver+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.EnvironmentResolver+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 584: JIT compiled BenchmarkDotNet.Environments.EnvironmentResolver+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[System.Nullable`1[System.Guid]](BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]],System.Func`1[System.Nullable`1[System.Guid]]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 585: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[System.Nullable`1[System.Guid]](BenchmarkDotNet.Characteristics.Characteristic`1[System.Nullable`1[System.Guid]],System.Func`1[System.Nullable`1[System.Guid]]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.Nullable`1[System.Guid]]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 586: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.Nullable`1[System.Guid]]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],System.Func`1[bool]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 587: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],System.Func`1[bool]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[bool]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 588: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[bool]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`2[BenchmarkDotNet.Characteristics.CharacteristicObject,int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 589: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`2[BenchmarkDotNet.Characteristics.CharacteristicObject,int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 590: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Environments.GcResolver:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 591: JIT compiled BenchmarkDotNet.Environments.GcResolver:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.GcResolver:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x48] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] str x0, [fp, #0xD1FFAB1E] G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x50] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x50] str x0, [fp, #0xD1FFAB1E] G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x58] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x58] str x0, [fp, #0xD1FFAB1E] G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x60] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x60] str x0, [fp, #0xF8] G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xE8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xE0] ldr x0, [fp, #0xE8] str x0, [fp, #0xD8] ldr x0, [fp, #0xF0] str x0, [fp, #0xD0] ldr x0, [fp, #0xF0] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x68] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x68] str x0, [fp, #0xD0] G_M000_IG07: ldr x0, [fp, #0xE0] ldr x1, [fp, #0xD8] ldr x2, [fp, #0xD0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB8] ldr x0, [fp, #0xC0] str x0, [fp, #0xB0] ldr x0, [fp, #0xC8] str x0, [fp, #0xA8] ldr x0, [fp, #0xC8] cbnz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x70] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x70] str x0, [fp, #0xA8] G_M000_IG08: ldr x0, [fp, #0xB8] ldr x1, [fp, #0xB0] ldr x2, [fp, #0xA8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x90] ldr x0, [fp, #0x98] str x0, [fp, #0x88] ldr x0, [fp, #0xA0] str x0, [fp, #0x80] ldr x0, [fp, #0xA0] cbnz x0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x78] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] str x0, [fp, #0x80] G_M000_IG09: ldr x0, [fp, #0x90] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG10: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1996 592: JIT compiled BenchmarkDotNet.Environments.GcResolver:.ctor() [Tier0, IL size=301, code size=1996] ; Assembly listing for method BenchmarkDotNet.Environments.GcResolver+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 593: JIT compiled BenchmarkDotNet.Environments.GcResolver+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.GcResolver+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 594: JIT compiled BenchmarkDotNet.Environments.GcResolver+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:.ctor(BenchmarkDotNet.Characteristics.IResolver[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 595: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:.ctor(BenchmarkDotNet.Characteristics.IResolver[]) [Tier0, IL size=14, code size=64] ; Assembly listing for method BenchmarkDotNet.Environments.InfrastructureResolver:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 596: JIT compiled BenchmarkDotNet.Environments.InfrastructureResolver:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.InfrastructureResolver:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xE0]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #136 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) str xzr, [x9, #0x20] str x0, [fp, #0xD8] G_M000_IG02: ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD0] ldr x0, [fp, #0xD8] str x0, [fp, #0xC0] ldr x0, [fp, #0xC8] str x0, [fp, #0xB8] ldr x0, [fp, #0xD0] str x0, [fp, #0xB0] ldr x0, [fp, #0xD0] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] str x0, [fp, #0xB0] G_M000_IG03: ldr x0, [fp, #0xC0] ldr x3, [fp, #0xB0] ldr x2, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xA0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xA8] ldr x0, [fp, #0xD8] str x0, [fp, #0x98] ldr x0, [fp, #0xA0] str x0, [fp, #0x90] ldr x0, [fp, #0xA8] str x0, [fp, #0x88] ldr x0, [fp, #0xA8] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] str x0, [fp, #0x88] G_M000_IG04: ldr x0, [fp, #0x98] ldr x3, [fp, #0x88] ldr x2, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] ldr x0, [fp, #0xD8] str x0, [fp, #0x70] ldr x0, [fp, #0x78] str x0, [fp, #0x68] ldr x0, [fp, #0x80] str x0, [fp, #0x60] ldr x0, [fp, #0x80] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x38] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] str x0, [fp, #0x60] G_M000_IG05: ldr x0, [fp, #0x70] ldr x3, [fp, #0x60] ldr x2, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x50] ldr x0, [fp, #0x58] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD8] ldr x3, [fp, #0x58] ldr x2, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x40] ldr x0, [fp, #0x48] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD8] ldr x3, [fp, #0x48] ldr x2, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG06: ldp fp, lr, [sp], #0xE0 ret lr ; Total bytes of code 1200 597: JIT compiled BenchmarkDotNet.Environments.InfrastructureResolver:.ctor() [Tier0, IL size=179, code size=1200] ; Assembly listing for method BenchmarkDotNet.Environments.InfrastructureResolver+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 598: JIT compiled BenchmarkDotNet.Environments.InfrastructureResolver+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Environments.InfrastructureResolver+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 599: JIT compiled BenchmarkDotNet.Environments.InfrastructureResolver+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 600: JIT compiled BenchmarkDotNet.Engines.EngineResolver:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x68] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x68] str x0, [fp, #0xD1FFAB1E] G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x70] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x70] str x0, [fp, #0xD1FFAB1E] G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x78] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] str x0, [fp, #0xD1FFAB1E] G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x80] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x80] str x0, [fp, #0xD1FFAB1E] G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x88] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] str x0, [fp, #0xD1FFAB1E] G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x90] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x90] str x0, [fp, #0xD1FFAB1E] G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x98] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x98] str x0, [fp, #0xD1FFAB1E] G_M000_IG09: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0xA0] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xA0] str x0, [fp, #0xD1FFAB1E] G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG11 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0xA8] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xA8] str x0, [fp, #0xD1FFAB1E] G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0xB0] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xB0] str x0, [fp, #0xF8] G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xE8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xE0] ldr x0, [fp, #0xE8] str x0, [fp, #0xD8] ldr x0, [fp, #0xF0] str x0, [fp, #0xD0] ldr x0, [fp, #0xF0] cbnz x0, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0xB8] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xB8] str x0, [fp, #0xD0] G_M000_IG13: ldr x0, [fp, #0xE0] ldr x1, [fp, #0xD8] ldr x2, [fp, #0xD0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC0] ldr x0, [fp, #0xC8] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xC0] ldr x2, [fp, #0xC8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG14: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 3204 601: JIT compiled BenchmarkDotNet.Engines.EngineResolver:.ctor() [Tier0, IL size=492, code size=3204] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 602: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 603: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 604: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 605: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],System.Func`1[Perfolizer.Horology.TimeInterval]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 606: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],System.Func`1[Perfolizer.Horology.TimeInterval]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[Perfolizer.Horology.TimeInterval]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 607: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[Perfolizer.Horology.TimeInterval]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 608: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`1[int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 609: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[double](BenchmarkDotNet.Characteristics.Characteristic`1[double],System.Func`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 610: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[double](BenchmarkDotNet.Characteristics.Characteristic`1[double],System.Func`1[double]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 611: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[double]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`2[BenchmarkDotNet.Characteristics.CharacteristicObject,int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 220 612: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Register[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],System.Func`2[BenchmarkDotNet.Characteristics.CharacteristicObject,int]) [Tier0, IL size=38, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 613: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 614: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 615: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 616: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:FirstOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x3, [fp, #0x30] ldr x3, [x3, #0x10] ldr x3, [x3, #0x10] str x3, [fp, #0x10] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x10] G_M000_IG05: add x3, fp, #24 ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 128 617: JIT compiled System.Linq.Enumerable:FirstOrDefault[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]) [Tier0, IL size=10, code size=128] ; Assembly listing for method System.Linq.Enumerable:TryGetFirst[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool],byref):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x58] str xzr, [fp, #0x50] str xzr, [fp, #0x48] str xzr, [fp, #0x40] add x4, sp, #144 str x4, [fp, #0x88] str x0, [fp, #0x80] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] str x3, [fp, #0x60] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x70] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x68] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x38] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG07: ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x70] ldr x11, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] blr x1 str x0, [fp, #0x58] G_M000_IG08: b G_M000_IG13 G_M000_IG09: ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG12: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x58] ldr x11, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x0, [fp, #0x68] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x68] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG13 ldr x0, [fp, #0x60] mov w1, #1 strb w1, [x0] ldr x0, [fp, #0x50] str x0, [fp, #0x48] b G_M000_IG18 G_M000_IG13: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #24 mov w1, #52 bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr x0, [fp, #0x58] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG09 b G_M000_IG16 G_M000_IG16: ldr x0, [fp, #0x88] bl G_M000_IG24 G_M000_IG17: b G_M000_IG20 G_M000_IG18: ldr x0, [fp, #0x88] bl G_M000_IG24 G_M000_IG19: b G_M000_IG22 G_M000_IG20: ldr x0, [fp, #0x60] strb wzr, [x0] str xzr, [fp, #0x40] ldr x0, [fp, #0x40] G_M000_IG21: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG22: ldr x0, [fp, #0x48] G_M000_IG23: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0x58] cbz x0, G_M000_IG26 ldr x0, [fp, #0x58] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 544 618: JIT compiled System.Linq.Enumerable:TryGetFirst[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool],byref) [Tier0, IL size=87, code size=544] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 619: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:CanResolve(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x20] str x14, [fp, #0x28] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x18] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 220 620: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:CanResolve(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=37, code size=220] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass2_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 621: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass2_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Any[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str xzr, [fp, #0x50] str xzr, [fp, #0x48] add x3, sp, #128 str x3, [fp, #0x78] str x0, [fp, #0x70] str x0, [fp, #0x68] str x1, [fp, #0x60] str x2, [fp, #0x58] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x60] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x58] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x38] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG07: ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x60] ldr x11, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] blr x1 str x0, [fp, #0x50] G_M000_IG08: b G_M000_IG13 G_M000_IG09: ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x28] G_M000_IG12: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x50] ldr x11, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x48] ldr x2, [fp, #0x58] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG13 mov w0, #1 str w0, [fp, #0x44] b G_M000_IG18 G_M000_IG13: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #24 mov w1, #49 bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr x0, [fp, #0x50] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG09 b G_M000_IG16 G_M000_IG16: ldr x0, [fp, #0x78] bl G_M000_IG24 G_M000_IG17: b G_M000_IG20 G_M000_IG18: ldr x0, [fp, #0x78] bl G_M000_IG24 G_M000_IG19: b G_M000_IG22 G_M000_IG20: mov w0, wzr G_M000_IG21: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: ldr w0, [fp, #0x44] G_M000_IG23: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #128 str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0x50] cbz x0, G_M000_IG26 ldr x0, [fp, #0x50] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 508 622: JIT compiled System.Linq.Enumerable:Any[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,bool]) [Tier0, IL size=73, code size=508] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass2_0:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 623: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass2_0:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:CanResolve(BenchmarkDotNet.Characteristics.Characteristic):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 624: JIT compiled BenchmarkDotNet.Characteristics.Resolver:CanResolve(BenchmarkDotNet.Characteristics.Characteristic) [Tier0, IL size=13, code size=60] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 625: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 626: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_0():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 627: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_0() [Tier0, IL size=2, code size=24] ; Assembly listing for method BenchmarkDotNet.Engines.RunStrategyExtensions:NeedsJitting(int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 628: JIT compiled BenchmarkDotNet.Engines.RunStrategyExtensions:NeedsJitting(int) [Tier0, IL size=5, code size=32] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_HasInvocationCount():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 629: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_HasInvocationCount() [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_HasUnrollFactor():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 630: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_HasUnrollFactor() [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineFactory:CreateSingleActionEngine(BenchmarkDotNet.Engines.EngineParameters):BenchmarkDotNet.Engines.Engine ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x3, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] ldr x0, [fp, #0x48] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 264 631: JIT compiled BenchmarkDotNet.Engines.EngineFactory:CreateSingleActionEngine(BenchmarkDotNet.Engines.EngineParameters) [Tier0, IL size=44, code size=264] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions:WithInvocationCount(BenchmarkDotNet.Jobs.Job,long):BenchmarkDotNet.Jobs.Job ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] str x1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 632: JIT compiled BenchmarkDotNet.Jobs.JobExtensions:WithInvocationCount(BenchmarkDotNet.Jobs.Job,long) [Tier0, IL size=32, code size=188] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass28_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 633: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass28_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions:WithCore(BenchmarkDotNet.Jobs.Job,System.Action`1[BenchmarkDotNet.Jobs.Job]):BenchmarkDotNet.Jobs.Job ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] str x0, [fp, #0x28] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] str x0, [fp, #0x28] G_M000_IG04: ldr x0, [fp, #0x28] str x0, [fp, #0x38] ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 ldr x0, [fp, #0x38] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 276 634: JIT compiled BenchmarkDotNet.Jobs.JobExtensions:WithCore(BenchmarkDotNet.Jobs.Job,System.Action`1[BenchmarkDotNet.Jobs.Job]) [Tier0, IL size=43, code size=276] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:.ctor(BenchmarkDotNet.Characteristics.CharacteristicObject):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 635: JIT compiled BenchmarkDotNet.Jobs.Job:.ctor(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass28_0:b__0(BenchmarkDotNet.Jobs.Job):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 636: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass28_0:b__0(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=18, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:get_Run():BenchmarkDotNet.Jobs.RunMode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 637: JIT compiled BenchmarkDotNet.Jobs.Job:get_Run() [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Jobs.RunMode:set_InvocationCount(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] ldr x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 638: JIT compiled BenchmarkDotNet.Jobs.RunMode:set_InvocationCount(long) [Tier0, IL size=13, code size=72] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[long]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 639: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[long]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,long) [Tier0, IL size=9, code size=64] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x18] str x0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 640: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],long) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions:WithUnrollFactor(BenchmarkDotNet.Jobs.Job,int):BenchmarkDotNet.Jobs.Job ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x34] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 641: JIT compiled BenchmarkDotNet.Jobs.JobExtensions:WithUnrollFactor(BenchmarkDotNet.Jobs.Job,int) [Tier0, IL size=32, code size=188] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass29_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 642: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass29_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass29_0:b__0(BenchmarkDotNet.Jobs.Job):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 643: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass29_0:b__0(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=18, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions:WithEvaluateOverhead(BenchmarkDotNet.Jobs.Job,bool):BenchmarkDotNet.Jobs.Job ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x34] strb w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 644: JIT compiled BenchmarkDotNet.Jobs.JobExtensions:WithEvaluateOverhead(BenchmarkDotNet.Jobs.Job,bool) [Tier0, IL size=32, code size=188] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass58_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 645: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass58_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass58_0:b__0(BenchmarkDotNet.Jobs.Job):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldrb w1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 646: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass58_0:b__0(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=18, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.Job:get_Accuracy():BenchmarkDotNet.Jobs.AccuracyMode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 647: JIT compiled BenchmarkDotNet.Jobs.Job:get_Accuracy() [Tier0, IL size=12, code size=64] ; Assembly listing for method BenchmarkDotNet.Jobs.AccuracyMode:set_EvaluateOverhead(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr w2, [fp, #0x14] uxtb w2, w2 ldr x1, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 648: JIT compiled BenchmarkDotNet.Jobs.AccuracyMode:set_EvaluateOverhead(bool) [Tier0, IL size=13, code size=76] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[bool]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr w2, [fp, #0x1C] uxtb w2, w2 ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 649: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[bool]:set_Item(BenchmarkDotNet.Characteristics.CharacteristicObject,bool) [Tier0, IL size=9, code size=68] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr w0, [fp, #0x1C] strb w0, [x2, #0x08] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 650: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:SetValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],bool) [Tier0, IL size=14, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineFactory:CreateEngine(BenchmarkDotNet.Engines.EngineParameters,BenchmarkDotNet.Jobs.Job,System.Action`1[long],System.Action`1[long]):BenchmarkDotNet.Engines.Engine ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #224 stp fp, lr, [sp, #0x40] add fp, sp, #64 add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x98] str x1, [fp, #0x90] str x2, [fp, #0x88] str x3, [fp, #0x80] G_M000_IG02: ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x70] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x58] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x50] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x2C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] str x1, [sp, #0x38] ldr x1, [fp, #0x78] ldr x2, [fp, #0x70] ldr x3, [fp, #0x68] ldr x4, [fp, #0x60] ldr x5, [fp, #0x58] ldr x6, [fp, #0x88] ldr x7, [fp, #0x80] ldr x0, [fp, #0x90] str x0, [sp] ldr x0, [fp, #0x50] str x0, [sp, #0x08] ldr x0, [fp, #0x48] str x0, [sp, #0x10] ldr x0, [fp, #0x40] str x0, [sp, #0x18] ldr x0, [fp, #0x38] str x0, [sp, #0x20] ldr x0, [fp, #0x30] str x0, [sp, #0x28] ldr w0, [fp, #0x2C] str w0, [sp, #0x30] ldr x0, [fp, #0x20] movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr x0, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp, #0x40] add sp, sp, #224 ret lr ; Total bytes of code 576 651: JIT compiled BenchmarkDotNet.Engines.EngineFactory:CreateEngine(BenchmarkDotNet.Engines.EngineParameters,BenchmarkDotNet.Jobs.Job,System.Action`1[long],System.Action`1[long]) [Tier0, IL size=80, code size=576] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_Host():BenchmarkDotNet.Engines.IHost:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 652: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_Host() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_GlobalCleanupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 653: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_GlobalCleanupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_IterationSetupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x60] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 654: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_IterationSetupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_IterationCleanupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x68] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 655: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_IterationCleanupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_OperationsPerInvoke():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x78] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 656: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_OperationsPerInvoke() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_MeasureExtraStats():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x80] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 657: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_MeasureExtraStats() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_BenchmarkName():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x70] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 658: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_BenchmarkName() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:.ctor(BenchmarkDotNet.Engines.IHost,BenchmarkDotNet.Characteristics.IResolver,System.Action,System.Action,System.Action,System.Action`1[long],System.Action`1[long],BenchmarkDotNet.Jobs.Job,System.Action,System.Action,System.Action,System.Action,long,bool,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xE0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str xzr, [x9, #0x80] str x0, [fp, #0xD8] str x1, [fp, #0xD0] str x2, [fp, #0xC8] str x3, [fp, #0xC0] str x4, [fp, #0xB8] str x5, [fp, #0xB0] str x6, [fp, #0xA8] str x7, [fp, #0xA0] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] ldr x0, [fp, #0x98] mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD8] add x14, x14, #128 ldr x15, [fp, #0x98] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD8] add x14, x14, #8 ldr x15, [fp, #0xD0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #48 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #24 ldr x15, [fp, #0xC0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #32 ldr x15, [fp, #0xB8] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #40 ldr x15, [fp, #0xB0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #16 ldr x15, [fp, #0xA0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #56 ldr x15, [fp, #0xE0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #64 ldr x15, [fp, #0xE8] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #72 ldr x15, [fp, #0xF0] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #80 ldr x15, [fp, #0xF8] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #88 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] ldr x15, [fp, #0xD1FFAB1E] str x15, [x14, #0xA8] ldr x14, [fp, #0xD8] ldr w15, [fp, #0xD1FFAB1E] strb w15, [x14, #0xBB] ldr x14, [fp, #0xD8] add x14, x14, #112 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD8] add x14, x14, #96 ldr x15, [fp, #0xC8] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x90] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x3, [fp, #0x40] ldr x0, [fp, #0xE0] ldr x2, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 ldr x14, [fp, #0xD8] add x14, x14, #120 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x88] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x2, [fp, #0x38] ldr x1, [fp, #0x88] ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0xD8] strb w0, [x1, #0xB8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x1, [fp, #0x80] ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0xD8] str w0, [x1, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x1, [fp, #0x78] ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0xD8] str w0, [x1, #0xB4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x70] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x1, [fp, #0x70] ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0xD8] strb w0, [x1, #0xB9] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x68] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x68] ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0xD8] strb w0, [x1, #0xBA] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] ldr x1, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD8] add x14, x14, #144 ldr x15, [fp, #0x60] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr x1, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD8] add x14, x14, #136 ldr x15, [fp, #0x58] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr x1, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD8] add x14, x14, #152 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD8] add x14, x14, #160 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldp fp, lr, [sp], #0xE0 ret lr ; Total bytes of code 1224 659: JIT compiled BenchmarkDotNet.Engines.Engine:.ctor(BenchmarkDotNet.Engines.IHost,BenchmarkDotNet.Characteristics.IResolver,System.Action,System.Action,System.Action,System.Action`1[long],System.Action`1[long],BenchmarkDotNet.Jobs.Job,System.Action,System.Action,System.Action,System.Action,long,bool,System.String) [Tier0, IL size=333, code size=1224] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x14] tbz w0, #31, G_M000_IG03 mov w0, #22 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr w0, [fp, #0x14] cbnz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #47 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x18] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr w1, [fp, #0x14] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x18] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 188 660: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.ctor(int) [Tier0, IL size=47, code size=188] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Resolver():BenchmarkDotNet.Characteristics.IResolver:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x60] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 661: JIT compiled BenchmarkDotNet.Engines.Engine:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],BenchmarkDotNet.Characteristics.IResolver):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x1, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] str x2, [fp, #0x30] str x3, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x20] G_M000_IG05: ldr x0, [fp, #0x28] ldr x2, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x1, [fp, #0x40] ldr x2, [fp, #0x30] ldr x3, [fp, #0x18] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 144 662: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[System.__Canon](BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=144] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[System.__Canon](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str x1, [fp, #0x98] str x0, [fp, #0x90] str x1, [fp, #0x88] str x2, [fp, #0x80] str x3, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x58] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG05: ldr x0, [fp, #0x58] bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x60] str x14, [fp, #0x70] ldr x14, [fp, #0x70] add x14, x14, #8 ldr x15, [fp, #0x78] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x70] ldr x1, [x1, #0x08] ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG07 ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x90] ldr x0, [x0, #0x08] str x0, [fp, #0x48] ldr x0, [fp, #0x50] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x50] ldr x1, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x68] ldr x0, [fp, #0x68] cbz x0, G_M000_IG12 ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x38] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG10: ldr x0, [fp, #0x68] ldr x2, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x70] ldr x2, [x2, #0x08] ldr x0, [fp, #0x68] ldr x1, [fp, #0x80] ldr x3, [fp, #0x30] blr x3 G_M000_IG11: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x40] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 652 663: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[System.__Canon](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]) [Tier0, IL size=108, code size=652] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 664: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[System.__Canon]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[System.__Canon]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 665: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[System.__Canon]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[System.__Canon](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x1, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str x2, [fp, #0x50] str x3, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG04: ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x58] ldr x0, [x0, #0x10] ldr x0, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 388 666: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[System.__Canon](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[System.__Canon]) [Tier0, IL size=68, code size=388] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.__Canon]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 60 667: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[System.__Canon]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=60] ; Assembly listing for method BenchmarkDotNet.Environments.InfrastructureResolver+<>c:<.ctor>b__1_0():Perfolizer.Horology.IClock:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #70 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 668: JIT compiled BenchmarkDotNet.Environments.InfrastructureResolver+<>c:<.ctor>b__1_0() [Tier0, IL size=6, code size=56] ; Assembly listing for method Perfolizer.Horology.Chronometer:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbz w0, G_M000_IG04 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 388 669: JIT compiled Perfolizer.Horology.Chronometer:.cctor() [Tier0, IL size=76, code size=388] ; Assembly listing for method Perfolizer.Horology.StopwatchClock:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 670: JIT compiled Perfolizer.Horology.StopwatchClock:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Horology.DateTimeClock:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 671: JIT compiled Perfolizer.Horology.DateTimeClock:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Horology.WindowsClock:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #83 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 672: JIT compiled Perfolizer.Horology.WindowsClock:.ctor() [Tier0, IL size=7, code size=64] ; Assembly listing for method Perfolizer.Horology.WindowsClock:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 strb w0, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 64 673: JIT compiled Perfolizer.Horology.WindowsClock:.cctor() [Tier0, IL size=16, code size=64] ; Assembly listing for method Perfolizer.Horology.WindowsClock:Initialize(byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] add x1, sp, #80 str x1, [fp, #0x48] str x0, [fp, #0x40] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #83 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x40] str xzr, [x0] mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x40] bl Perfolizer.Horology.WindowsClock:QueryPerformanceFrequency(byref):bool cbz w0, G_M000_IG05 add x0, fp, #56 bl Perfolizer.Horology.WindowsClock:QueryPerformanceCounter(byref):bool str w0, [fp, #0x24] b G_M000_IG06 G_M000_IG05: str wzr, [fp, #0x24] G_M000_IG06: ldr w0, [fp, #0x24] uxtb w0, w0 str w0, [fp, #0x34] b G_M000_IG07 G_M000_IG07: ldr w0, [fp, #0x34] G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: stp fp, lr, [sp, #-0x20]! add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG10: str x0, [fp, #0x18] ldr x0, [fp, #0x40] str xzr, [x0] str wzr, [fp, #0x34] adr x0, [G_M000_IG07] G_M000_IG11: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 228 674: JIT compiled Perfolizer.Horology.WindowsClock:Initialize(byref) [Tier0, IL size=51, code size=228] ; Assembly listing for method (dynamicClass):IL_STUB_PInvoke(byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x70] stp x21, x22, [sp, #0x80] stp x23, x24, [sp, #0x90] stp x25, x26, [sp, #0xA0] stp x27, x28, [sp, #0xB0] mov fp, sp str x12, [fp, #0x60] str xzr, [fp, #0x68] mov x19, x0 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x20, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] add x0, fp, #32 str x0, [x20, #0x10] str x19, [fp, #0x68] ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] ldr x1, [x0] mov x0, x19 ldr x2, [fp, #0x60] str x2, [fp, #0x30] adr x2, [G_M000_IG04] str x2, [fp, #0x48] strb wzr, [x20, #0x0C] G_M000_IG03: blr x1 G_M000_IG04: mov w19, w0 mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG05 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG05: cmp w19, #0 cset x0, ne uxtb w0, w0 ldr x1, [fp, #0x28] str x1, [x20, #0x10] G_M000_IG06: ldp x27, x28, [sp, #0xB0] ldp x25, x26, [sp, #0xA0] ldp x23, x24, [sp, #0x90] ldp x21, x22, [sp, #0x80] ldp x19, x20, [sp, #0x70] ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 212 675: JIT compiled (dynamicClass):IL_STUB_PInvoke(byref) [FullOpts, IL size=40, code size=212] ; Assembly listing for method Perfolizer.Horology.WindowsClock:get_IsAvailable():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 676: JIT compiled Perfolizer.Horology.WindowsClock:get_IsAvailable() [Tier0, IL size=6, code size=36] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 677: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[bool](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[bool]):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 678: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[bool](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[bool]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[bool]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 679: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[bool]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[bool]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 680: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[bool]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[bool](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[bool]):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 681: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[bool](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[bool]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[bool]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x1, [fp, #0x18] strb w0, [x1, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 682: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[bool]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Environments.GcResolver+<>c:<.ctor>b__1_3():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 683: JIT compiled BenchmarkDotNet.Environments.GcResolver+<>c:<.ctor>b__1_3() [Tier0, IL size=2, code size=24] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 684: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 685: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 686: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 687: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 688: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=13, code size=100] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[bool]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 689: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[bool]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool]):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 690: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[bool](BenchmarkDotNet.Characteristics.Characteristic`1[bool]) [Tier0, IL size=13, code size=100] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[bool]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [x0] ldr x1, [fp, #0x28] strb w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w2, [x0] str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr x1, [fp, #0x40] ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr x3, [fp, #0x30] ldr x3, [x3, #0x18] blr x3 ldr x1, [fp, #0x28] strb w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 356 691: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[bool]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=356] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[bool]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,bool,bool]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 692: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[bool]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_10():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 693: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_10() [Tier0, IL size=2, code size=24] ; Assembly listing for method BenchmarkDotNet.Engines.EngineWarmupStage:.ctor(BenchmarkDotNet.Engines.IEngine):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 694: JIT compiled BenchmarkDotNet.Engines.EngineWarmupStage:.ctor(BenchmarkDotNet.Engines.IEngine) [Tier0, IL size=15, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.EngineStage:.ctor(BenchmarkDotNet.Engines.IEngine):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 695: JIT compiled BenchmarkDotNet.Engines.EngineStage:.ctor(BenchmarkDotNet.Engines.IEngine) [Tier0, IL size=14, code size=64] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage:.ctor(BenchmarkDotNet.Engines.IEngine):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xD0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] stp xzr, xzr, [x9, #0xA0] str x0, [fp, #0xC8] str x1, [fp, #0xC0] G_M000_IG02: ldr x0, [fp, #0xC8] ldr x1, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xA8] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x40] ldr x2, [fp, #0x40] ldr x1, [fp, #0xA8] ldr x0, [fp, #0xB0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x11, [fp, #0xC8] str w0, [x11, #0x28] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0xA0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x98] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x38] ldr x2, [fp, #0x38] ldr x1, [fp, #0x98] ldr x0, [fp, #0xA0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xC8] str d0, [x0, #0x30] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x88] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x1, [fp, #0x88] ldr x0, [fp, #0x90] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x11, [fp, #0xC8] str w0, [x11, #0x2C] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x1, [fp, #0x78] ldr x0, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xC8] str d0, [x0, #0x10] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x68] str x1, [fp, #0x70] ldr x0, [fp, #0xC8] ldp x1, x2, [fp, #0x68] stp x1, x2, [x0, #0x38] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x58] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x58] ldr x0, [fp, #0x60] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str d0, [fp, #0xB8] add x0, fp, #184 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xC8] str d0, [x0, #0x18] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x50] G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x48] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] ldr x3, [fp, #0x10] ldr x0, [fp, #0x50] ldr x2, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xB8] add x0, fp, #184 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xC8] str d0, [x0, #0x20] G_M000_IG04: ldp fp, lr, [sp], #0xD0 ret lr ; Total bytes of code 984 696: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage:.ctor(BenchmarkDotNet.Engines.IEngine) [Tier0, IL size=219, code size=984] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_TargetJob():BenchmarkDotNet.Jobs.Job:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 697: JIT compiled BenchmarkDotNet.Engines.Engine:get_TargetJob() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],BenchmarkDotNet.Characteristics.IResolver):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 698: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 699: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[Perfolizer.Horology.TimeInterval]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 700: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[Perfolizer.Horology.TimeInterval]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[Perfolizer.Horology.TimeInterval]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 701: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[Perfolizer.Horology.TimeInterval]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 702: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[Perfolizer.Horology.TimeInterval]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x0, [fp, #0x18] str d0, [x0, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 703: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[Perfolizer.Horology.TimeInterval]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_7():Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #80 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr d0, [x0] str d0, [fp, #0x10] ldr d0, [fp, #0x10] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 704: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_7() [Tier0, IL size=16, code size=88] ; Assembly listing for method Perfolizer.Horology.TimeInterval:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 436 705: JIT compiled Perfolizer.Horology.TimeInterval:.cctor() [Tier0, IL size=120, code size=436] ; Assembly listing for method Perfolizer.Horology.TimeUnit:ToInterval(long):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: str xzr, [fp, #0x18] ldr x0, [fp, #0x20] scvtf d0, x0 add x0, fp, #24 ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 706: JIT compiled Perfolizer.Horology.TimeUnit:ToInterval(long) [Tier0, IL size=9, code size=68] ; Assembly listing for method Perfolizer.Horology.TimeInterval:.ctor(double,Perfolizer.Horology.TimeUnit):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str d0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 scvtf d0, x0 ldr d16, [fp, #0x20] fmul d0, d0, d16 str d0, [fp, #0x10] ldr d0, [fp, #0x10] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 707: JIT compiled Perfolizer.Horology.TimeInterval:.ctor(double,Perfolizer.Horology.TimeUnit) [Tier0, IL size=16, code size=100] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,int):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str w0, [fp, #0x24] str d0, [fp, #0x28] G_M000_IG02: str xzr, [fp, #0x18] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x24] scvtf d16, w0 fmul d0, d0, d16 str d0, [fp, #0x10] ldr d0, [fp, #0x10] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 708: JIT compiled Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,int) [Tier0, IL size=16, code size=100] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 709: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 710: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 711: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_8():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, #4 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 712: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_8() [Tier0, IL size=2, code size=24] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[double](BenchmarkDotNet.Characteristics.Characteristic`1[double],BenchmarkDotNet.Characteristics.IResolver):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 713: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[double](BenchmarkDotNet.Characteristics.Characteristic`1[double],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[double](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[double]):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 714: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[double](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[double]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 715: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[double]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[double]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 716: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[double]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[double](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[double]):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 717: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[double](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[double]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[double]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x0, [fp, #0x18] str d0, [x0, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 718: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass1_0`1[double]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=17, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_6():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr d0, [@RWD00] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr RWD00 dq 3F947AE147AE147Bh ; 0.02 ; Total bytes of code 24 719: JIT compiled BenchmarkDotNet.Engines.EngineResolver+<>c:<.ctor>b__7_6() [Tier0, IL size=10, code size=24] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValueAsNullable[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]):System.Nullable`1[Perfolizer.Horology.TimeInterval]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x38] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movi v16.4s, #0 str q16, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: movi v16.4s, #0 str q16, [fp, #0x20] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0x18] add x0, fp, #32 ldr d0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 164 720: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValueAsNullable[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]) [Tier0, IL size=32, code size=164] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 721: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]:get_Item(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=8, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]):Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 722: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:GetValue[Perfolizer.Horology.TimeInterval](BenchmarkDotNet.Characteristics.Characteristic`1[Perfolizer.Horology.TimeInterval]) [Tier0, IL size=13, code size=100] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToNanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr d1, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 723: JIT compiled Perfolizer.Horology.TimeInterval:ToNanoseconds() [Tier0, IL size=17, code size=64] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_Division(Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str d0, [fp, #0x28] str d1, [fp, #0x20] G_M000_IG02: add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 fmov d16, #1.0000 fmul d16, d0, d16 str d16, [fp, #0x18] add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x18] fdiv d0, d16, d0 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 724: JIT compiled Perfolizer.Horology.TimeInterval:op_Division(Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval) [Tier0, IL size=26, code size=92] ; Assembly listing for method Perfolizer.Horology.ClockExtensions:GetResolution(Perfolizer.Horology.IClock):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x10] add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 725: JIT compiled Perfolizer.Horology.ClockExtensions:GetResolution(Perfolizer.Horology.IClock) [Tier0, IL size=15, code size=76] ; Assembly listing for method Perfolizer.Horology.WindowsClock:get_Frequency():Perfolizer.Horology.Frequency:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: str xzr, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] scvtf d0, x0 add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 726: JIT compiled Perfolizer.Horology.WindowsClock:get_Frequency() [Tier0, IL size=12, code size=72] ; Assembly listing for method Perfolizer.Horology.Frequency:.ctor(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr d16, [fp, #0x10] str d16, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 727: JIT compiled Perfolizer.Horology.Frequency:.ctor(double) [Tier0, IL size=8, code size=36] ; Assembly listing for method Perfolizer.Horology.Frequency:ToResolution():Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x1, [x0] str x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d1, [fp, #0x18] ldr d0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 728: JIT compiled Perfolizer.Horology.Frequency:ToResolution() [Tier0, IL size=17, code size=96] ; Assembly listing for method Perfolizer.Horology.Frequency:get_Hertz():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 729: JIT compiled Perfolizer.Horology.Frequency:get_Hertz() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_Division(Perfolizer.Horology.TimeInterval,double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str d0, [fp, #0x28] str d1, [fp, #0x20] G_M000_IG02: str xzr, [fp, #0x18] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x20] fdiv d0, d0, d16 str d0, [fp, #0x10] ldr d0, [fp, #0x10] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 730: JIT compiled Perfolizer.Horology.TimeInterval:op_Division(Perfolizer.Horology.TimeInterval,double) [Tier0, IL size=15, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.EngineActualStage:.ctor(BenchmarkDotNet.Engines.IEngine):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str x0, [fp, #0x98] str x1, [fp, #0x90] G_M000_IG02: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x11, [fp, #0x98] str x0, [x11, #0x24] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x1, [fp, #0x80] ldr x0, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x98] str d0, [x0, #0x10] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x70] str x1, [fp, #0x78] ldr x0, [fp, #0x98] ldp x1, x2, [fp, #0x70] stp x1, x2, [x0, #0x30] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x60] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x1, [fp, #0x60] ldr x0, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x11, [fp, #0x98] str w0, [x11, #0x18] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x50] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x50] ldr x0, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x11, [fp, #0x98] str w0, [x11, #0x1C] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x40] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x40] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [fp, #0x98] str w0, [x1, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 728 731: JIT compiled BenchmarkDotNet.Engines.EngineActualStage:.ctor(BenchmarkDotNet.Engines.IEngine) [Tier0, IL size=164, code size=728] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValueAsNullable[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]):System.Nullable`1[int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 str xzr, [fp, #0x28] ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: str xzr, [fp, #0x20] ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] add x0, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 144 732: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValueAsNullable[int](BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=32, code size=144] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x3, [fp, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 733: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=9, code size=84] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x50] str x14, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #8 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x60] ldr x1, [x1, #0x08] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x60] ldr x2, [x2, #0x08] ldr x0, [fp, #0x58] ldr x1, [fp, #0x70] ldr x3, [fp, #0x30] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 540 734: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=108, code size=540] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 735: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 736: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass4_0`1[int]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] add x2, fp, #64 ldr x1, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG06 ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 384 737: JIT compiled BenchmarkDotNet.Characteristics.Resolver:Resolve[int](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[int]) [Tier0, IL size=68, code size=384] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 738: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=18, code size=100] ; Assembly listing for method BenchmarkDotNet.Engines.EngineResolver:<.ctor>b__7_11(BenchmarkDotNet.Characteristics.CharacteristicObject):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x68] str x1, [fp, #0x60] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x60] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x60] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0x5C] ldr w0, [fp, #0x5C] cbz w0, G_M000_IG06 ldr w0, [fp, #0x5C] sub w0, w0, #1 cmp w0, #1 bls G_M000_IG08 G_M000_IG05: b G_M000_IG10 G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: add x0, fp, #48 mov w1, #21 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 404 739: JIT compiled BenchmarkDotNet.Engines.EngineResolver:<.ctor>b__7_11(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=87, code size=404] ; Assembly listing for method BenchmarkDotNet.Engines.EngineFactory:Jit(BenchmarkDotNet.Engines.Engine,int,int,int):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #232 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x28] ldr x1, [x1, #0x18] blr x1 stp xzr, xzr, [fp, #0xE8] stp xzr, xzr, [fp, #0xF8] ldr w4, [fp, #0xD1FFAB1E] sxtw x4, w4 add x0, fp, #232 ldr w5, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] mov w1, wzr mov w2, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x80] ldp x0, x1, [fp, #0xE8] stp x0, x1, [fp, #0x88] ldp x0, x1, [fp, #0xF8] stp x0, x1, [fp, #0x98] ldr x0, [fp, #0x80] add x1, fp, #136 add x8, fp, #200 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: add x0, fp, #104 ldp q16, q17, [x0, #0x60] stp q16, q17, [fp, #0x60] G_M000_IG04: add x0, fp, #96 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] ldr x1, [x1, #0x18] blr x1 stp xzr, xzr, [fp, #0xA8] stp xzr, xzr, [fp, #0xB8] ldr w4, [fp, #0xD1FFAB1E] sxtw x4, w4 add x0, fp, #168 ldr w5, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] mov w1, #1 mov w2, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x38] G_M000_IG05: add x0, fp, #104 ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG06: ldr x0, [fp, #0x38] add x1, fp, #64 add x8, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x30] ldr d0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG07: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 580 740: JIT compiled BenchmarkDotNet.Engines.EngineFactory:Jit(BenchmarkDotNet.Engines.Engine,int,int,int) [Tier0, IL size=92, code size=580] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Dummy1Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 741: JIT compiled BenchmarkDotNet.Engines.Engine:get_Dummy1Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:Dummy1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] G_M000_IG03: str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1300 742: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:Dummy1() [Tier0, IL size=897, code size=1300] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:.ctor(int,int,int,long,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] str w3, [fp, #0x2C] str x4, [fp, #0x20] str w5, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] str w1, [x0] ldr x0, [fp, #0x38] ldr w1, [fp, #0x30] str w1, [x0, #0x04] ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] str w1, [x0, #0x08] ldr x0, [fp, #0x38] ldr x1, [fp, #0x20] str x1, [x0, #0x10] ldr x0, [fp, #0x38] ldr w1, [fp, #0x1C] str w1, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 100 743: JIT compiled BenchmarkDotNet.Engines.IterationData:.ctor(int,int,int,long,int) [Tier0, IL size=38, code size=100] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:RunIteration(BenchmarkDotNet.Engines.IterationData):BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp, #0xD1FFAB1E] add fp, sp, #0xD1FFAB1E movi v16.16b, #0 sub x9, fp, #0xD1FFAB1E sub x10, fp, #88 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E str x2, [fp, xip1] str x0, [fp, #-0x08] str x1, [fp, #-0x18] str x8, [fp, #-0x10] G_M000_IG02: ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #-0x20] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0x24] ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #-0x20] mul x0, x0, x1 str x0, [fp, #-0x30] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 cset x0, eq str w0, [fp, #-0x34] ldr w0, [fp, #-0x34] cbnz w0, G_M000_IG03 ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0xB0] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #-0xB0] G_M000_IG04: ldr w0, [fp, #-0xB0] uxtb w0, w0 str w0, [fp, #-0x38] ldr w0, [fp, #-0x34] cbnz w0, G_M000_IG05 ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #-0xB8] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #-0xB8] G_M000_IG06: ldr x0, [fp, #-0xB8] str x0, [fp, #-0x40] ldr w0, [fp, #-0x34] cbnz w0, G_M000_IG07 ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] ldr x0, [x0, #0x08] movn xip1, #0xD1FFAB1E ldr x1, [fp, xip1] ldr x1, [x1, #0x18] blr x1 G_M000_IG07: ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movn xip1, #0xD1FFAB1E str x0, [fp, xip1] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str w0, [fp, xip1] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str w0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr w2, [fp, xip1] movn xip1, #0xD1FFAB1E ldr w1, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] ldr x3, [fp, #-0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 G_M000_IG08: ldr w0, [fp, #-0x38] cbz w0, G_M000_IG13 ldr x0, [fp, #-0x08] ldr x0, [x0, #0xA0] movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] mov w1, #32 movn xip1, #0xD1FFAB1E ldr x2, [fp, xip1] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x28] blr x2 str w0, [fp, #-0xAC] ldr w1, [fp, #-0xAC] mov w1, w1 tst x1, x1 beq G_M000_IG10 add x1, x1, #15 and x1, x1, #-16 G_M000_IG09: stp xzr, xzr, [sp, #-0x10]! subs x1, x1, #16 bne G_M000_IG09 mov x1, sp G_M000_IG10: sub x0, fp, #0xD1FFAB1E ldr w2, [fp, #-0xAC] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG11: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #-0xA8] G_M000_IG12: b G_M000_IG15 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #-0xC8] str x1, [fp, #-0xC0] G_M000_IG14: ldp x0, x1, [fp, #-0xC8] stp x0, x1, [fp, #-0xA8] G_M000_IG15: ldp x0, x1, [fp, #-0xA8] stp x0, x1, [fp, #-0x50] G_M000_IG16: ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #-0xD8] str x1, [fp, #-0xD0] G_M000_IG17: ldp x0, x1, [fp, #-0xD8] stp x0, x1, [fp, #-0x60] G_M000_IG18: ldr x1, [fp, #-0x20] ldr w0, [fp, #-0x24] sxtw x0, w0 cmp x0, #0 beq G_M000_IG28 cmn x0, #1 bne G_M000_IG19 cmp x1, #1 bvs G_M000_IG27 G_M000_IG19: sdiv x1, x1, x0 ldr x0, [fp, #-0x40] ldr x0, [x0, #0x08] ldr x2, [fp, #-0x40] ldr x2, [x2, #0x18] blr x2 sub x0, fp, #96 sub x8, fp, #120 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #-0xF0] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0xF4] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str w0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr w2, [fp, xip1] ldr w1, [fp, #-0xF4] ldr x0, [fp, #-0xF0] ldr x3, [fp, #-0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 G_M000_IG20: ldr w0, [fp, #-0x34] cbnz w0, G_M000_IG21 ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] ldr x0, [x0, #0x08] movn xip1, #0xD1FFAB1E ldr x1, [fp, xip1] ldr x1, [x1, #0x18] blr x1 G_M000_IG21: ldr w0, [fp, #-0x38] cbz w0, G_M000_IG22 ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldr x0, [fp, #-0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0xDC] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0xE0] ldr x0, [fp, #-0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #-0xE4] sub x0, fp, #120 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str d0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr d0, [fp, xip1] sub x0, fp, #152 ldr w2, [fp, #-0xDC] ldr w3, [fp, #-0xE0] ldr w4, [fp, #-0xE4] ldr x5, [fp, #-0x30] mov w1, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 sub x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x1, [fp, xip1] ldr x0, [fp, #-0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG23 ldr x0, [fp, #-0x08] ldr x0, [x0, #0x80] movn xip1, #0xD1FFAB1E str x0, [fp, xip1] ldp x0, x1, [fp, #-0x98] stp x0, x1, [fp, #0xD1FFAB1E] ldp x0, x1, [fp, #-0x88] stp x0, x1, [fp, #0xD1FFAB1E] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] sub x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG23: sub x1, fp, #80 ldr x0, [fp, #-0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #-0x10] G_M000_IG24: sub x1, fp, #152 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG25: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E ldr xip1, [fp, xip1] cmp xip0, xip1 beq G_M000_IG26 bl CORINFO_HELP_FAIL_FAST G_M000_IG26: sub sp, fp, #0xD1FFAB1E ldp fp, lr, [sp, #0xD1FFAB1E] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG27: bl CORINFO_HELP_OVERFLOW G_M000_IG28: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 1768 744: JIT compiled BenchmarkDotNet.Engines.Engine:RunIteration(BenchmarkDotNet.Engines.IterationData) [Tier0, IL size=361, code size=1768] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_InvokeCount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 745: JIT compiled BenchmarkDotNet.Engines.IterationData:get_InvokeCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_UnrollFactor():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 746: JIT compiled BenchmarkDotNet.Engines.IterationData:get_UnrollFactor() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_OperationsPerInvoke():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0xA8] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 747: JIT compiled BenchmarkDotNet.Engines.Engine:get_OperationsPerInvoke() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_IterationMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 748: JIT compiled BenchmarkDotNet.Engines.IterationData:get_IterationMode() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_OverheadAction():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 749: JIT compiled BenchmarkDotNet.Engines.Engine:get_OverheadAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:GcCollect():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 750: JIT compiled BenchmarkDotNet.Engines.Engine:GcCollect() [Tier0, IL size=15, code size=76] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_ForceGcCleanups():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0xB8] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 751: JIT compiled BenchmarkDotNet.Engines.Engine:get_ForceGcCleanups() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:ForceGcCollect() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 76 752: JIT compiled BenchmarkDotNet.Engines.Engine:ForceGcCollect() [Tier0, IL size=16, code size=76] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 753: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 754: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToUpperConversion](ulong,ulong,ulong):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] G_M000_IG02: str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG03 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 cset x0, eq str w0, [fp, #0x48] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x48] G_M000_IG04: ldr w0, [fp, #0x48] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 cset x0, eq ldr w1, [fp, #0xD1FFAB1E] and w0, w0, w1 str w0, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] mov w0, #16 mov w1, #2 udiv w0, w0, w1 str w0, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w1, w1 cmp x0, x1 blo G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] ldr q0, [x0] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG12 mov w0, #1 mov w1, #2 lsl w1, w1, #3 sub w1, w1, #1 lsl w0, w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG06 mov w0, #65 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr w0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG07 G_M000_IG06: mov w0, #97 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr w0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] G_M000_IG07: ldr w0, [fp, #0x2C] dup v16.8h, w0 str q16, [fp, #0xD1FFAB1E] mov w0, #26 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr w0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 dup v16.8h, w0 str q16, [fp, #0xD1FFAB1E] mov w0, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 dup v0.8h, w0 str q0, [fp, #0xF0] ldr q0, [fp, #0xD1FFAB1E] ldr q1, [fp, #0xD1FFAB1E] sub v0.8h, v0.8h, v1.8h ldr q1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0xE0] ldr q0, [fp, #0xE0] ldr q16, [fp, #0xF0] and v0.8h, v0.8h, v16.8h ldr q16, [fp, #0xD1FFAB1E] eor v0.8h, v16.8h, v0.8h str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] lsl w0, w0, #1 str w0, [fp, #0xDC] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0x10] ldr w0, [fp, #0x10] ldr w1, [fp, #0xDC] cmp w1, #0 beq G_M000_IG44 udiv w0, w0, w1 ldr w1, [fp, #0xDC] mul w0, w0, w1 ldr w1, [fp, #0x10] sub w0, w1, w0 lsr w0, w0, #1 ldr w1, [fp, #0xD1FFAB1E] sub w0, w1, w0 mov w0, w0 str x0, [fp, #0xD1FFAB1E] G_M000_IG08: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] sub x0, x0, x1 ldr w1, [fp, #0xD1FFAB1E] mov w1, w1 cmp x0, x1 bhs G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] cmp x0, x1 beq G_M000_IG42 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w1, w1 sub x0, x0, x1 str x0, [fp, #0xD1FFAB1E] G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 ldr q0, [x0, x1] str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG12 ldr q0, [fp, #0xD1FFAB1E] ldr q1, [fp, #0xD1FFAB1E] sub v0.8h, v0.8h, v1.8h ldr q1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str q0, [fp, #0xE0] ldr q0, [fp, #0xE0] ldr q16, [fp, #0xF0] and v0.8h, v0.8h, v16.8h ldr q16, [fp, #0xD1FFAB1E] eor v0.8h, v16.8h, v0.8h str q0, [fp, #0xD1FFAB1E] ldr q0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] b G_M000_IG08 G_M000_IG12: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG14 G_M000_IG13: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG14: mov w0, #8 mov w1, #2 udiv w0, w0, w1 sxtw x0, w0 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] sub x1, x1, x2 cmp x0, x1 bhi G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD0] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG17 ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG24 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG15 ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] G_M000_IG16: ldr x0, [fp, #0x30] str x0, [fp, #0xD0] b G_M000_IG20 G_M000_IG17: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG24 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG18 ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] b G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] G_M000_IG19: ldr x0, [fp, #0x38] str x0, [fp, #0xD0] G_M000_IG20: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG21 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 ldr x1, [fp, #0xD0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG23 G_M000_IG21: ldr x0, [fp, #0xD0] ins v16.d[0], x0 str q16, [fp, #0xC0] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG22 ldr q16, [fp, #0xC0] uxtl v16.8h, v16.8b ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 str q16, [x0, x1] b G_M000_IG23 G_M000_IG22: ldr q16, [fp, #0xC0] str q16, [fp, #0xB0] ldr q16, [fp, #0xB0] xtn v16.8b, v16.8h ldr q17, [fp, #0xB0] xtn2 v16.16b, v17.8h str q16, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 ldr q16, [fp, #0xA0] umov w1, v16.s[0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG23: mov w0, #8 mov w1, #2 udiv w0, w0, w1 sxtw x0, w0 ldr x1, [fp, #0xD1FFAB1E] add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] G_M000_IG24: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG26 G_M000_IG25: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG26: mov w0, #4 mov w1, #2 udiv w0, w0, w1 sxtw x0, w0 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] sub x1, x1, x2 cmp x0, x1 bhi G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x9C] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG29 ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG39 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG27 ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x40] b G_M000_IG28 G_M000_IG27: ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x40] G_M000_IG28: ldr w0, [fp, #0x40] str w0, [fp, #0x9C] b G_M000_IG32 G_M000_IG29: ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG39 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG30 ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x44] b G_M000_IG31 G_M000_IG30: ldr w0, [fp, #0x9C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x44] G_M000_IG31: ldr w0, [fp, #0x44] str w0, [fp, #0x9C] G_M000_IG32: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG33 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 ldr w1, [fp, #0x9C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG35 G_M000_IG33: ldr w0, [fp, #0x9C] ins v16.s[0], w0 str q16, [fp, #0x80] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG34 ldr q16, [fp, #0x80] uxtl v16.8h, v16.8b str q16, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 ldr q16, [fp, #0x70] umov x1, v16.d[0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG35 G_M000_IG34: ldr q16, [fp, #0x80] str q16, [fp, #0x60] ldr q16, [fp, #0x60] xtn v16.8b, v16.8h ldr q17, [fp, #0x60] xtn2 v16.16b, v17.8h str q16, [fp, #0x50] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 add x0, x0, x1 ldr q16, [fp, #0x50] umov w1, v16.h[0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG35: mov w0, #4 mov w1, #2 udiv w0, w0, w1 sxtw x0, w0 ldr x1, [fp, #0xD1FFAB1E] add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] b G_M000_IG39 G_M000_IG36: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] lsl x1, x1, #1 ldrh w0, [x0, x1] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x4C] ldr w0, [fp, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG42 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG37 ldr w0, [fp, #0x4C] mov w1, #97 mov w2, #122 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG38 ldr w0, [fp, #0x4C] sub w0, w0, #32 str w0, [fp, #0x4C] b G_M000_IG38 G_M000_IG37: ldr w0, [fp, #0x4C] mov w1, #65 mov w2, #90 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG38 ldr w0, [fp, #0x4C] add w0, w0, #32 str w0, [fp, #0x4C] G_M000_IG38: ldr w0, [fp, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] lsl x2, x2, #1 strh w0, [x1, x2] ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 mov w1, w1 add x0, x0, x1 str x0, [fp, #0xD1FFAB1E] G_M000_IG39: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG41 G_M000_IG40: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] cmp x0, x1 blo G_M000_IG36 G_M000_IG42: ldr x0, [fp, #0xD1FFAB1E] G_M000_IG43: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG44: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 2340 755: JIT compiled System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToUpperConversion](ulong,ulong,ulong) [Tier0, IL size=1153, code size=2340] ; Assembly listing for method System.Text.Ascii:VectorContainsNonAsciiChar[ushort](System.Runtime.Intrinsics.Vector128`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str q0, [fp, #0x10] G_M000_IG02: ldr q0, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 756: JIT compiled System.Text.Ascii:VectorContainsNonAsciiChar[ushort](System.Runtime.Intrinsics.Vector128`1[ushort]) [Tier0, IL size=51, code size=44] ; Assembly listing for method System.UInt16:CreateTruncating[int](int):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: b G_M000_IG03 G_M000_IG03: add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr w0, [fp, #0x10] uxth w0, w0 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 757: JIT compiled System.UInt16:CreateTruncating[int](int) [Tier0, IL size=74, code size=116] ; Assembly listing for method System.UInt16:CreateTruncating[ushort](ushort):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: b G_M000_IG03 G_M000_IG03: ldr w0, [fp, #0x1C] uxth w0, w0 add x1, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 ldr w0, [fp, #0x1C] uxth w0, w0 add x1, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr w0, [fp, #0x10] uxth w0, w0 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 124 758: JIT compiled System.UInt16:CreateTruncating[ushort](ushort) [Tier0, IL size=74, code size=124] ; Assembly listing for method (dynamicClass):InvokeStub_EventSourceAttribute.set_Name(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 759: JIT compiled (dynamicClass):InvokeStub_EventSourceAttribute.set_Name(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method System.Number:TryParseBinaryIntegerStyle[ushort](System.ReadOnlySpan`1[ushort],int,System.Globalization.NumberFormatInfo,byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp add x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] str xzr, [x9, #0xA0] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str x3, [fp, #0xD1FFAB1E] str x4, [fp, #0xF8] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG52 str wzr, [fp, #0xF4] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bls G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldrh w0, [x0] str w0, [fp, #0xF0] ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #1 cbz w0, G_M000_IG06 ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 G_M000_IG03: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #48 mov w1, #37 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 G_M000_IG06: str wzr, [fp, #0xEC] ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #4 cbz w0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 ldr w0, [fp, #0xF0] cmp w0, #45 bne G_M000_IG07 mov w0, #1 str w0, [fp, #0xEC] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG07: ldr w0, [fp, #0xF0] cmp w0, #43 bne G_M000_IG17 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG09 ldr w0, [fp, #0xF0] cmp w0, #45 bne G_M000_IG09 mov w0, #1 str w0, [fp, #0xEC] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG09: add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xF4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] str x1, [fp, #0x80] G_M000_IG10: ldp x0, x1, [fp, #0x78] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG11: str wzr, [fp, #0xF4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD0] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG14 G_M000_IG12: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x38] G_M000_IG13: ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] str x1, [fp, #0x50] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x48] ldr x3, [fp, #0x50] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG14 ldr x0, [fp, #0xD8] ldr w0, [x0, #0x08] ldr w1, [fp, #0xF4] add w0, w0, w1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG17 G_M000_IG14: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG17 G_M000_IG15: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x58] G_M000_IG16: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] str x1, [fp, #0x70] ldr x0, [fp, #0x58] ldr x1, [fp, #0x60] ldr x2, [fp, #0x68] ldr x3, [fp, #0x70] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG17 mov w0, #1 str w0, [fp, #0xEC] ldr x0, [fp, #0xD0] ldr w0, [x0, #0x08] ldr w1, [fp, #0xF4] add w0, w0, w1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG52 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq ldr w1, [fp, #0xEC] and w0, w0, w1 str w0, [fp, #0xE8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG52 ldr w0, [fp, #0xF0] cmp w0, #48 bne G_M000_IG21 G_M000_IG18: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG20: ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG43 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] cmp w0, #48 beq G_M000_IG18 ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG21 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG56 str wzr, [fp, #0xE8] b G_M000_IG56 G_M000_IG21: ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] str wzr, [fp, #0xCC] b G_M000_IG24 G_M000_IG22: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blo G_M000_IG23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG43 b G_M000_IG40 G_M000_IG23: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG56 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE4] ldr w0, [fp, #0xCC] add w0, w0, #1 str w0, [fp, #0xCC] G_M000_IG24: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG26 G_M000_IG25: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sub w0, w0, #2 ldr w1, [fp, #0xCC] cmp w0, w1 bgt G_M000_IG22 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blo G_M000_IG27 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG43 b G_M000_IG40 G_M000_IG27: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG56 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG31 ldr w0, [fp, #0xE8] str w0, [fp, #0x94] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x28] ldr w1, [fp, #0x28] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG29 ldr w0, [fp, #0x94] str w0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG28 ldr w0, [fp, #0x88] str w0, [fp, #0x90] ldr w0, [fp, #0xF0] cmp w0, #53 cset x0, gt str w0, [fp, #0x8C] b G_M000_IG30 G_M000_IG28: ldr w0, [fp, #0x88] str w0, [fp, #0x90] str wzr, [fp, #0x8C] b G_M000_IG30 G_M000_IG29: ldr w0, [fp, #0x94] str w0, [fp, #0x90] mov w0, #1 str w0, [fp, #0x8C] G_M000_IG30: ldr w0, [fp, #0x90] ldr w1, [fp, #0x8C] orr w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xE8] b G_M000_IG32 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x20] ldr w1, [fp, #0x20] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE8] G_M000_IG32: ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE4] ldr w0, [fp, #0xF0] sub w0, w0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr w0, [fp, #0xE4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xE4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG35 ldr w0, [fp, #0xE8] str w0, [fp, #0xB0] ldr w0, [fp, #0xE4] str w0, [fp, #0xAC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0xA8] ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG33 ldr w0, [fp, #0xB0] str w0, [fp, #0xA4] ldr w0, [fp, #0xAC] str w0, [fp, #0xA0] ldr w0, [fp, #0xA8] str w0, [fp, #0x9C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x98] b G_M000_IG34 G_M000_IG33: ldr w0, [fp, #0xB0] str w0, [fp, #0xA4] ldr w0, [fp, #0xAC] str w0, [fp, #0xA0] ldr w0, [fp, #0xA8] str w0, [fp, #0x9C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x98] G_M000_IG34: ldr w0, [fp, #0x9C] ldr w1, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr w0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xA4] orr w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xE8] G_M000_IG35: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG40 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] b G_M000_IG37 G_M000_IG36: mov w0, #1 str w0, [fp, #0xE8] ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG55 ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0xF0] G_M000_IG37: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG39 G_M000_IG38: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG39: ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG36 b G_M000_IG56 G_M000_IG40: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG42 G_M000_IG41: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG42: ldr w0, [fp, #0xE8] cbnz w0, G_M000_IG55 G_M000_IG43: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG44 ldr x0, [fp, #0xF8] ldr w1, [fp, #0xE4] strh w1, [x0] b G_M000_IG47 G_M000_IG44: ldr x0, [fp, #0xF8] str x0, [fp, #0xC0] ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG45 ldr x0, [fp, #0xC0] str x0, [fp, #0xB8] ldr w0, [fp, #0xE4] str w0, [fp, #0xB4] b G_M000_IG46 G_M000_IG45: ldr x0, [fp, #0xC0] str x0, [fp, #0xB8] ldr w0, [fp, #0xE4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xB4] G_M000_IG46: ldr x0, [fp, #0xB8] ldr w1, [fp, #0xB4] strh w1, [x0] G_M000_IG47: str wzr, [fp, #0xE0] G_M000_IG48: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG50 G_M000_IG49: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG50: ldr w0, [fp, #0xE0] G_M000_IG51: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG52: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG54 G_M000_IG53: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG54: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0xF8] strh w0, [x1] mov w0, #1 str w0, [fp, #0xE0] b G_M000_IG48 G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0xF8] strh w0, [x1] mov w0, #2 str w0, [fp, #0xE0] b G_M000_IG48 G_M000_IG56: ldr w0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG62 ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #2 cbz w0, G_M000_IG52 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] b G_M000_IG58 G_M000_IG57: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF4] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG61 ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] G_M000_IG58: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG60 G_M000_IG59: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG60: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG57 G_M000_IG61: ldr w0, [fp, #0xF4] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG40 G_M000_IG62: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xF4] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG40 b G_M000_IG52 G_M000_IG63: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 3308 760: JIT compiled System.Number:TryParseBinaryIntegerStyle[ushort](System.ReadOnlySpan`1[ushort],int,System.Globalization.NumberFormatInfo,byref) [Tier0, IL size=1142, code size=3308] ; Assembly listing for method System.UInt16:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 761: JIT compiled System.UInt16:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned() [Tier0, IL size=2, code size=20] ; Assembly listing for method System.UInt16:System.IBinaryIntegerParseAndFormatInfo.get_MaxDigitCount():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #5 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 762: JIT compiled System.UInt16:System.IBinaryIntegerParseAndFormatInfo.get_MaxDigitCount() [Tier0, IL size=2, code size=20] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Level(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 763: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Level(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Task(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 764: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Task(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method (dynamicClass):InvokeStub_EventAttribute.set_Opcode(System.Object,System.Object,ulong):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 G_M000_IG02: ldr x1, [x2] ldr w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 765: JIT compiled (dynamicClass):InvokeStub_EventAttribute.set_Opcode(System.Object,System.Object,ulong) [FullOpts, IL size=25, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_IterationStage():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 766: JIT compiled BenchmarkDotNet.Engines.IterationData:get_IterationStage() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:IterationStart(int,int,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str wzr, [fp, #0x34] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str w1, [fp, #0x44] str w2, [fp, #0x40] str x3, [fp, #0x38] G_M000_IG02: ldr w0, [fp, #0x40] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cmp w0, #3 bhi G_M000_IG03 ldr w0, [fp, #0x34] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG11 G_M000_IG04: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG05 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG05: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG06: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG07: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG08 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG08: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG09: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG10 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG10: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x40] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x2, [fp, #0x28] ldr x0, [fp, #0x20] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 516 767: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:IterationStart(int,int,long) [Tier0, IL size=125, code size=516] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:OverheadJittingStart(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 768: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:OverheadJittingStart(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Clock():Perfolizer.Horology.IClock:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x78] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 769: JIT compiled BenchmarkDotNet.Engines.Engine:get_Clock() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.ClockExtensions:Start(Perfolizer.Horology.IClock):Perfolizer.Horology.StartedClock ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: stp xzr, xzr, [fp, #0x18] ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] ldr x2, [fp, #0x10] add x0, fp, #24 ldr x1, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 770: JIT compiled Perfolizer.Horology.ClockExtensions:Start(Perfolizer.Horology.IClock) [Tier0, IL size=13, code size=96] ; Assembly listing for method Perfolizer.Horology.WindowsClock:GetTimestamp():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: add x0, fp, #16 bl Perfolizer.Horology.WindowsClock:QueryPerformanceCounter(byref):bool ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 771: JIT compiled Perfolizer.Horology.WindowsClock:GetTimestamp() [Tier0, IL size=10, code size=36] ; Assembly listing for method Perfolizer.Horology.StartedClock:.ctor(Perfolizer.Horology.IClock,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x28] ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] str x1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 52 772: JIT compiled Perfolizer.Horology.StartedClock:.ctor(Perfolizer.Horology.IClock,long) [Tier0, IL size=15, code size=52] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:OverheadActionNoUnroll(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x21, xzr cmp x20, #0 ble G_M000_IG04 G_M000_IG03: ldr x22, [x19, #0x40] ldr x1, [x19, #0x30] ldr x0, [x1, #0x08] ldr x1, [x1, #0x18] blr x1 dmb ish str w0, [x22, #0x40] add x21, x21, #1 cmp x21, x20 blt G_M000_IG03 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 773: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:OverheadActionNoUnroll(long) [Tier1, IL size=37, code size=92] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:__Overhead():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 774: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:__Overhead() [Tier0, IL size=2, code size=24] ; Assembly listing for method Perfolizer.Horology.StartedClock:GetElapsed():Perfolizer.Horology.ClockSpan:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x8, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x38] ldr x0, [fp, #0x48] ldr x0, [x0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x30] stp xzr, xzr, [fp, #0x18] str xzr, [fp, #0x28] ldr x0, [fp, #0x48] ldr x0, [x0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x10] add x0, fp, #24 ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] ldr d0, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x40] ldp x1, x2, [fp, #0x18] stp x1, x2, [x0] ldr x1, [fp, #0x28] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 164 775: JIT compiled Perfolizer.Horology.StartedClock:GetElapsed() [Tier0, IL size=34, code size=164] ; Assembly listing for method Perfolizer.Horology.ClockSpan:.ctor(long,long,Perfolizer.Horology.Frequency):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] str x1, [x0] ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] str x1, [x0, #0x08] ldr x0, [fp, #0x28] ldr x1, [fp, #0x10] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 776: JIT compiled Perfolizer.Horology.ClockSpan:.ctor(long,long,Perfolizer.Horology.Frequency) [Tier0, IL size=22, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:IterationStop(int,int,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str wzr, [fp, #0x34] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str w1, [fp, #0x44] str w2, [fp, #0x40] str x3, [fp, #0x38] G_M000_IG02: ldr w0, [fp, #0x40] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cmp w0, #3 bhi G_M000_IG03 ldr w0, [fp, #0x34] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG11 G_M000_IG04: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG05 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG05: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG06: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG07: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG08 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG08: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG09: ldr w0, [fp, #0x44] cbnz w0, G_M000_IG10 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG10: ldr w0, [fp, #0x44] cmp w0, #1 bne G_M000_IG11 ldr x0, [fp, #0x48] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x40] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x2, [fp, #0x28] ldr x0, [fp, #0x20] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 516 777: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:IterationStop(int,int,long) [Tier0, IL size=125, code size=516] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:OverheadJittingStop(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 778: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:OverheadJittingStop(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_Index():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 779: JIT compiled BenchmarkDotNet.Engines.IterationData:get_Index() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Horology.ClockSpan:GetNanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 scvtf d0, x0 ldr d16, [fp, #0x10] fmul d0, d0, d16 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 100 780: JIT compiled Perfolizer.Horology.ClockSpan:GetNanoseconds() [Tier0, IL size=19, code size=100] ; Assembly listing for method Perfolizer.Horology.ClockSpan:GetSeconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x18] ldr x0, [x0] sub x1, x1, x0 mov x0, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 scvtf d0, x0 fmov d16, #1.0000 fmul d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x10] ldr x0, [fp, #0x18] ldr d1, [x0, #0x10] ldr d0, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 781: JIT compiled Perfolizer.Horology.ClockSpan:GetSeconds() [Tier0, IL size=48, code size=132] ; Assembly listing for method Perfolizer.Horology.Frequency:op_Implicit(double):Perfolizer.Horology.Frequency ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: str xzr, [fp, #0x10] add x0, fp, #16 ldr d0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 782: JIT compiled Perfolizer.Horology.Frequency:op_Implicit(double) [Tier0, IL size=7, code size=56] ; Assembly listing for method Perfolizer.Horology.Frequency:op_Division(Perfolizer.Horology.Frequency,Perfolizer.Horology.Frequency):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str d0, [fp, #0x28] str d1, [fp, #0x20] G_M000_IG02: add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 fmov d16, #1.0000 fmul d16, d0, d16 str d16, [fp, #0x18] add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x18] fdiv d0, d16, d0 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 783: JIT compiled Perfolizer.Horology.Frequency:op_Division(Perfolizer.Horology.Frequency,Perfolizer.Horology.Frequency) [Tier0, IL size=26, code size=92] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:.ctor(int,int,int,int,long,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] str w3, [fp, #0x2C] str w4, [fp, #0x28] str x5, [fp, #0x20] str d0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] ldr x1, [fp, #0x20] str x1, [x0, #0x10] ldr x0, [fp, #0x38] ldr d16, [fp, #0x18] str d16, [x0, #0x18] ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] str w1, [x0, #0x08] ldr x0, [fp, #0x38] ldr w1, [fp, #0x30] str w1, [x0] ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] str w1, [x0, #0x04] ldr x0, [fp, #0x38] ldr w1, [fp, #0x28] str w1, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 116 784: JIT compiled BenchmarkDotNet.Reports.Measurement:.ctor(int,int,int,int,long,double) [Tier0, IL size=46, code size=116] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xE0]! mov fp, sp movi v16.16b, #0 sub x9, fp, #8 mov x10, #128 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) str x0, [fp, #0xD8] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] ldr w1, [fp, #0xD4] str w1, [x0, #0x08] ldr x0, [fp, #0xA0] str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x98] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] ldr x0, [fp, #0x90] ldr w1, [fp, #0xD0] str w1, [x0, #0x08] ldr x0, [fp, #0x90] str x0, [fp, #0x78] ldr x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #217 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] str w0, [fp, #0x64] ldr x0, [fp, #0x68] ldr w1, [fp, #0x64] mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #217 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x50] ldr x1, [fp, #0x50] add x0, fp, #200 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] mov w1, #2 mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #217 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x38] ldr x1, [fp, #0x38] add x0, fp, #192 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] G_M000_IG03: blr x2 ldr x0, [fp, #0xA8] mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xB8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #217 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str x2, [fp, #0x28] ldr x2, [fp, #0x28] add x0, fp, #184 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x88] ldr x0, [fp, #0xA8] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #217 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #176 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] ldr x1, [fp, #0xA8] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0xE0 ret lr ; Total bytes of code 1404 785: JIT compiled BenchmarkDotNet.Reports.Measurement:ToString() [Tier0, IL size=304, code size=1404] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 786: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationMode() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationStage():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 787: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationStage() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] G_M000_IG02: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x48] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x3C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x30] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w1, [fp, #0x3C] add w0, w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str w0, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 448 788: JIT compiled BenchmarkDotNet.Reports.Measurement:.cctor() [Tier0, IL size=89, code size=448] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 789: JIT compiled BenchmarkDotNet.Reports.Measurement+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 790: JIT compiled BenchmarkDotNet.Reports.Measurement+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Max[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 124 791: JIT compiled System.Linq.Enumerable:Max[System.__Canon](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]) [Tier0, IL size=8, code size=124] ; Assembly listing for method System.Linq.Enumerable:MaxInteger[System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x20] str xzr, [fp, #0x18] add x3, sp, #160 str x3, [fp, #0x98] str x0, [fp, #0x90] str x0, [fp, #0x88] str x1, [fp, #0x80] str x2, [fp, #0x78] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x28] ldr x0, [fp, #0x80] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x78] cbnz x0, G_M000_IG04 mov w0, #15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x18] str x0, [fp, #0x58] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x58] G_M000_IG07: ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x80] ldr x11, [fp, #0x50] ldr x1, [fp, #0x50] ldr x1, [x1] blr x1 str x0, [fp, #0x68] G_M000_IG08: ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG09: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x48] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x48] G_M000_IG12: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x68] ldr x11, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x2, [fp, #0x78] ldr x2, [x2, #0x18] blr x2 str w0, [fp, #0x74] b G_M000_IG17 G_M000_IG13: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x20] str x0, [fp, #0x38] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x38] G_M000_IG16: ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x68] ldr x11, [fp, #0x30] ldr x1, [fp, #0x30] ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x2, [fp, #0x78] ldr x2, [x2, #0x18] blr x2 str w0, [fp, #0x64] ldr w0, [fp, #0x64] ldr w1, [fp, #0x74] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG17 ldr w0, [fp, #0x64] str w0, [fp, #0x74] G_M000_IG17: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG19 G_M000_IG18: add x0, fp, #40 mov w1, #85 bl CORINFO_HELP_PATCHPOINT G_M000_IG19: ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG13 b G_M000_IG20 G_M000_IG20: ldr x0, [fp, #0x98] bl G_M000_IG24 G_M000_IG21: nop G_M000_IG22: ldr w0, [fp, #0x74] G_M000_IG23: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0x68] cbz x0, G_M000_IG26 ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 684 792: JIT compiled System.Linq.Enumerable:MaxInteger[System.__Canon,int](System.Collections.Generic.IEnumerable`1[System.__Canon],System.Func`2[System.__Canon,int]) [Tier0, IL size=107, code size=684] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement+<>c:<.cctor>b__31_0(System.String):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 793: JIT compiled BenchmarkDotNet.Reports.Measurement+<>c:<.cctor>b__31_0(System.String) [Tier0, IL size=7, code size=32] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement+<>c:<.cctor>b__31_1(System.String):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 794: JIT compiled BenchmarkDotNet.Reports.Measurement+<>c:<.cctor>b__31_1(System.String) [Tier0, IL size=7, code size=32] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationIndex():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 795: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationIndex() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_Operations():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 796: JIT compiled BenchmarkDotNet.Reports.Measurement:get_Operations() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_Nanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 797: JIT compiled BenchmarkDotNet.Reports.Measurement:get_Nanoseconds() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Number:NumberToStringFormat[ushort](byref,byref,System.ReadOnlySpan`1[ushort],System.Globalization.NumberFormatInfo) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 61 single block inlinees; 46 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xC0] stp x21, x22, [sp, #0xD0] stp x23, x24, [sp, #0xE0] stp x25, x26, [sp, #0xF0] stp x27, x28, [sp, #0xD1FFAB1E] mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x40] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #0xB8] str x2, [fp, #0x98] str x3, [fp, #0xA0] mov x19, x0 mov x21, x1 mov x20, x4 G_M000_IG02: mov w22, wzr ldr x23, [x21, #0x10] ldr x0, [fp, #0x98] ldr w24, [fp, #0xA0] sxtw w1, w24 ldrb w2, [x23] cbz w2, G_M000_IG05 G_M000_IG03: ldrb w2, [x21, #0x08] cbnz w2, G_M000_IG04 mov w2, wzr b G_M000_IG06 align [0 bytes for IG08] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: mov w2, #1 b G_M000_IG06 G_M000_IG05: mov w2, #2 G_M000_IG06: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w25, w0 G_M000_IG07: mov w26, wzr movn w27, #0 movn w28, #0xD1FFAB1E LSL #16 str wzr, [fp, #0x94] mov w4, wzr movn w5, #0 mov w6, wzr mov w7, wzr sxtw w0, w25 ldr x8, [fp, #0x98] str x8, [fp, #0x68] b G_M000_IG31 G_M000_IG08: cmp w1, #69 bhi G_M000_IG13 sub w10, w1, #34 cmp w10, #5 bhi G_M000_IG10 mov w0, w10 adr x2, [@RWD00] ldr w2, [x2, x0, LSL #2] adr x10, [G_M000_IG02] add x2, x2, x10 br x2 G_M000_IG09: mov w0, w9 b G_M000_IG31 G_M000_IG10: sub w11, w1, #44 cmp w11, #4 bhi G_M000_IG12 mov w1, w11 adr x0, [@RWD24] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG11: mov w0, w9 b G_M000_IG31 G_M000_IG12: cmp w1, #69 beq G_M000_IG25 mov w0, w9 b G_M000_IG31 G_M000_IG13: cmp w1, #92 beq G_M000_IG24 cmp w1, #101 beq G_M000_IG25 mov w0, #0xD1FFAB1E cmp w1, w0 mov w0, w9 bne G_M000_IG31 add w7, w7, #3 b G_M000_IG31 G_M000_IG14: add w26, w26, #1 mov w0, w9 b G_M000_IG31 G_M000_IG15: movn w3, #0xD1FFAB1E LSL #16 cmp w28, w3 bne G_M000_IG16 sxtw w28, w26 G_M000_IG16: add w26, w26, #1 sxtw w2, w26 str w2, [fp, #0x94] mov w0, w9 b G_M000_IG31 G_M000_IG17: mov w0, w9 tbz w27, #31, G_M000_IG31 sxtw w27, w26 b G_M000_IG31 G_M000_IG18: cmp w26, #0 ccmp w27, #0, z, gt mov w0, w9 bge G_M000_IG31 tbnz w5, #31, G_M000_IG20 cmp w5, w26 bne G_M000_IG19 add w22, w22, #1 b G_M000_IG31 G_M000_IG19: mov w6, #1 str w6, [fp, #0x88] ldr w6, [fp, #0x88] G_M000_IG20: sxtw w5, w26 mov w22, #1 b G_M000_IG31 G_M000_IG21: add w7, w7, #2 mov w0, w9 b G_M000_IG31 G_M000_IG22: cmp w9, w24 mov w0, w9 bge G_M000_IG31 ldrh w2, [x8, w0, SXTW #2] cbz w2, G_M000_IG31 add w0, w0, #1 str w0, [fp, #0x80] cmp w2, w1 ldr w9, [fp, #0x80] bne G_M000_IG22 G_M000_IG23: mov w0, w9 b G_M000_IG31 G_M000_IG24: cmp w9, w24 mov w0, w9 bge G_M000_IG31 ldrh w1, [x8, w0, SXTW #2] cbz w1, G_M000_IG31 add w0, w0, #1 b G_M000_IG31 G_M000_IG25: cmp w9, w24 bge G_M000_IG26 ldrh w1, [x8, w9, SXTW #2] cmp w1, #48 beq G_M000_IG29 G_M000_IG26: add w1, w9, #1 cmp w1, w24 mov w0, w9 bge G_M000_IG31 ldrh w1, [x8, w0, SXTW #2] cmp w1, #43 beq G_M000_IG27 cmp w1, #45 bne G_M000_IG31 G_M000_IG27: add w1, w0, #1 ldrh w1, [x8, w1, SXTW #2] cmp w1, #48 bne G_M000_IG31 G_M000_IG28: mov w9, w0 G_M000_IG29: add w9, w9, #1 cmp w9, w24 bge G_M000_IG30 ldrh w4, [x8, w9, SXTW #2] cmp w4, #48 beq G_M000_IG29 G_M000_IG30: mov w4, #1 mov w0, w9 G_M000_IG31: cmp w0, w24 bge G_M000_IG33 G_M000_IG32: add w1, w0, #1 sxtw w9, w1 ldrh w10, [x8, w0, SXTW #2] sxtw w1, w10 cbz w1, G_M000_IG33 cmp w1, #59 bne G_M000_IG08 G_M000_IG33: str xzr, [fp, #0x68] tbz w27, #31, G_M000_IG35 G_M000_IG34: sxtw w27, w26 G_M000_IG35: tbnz w5, #31, G_M000_IG38 G_M000_IG36: cmp w5, w27 bne G_M000_IG37 mov w0, #3 msub w7, w22, w0, w7 b G_M000_IG38 G_M000_IG37: mov w6, #1 str w6, [fp, #0x88] ldr w6, [fp, #0x88] G_M000_IG38: ldrb w0, [x23] cbz w0, G_M000_IG43 G_M000_IG39: add x0, x21, #4 ldr w1, [x0] add w1, w1, w7 str w1, [x0] str w4, [fp, #0x8C] cbnz w4, G_M000_IG41 G_M000_IG40: ldr w0, [x21, #0x04] add w0, w0, w26 sub w1, w0, w27 str w6, [fp, #0x88] b G_M000_IG42 G_M000_IG41: sxtw w1, w26 str w6, [fp, #0x88] G_M000_IG42: mov x0, x21 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldrb w0, [x23] cbnz w0, G_M000_IG45 ldp x0, x1, [fp, #0x98] mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w2, w0 cmp w2, w25 beq G_M000_IG45 sxtw w25, w2 b G_M000_IG07 G_M000_IG43: ldrb w2, [x21, #0x0A] cmp w2, #3 beq G_M000_IG44 strb wzr, [x21, #0x08] G_M000_IG44: str wzr, [x21, #0x04] stp w6, w4, [fp, #0x88] G_M000_IG45: sub w1, w27, w28 cmp w28, w27 csel w28, w1, wzr, lt ldr w3, [fp, #0x94] sub w1, w27, w3 cmp w3, w27 csel w3, w1, wzr, gt sxtw w22, w3 ldr w4, [fp, #0x8C] cbz w4, G_M000_IG47 G_M000_IG46: sxtw w2, w27 mov w3, wzr b G_M000_IG48 G_M000_IG47: ldr w3, [x21, #0x04] cmp w3, w27 csel w2, w3, w27, gt sub w3, w3, w27 G_M000_IG48: str w25, [fp, #0x80] add x7, fp, #168 str x7, [fp, #0x18] mov w8, #4 movn w9, #0 ldr w6, [fp, #0x88] cbz w6, G_M000_IG52 G_M000_IG49: ldr x1, [x20, #0x38] ldr w1, [x1, #0x08] cmp w1, #0 ble G_M000_IG51 ldr x10, [x20, #0x08] str x10, [fp, #0x28] str wzr, [fp, #0x64] mov w13, wzr ldr w14, [x10, #0x08] str w14, [fp, #0x5C] cbz w14, G_M000_IG50 ldr w13, [x10, #0x10] ldr x10, [fp, #0x28] G_M000_IG50: str w13, [fp, #0x60] sxtw w12, w13 str w2, [fp, #0x90] sxtw w1, w2 tbnz w3, #31, G_M000_IG53 mov w0, wzr b G_M000_IG54 G_M000_IG51: str w2, [fp, #0x90] b G_M000_IG60 G_M000_IG52: str w2, [fp, #0x90] b G_M000_IG60 G_M000_IG53: str w3, [fp, #0x84] sxtw w0, w3 ldr w3, [fp, #0x84] G_M000_IG54: add w1, w1, w0 cmp w28, w1 csel w15, w28, w1, gt str w15, [fp, #0x54] cmp w15, w12 ble G_M000_IG60 G_M000_IG55: str w12, [fp, #0x58] cbz w12, G_M000_IG60 add w9, w9, #1 str w9, [fp, #0x78] cmp w9, w8 blt G_M000_IG57 G_M000_IG56: str w3, [fp, #0x84] str w8, [fp, #0x34] lsl w1, w8, #1 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x3, x0 str x3, [fp, #0x20] add x0, x3, #16 ldr w2, [x3, #0x08] ldr w4, [fp, #0x34] cmp w4, w2 bhi G_M000_IG160 mov w2, w4 lsl x2, x2, #2 ldr x1, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x1, [fp, #0x20] add x2, x1, #16 ldr w4, [x1, #0x08] mov x3, x2 str x3, [fp, #0x18] mov w8, w4 ldr w3, [fp, #0x84] ldr x10, [fp, #0x28] G_M000_IG57: ldr w9, [fp, #0x78] str w8, [fp, #0x34] cmp w9, w8 bhs G_M000_IG161 ldr x7, [fp, #0x18] str w9, [fp, #0x78] ldr w13, [fp, #0x60] str w13, [x7, w9, UXTW #2] ldr w14, [fp, #0x5C] sub w1, w14, #1 ldr w11, [fp, #0x64] cmp w11, w1 bge G_M000_IG59 G_M000_IG58: add w11, w11, #1 ldr w12, [x10, #0x08] cmp w11, w12 bhs G_M000_IG161 add x1, x10, #16 ldr w12, [x1, w11, UXTW #2] sxtw w1, w12 str w1, [fp, #0x58] G_M000_IG59: ldr w12, [fp, #0x58] add w13, w13, w12 ldr w15, [fp, #0x54] cmp w15, w13 stp w13, w11, [fp, #0x60] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] bgt G_M000_IG55 G_M000_IG60: ldrb w1, [x21, #0x08] cbz w1, G_M000_IG63 G_M000_IG61: ldr w5, [fp, #0x80] cbnz w5, G_M000_IG63 ldr w1, [x21, #0x04] cbz w1, G_M000_IG63 ldr x1, [x20, #0x28] cbnz x1, G_M000_IG71 mov x0, xzr mov w10, wzr G_M000_IG62: mov x1, x0 ldr w0, [x19, #0x08] add x11, x19, #16 ldr x13, [x11] ldr w11, [x11, #0x08] cmp w0, w11 ccmp w10, #1, 0, lo bne G_M000_IG72 ubfiz x10, x0, #1, #32 add x10, x13, x10 ldrh w1, [x1] strh w1, [x10] add w1, w0, #1 str w1, [x19, #0x08] G_M000_IG63: str wzr, [fp, #0x74] ldr x11, [fp, #0x98] str x11, [fp, #0x40] str x11, [fp, #0x48] mov x0, x23 G_M000_IG64: ldr w5, [fp, #0x80] cmp w5, w24 bge G_M000_IG66 G_M000_IG65: sxtw w1, w5 add w5, w1, #1 str w5, [fp, #0x80] ldrh w1, [x11, w1, SXTW #2] cbz w1, G_M000_IG66 cmp w1, #59 bne G_M000_IG73 G_M000_IG66: str xzr, [fp, #0x40] ldrb w2, [x21, #0x08] cbz w2, G_M000_IG69 G_M000_IG67: cbnz w25, G_M000_IG69 ldr w2, [x21, #0x04] cbnz w2, G_M000_IG69 ldr w2, [x19, #0x08] cmp w2, #0 ble G_M000_IG69 ldr x2, [x20, #0x28] cbnz x2, G_M000_IG157 mov x3, xzr mov w0, wzr G_M000_IG68: mov x2, x3 sxtw w3, w0 mov x0, x19 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG69: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xB8] cmp xip0, xip1 beq G_M000_IG70 bl CORINFO_HELP_FAIL_FAST G_M000_IG70: ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xF0] ldp x23, x24, [sp, #0xE0] ldp x21, x22, [sp, #0xD0] ldp x19, x20, [sp, #0xC0] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG71: add x0, x1, #12 ldr w10, [x1, #0x08] b G_M000_IG62 G_M000_IG72: str w9, [fp, #0x78] str w3, [fp, #0x84] str w8, [fp, #0x34] mov w2, w10 mov x0, x19 movz x10, #0xD1FFAB1E movk x10, #0xD1FFAB1E LSL #16 movk x10, #0xD1FFAB1E LSL #32 ldr x10, [x10] blr x10 ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] b G_M000_IG63 G_M000_IG73: cmp w3, #0 ble G_M000_IG74 mov w13, #46 mov w14, #48 cmp w1, #35 ccmp w1, w13, z, ne str w1, [fp, #0x7C] ccmp w1, w14, z, ne beq G_M000_IG87 str w3, [fp, #0x84] b G_M000_IG88 G_M000_IG74: str w1, [fp, #0x7C] str w3, [fp, #0x84] b G_M000_IG88 G_M000_IG75: ldrb w13, [x0] cbnz w13, G_M000_IG76 mov w14, #48 b G_M000_IG77 G_M000_IG76: add x0, x0, #1 str x0, [fp, #0x38] sxtw w14, w13 ldr x0, [fp, #0x38] G_M000_IG77: uxth w13, w14 ldr w14, [x19, #0x08] add x12, x19, #16 str x12, [fp, #0x10] mov x15, x12 ldr xip0, [x15] ldr w15, [x15, #0x08] cmp w14, w15 bhs G_M000_IG78 cmp w14, w15 bhs G_M000_IG161 strh w13, [xip0, w14, UXTW #2] add w13, w14, #1 str w13, [x19, #0x08] b G_M000_IG79 G_M000_IG78: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 mov w1, w13 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG79: ldr w6, [fp, #0x88] cbz w6, G_M000_IG86 ldr w2, [fp, #0x90] cmp w2, #1 ccmp w9, #0, nc, gt blt G_M000_IG81 str w8, [fp, #0x34] cmp w9, w8 bhs G_M000_IG161 ldr x7, [fp, #0x18] str w9, [fp, #0x78] ldr w13, [x7, w9, UXTW #2] add w13, w13, #1 str w2, [fp, #0x90] cmp w13, w2 bne G_M000_IG80 ldr x13, [x20, #0x38] cbnz x13, G_M000_IG82 mov x14, xzr mov w15, wzr b G_M000_IG83 G_M000_IG80: ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] b G_M000_IG86 G_M000_IG81: str w2, [fp, #0x90] b G_M000_IG86 G_M000_IG82: add x14, x13, #12 ldr w15, [x13, #0x08] G_M000_IG83: ldr w13, [x19, #0x08] ldr x12, [fp, #0x10] ldr xip0, [x12] ldr w12, [x12, #0x08] cmp w13, w12 ccmp w15, #1, 0, lo bne G_M000_IG84 cmp w13, w12 bhs G_M000_IG161 ubfiz x12, x13, #1, #32 add x12, xip0, x12 cmp w15, #0 bls G_M000_IG161 ldrh w14, [x14] strh w14, [x12] add w15, w13, #1 str w15, [x19, #0x08] b G_M000_IG85 G_M000_IG84: str x0, [fp, #0x38] mov x1, x14 mov w2, w15 mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] G_M000_IG85: ldr w9, [fp, #0x78] sub w9, w9, #1 str w9, [fp, #0x78] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG86: ldr w2, [fp, #0x90] sub w2, w2, #1 str w2, [fp, #0x90] ldr w3, [fp, #0x84] sub w3, w3, #1 str w3, [fp, #0x84] ldr w3, [fp, #0x84] G_M000_IG87: str w3, [fp, #0x84] cmp w3, #0 bgt G_M000_IG75 G_M000_IG88: ldr w1, [fp, #0x7C] cmp w1, #69 bhi G_M000_IG92 sub w13, w1, #34 cmp w13, #5 bhi G_M000_IG89 mov w13, w13 adr x14, [@RWD44] ldr w14, [x14, x13, LSL #2] adr x12, [G_M000_IG02] add x14, x14, x12 br x14 G_M000_IG89: sub w14, w1, #44 cmp w14, #4 bhi G_M000_IG91 mov w13, w14 adr x14, [@RWD68] ldr w14, [x14, x13, LSL #2] adr x12, [G_M000_IG02] add x14, x14, x12 br x14 G_M000_IG90: ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG91: cmp w1, #69 beq G_M000_IG131 b G_M000_IG155 G_M000_IG92: cmp w1, #92 beq G_M000_IG129 cmp w1, #101 beq G_M000_IG131 mov w13, #0xD1FFAB1E cmp w1, w13 bne G_M000_IG155 ldrsb wzr, [x20] b G_M000_IG115 G_M000_IG93: ldr w3, [fp, #0x84] tbz w3, #31, G_M000_IG96 add w3, w3, #1 str w3, [fp, #0x84] ldr w2, [fp, #0x90] cmp w2, w28 ble G_M000_IG94 mov w1, wzr b G_M000_IG95 G_M000_IG94: mov w1, #48 G_M000_IG95: uxth w1, w1 sxtw w13, w1 b G_M000_IG100 G_M000_IG96: ldrb w13, [x0] cbnz w13, G_M000_IG98 ldr w2, [fp, #0x90] cmp w2, w22 bgt G_M000_IG97 mov w1, wzr b G_M000_IG99 G_M000_IG97: mov w1, #48 b G_M000_IG99 G_M000_IG98: mov x1, x0 add x0, x1, #1 str x0, [fp, #0x38] ldrb w1, [x1] ldr x0, [fp, #0x38] G_M000_IG99: uxth w13, w1 str w3, [fp, #0x84] ldr w2, [fp, #0x90] G_M000_IG100: cbz w13, G_M000_IG108 sxtw w1, w13 ldr w13, [x19, #0x08] add x14, x19, #16 str x14, [fp, #0x10] mov x12, x14 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 bhs G_M000_IG101 cmp w13, w12 bhs G_M000_IG161 strh w1, [x15, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] b G_M000_IG102 G_M000_IG101: str w9, [fp, #0x78] str w2, [fp, #0x90] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w2, [fp, #0x90] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG102: ldr w6, [fp, #0x88] cbz w6, G_M000_IG108 cmp w2, #1 ccmp w9, #0, nc, gt blt G_M000_IG108 str w8, [fp, #0x34] cmp w9, w8 bhs G_M000_IG161 ldr x7, [fp, #0x18] str w9, [fp, #0x78] ldr w1, [x7, w9, UXTW #2] add w1, w1, #1 str w2, [fp, #0x90] cmp w1, w2 bne G_M000_IG103 ldr x1, [x20, #0x38] cbnz x1, G_M000_IG104 mov x13, xzr mov w12, wzr b G_M000_IG105 G_M000_IG103: ldr w2, [fp, #0x90] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] b G_M000_IG108 G_M000_IG104: add x13, x1, #12 ldr w12, [x1, #0x08] G_M000_IG105: mov x1, x13 ldr w13, [x19, #0x08] ldr x14, [fp, #0x10] ldr x15, [x14] ldr w14, [x14, #0x08] cmp w13, w14 ccmp w12, #1, 0, lo bne G_M000_IG106 cmp w13, w14 bhs G_M000_IG161 ubfiz x14, x13, #1, #32 add x14, x15, x14 cmp w12, #0 bls G_M000_IG161 ldrh w1, [x1] strh w1, [x14] add w1, w13, #1 str w1, [x19, #0x08] b G_M000_IG107 G_M000_IG106: str x0, [fp, #0x38] mov w2, w12 mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] G_M000_IG107: ldr w9, [fp, #0x78] sub w9, w9, #1 str w9, [fp, #0x78] ldr w2, [fp, #0x90] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG108: sub w2, w2, #1 str w2, [fp, #0x90] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG109: ldr w2, [fp, #0x90] cmp w2, #0 cset x1, ne ldr w10, [fp, #0x74] orr w1, w1, w10 str w10, [fp, #0x74] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] cbnz w1, G_M000_IG64 tbnz w22, #31, G_M000_IG110 cmp w27, w26 bge G_M000_IG64 str x0, [fp, #0x38] ldrb w1, [x0] ldr x0, [fp, #0x38] cbz w1, G_M000_IG64 G_M000_IG110: ldr x1, [x20, #0x30] cbnz x1, G_M000_IG111 mov x10, xzr mov w13, wzr b G_M000_IG112 G_M000_IG111: add x10, x1, #12 ldr w13, [x1, #0x08] G_M000_IG112: mov x1, x10 ldr w10, [x19, #0x08] add x12, x19, #16 mov x14, x12 ldr x12, [x14] ldr w14, [x14, #0x08] cmp w10, w14 ccmp w13, #1, 0, lo bne G_M000_IG113 cmp w10, w14 bhs G_M000_IG161 ubfiz x14, x10, #1, #32 add x14, x12, x14 cmp w13, #0 bls G_M000_IG161 ldrh w1, [x1] strh w1, [x14] add w1, w10, #1 str w1, [x19, #0x08] b G_M000_IG114 G_M000_IG113: str w9, [fp, #0x78] str w3, [fp, #0x84] str x0, [fp, #0x38] str w8, [fp, #0x34] mov w2, w13 mov x0, x19 movz x10, #0xD1FFAB1E movk x10, #0xD1FFAB1E LSL #16 movk x10, #0xD1FFAB1E LSL #32 ldr x10, [x10] blr x10 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] G_M000_IG114: mov w10, #1 str w10, [fp, #0x74] b G_M000_IG64 G_M000_IG115: ldr x1, [x20, #0x88] cbnz x1, G_M000_IG116 mov x13, xzr mov w14, wzr b G_M000_IG117 G_M000_IG116: add x13, x1, #12 ldr w14, [x1, #0x08] G_M000_IG117: mov x1, x13 ldr w13, [x19, #0x08] add x12, x19, #16 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 ccmp w14, #1, 0, lo bne G_M000_IG118 cmp w13, w12 bhs G_M000_IG161 ubfiz x12, x13, #1, #32 add x12, x15, x12 cmp w14, #0 bls G_M000_IG161 ldrh w1, [x1] strh w1, [x12] add w1, w13, #1 str w1, [x19, #0x08] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG118: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov w2, w14 mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG119: ldr x1, [x20, #0x80] cbnz x1, G_M000_IG120 mov x13, xzr mov w14, wzr b G_M000_IG121 G_M000_IG120: add x13, x1, #12 ldr w14, [x1, #0x08] G_M000_IG121: mov x1, x13 ldr w13, [x19, #0x08] add x12, x19, #16 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 ccmp w14, #1, 0, lo bne G_M000_IG122 cmp w13, w12 bhs G_M000_IG161 ubfiz x12, x13, #1, #32 add x12, x15, x12 cmp w14, #0 bls G_M000_IG161 ldrh w1, [x1] strh w1, [x12] add w1, w13, #1 str w1, [x19, #0x08] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG122: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov w2, w14 mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG123: add w5, w5, #1 str w5, [fp, #0x80] ldr w14, [x19, #0x08] add x12, x19, #16 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w14, w12 bhs G_M000_IG124 cmp w14, w12 bhs G_M000_IG161 strh w13, [x15, w14, UXTW #2] add w13, w14, #1 str w13, [x19, #0x08] ldr w1, [fp, #0x7C] b G_M000_IG125 G_M000_IG124: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 mov w1, w13 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w1, [fp, #0x7C] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG125: ldr w5, [fp, #0x80] cmp w5, w24 bge G_M000_IG126 ldr x11, [fp, #0x48] ldrh w13, [x11, w5, SXTW #2] cbz w13, G_M000_IG127 str w1, [fp, #0x7C] cmp w13, w1 bne G_M000_IG123 G_M000_IG126: cmp w5, w24 bge G_M000_IG128 G_M000_IG127: ldr x11, [fp, #0x48] ldrh w13, [x11, w5, SXTW #2] str w5, [fp, #0x80] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] cbz w13, G_M000_IG64 ldr w5, [fp, #0x80] add w5, w5, #1 str w5, [fp, #0x80] b G_M000_IG64 G_M000_IG128: str w5, [fp, #0x80] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG129: ldr w5, [fp, #0x80] cmp w5, w24 str w5, [fp, #0x80] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] bge G_M000_IG64 ldr w5, [fp, #0x80] ldrh w1, [x11, w5, SXTW #2] str w5, [fp, #0x80] ldr x11, [fp, #0x48] cbz w1, G_M000_IG64 ldr w5, [fp, #0x80] add w5, w5, #1 str w5, [fp, #0x80] ldr w13, [x19, #0x08] add x12, x19, #16 mov x14, x12 ldr x12, [x14] ldr w14, [x14, #0x08] cmp w13, w14 bhs G_M000_IG130 cmp w13, w14 bhs G_M000_IG161 strh w1, [x12, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] b G_M000_IG64 G_M000_IG130: str w9, [fp, #0x78] str w3, [fp, #0x84] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG131: mov w13, wzr mov w14, wzr ldr w4, [fp, #0x8C] cbz w4, G_M000_IG146 ldr w5, [fp, #0x80] cmp w5, w24 bge G_M000_IG132 ldr x11, [fp, #0x48] ldrh w12, [x11, w5, SXTW #2] cmp w12, #48 beq G_M000_IG138 G_M000_IG132: add w12, w5, #1 cmp w12, w24 bge G_M000_IG134 ldr x11, [fp, #0x48] ldrh w12, [x11, w5, SXTW #2] cmp w12, #43 bne G_M000_IG133 add w15, w5, #1 ldrh w15, [x11, w15, SXTW #2] cmp w15, #48 bne G_M000_IG133 mov w13, #1 b G_M000_IG139 G_M000_IG133: cmp w12, #45 bne G_M000_IG136 str w5, [fp, #0x80] add w12, w5, #1 ldrh w12, [x11, w12, SXTW #2] cmp w12, #48 ldr w5, [fp, #0x80] beq G_M000_IG135 G_M000_IG134: ldr w13, [x19, #0x08] add x14, x19, #16 ldr x12, [x14] ldr w14, [x14, #0x08] cmp w13, w14 bhs G_M000_IG137 cmp w13, w14 bhs G_M000_IG161 strh w1, [x12, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] str w5, [fp, #0x80] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG135: ldr x11, [fp, #0x48] b G_M000_IG139 G_M000_IG136: b G_M000_IG134 G_M000_IG137: str w5, [fp, #0x80] str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG138: add w14, w14, #1 G_M000_IG139: add w5, w5, #1 sxtw w12, w5 cmp w12, w24 bge G_M000_IG141 str w12, [fp, #0x80] ldrh w4, [x11, w12, SXTW #2] cmp w4, #48 ldr x11, [fp, #0x48] beq G_M000_IG143 G_M000_IG140: ldr w12, [fp, #0x80] G_M000_IG141: cmp w14, #10 ble G_M000_IG142 mov w14, #10 G_M000_IG142: ldrb w4, [x23] cbz w4, G_M000_IG144 ldr w4, [x21, #0x04] sub w4, w4, w27 stp w1, w12, [fp, #0x7C] str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] b G_M000_IG145 G_M000_IG143: ldr w5, [fp, #0x80] b G_M000_IG138 G_M000_IG144: mov w4, wzr stp w1, w12, [fp, #0x7C] str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] G_M000_IG145: mov x0, x19 mov x1, x20 mov w2, w4 ldr w3, [fp, #0x7C] mov w4, w14 mov w5, w13 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 str wzr, [fp, #0x8C] ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG146: ldr w13, [x19, #0x08] add x14, x19, #16 str x14, [fp, #0x10] mov x12, x14 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 bhs G_M000_IG147 cmp w13, w12 bhs G_M000_IG161 strh w1, [x15, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] b G_M000_IG148 G_M000_IG147: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] G_M000_IG148: ldr w5, [fp, #0x80] cmp w5, w24 str w5, [fp, #0x80] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] bge G_M000_IG64 ldr x14, [fp, #0x10] ldr w5, [fp, #0x80] ldrh w1, [x11, w5, SXTW #2] cmp w1, #43 beq G_M000_IG149 cmp w1, #45 bne G_M000_IG153 G_M000_IG149: add w5, w5, #1 str w5, [fp, #0x80] ldr w13, [x19, #0x08] str x14, [fp, #0x10] mov x12, x14 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 bhs G_M000_IG150 cmp w13, w12 bhs G_M000_IG161 strh w1, [x15, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] ldr w5, [fp, #0x80] ldr x14, [fp, #0x10] b G_M000_IG153 G_M000_IG150: str w9, [fp, #0x78] str w3, [fp, #0x84] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldp w5, w3, [fp, #0x80] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x14, [fp, #0x10] b G_M000_IG153 G_M000_IG151: add w5, w5, #1 str w5, [fp, #0x80] ldr w13, [x19, #0x08] str x14, [fp, #0x10] mov x12, x14 ldr x15, [x12] ldr w12, [x12, #0x08] cmp w13, w12 bhs G_M000_IG152 cmp w13, w12 bhs G_M000_IG161 strh w1, [x15, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] ldr w5, [fp, #0x80] ldr x14, [fp, #0x10] b G_M000_IG153 G_M000_IG152: str w9, [fp, #0x78] str w3, [fp, #0x84] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldp w5, w3, [fp, #0x80] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x14, [fp, #0x10] G_M000_IG153: cmp w5, w24 str w5, [fp, #0x80] ldr x11, [fp, #0x48] bge G_M000_IG64 ldr w5, [fp, #0x80] ldrh w1, [x11, w5, SXTW #2] cmp w1, #48 beq G_M000_IG151 G_M000_IG154: str w5, [fp, #0x80] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG155: ldr w13, [x19, #0x08] add x14, x19, #16 ldr x12, [x14] ldr w14, [x14, #0x08] cmp w13, w14 bhs G_M000_IG156 cmp w13, w14 bhs G_M000_IG161 strh w1, [x12, w13, UXTW #2] add w1, w13, #1 str w1, [x19, #0x08] ldr w3, [fp, #0x84] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG156: str w9, [fp, #0x78] str x0, [fp, #0x38] str w8, [fp, #0x34] mov x0, x19 movz x13, #0xD1FFAB1E movk x13, #0xD1FFAB1E LSL #16 movk x13, #0xD1FFAB1E LSL #32 ldr x13, [x13] blr x13 ldr x0, [fp, #0x38] ldr w3, [fp, #0x84] ldr w8, [fp, #0x34] ldr w9, [fp, #0x78] ldr x11, [fp, #0x48] b G_M000_IG64 G_M000_IG157: add x3, x2, #12 ldr w0, [x2, #0x08] b G_M000_IG68 G_M000_IG158: bl CORINFO_HELP_THROWDIVZERO G_M000_IG159: bl CORINFO_HELP_OVERFLOW G_M000_IG160: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG161: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 RWD24 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 RWD44 dd G_M000_IG125 - G_M000_IG02 dd G_M000_IG93 - G_M000_IG02 dd G_M000_IG155 - G_M000_IG02 dd G_M000_IG119 - G_M000_IG02 dd G_M000_IG155 - G_M000_IG02 dd G_M000_IG125 - G_M000_IG02 RWD68 dd G_M000_IG90 - G_M000_IG02 dd G_M000_IG155 - G_M000_IG02 dd G_M000_IG109 - G_M000_IG02 dd G_M000_IG155 - G_M000_IG02 dd G_M000_IG93 - G_M000_IG02 ; Total bytes of code 4984 798: JIT compiled System.Number:NumberToStringFormat[ushort](byref,byref,System.ReadOnlySpan`1[ushort],System.Globalization.NumberFormatInfo) [Tier-0 switched to FullOpts, IL size=2089, code size=4984] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:GetAverageTime():Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 scvtf d0, x0 ldr d16, [fp, #0x10] fdiv d0, d16, d0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 799: JIT compiled BenchmarkDotNet.Reports.Measurement:GetAverageTime() [Tier0, IL size=20, code size=104] ; Assembly listing for method Perfolizer.Horology.TimeInterval:FromNanoseconds(double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr d0, [x0] ldr d1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 800: JIT compiled Perfolizer.Horology.TimeInterval:FromNanoseconds(double) [Tier0, IL size=12, code size=60] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str d0, [fp, #0x28] str d1, [fp, #0x20] G_M000_IG02: str xzr, [fp, #0x18] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x20] fmul d0, d0, d16 str d0, [fp, #0x10] ldr d0, [fp, #0x10] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 801: JIT compiled Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,double) [Tier0, IL size=15, code size=96] ; Assembly listing for method BenchmarkDotNet.Helpers.AsciiHelper:ToAscii(System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG04 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 802: JIT compiled BenchmarkDotNet.Helpers.AsciiHelper:ToAscii(System.String) [Tier0, IL size=22, code size=88] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:WriteLine(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 803: JIT compiled BenchmarkDotNet.Engines.Engine:WriteLine(System.String) [Tier0, IL size=13, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Host():BenchmarkDotNet.Engines.IHost:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 804: JIT compiled BenchmarkDotNet.Engines.Engine:get_Host() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x14] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x48] ldr x0, [fp, #0x58] ldr w0, [x0, #0x10] str w0, [fp, #0x44] ldr w0, [fp, #0x44] ldr x1, [fp, #0x48] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG04 ldr w0, [fp, #0x44] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x10] ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x50] ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] str x0, [fp, #0x18] ldr x0, [fp, #0x50] ldp q16, q17, [x0] stp q16, q17, [fp, #0x20] ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 216 805: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=60, code size=216] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:Consume(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 24 806: JIT compiled BenchmarkDotNet.Engines.Engine:Consume(byref) [Tier0, IL size=1, code size=24] ; Assembly listing for method BenchmarkDotNet.Engines.DeadCodeEliminationHelper:KeepAliveWithoutBoxing[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 807: JIT compiled BenchmarkDotNet.Engines.DeadCodeEliminationHelper:KeepAliveWithoutBoxing[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Dummy2Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 808: JIT compiled BenchmarkDotNet.Engines.Engine:get_Dummy2Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:Dummy2():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] G_M000_IG03: str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1300 809: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:Dummy2() [Tier0, IL size=897, code size=1300] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_MemoryRandomization():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0xBA] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 810: JIT compiled BenchmarkDotNet.Engines.Engine:get_MemoryRandomization() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_WorkloadAction():System.Action`1[long]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 811: JIT compiled BenchmarkDotNet.Engines.Engine:get_WorkloadAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_IterationSetupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 812: JIT compiled BenchmarkDotNet.Engines.Engine:get_IterationSetupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 813: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_1() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadJittingStart(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 814: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadJittingStart(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:WorkloadActionNoUnroll(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x21, xzr cmp x20, #0 ble G_M000_IG04 G_M000_IG03: ldp x1, x22, [x19, #0x38] ldr x0, [x1, #0x08] ldr x1, [x1, #0x18] blr x1 dmb ish str w0, [x22, #0x40] add x21, x21, #1 cmp x21, x20 blt G_M000_IG03 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 815: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:WorkloadActionNoUnroll(long) [Tier1, IL size=37, code size=88] ; Assembly listing for method BenchmarksGame.RegexRedux_1:RunBench():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x100]! mov fp, sp movi v16.16b, #0 sub x9, fp, #8 mov x10, #160 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] str x0, [fp, #0xF8] G_M000_IG02: ldr x0, [fp, #0xF8] ldr x0, [x0, #0x08] str x0, [fp, #0xF0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x88] str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] ldr x1, [fp, #0xF0] movz x2, #8 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xF0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #9 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x80] ldr x0, [fp, #0x80] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #5 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #6 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #7 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #8 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] str x0, [fp, #0xE0] ldr x0, [fp, #0xE0] str x0, [fp, #0xC8] str wzr, [fp, #0xC4] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG08 G_M000_IG03: ldr x0, [fp, #0xC8] ldr w1, [fp, #0xC4] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG18 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0xB8] str wzr, [fp, #0xDC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] ldr x0, [fp, #0x78] ldr x1, [fp, #0xB8] mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x78] str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] ldr x1, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xB0] b G_M000_IG05 G_M000_IG04: ldr w0, [fp, #0xDC] add w0, w0, #1 str w0, [fp, #0xDC] ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xB0] G_M000_IG05: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #16 mov w1, #162 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG04 ldr w0, [fp, #0xC4] add w0, w0, #1 str w0, [fp, #0xC4] G_M000_IG08: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #16 mov w1, #177 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0xC4] ldr x1, [fp, #0xC8] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #5 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x70] add x0, fp, #96 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x70] mov w13, wzr ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG18 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #96 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x70] mov w13, #1 ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG18 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #80 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x70] mov w13, #2 ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG18 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #64 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x70] mov w13, #3 ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG18 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #48 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x70] mov w13, #4 ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG18 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #32 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x0, [fp, #0x70] str x0, [fp, #0xD0] ldr x0, [fp, #0xD0] str x0, [fp, #0xA8] str wzr, [fp, #0xA4] b G_M000_IG14 G_M000_IG11: ldr x0, [fp, #0xA8] ldr w1, [fp, #0xA4] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG18 add x0, x0, x1, LSL #4 add x0, x0, #16 G_M000_IG12: ldp x1, x2, [x0] stp x1, x2, [fp, #0x90] G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x90] mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] ldr x1, [fp, #0xF0] ldr x2, [fp, #0x98] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xF0] ldr w0, [fp, #0xA4] add w0, w0, #1 str w0, [fp, #0xA4] G_M000_IG14: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: add x0, fp, #16 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG16: ldr w0, [fp, #0xA4] ldr x1, [fp, #0xA8] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG11 ldr x0, [fp, #0xF0] ldr w0, [x0, #0x08] G_M000_IG17: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG18: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1480 816: JIT compiled BenchmarksGame.RegexRedux_1:RunBench() [Tier0, IL size=373, code size=1480] ; Assembly listing for method System.Text.RegularExpressions.Regex:.ctor(System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #42 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] str x3, [fp, #0x10] ldr x3, [fp, #0x10] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] ldr x0, [fp, #0x28] mov x4, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 817: JIT compiled System.Text.RegularExpressions.Regex:.ctor(System.String,int) [Tier0, IL size=15, code size=108] ; Assembly listing for method System.Text.RegularExpressions.Regex:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] str x2, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x0, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 104 818: JIT compiled System.Text.RegularExpressions.Regex:.cctor() [Tier0, IL size=21, code size=104] ; Assembly listing for method System.Text.RegularExpressions.Regex:InitDefaultMatchTimeout():System.TimeSpan ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] add x0, sp, #128 str x0, [fp, #0x78] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x1, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG03 ldr x1, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x0] str x1, [fp, #0x68] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x70] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #42 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x48] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x40] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x60] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG07 G_M000_IG07: ldr x0, [fp, #0x68] G_M000_IG08: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG09: stp fp, lr, [sp, #-0x20]! add x3, fp, #128 str x3, [sp, #0x18] G_M000_IG10: str x0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] add x1, fp, #104 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_BOX str x0, [fp, #0x20] ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x50] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 576 819: JIT compiled System.Text.RegularExpressions.Regex:InitDefaultMatchTimeout() [Tier0, IL size=98, code size=576] ; Assembly listing for method System.Text.RegularExpressions.Regex:.ctor(System.String,int,System.TimeSpan,System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str w2, [fp, #0x4C] str x3, [fp, #0x40] str x4, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x4, fp, #56 ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] ldr w2, [fp, #0x4C] ldr x3, [fp, #0x40] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str x0, [fp, #0x30] ldr w0, [fp, #0x4C] and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] ldr w2, [fp, #0x4C] ldr x3, [fp, #0x40] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x58] add x14, x14, #16 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 ldr w1, [fp, #0x4C] and w1, w1, #8 cbz w1, G_M000_IG05 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x1C] ldr w3, [fp, #0x1C] ldr x1, [fp, #0x30] ldr w2, [fp, #0x4C] ldr x0, [fp, #0x50] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x58] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldr x0, [fp, #0x58] ldr x0, [x0, #0x10] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x58] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 488 820: JIT compiled System.Text.RegularExpressions.Regex:.ctor(System.String,int,System.TimeSpan,System.Globalization.CultureInfo) [Tier0, IL size=118, code size=488] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidatePattern(System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG03 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 821: JIT compiled System.Text.RegularExpressions.Regex:ValidatePattern(System.String) [Tier0, IL size=11, code size=52] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidateOptions(int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] lsr w0, w0, #11 cbnz w0, G_M000_IG04 ldr w0, [fp, #0x1C] and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG03 ldr w0, [fp, #0x1C] movn w1, #0xD1FFAB1E and w0, w0, w1 cbnz w0, G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x1C] and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG05 ldr w0, [fp, #0x1C] mov w1, #0xD1FFAB1E and w0, w0, w1 cbz w0, G_M000_IG05 G_M000_IG04: mov w0, #11 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 822: JIT compiled System.Text.RegularExpressions.Regex:ValidateOptions(int) [Tier0, IL size=50, code size=112] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidateMatchTimeout(System.TimeSpan) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movn x1, #0xD1FFAB1E cmp x0, x1 beq G_M000_IG03 ldr x0, [fp, #0x10] sub x0, x0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 blo G_M000_IG03 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 823: JIT compiled System.Text.RegularExpressions.Regex:ValidateMatchTimeout(System.TimeSpan) [Tier0, IL size=40, code size=116] ; Assembly listing for method System.Text.RegularExpressions.Regex:Init(System.String,int,System.TimeSpan,byref):System.Text.RegularExpressions.RegexTree:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] str x3, [fp, #0x20] str x4, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] str w1, [x0, #0x40] ldr x0, [fp, #0x38] ldr x1, [fp, #0x20] str x1, [x0, #0x48] ldr x0, [fp, #0x18] ldr x0, [x0] cbnz x0, G_M000_IG03 ldr w0, [fp, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldr x2, [fp, #0x18] ldr x2, [x2] ldr x0, [fp, #0x30] ldr w1, [fp, #0x2C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr x14, [fp, #0x10] ldr x15, [x14, #0x28] ldr x14, [fp, #0x38] add x14, x14, #32 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x10] ldr x15, [x14, #0x20] ldr x14, [fp, #0x38] add x14, x14, #40 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x10] ldr x15, [x14, #0x30] ldr x14, [fp, #0x38] add x14, x14, #24 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x10] ldr w0, [x0, #0x3C] ldr x1, [fp, #0x38] str w0, [x1, #0x44] ldr x0, [fp, #0x10] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 248 824: JIT compiled System.Text.RegularExpressions.Regex:Init(System.String,int,System.TimeSpan,byref) [Tier0, IL size=96, code size=248] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:GetTargetCulture(int):System.Globalization.CultureInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] and w0, w0, #0xD1FFAB1E cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 825: JIT compiled System.Text.RegularExpressions.RegexParser:GetTargetCulture(int) [Tier0, IL size=21, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Parse(System.String,int,System.Globalization.CultureInfo):System.Text.RegularExpressions.RegexTree ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp x19, x20, [sp, #0xC0] stp x21, x22, [sp, #0xD0] stp x23, x24, [sp, #0xE0] stp x25, x26, [sp, #0xF0] stp x27, x28, [sp, #0xD1FFAB1E] stp fp, lr, [sp, #0xD1FFAB1E] add fp, sp, #0xD1FFAB1E sub x9, fp, #240 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] add x3, sp, #0xD1FFAB1E str x3, [fp, #-0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #-0x100] mov x21, x0 mov w19, w1 mov x20, x2 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 fmov s0, #1.0000 mov x0, x22 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add sp, sp, #16 ldr wzr, [sp], #-0x80 sub sp, sp, #16 add x0, sp, #16 mov w1, #32 str x0, [sp] str w1, [sp, #0x08] sub x0, fp, #240 mov x1, x21 mov w2, w19 mov x3, x20 mov x4, x22 mov w5, wzr mov x6, xzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG03: sub x0, fp, #240 sub x1, fp, #248 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [fp, #-0x98] mov w0, #1 str w0, [fp, #-0x90] strb wzr, [fp, #-0x7B] str wzr, [fp, #-0x70] str w19, [fp, #-0x80] str xzr, [fp, #-0xF0] sub x0, fp, #240 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 ldr x0, [fp, #-0xA8] ldr x22, [fp, #-0xB8] ldr w23, [fp, #-0x88] cbz x0, G_M000_IG05 G_M000_IG04: ldr w24, [x0, #0x08] cmp w24, w23 bne G_M000_IG06 G_M000_IG05: mov x22, xzr b G_M000_IG08 G_M000_IG06: sxtw w23, w24 mov w25, wzr cmp w24, #0 ble G_M000_IG08 movz x26, #0xD1FFAB1E movk x26, #0xD1FFAB1E LSL #16 movk x26, #0xD1FFAB1E LSL #32 add x27, x0, #16 G_M000_IG07: mov x0, x26 bl CORINFO_HELP_NEWSFAST mov x28, x0 ldr w0, [x27, w25, UXTW #2] str w0, [x28, #0x08] mov x0, x26 bl CORINFO_HELP_NEWSFAST str w25, [x0, #0x08] mov x2, x0 mov x1, x28 mov x0, x22 ldr x3, [x22] ldr x3, [x3, #0x48] ldr x3, [x3, #0x28] blr x3 add w25, w25, #1 cmp w24, w25 bgt G_M000_IG07 G_M000_IG08: ldr x0, [fp, #-0xA0] cbnz x0, G_M000_IG10 G_M000_IG09: mov x24, xzr b G_M000_IG11 G_M000_IG10: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x24, x0 G_M000_IG11: ldr x25, [fp, #-0xB0] ldrb w0, [fp, #-0x7C] cbnz w0, G_M000_IG13 G_M000_IG12: mov x26, xzr b G_M000_IG14 G_M000_IG13: mov x26, x20 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 add x14, x20, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #24 mov x15, x26 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #48 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF str w23, [x20, #0x3C] add x14, x20, #40 mov x15, x25 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #32 mov x15, x24 bl CORINFO_HELP_ASSIGN_REF str w19, [x20, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x1, x21 mov w2, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x20, #16 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG15: ldr x19, [fp, #-0x78] cbz x19, G_M000_IG17 G_M000_IG16: str xzr, [fp, #-0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG17: mov x0, x20 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x100] cmp xip0, xip1 beq G_M000_IG18 bl CORINFO_HELP_FAIL_FAST G_M000_IG18: sub sp, fp, #0xD1FFAB1E ldp fp, lr, [sp, #0xD1FFAB1E] ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xF0] ldp x23, x24, [sp, #0xE0] ldp x21, x22, [sp, #0xD0] ldp x19, x20, [sp, #0xC0] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG19: sub sp, sp, #128 stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] stp fp, lr, [sp, #0x70] add x3, fp, #16 str x3, [sp, #0x18] G_M000_IG20: ldr x19, [fp, #-0x78] cbz x19, G_M000_IG21 str xzr, [fp, #-0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG21: ldp fp, lr, [sp, #0x70] ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] add sp, sp, #128 ret lr ; Total bytes of code 960 826: JIT compiled System.Text.RegularExpressions.RegexParser:Parse(System.String,int,System.Globalization.CultureInfo) [Tier-0 switched to FullOpts, IL size=223, code size=960] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:.ctor(System.String,int,System.Globalization.CultureInfo,System.Collections.Hashtable,int,System.Collections.Hashtable,System.Span`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x28] str x0, [fp, #0x68] str x1, [fp, #0x60] str w2, [fp, #0x5C] str x3, [fp, #0x50] str x4, [fp, #0x48] str w5, [fp, #0x44] str x6, [fp, #0x38] G_M000_IG02: ldr x14, [fp, #0x68] add x14, x14, #40 ldr x15, [fp, #0x60] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x68] ldr w15, [fp, #0x5C] str w15, [x14, #0x70] ldr x14, [fp, #0x68] add x14, x14, #48 ldr x15, [fp, #0x50] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x68] str wzr, [x14, #0x5C] ldr x14, [fp, #0x68] strb wzr, [x14, #0x74] ldr x14, [fp, #0x68] add x14, x14, #56 ldr x15, [fp, #0x48] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x68] ldr w15, [fp, #0x44] str w15, [x14, #0x6C] ldr x14, [fp, #0x68] add x14, x14, #64 ldr x15, [fp, #0x38] bl CORINFO_HELP_CHECKED_ASSIGN_REF stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] ldr x1, [fp, #0x70] ldr x2, [fp, #0x78] add x0, fp, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x68] add x14, x14, #120 add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x68] str xzr, [x0] ldr x0, [fp, #0x68] str xzr, [x0, #0x08] ldr x0, [fp, #0x68] str xzr, [x0, #0x10] ldr x0, [fp, #0x68] str xzr, [x0, #0x18] ldr x0, [fp, #0x68] str xzr, [x0, #0x20] ldr x0, [fp, #0x68] str wzr, [x0, #0x58] ldr x0, [fp, #0x68] str wzr, [x0, #0x60] ldr x0, [fp, #0x68] str wzr, [x0, #0x64] ldr x0, [fp, #0x68] str wzr, [x0, #0x68] ldr x0, [fp, #0x68] str xzr, [x0, #0x48] ldr x0, [fp, #0x68] str xzr, [x0, #0x50] ldr x0, [fp, #0x68] strb wzr, [x0, #0x75] G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 328 827: JIT compiled System.Text.RegularExpressions.RegexParser:.ctor(System.String,int,System.Globalization.CultureInfo,System.Collections.Hashtable,int,System.Collections.Hashtable,System.Span`1[int]) [Tier0, IL size=157, code size=328] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[int]:.ctor(System.Span`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x14, [fp, #0x28] add x14, x14, #16 add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x28] str xzr, [x0] ldr x0, [fp, #0x28] str wzr, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 828: JIT compiled System.Collections.Generic.ValueListBuilder`1[int]:.ctor(System.Span`1[int]) [Tier0, IL size=22, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CountCaptures(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x48] mov w1, wzr mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x40] str wzr, [x0] ldr x0, [fp, #0x48] mov w1, #1 str w1, [x0, #0x60] mov w0, #0xD1FFAB1E str w0, [fp, #0x28] b G_M000_IG16 G_M000_IG03: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x3C] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #40 bhi G_M000_IG04 ldr w0, [fp, #0x38] cmp w0, #35 beq G_M000_IG05 ldr w0, [fp, #0x38] cmp w0, #40 beq G_M000_IG08 b G_M000_IG16 G_M000_IG04: ldr w0, [fp, #0x38] cmp w0, #41 beq G_M000_IG07 ldr w0, [fp, #0x38] cmp w0, #91 beq G_M000_IG06 ldr w0, [fp, #0x38] cmp w0, #92 bne G_M000_IG16 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG16 ldr x0, [fp, #0x48] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG16 G_M000_IG05: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG16 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG16 G_M000_IG06: ldr x0, [fp, #0x48] mov w1, wzr mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG16 G_M000_IG07: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG16 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG16 G_M000_IG08: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 blt G_M000_IG09 ldr x0, [fp, #0x48] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #35 bne G_M000_IG09 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #63 bne G_M000_IG09 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG15 G_M000_IG09: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG14 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #63 bne G_M000_IG14 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 ble G_M000_IG12 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #60 beq G_M000_IG10 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #39 bne G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #48 beq G_M000_IG15 ldr w0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG15 ldr w0, [fp, #0x38] sub w0, w0, #49 cmp w0, #8 bhi G_M000_IG11 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x48] ldr w2, [fp, #0x3C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG15 G_M000_IG11: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x48] ldr w2, [fp, #0x3C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG15 G_M000_IG12: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x40] ldr w0, [x0] ldr x1, [fp, #0x48] ldr w1, [x1, #0x70] orr w0, w0, w1 ldr x1, [fp, #0x40] str w0, [x1] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG15 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #41 bne G_M000_IG13 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG15 G_M000_IG13: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #40 bne G_M000_IG15 ldr x0, [fp, #0x48] mov w1, #1 strb w1, [x0, #0x75] b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG15 ldr x0, [fp, #0x48] ldrb w0, [x0, #0x75] cbnz w0, G_M000_IG15 ldr x0, [fp, #0x48] ldr w0, [x0, #0x60] str w0, [fp, #0x34] ldr w0, [fp, #0x34] add w0, w0, #1 ldr x1, [fp, #0x48] str w0, [x1, #0x60] ldr x0, [fp, #0x48] ldr w1, [fp, #0x34] ldr w2, [fp, #0x3C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldr x0, [fp, #0x48] strb wzr, [x0, #0x75] G_M000_IG16: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #40 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 bgt G_M000_IG03 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG19: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 1472 829: JIT compiled System.Text.RegularExpressions.RegexParser:CountCaptures(byref) [Tier0, IL size=481, code size=1472] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:NoteCaptureSlot(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x58] str w1, [fp, #0x54] str w2, [fp, #0x50] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr w1, [fp, #0x54] str w1, [x0, #0x08] ldr x0, [fp, #0x40] str x0, [fp, #0x48] ldr x0, [fp, #0x58] ldr x0, [x0, #0x38] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x48] ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x2, [fp, #0x58] ldr x2, [x2, #0x38] str x2, [fp, #0x38] ldr x2, [fp, #0x40] ldr w0, [fp, #0x50] str w0, [x2, #0x08] ldr x2, [fp, #0x40] ldr x0, [fp, #0x38] ldr x1, [fp, #0x48] ldr x3, [fp, #0x38] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x0, [fp, #0x58] ldr w0, [x0, #0x64] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x64] ldr x0, [fp, #0x58] ldr w0, [x0, #0x68] ldr w1, [fp, #0x54] cmp w0, w1 bgt G_M000_IG05 ldr x0, [fp, #0x58] str x0, [fp, #0x30] ldr w0, [fp, #0x54] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG03 ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr w0, [fp, #0x54] add w0, w0, #1 str w0, [fp, #0x24] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr w0, [fp, #0x54] str w0, [fp, #0x24] G_M000_IG04: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] str w1, [x0, #0x68] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 324 830: JIT compiled System.Text.RegularExpressions.RegexParser:NoteCaptureSlot(int,int) [Tier0, IL size=83, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CharsRight():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] ldr w0, [x0, #0x08] ldr x1, [fp, #0x18] ldr w1, [x1, #0x58] sub w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 831: JIT compiled System.Text.RegularExpressions.RegexParser:CharsRight() [Tier0, IL size=19, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Textpos():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 832: JIT compiled System.Text.RegularExpressions.RegexParser:Textpos() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightCharMoveRight():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x28] str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr w0, [x0, #0x58] str w0, [fp, #0x24] ldr w0, [fp, #0x24] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x58] ldr x0, [fp, #0x18] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 104 833: JIT compiled System.Text.RegularExpressions.RegexParser:RightCharMoveRight() [Tier0, IL size=29, code size=104] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AssignNameSlots():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #224 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] cbz x0, G_M000_IG08 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG07 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x60] add w0, w0, #1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1, #0x60] G_M000_IG04: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #88 mov w1, #29 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x60] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x50] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x50] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x48] ldr x1, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2, #0x40] str x2, [fp, #0x60] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x60] ldr x0, [fp, #0x68] str w2, [x0, #0x08] ldr x2, [fp, #0x68] ldr x0, [fp, #0x60] ldr x1, [fp, #0xD1FFAB1E] ldr x3, [fp, #0x60] ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x28] blr x3 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x60] ldr x0, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x60] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] str w1, [x0, #0x60] ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 str w1, [fp, #0xD1FFAB1E] G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bgt G_M000_IG04 G_M000_IG08: ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x64] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x68] cmp w1, w0 bge G_M000_IG13 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x64] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #72 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x38] str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] ldr x1, [x1, #0x48] ldr x1, [x1, #0x38] blr x1 str x0, [fp, #0xD1FFAB1E] b G_M000_IG10 G_M000_IG09: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0x84] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x48] str x0, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x38] ldr x1, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0x74] ldr x0, [fp, #0x78] ldr w1, [fp, #0x84] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x74] str w1, [x0] G_M000_IG10: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #88 mov w1, #214 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG09 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] cbnz x0, G_M000_IG14 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x48] cbz x0, G_M000_IG27 G_M000_IG14: str wzr, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] cbnz x0, G_M000_IG15 str xzr, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #64 ldr x15, [fp, #0x90] bl CORINFO_HELP_CHECKED_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #80 ldr x15, [fp, #0x88] bl CORINFO_HELP_CHECKED_ASSIGN_REF movn w0, #0 str w0, [fp, #0xFC] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x50] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD8] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #80 ldr x15, [fp, #0xD8] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] str x0, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xD0] ldr x2, [fp, #0xD0] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0xFC] G_M000_IG16: str wzr, [fp, #0xF4] b G_M000_IG24 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x48] cbz x0, G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x48] ldr w1, [fp, #0xF4] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0xCC] b G_M000_IG19 G_M000_IG18: ldr w0, [fp, #0xF4] str w0, [fp, #0xCC] G_M000_IG19: ldr w0, [fp, #0xCC] str w0, [fp, #0xE8] ldr w0, [fp, #0xFC] ldr w1, [fp, #0xE8] cmp w0, w1 bne G_M000_IG22 ldr w0, [fp, #0xF8] str w0, [fp, #0xB4] ldr w0, [fp, #0xF8] add w0, w0, #1 str w0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x50] str x0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xB4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xF8] cmp w0, w1 beq G_M000_IG20 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x40] str x0, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x98] ldr x2, [fp, #0x98] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x0] str w1, [fp, #0xA4] b G_M000_IG21 G_M000_IG20: movn w1, #0 str w1, [fp, #0xA4] G_M000_IG21: ldr w1, [fp, #0xA4] str w1, [fp, #0xFC] b G_M000_IG23 G_M000_IG22: ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x30] add x0, fp, #232 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x50] ldr x1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC0] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2, #0x40] str x2, [fp, #0xB8] ldr x2, [fp, #0xC0] ldr w0, [fp, #0xE8] str w0, [x2, #0x08] ldr x2, [fp, #0xC0] ldr x0, [fp, #0xB8] ldr x1, [fp, #0xE0] ldr x3, [fp, #0xB8] ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x28] blr x3 G_M000_IG23: ldr w0, [fp, #0xF4] add w0, w0, #1 str w0, [fp, #0xF4] G_M000_IG24: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG26 G_M000_IG25: add x0, fp, #88 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG26: ldr w0, [fp, #0xF4] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x64] cmp w0, w1 blt G_M000_IG17 G_M000_IG27: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1836 834: JIT compiled System.Text.RegularExpressions.RegexParser:AssignNameSlots() [Tier0, IL size=512, code size=1836] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanRegex():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #240 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: str wzr, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] and w2, w2, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, #28 mov w3, wzr movn w4, #0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #0xD1FFAB1E str w0, [fp, #0x58] b G_M000_IG66 G_M000_IG03: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG11 b G_M000_IG07 G_M000_IG04: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #88 mov w1, #58 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x60] ldr w0, [fp, #0x60] uxth w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #123 bne G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 b G_M000_IG12 G_M000_IG08: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #88 mov w1, #103 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] ldr w0, [fp, #0x64] uxth w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0x64] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG08 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #123 bne G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG08 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG13 mov w0, #33 str w0, [fp, #0xD1FFAB1E] b G_M000_IG15 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] uxth w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG14 ldr w0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG15 G_M000_IG14: mov w0, #32 str w0, [fp, #0xD1FFAB1E] G_M000_IG15: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bge G_M000_IG19 ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] sub w0, w0, w1 str w0, [fp, #0x70] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG16 ldr w0, [fp, #0x70] str w0, [fp, #0x6C] str wzr, [fp, #0x68] b G_M000_IG17 G_M000_IG16: ldr w0, [fp, #0x70] str w0, [fp, #0x6C] mov w0, #1 str w0, [fp, #0x68] G_M000_IG17: ldr w0, [fp, #0x6C] ldr w1, [fp, #0x68] sub w0, w0, w1 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 ble G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG18: ldr w1, [fp, #0xD1FFAB1E] cbz w1, G_M000_IG19 ldr w1, [fp, #0xD1FFAB1E] sub w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x54] ldr w1, [fp, #0x54] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #63 bhi G_M000_IG21 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #32 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #14 bhi G_M000_IG20 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG20: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #63 beq G_M000_IG42 b G_M000_IG46 G_M000_IG21: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #91 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #3 bhi G_M000_IG22 ldr w0, [fp, #0x10] mov w0, w0 adr x1, [@RWD60] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG22: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #123 beq G_M000_IG42 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #124 beq G_M000_IG26 b G_M000_IG46 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x50] ldr w1, [fp, #0x50] ldr x0, [fp, #0xD1FFAB1E] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] and w2, w2, #0xD1FFAB1E ldr x0, [fp, #0xB0] ldr x3, [fp, #0xD1FFAB1E] mov w1, #11 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #32 ldr x15, [fp, #0xB0] bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG46 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG66 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG66 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG66 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG29 G_M000_IG28: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] mov w1, #30 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG46 b G_M000_IG66 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG32 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x40] ldr x2, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] mov w1, #13 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG46 G_M000_IG33: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG34 ldr x0, [fp, #0xD0] str x0, [fp, #0xC8] mov w0, #18 str w0, [fp, #0xC4] b G_M000_IG35 G_M000_IG34: ldr x0, [fp, #0xD0] str x0, [fp, #0xC8] mov w0, #14 str w0, [fp, #0xC4] G_M000_IG35: ldr x0, [fp, #0xC8] ldr w1, [fp, #0xC4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG46 G_M000_IG36: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG37 ldr x0, [fp, #0x80] str x0, [fp, #0x78] mov w0, #20 str w0, [fp, #0x74] b G_M000_IG38 G_M000_IG37: ldr x0, [fp, #0x80] str x0, [fp, #0x78] mov w0, #15 str w0, [fp, #0x74] G_M000_IG38: ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG46 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG40 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] and w2, w2, #0xD1FFAB1E ldr x0, [fp, #0x88] mov w1, #10 mov w3, #10 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xA8] str x0, [fp, #0x98] ldr x0, [fp, #0x88] str x0, [fp, #0x90] b G_M000_IG41 G_M000_IG40: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] and w2, w2, #0xD1FFAB1E ldr x0, [fp, #0xA0] mov w1, #11 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0xA8] str x14, [fp, #0x98] ldr x14, [fp, #0xA0] str x14, [fp, #0x90] G_M000_IG41: ldr x14, [fp, #0x98] add x14, x14, #32 ldr x15, [fp, #0x90] bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG46 G_M000_IG42: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG45 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG43 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xE0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xD8] ldr x1, [fp, #0xE0] ldr w0, [fp, #0xD1FFAB1E] strh w0, [x1, #0x08] ldr x1, [fp, #0xE0] ldr x0, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x0, [fp, #0xD1FFAB1E] mov w1, #29 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xE8] b G_M000_IG44 G_M000_IG43: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xF0] ldr x1, [fp, #0xF8] ldr w0, [fp, #0xD1FFAB1E] strh w0, [x1, #0x08] ldr x1, [fp, #0xF8] ldr x0, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] mov w1, #28 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xE8] G_M000_IG44: ldr x0, [fp, #0xE8] bl CORINFO_HELP_THROW G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG46: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG47 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xC0] ldr w0, [fp, #0xC0] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xC0] cbnz w0, G_M000_IG48 G_M000_IG47: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG66 G_M000_IG48: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG63 G_M000_IG49: str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #43 bhi G_M000_IG50 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #42 beq G_M000_IG51 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #43 beq G_M000_IG53 b G_M000_IG59 G_M000_IG50: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #63 beq G_M000_IG52 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #123 beq G_M000_IG54 b G_M000_IG59 G_M000_IG51: movn w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0xD1FFAB1E] b G_M000_IG59 G_M000_IG52: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG59 G_M000_IG53: mov w0, #1 str w0, [fp, #0xD1FFAB1E] movn w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0xD1FFAB1E] b G_M000_IG59 G_M000_IG54: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xBC] ldr w0, [fp, #0xBC] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xBC] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG57 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG57 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #44 bne G_M000_IG57 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG55 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #125 beq G_M000_IG55 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xB8] b G_M000_IG56 G_M000_IG55: movn w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0xB8] G_M000_IG56: ldr w0, [fp, #0xB8] str w0, [fp, #0xD1FFAB1E] G_M000_IG57: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 beq G_M000_IG58 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG58 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #125 beq G_M000_IG59 G_M000_IG58: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] sub w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG66 G_M000_IG59: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG60 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #63 bne G_M000_IG60 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG60: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG62 G_M000_IG61: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] mov w1, #27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG62: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG63: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG65 G_M000_IG64: add x0, fp, #88 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG65: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG49 G_M000_IG66: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #0 bgt G_M000_IG68 G_M000_IG67: add x0, fp, #88 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG68: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 bgt G_M000_IG03 G_M000_IG69: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG71 G_M000_IG70: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] mov w1, #26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG71: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG72: ldp fp, lr, [sp], #0xD1FFAB1E ret lr RWD00 dd G_M000_IG66 - G_M000_IG02 dd G_M000_IG69 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG36 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 RWD60 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 ; Total bytes of code 3984 835: JIT compiled System.Text.RegularExpressions.RegexParser:ScanRegex() [Tier0, IL size=1150, code size=3984] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] str w3, [fp, #0x1C] str w4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x24] uxtb w1, w1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x20] str w1, [x0, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 160 836: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,int,int) [Tier0, IL size=36, code size=160] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Kind(ubyte):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x2E] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 837: JIT compiled System.Text.RegularExpressions.RegexNode:set_Kind(ubyte) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_M(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 838: JIT compiled System.Text.RegularExpressions.RegexNode:set_M(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_N(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 839: JIT compiled System.Text.RegularExpressions.RegexNode:set_N(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:StartGroup(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x28] ldr w2, [x2, #0x70] ldr x0, [fp, #0x18] mov w1, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x28] add x14, x14, #16 ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x28] ldr w2, [x2, #0x70] ldr x0, [fp, #0x10] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 192 840: JIT compiled System.Text.RegularExpressions.RegexParser:StartGroup(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=46, code size=192] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x14] uxtb w1, w1 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr w1, [fp, #0x10] str w1, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 841: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int) [Tier0, IL size=21, code size=96] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBlank():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG22 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #32 mov w1, #19 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG09 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #32 mov w1, #28 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG03 G_M000_IG09: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG33 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #35 bne G_M000_IG14 b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG04 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #32 mov w1, #79 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #10 bne G_M000_IG10 b G_M000_IG04 G_M000_IG14: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #3 blt G_M000_IG33 ldr x0, [fp, #0x28] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #35 bne G_M000_IG33 ldr x0, [fp, #0x28] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #63 bne G_M000_IG33 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #40 bne G_M000_IG33 b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG16: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG19 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #32 mov w1, #161 bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #41 bne G_M000_IG15 G_M000_IG19: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG21 G_M000_IG20: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0x28] mov w1, #14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG21: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG04 G_M000_IG22: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG24 G_M000_IG23: add x0, fp, #32 mov w1, #204 bl CORINFO_HELP_PATCHPOINT G_M000_IG24: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #3 blt G_M000_IG25 ldr x0, [fp, #0x28] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #35 bne G_M000_IG25 ldr x0, [fp, #0x28] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #63 bne G_M000_IG25 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #40 beq G_M000_IG27 G_M000_IG25: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG26: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG27: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG30 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG29 G_M000_IG28: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG29: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #41 bne G_M000_IG26 G_M000_IG30: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG32 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0x28] mov w1, #14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG32: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG22 G_M000_IG33: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 1236 842: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBlank() [Tier0, IL size=302, code size=1236] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionX():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x70] and w0, w0, #32 cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 843: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionX() [Tier0, IL size=13, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightChar(int):ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] ldr x1, [fp, #0x18] ldr w1, [x1, #0x58] ldr w2, [fp, #0x14] add w1, w1, w2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 80 844: JIT compiled System.Text.RegularExpressions.RegexParser:RightChar(int) [Tier0, IL size=20, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightChar():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] ldr x1, [fp, #0x18] ldr w1, [x1, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 68 845: JIT compiled System.Text.RegularExpressions.RegexParser:RightChar() [Tier0, IL size=18, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsSpecial(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str w0, [fp, #0x3C] G_M000_IG02: ldr w0, [fp, #0x3C] uxth w0, w0 cmp w0, #124 bgt G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG03: ldp x0, x1, [fp, #0x18] stp x0, x1, [fp, #0x28] G_M000_IG04: ldr w0, [fp, #0x3C] uxth w0, w0 ldr w1, [fp, #0x30] cmp w0, w1 bhs G_M000_IG08 ldr x0, [fp, #0x28] ldr w1, [fp, #0x3C] uxth w1, w1 ldrb w0, [x0, w1, UXTW #2] cmp w0, #4 cset x0, ge G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 144 846: JIT compiled System.Text.RegularExpressions.RegexParser:IsSpecial(ushort) [Tier0, IL size=29, code size=144] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:get_Category():System.ReadOnlySpan`1[ubyte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: stp xzr, xzr, [fp, #0x10] add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #128 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 847: JIT compiled System.Text.RegularExpressions.RegexParser:get_Category() [Tier0, IL size=16, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:MoveRight():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x58] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 848: JIT compiled System.Text.RegularExpressions.RegexParser:MoveRight() [Tier0, IL size=15, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsQuantifier(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str w0, [fp, #0x3C] G_M000_IG02: ldr w0, [fp, #0x3C] uxth w0, w0 cmp w0, #123 bgt G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG03: ldp x0, x1, [fp, #0x18] stp x0, x1, [fp, #0x28] G_M000_IG04: ldr w0, [fp, #0x3C] uxth w0, w0 ldr w1, [fp, #0x30] cmp w0, w1 bhs G_M000_IG08 ldr x0, [fp, #0x28] ldr w1, [fp, #0x3C] uxth w1, w1 ldrb w0, [x0, w1, UXTW #2] cmp w0, #5 cset x0, ge G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 144 849: JIT compiled System.Text.RegularExpressions.RegexParser:IsQuantifier(ushort) [Tier0, IL size=29, code size=144] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate(int,int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] str x0, [fp, #0xB8] str w1, [fp, #0xB4] str w2, [fp, #0xB0] str w3, [fp, #0xAC] G_M000_IG02: ldr w3, [fp, #0xB0] str w3, [fp, #0xA8] mov w3, #0xD1FFAB1E str w3, [fp, #0x28] ldr w3, [fp, #0xA8] cmp w3, #1 bgt G_M000_IG08 ldr w3, [fp, #0xA8] cbz w3, G_M000_IG03 ldr w3, [fp, #0xA8] cmp w3, #1 beq G_M000_IG04 b G_M000_IG11 G_M000_IG03: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG04: ldr x3, [fp, #0xB8] ldr x3, [x3, #0x18] str x3, [fp, #0x48] ldr x3, [fp, #0xB8] ldr x3, [x3, #0x28] ldr w2, [fp, #0xB4] ldr w0, [x3, #0x08] cmp w2, w0 bhs G_M000_IG19 add x3, x3, x2, LSL #1 add x3, x3, #12 ldrh w3, [x3] str w3, [fp, #0x44] ldr w3, [fp, #0xAC] uxtb w3, w3 cbnz w3, G_M000_IG05 ldr x3, [fp, #0x48] str x3, [fp, #0x38] ldr w3, [fp, #0x44] str w3, [fp, #0x34] ldr x3, [fp, #0xB8] ldr w3, [x3, #0x70] str w3, [fp, #0x30] b G_M000_IG06 G_M000_IG05: ldr x3, [fp, #0x48] str x3, [fp, #0x38] ldr w3, [fp, #0x44] str w3, [fp, #0x34] ldr x3, [fp, #0xB8] ldr w3, [x3, #0x70] and w3, w3, #0xD1FFAB1E str w3, [fp, #0x30] G_M000_IG06: ldr x3, [fp, #0xB8] ldrsb wzr, [x3] ldr x3, [fp, #0xB8] add x3, x3, #92 ldr x2, [fp, #0xB8] ldr x2, [x2, #0x30] ldr w0, [fp, #0x34] ldr w1, [fp, #0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG08: ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 cset x0, eq ldr w1, [fp, #0xAC] uxtb w1, w1 orr w0, w0, w1 cbnz w0, G_M000_IG09 ldr x0, [fp, #0xB8] ldr x0, [x0, #0x28] ldr w1, [fp, #0xB4] ldr w2, [fp, #0xB0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x68] str x1, [fp, #0x70] ldr x0, [fp, #0x68] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0xB8] ldr x0, [x0, #0x18] str x0, [fp, #0x88] ldr x0, [fp, #0xB8] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0x84] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] ldr x0, [fp, #0xB8] ldr x0, [x0, #0x28] ldr w1, [fp, #0xB4] ldr w2, [fp, #0xB0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0x18] ldr x3, [fp, #0x18] ldr x0, [fp, #0x78] ldr w2, [fp, #0x84] mov w1, #12 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x88] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG10: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG11: ldr x0, [fp, #0xB8] ldr x0, [x0, #0x28] ldr w1, [fp, #0xB4] ldr w2, [fp, #0xB0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x58] str x1, [fp, #0x60] G_M000_IG12: ldp x0, x1, [fp, #0x58] stp x0, x1, [fp, #0x98] G_M000_IG13: str wzr, [fp, #0x94] b G_M000_IG15 G_M000_IG14: ldr w3, [fp, #0x94] ldr w1, [fp, #0xA0] cmp w3, w1 bhs G_M000_IG19 ldr x3, [fp, #0x98] ldr w1, [fp, #0x94] mov w1, w1 lsl x1, x1, #1 ldrh w3, [x3, x1] str w3, [fp, #0x90] ldr x3, [fp, #0xB8] ldr x3, [x3, #0x18] str x3, [fp, #0x50] ldr x3, [fp, #0xB8] ldrsb wzr, [x3] ldr x3, [fp, #0xB8] add x3, x3, #92 ldr x1, [fp, #0xB8] ldr w1, [x1, #0x70] ldr x2, [fp, #0xB8] ldr x2, [x2, #0x30] ldr w0, [fp, #0x90] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] G_M000_IG15: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #40 mov w1, #221 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr w3, [fp, #0x94] ldr w1, [fp, #0xA0] cmp w3, w1 blt G_M000_IG14 G_M000_IG18: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 916 850: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate(int,int,bool) [Tier0, IL size=232, code size=916] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:CreateOneWithCaseConversion(ushort,int,System.Globalization.CultureInfo,byref):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str w0, [fp, #0x5C] str w1, [fp, #0x58] str x2, [fp, #0x50] str x3, [fp, #0x48] G_M000_IG02: ldr w0, [fp, #0x58] and w0, w0, #1 cbz w0, G_M000_IG06 ldr w0, [fp, #0x5C] uxth w0, w0 add x3, fp, #56 ldr x1, [fp, #0x50] ldr x2, [fp, #0x48] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr w2, [fp, #0x58] and w2, w2, #0xD1FFAB1E ldr w3, [fp, #0x5C] uxth w3, w3 ldr x0, [fp, #0x18] mov w1, #9 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr w2, [fp, #0x58] and w2, w2, #0xD1FFAB1E ldr x0, [fp, #0x20] ldr x3, [fp, #0x30] mov w1, #11 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr w3, [fp, #0x5C] uxth w3, w3 ldr x0, [fp, #0x28] ldr w2, [fp, #0x58] mov w1, #9 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x28] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 348 851: JIT compiled System.Text.RegularExpressions.RegexNode:CreateOneWithCaseConversion(ushort,int,System.Globalization.CultureInfo,byref) [Tier0, IL size=60, code size=348] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] str w3, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x24] uxtb w1, w1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x28] ldr w0, [fp, #0x20] str w0, [x1, #0x28] ldr w1, [fp, #0x1C] uxth w1, w1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 852: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,ushort) [Tier0, IL size=28, code size=132] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Ch(ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strh w1, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 853: JIT compiled System.Text.RegularExpressions.RegexNode:set_Ch(ushort) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:AddChild(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x14, [fp, #0x30] add x14, x14, #24 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x14, [fp, #0x30] add x14, x14, #24 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] ldr x14, [x14, #0x08] cbnz x14, G_M000_IG04 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x1, [fp, #0x38] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] cbz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x20] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x1, [fp, #0x38] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 396 854: JIT compiled System.Text.RegularExpressions.RegexNode:AddChild(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=97, code size=396] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:Reduce():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x24] cmp w0, #13 beq G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x28] and w0, w0, #0xD1FFAB1E ldr x1, [fp, #0x28] str w0, [x1, #0x28] G_M000_IG03: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #8 bhi G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #5 beq G_M000_IG12 ldr w0, [fp, #0x14] cmp w0, #8 beq G_M000_IG12 b G_M000_IG15 G_M000_IG04: ldr w0, [fp, #0x14] cmp w0, #11 beq G_M000_IG12 ldr w0, [fp, #0x14] sub w0, w0, #24 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #10 bhi G_M000_IG05 ldr w0, [fp, #0x10] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG05: ldr w0, [fp, #0x14] cmp w0, #45 beq G_M000_IG12 b G_M000_IG15 G_M000_IG06: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG07: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG08: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG09: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG10: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG11: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG12: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG13: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG16: ldr x0, [fp, #0x18] G_M000_IG17: ldp fp, lr, [sp], #0x30 ret lr RWD00 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 ; Total bytes of code 532 855: JIT compiled System.Text.RegularExpressions.RegexNode:Reduce() [Tier0, IL size=204, code size=532] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Kind():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x2E] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 856: JIT compiled System.Text.RegularExpressions.RegexNode:get_Kind() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionS():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x70] and w0, w0, #16 cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 857: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionS() [Tier0, IL size=13, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsTrueQuantifier():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x20] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] ldr x0, [fp, #0x68] ldr w1, [fp, #0x64] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x60] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x60] cmp w0, #123 beq G_M000_IG06 ldr w0, [fp, #0x60] cmp w0, #123 bgt G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] str x1, [fp, #0x28] G_M000_IG03: ldp x0, x1, [fp, #0x20] stp x0, x1, [fp, #0x48] G_M000_IG04: ldr w0, [fp, #0x60] ldr w1, [fp, #0x50] cmp w0, w1 bhs G_M000_IG25 ldr x0, [fp, #0x48] ldr w1, [fp, #0x60] ldrb w0, [x0, w1, UXTW #2] cmp w0, #5 cset x0, ge str w0, [fp, #0x14] b G_M000_IG23 G_M000_IG05: b G_M000_IG21 G_M000_IG06: ldr w0, [fp, #0x64] str w0, [fp, #0x5C] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x58] G_M000_IG07: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #24 mov w1, #59 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x44] ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x44] cmp w0, #0 ble G_M000_IG10 ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x34] ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] ldr x0, [fp, #0x68] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x30] ldr w0, [fp, #0x30] uxth w0, w0 str w0, [fp, #0x60] ldr w0, [fp, #0x30] sub w0, w0, #48 cmp w0, #9 bls G_M000_IG07 G_M000_IG10: ldr w0, [fp, #0x58] cbz w0, G_M000_IG11 ldr w0, [fp, #0x5C] ldr w1, [fp, #0x64] sub w0, w0, w1 cmp w0, #1 bne G_M000_IG12 G_M000_IG11: b G_M000_IG21 G_M000_IG12: ldr w0, [fp, #0x60] cmp w0, #125 bne G_M000_IG15 b G_M000_IG13 G_M000_IG13: mov w0, #1 G_M000_IG14: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG15: ldr w0, [fp, #0x60] cmp w0, #44 beq G_M000_IG16 b G_M000_IG21 G_M000_IG16: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #24 mov w1, #112 bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x58] sub w0, w0, #1 str w0, [fp, #0x58] ldr w0, [fp, #0x40] cmp w0, #0 ble G_M000_IG19 ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x3C] ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] ldr x0, [fp, #0x68] ldr w1, [fp, #0x3C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x38] ldr w0, [fp, #0x38] uxth w0, w0 str w0, [fp, #0x60] ldr w0, [fp, #0x38] sub w0, w0, #48 cmp w0, #9 bls G_M000_IG16 G_M000_IG19: ldr w0, [fp, #0x58] cmp w0, #0 ble G_M000_IG20 ldr w0, [fp, #0x60] cmp w0, #125 cset x0, eq str w0, [fp, #0x14] b G_M000_IG23 G_M000_IG20: b G_M000_IG21 G_M000_IG21: mov w0, wzr G_M000_IG22: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG23: ldr w0, [fp, #0x14] uxtb w0, w0 G_M000_IG24: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG25: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 692 858: JIT compiled System.Text.RegularExpressions.RegexParser:IsTrueQuantifier() [Tier0, IL size=152, code size=692] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CharAt(int):ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] ldr w1, [fp, #0x14] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 68 859: JIT compiled System.Text.RegularExpressions.RegexParser:CharAt(int) [Tier0, IL size=13, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Unit():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 860: JIT compiled System.Text.RegularExpressions.RegexParser:Unit() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate(bool,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] str w3, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] ldr w1, [fp, #0x34] uxtb w1, w1 ldr w2, [fp, #0x30] ldr w3, [fp, #0x2C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x38] str xzr, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 144 861: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate(bool,int,int) [Tier0, IL size=33, code size=144] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeQuantifier(bool,int,int):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str w1, [fp, #0x74] str w2, [fp, #0x70] str w3, [fp, #0x6C] G_M000_IG02: ldr w0, [fp, #0x70] ldr w1, [fp, #0x6C] cmp w0, w1 bne G_M000_IG06 ldr w0, [fp, #0x6C] str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #64 bgt G_M000_IG06 ldr w0, [fp, #0x68] cbz w0, G_M000_IG03 ldr w0, [fp, #0x68] cmp w0, #1 beq G_M000_IG04 b G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x2, [fp, #0x78] ldr w2, [x2, #0x28] ldr x0, [fp, #0x30] mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG04: ldr x0, [fp, #0x78] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG05: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #9 bne G_M000_IG06 ldr x0, [fp, #0x78] mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x24] ldr w1, [fp, #0x6C] bl System.String:.ctor(ushort,int):this str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG06: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x5C] ldr w0, [fp, #0x5C] sub w0, w0, #9 cmp w0, #2 bhi G_M000_IG09 ldr x0, [fp, #0x78] str x0, [fp, #0x48] ldr w0, [fp, #0x74] uxtb w0, w0 cbnz w0, G_M000_IG07 ldr x0, [fp, #0x48] str x0, [fp, #0x40] mov w0, #3 str w0, [fp, #0x3C] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x48] str x0, [fp, #0x40] mov w0, #6 str w0, [fp, #0x3C] G_M000_IG08: ldr x0, [fp, #0x40] ldr w1, [fp, #0x3C] ldr w2, [fp, #0x70] ldr w3, [fp, #0x6C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x78] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG09: ldr w0, [fp, #0x74] uxtb w0, w0 cbnz w0, G_M000_IG10 mov w0, #26 str w0, [fp, #0x58] b G_M000_IG11 G_M000_IG10: mov w0, #27 str w0, [fp, #0x58] G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x2, [fp, #0x78] ldr w2, [x2, #0x28] ldr x0, [fp, #0x50] ldr w1, [fp, #0x58] ldr w3, [fp, #0x70] ldr w4, [fp, #0x6C] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x50] str x0, [fp, #0x60] ldr x0, [fp, #0x60] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x60] str x0, [fp, #0x28] b G_M000_IG12 G_M000_IG12: ldr x0, [fp, #0x28] G_M000_IG13: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 664 862: JIT compiled System.Text.RegularExpressions.RegexNode:MakeQuantifier(bool,int,int) [Tier0, IL size=144, code size=664] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeRep(ubyte,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] str w3, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x24] uxtb w1, w1 sub w1, w1, #9 uxtb w1, w1 add w1, w0, w1 uxtb w1, w1 str w1, [fp, #0x18] ldr w1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 863: JIT compiled System.Text.RegularExpressions.RegexNode:MakeRep(ubyte,int,int) [Tier0, IL size=34, code size=168] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddAlternate():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] ldr w0, [fp, #0x44] sub w0, w0, #33 cmp w0, #1 bhi G_M000_IG03 mov w0, #1 str w0, [fp, #0x40] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x40] G_M000_IG04: ldr w0, [fp, #0x40] cbz w0, G_M000_IG05 ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] str x0, [fp, #0x38] ldr x0, [fp, #0x48] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x2, [fp, #0x48] ldr w2, [x2, #0x70] ldr x0, [fp, #0x30] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x48] add x14, x14, #24 ldr x15, [fp, #0x30] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 348 864: JIT compiled System.Text.RegularExpressions.RegexParser:AddAlternate() [Tier0, IL size=94, code size=348] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReverseConcatenationIfRightToLeft():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #25 bne G_M000_IG03 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 ble G_M000_IG03 ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 168 865: JIT compiled System.Text.RegularExpressions.RegexNode:ReverseConcatenationIfRightToLeft() [Tier0, IL size=48, code size=168] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenation():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x30] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr w0, [fp, #0x30] cbz w0, G_M000_IG03 ldr w0, [fp, #0x30] cmp w0, #1 beq G_M000_IG05 b G_M000_IG07 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x38] ldr w2, [x2, #0x28] ldr x0, [fp, #0x18] mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x34] str wzr, [fp, #0x2C] b G_M000_IG11 G_M000_IG08: ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #22 bne G_M000_IG10 ldr x0, [fp, #0x20] G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: ldr w0, [fp, #0x2C] add w0, w0, #1 str w0, [fp, #0x2C] G_M000_IG11: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #16 mov w1, #73 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr w0, [fp, #0x2C] ldr w1, [fp, #0x34] cmp w0, w1 blt G_M000_IG08 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 444 866: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenation() [Tier0, IL size=96, code size=444] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ChildCount():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] cbnz x0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbz x0, G_M000_IG06 ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 140 867: JIT compiled System.Text.RegularExpressions.RegexNode:ChildCount() [Tier0, IL size=34, code size=140] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:Child(int):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] cbnz x1, G_M000_IG04 ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 172 868: JIT compiled System.Text.RegularExpressions.RegexNode:Child(int) [Tier0, IL size=35, code size=172] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentLoops():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #96 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x88] b G_M000_IG54 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x28] cmp w0, w1 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #3 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #8 bhi G_M000_IG04 ldr w0, [fp, #0x18] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #43 cmp w0, #1 bls G_M000_IG06 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #45 beq G_M000_IG08 b G_M000_IG53 G_M000_IG05: str wzr, [fp, #0xD1FFAB1E] b G_M000_IG10 G_M000_IG06: mov w0, #3 str w0, [fp, #0xD1FFAB1E] b G_M000_IG10 G_M000_IG07: mov w0, #4 str w0, [fp, #0xD1FFAB1E] b G_M000_IG10 G_M000_IG08: mov w0, #6 str w0, [fp, #0xD1FFAB1E] b G_M000_IG12 G_M000_IG09: mov w0, #7 str w0, [fp, #0xD1FFAB1E] b G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD4] cmp w0, w1 beq G_M000_IG14 G_M000_IG11: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #4 bhi G_M000_IG12 ldr w0, [fp, #0xD1FFAB1E] mov w0, w0 adr x1, [@RWD36] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG13 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x0, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 G_M000_IG13: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #6 beq G_M000_IG53 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #7 beq G_M000_IG23 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, gt str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #43 cmp w0, #2 bhi G_M000_IG15 mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG16 G_M000_IG15: str wzr, [fp, #0xD1FFAB1E] G_M000_IG16: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] G_M000_IG17: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x7C] ldr w3, [fp, #0x7C] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w1, w0, w1 str w1, [fp, #0x78] ldr w1, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG20 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xF8] add w0, w0, w1 str w0, [fp, #0xFC] b G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movn w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0xFC] G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xFC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG20: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG54 G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 bne G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD8] cmp w0, w1 beq G_M000_IG24 b G_M000_IG26 G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #10 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 beq G_M000_IG24 b G_M000_IG53 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #11 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG53 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x6C] ldr w1, [fp, #0x6C] ldr w0, [fp, #0xD1FFAB1E] mov w2, #1 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG25: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG54 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #12 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xEC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG58 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr w1, [fp, #0xEC] cmp w0, w1 bne G_M000_IG53 mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG28 G_M000_IG27: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG31 ldr w0, [fp, #0x88] sub w0, w0, #1 str w0, [fp, #0x88] ldr w0, [fp, #0x88] cmp w0, #0 bgt G_M000_IG30 G_M000_IG29: add x0, fp, #136 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xDC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG58 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr w1, [fp, #0xDC] cmp w0, w1 beq G_M000_IG27 G_M000_IG31: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x68] ldr w1, [fp, #0x68] ldr w0, [fp, #0xE8] ldr w2, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w1, w0, w1 str w1, [fp, #0x64] ldr w1, [fp, #0x64] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG32 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w1, w0, w1 str w1, [fp, #0x60] ldr w1, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG33 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG54 G_M000_IG33: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] sub w0, w0, w1 cmp w0, #1 bne G_M000_IG34 ldr x0, [fp, #0xD1FFAB1E] mov w1, #9 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [x0, #0x08] sub w1, w1, #1 ldr x0, [fp, #0xE0] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG58 add x1, x0, x1, LSL #1 add x1, x1, #12 ldrh w1, [x1] str w1, [fp, #0x5C] ldr w1, [fp, #0x5C] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG53 G_M000_IG34: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG53 G_M000_IG35: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #3 beq G_M000_IG36 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #6 beq G_M000_IG36 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #43 bne G_M000_IG37 G_M000_IG36: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG38 G_M000_IG37: str wzr, [fp, #0xD1FFAB1E] G_M000_IG38: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x94] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x94] cmp w0, w1 beq G_M000_IG47 b G_M000_IG53 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #4 beq G_M000_IG40 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #7 beq G_M000_IG40 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #44 bne G_M000_IG41 G_M000_IG40: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG42 G_M000_IG41: str wzr, [fp, #0xD1FFAB1E] G_M000_IG42: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG50 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x98] cmp w0, w1 beq G_M000_IG47 b G_M000_IG50 G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #5 beq G_M000_IG44 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #8 beq G_M000_IG44 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #45 bne G_M000_IG45 G_M000_IG44: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG46 G_M000_IG45: str wzr, [fp, #0xD1FFAB1E] G_M000_IG46: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG51 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG51 G_M000_IG47: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xBC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x3C] ldr w3, [fp, #0x3C] ldr w2, [fp, #0xBC] mov w0, #1 mov w1, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x38] ldr w1, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add w1, w0, #1 str w1, [fp, #0x34] ldr w1, [fp, #0x34] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG48 ldr x0, [fp, #0xB0] str x0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add w0, w0, #1 str w0, [fp, #0xA4] b G_M000_IG49 G_M000_IG48: ldr x0, [fp, #0xB0] str x0, [fp, #0xA8] movn w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0xA4] G_M000_IG49: ldr x0, [fp, #0xA8] ldr w1, [fp, #0xA4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG54 G_M000_IG50: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xA0] cmp w0, w1 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x9C] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x9C] cmp w0, w1 beq G_M000_IG52 b G_M000_IG53 G_M000_IG51: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #11 bne G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG53 G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] mov w1, #3 mov w2, #2 mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG54 G_M000_IG53: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr w1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG54: ldr w0, [fp, #0x88] sub w0, w0, #1 str w0, [fp, #0x88] ldr w0, [fp, #0x88] cmp w0, #0 bgt G_M000_IG56 G_M000_IG55: add x0, fp, #136 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG56: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bgt G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG57 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w2, [fp, #0xD1FFAB1E] sub w2, w0, w2 str w2, [fp, #0x1C] ldr w2, [fp, #0x1C] ldr w1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG57: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG58: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 RWD36 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG53 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 ; Total bytes of code 4692 869: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentLoops() [Tier0, IL size=1364, code size=4692] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentStrings():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #184 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x48] b G_M000_IG26 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xF8] ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bge G_M000_IG04 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG04: ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #25 bne G_M000_IG11 ldr x1, [fp, #0xF8] ldr w1, [x1, #0x28] and w1, w1, #64 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #64 cmp w1, w0 bne G_M000_IG11 ldr x1, [fp, #0xF8] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF0] ldr x1, [fp, #0xF0] cbz x1, G_M000_IG09 str wzr, [fp, #0xEC] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xF0] ldr w1, [fp, #0xEC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x14, x0, #24 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0xEC] add w1, w1, #1 str w1, [fp, #0xEC] G_M000_IG06: ldr w1, [fp, #0x48] sub w1, w1, #1 str w1, [fp, #0x48] ldr w1, [fp, #0x48] cmp w1, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #72 mov w1, #129 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xEC] cmp w0, w1 bgt G_M000_IG05 ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG10 G_M000_IG09: ldr x1, [fp, #0xF8] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xE0] ldr x14, [fp, #0xE0] add x14, x14, #24 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG10: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG11: ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xDC] ldr w0, [fp, #0xDC] cmp w0, #9 beq G_M000_IG12 ldr w0, [fp, #0xDC] cmp w0, #12 bne G_M000_IG13 G_M000_IG12: mov w0, #1 str w0, [fp, #0xD8] b G_M000_IG14 G_M000_IG13: str wzr, [fp, #0xD8] G_M000_IG14: ldr w0, [fp, #0xD8] cbz w0, G_M000_IG23 ldr x0, [fp, #0xF8] ldr w0, [x0, #0x28] mov w1, #65 and w0, w0, w1 str w0, [fp, #0xD4] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG15 ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD4] cmp w0, w1 beq G_M000_IG16 G_M000_IG15: mov w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD4] str w0, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG16: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0x94] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0x94] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 bne G_M000_IG17 ldr x0, [fp, #0xC8] mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xC0] add x0, fp, #192 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG17: ldr w0, [fp, #0xD4] and w0, w0, #64 cbnz w0, G_M000_IG20 ldr x0, [fp, #0xC8] str x0, [fp, #0x68] ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 beq G_M000_IG18 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x50] ldr x0, [fp, #0x68] str x0, [fp, #0x60] ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] b G_M000_IG19 G_M000_IG18: add x0, fp, #152 mov w1, wzr mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x1, [fp, #0x30] add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x68] str x0, [fp, #0x60] add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x58] G_M000_IG19: ldr x0, [fp, #0x60] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG25 G_M000_IG20: ldr x0, [fp, #0xC8] str x0, [fp, #0x88] ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 beq G_M000_IG21 ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0x88] str x0, [fp, #0x80] ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] b G_M000_IG22 G_M000_IG21: add x0, fp, #152 mov w1, wzr mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] str x0, [fp, #0x80] add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] G_M000_IG22: ldr x0, [fp, #0x80] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG25 G_M000_IG23: ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #23 bne G_M000_IG24 ldr w2, [fp, #0xD1FFAB1E] sub w2, w2, #1 str w2, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG24: str wzr, [fp, #0xD1FFAB1E] G_M000_IG25: ldr w2, [fp, #0xD1FFAB1E] add w2, w2, #1 str w2, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] add w2, w2, #1 str w2, [fp, #0xD1FFAB1E] G_M000_IG26: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG28 G_M000_IG27: add x0, fp, #72 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bgt G_M000_IG03 ldr w2, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w2, w0 bge G_M000_IG29 ldr w2, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w2, w2, w0 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG29: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1984 870: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentStrings() [Tier0, IL size=553, code size=1984] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReplaceNodeIfUnnecessary():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cbz w0, G_M000_IG03 ldr w0, [fp, #0x1C] cmp w0, #1 beq G_M000_IG06 b G_M000_IG07 G_M000_IG03: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #24 beq G_M000_IG04 mov w0, #23 str w0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: mov w0, #22 str w0, [fp, #0x18] G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x28] ldr w2, [x2, #0x28] ldr x0, [fp, #0x10] ldr w1, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] str x0, [fp, #0x20] b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x28] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG08: ldr x0, [fp, #0x20] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 248 871: JIT compiled System.Text.RegularExpressions.RegexNode:ReplaceNodeIfUnnecessary() [Tier0, IL size=60, code size=248] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:EmptyStack():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] cmp x0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 872: JIT compiled System.Text.RegularExpressions.RegexParser:EmptyStack() [Tier0, IL size=10, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddGroup():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] ldr w0, [fp, #0x44] sub w0, w0, #33 cmp w0, #1 bhi G_M000_IG03 mov w0, #1 str w0, [fp, #0x40] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x40] G_M000_IG04: ldr w0, [fp, #0x40] cbz w0, G_M000_IG07 ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] str x0, [fp, #0x30] ldr x0, [fp, #0x48] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #33 bne G_M000_IG05 ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bgt G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #3 ble G_M000_IG08 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0x48] mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG07: ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] str x0, [fp, #0x38] ldr x0, [fp, #0x48] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] ldr x1, [fp, #0x48] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG08: ldr x14, [fp, #0x48] ldr x15, [x14, #0x08] ldr x14, [fp, #0x48] add x14, x14, #32 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 512 873: JIT compiled System.Text.RegularExpressions.RegexParser:AddGroup() [Tier0, IL size=158, code size=512] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceAlternation():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cbz w0, G_M000_IG03 ldr w0, [fp, #0x1C] cmp w0, #1 beq G_M000_IG05 b G_M000_IG07 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x2, [fp, #0x28] ldr w2, [x2, #0x28] ldr x0, [fp, #0x10] mov w1, #22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: ldr x0, [fp, #0x28] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #24 bne G_M000_IG08 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #24 bne G_M000_IG08 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #24 bne G_M000_IG08 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] G_M000_IG08: ldr x0, [fp, #0x20] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 432 874: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceAlternation() [Tier0, IL size=104, code size=432] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ReduceSingleLetterAndNestedAlternations|41_0():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str xzr, [x9, #0x70] str x0, [fp, #0xA8] G_M000_IG02: str wzr, [fp, #0xA4] str wzr, [fp, #0xA0] str wzr, [fp, #0x9C] ldr x1, [fp, #0xA8] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] str wzr, [fp, #0x94] str wzr, [fp, #0x90] mov w0, #0xD1FFAB1E str w0, [fp, #0x28] b G_M000_IG29 G_M000_IG03: ldr x0, [fp, #0x78] ldr w1, [fp, #0x94] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x88] ldr w0, [fp, #0x90] ldr w1, [fp, #0x94] cmp w0, w1 bge G_M000_IG04 ldr x0, [fp, #0x78] ldr w1, [fp, #0x90] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG04: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #24 bne G_M000_IG11 ldr x1, [fp, #0x88] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x1, [fp, #0x70] cbz x1, G_M000_IG09 str wzr, [fp, #0x6C] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x70] ldr w1, [fp, #0x6C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x14, x0, #24 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0x6C] add w1, w1, #1 str w1, [fp, #0x6C] G_M000_IG06: ldr w1, [fp, #0x28] sub w1, w1, #1 str w1, [fp, #0x28] ldr w1, [fp, #0x28] cmp w1, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #40 mov w1, #113 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x6C] cmp w0, w1 bgt G_M000_IG05 ldr w1, [fp, #0x94] add w1, w1, #1 ldr x0, [fp, #0x78] ldr x2, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG10 G_M000_IG09: ldr x1, [fp, #0x88] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x14, [fp, #0x60] add x14, x14, #24 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0x94] add w1, w1, #1 ldr x0, [fp, #0x78] ldr x2, [fp, #0x60] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG10: ldr w0, [fp, #0x90] sub w0, w0, #1 str w0, [fp, #0x90] b G_M000_IG28 G_M000_IG11: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x5C] ldr w0, [fp, #0x5C] cmp w0, #9 beq G_M000_IG12 ldr w0, [fp, #0x5C] cmp w0, #11 bne G_M000_IG13 G_M000_IG12: mov w0, #1 str w0, [fp, #0x58] b G_M000_IG14 G_M000_IG13: str wzr, [fp, #0x58] G_M000_IG14: ldr w0, [fp, #0x58] cbz w0, G_M000_IG26 ldr x0, [fp, #0x88] ldr w0, [x0, #0x28] mov w1, #65 and w0, w0, w1 str w0, [fp, #0x98] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #11 bne G_M000_IG18 ldr w0, [fp, #0xA4] cbz w0, G_M000_IG15 ldr w0, [fp, #0x9C] ldr w1, [fp, #0x98] cmp w0, w1 cset x0, ne str w0, [fp, #0x34] b G_M000_IG16 G_M000_IG15: mov w0, #1 str w0, [fp, #0x34] G_M000_IG16: ldr w0, [fp, #0x34] ldr w1, [fp, #0xA0] orr w0, w0, w1 cbnz w0, G_M000_IG17 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG21 G_M000_IG17: mov w0, #1 str w0, [fp, #0xA4] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 cset x0, eq str w0, [fp, #0xA0] ldr w0, [fp, #0x98] str w0, [fp, #0x9C] b G_M000_IG28 G_M000_IG18: ldr w0, [fp, #0xA4] cbz w0, G_M000_IG19 ldr w0, [fp, #0x9C] ldr w1, [fp, #0x98] cmp w0, w1 cset x0, ne str w0, [fp, #0x44] b G_M000_IG20 G_M000_IG19: mov w0, #1 str w0, [fp, #0x44] G_M000_IG20: ldr w0, [fp, #0x44] ldr w1, [fp, #0xA0] orr w0, w0, w1 cbz w0, G_M000_IG21 mov w0, #1 str w0, [fp, #0xA4] str wzr, [fp, #0xA0] ldr w0, [fp, #0x98] str w0, [fp, #0x9C] b G_M000_IG28 G_M000_IG21: ldr w0, [fp, #0x90] sub w0, w0, #1 str w0, [fp, #0x90] ldr x0, [fp, #0x78] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x80] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 bne G_M000_IG22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] str x0, [fp, #0x50] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] G_M000_IG23: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 bne G_M000_IG24 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x20] ldr w1, [fp, #0x20] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG25: ldr x0, [fp, #0x80] mov w1, #11 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x80] ldr w0, [x0, #0x28] and w0, w0, #1 cbz w0, G_M000_IG28 ldr x0, [fp, #0x80] ldr w0, [x0, #0x28] and w0, w0, #0xD1FFAB1E ldr x1, [fp, #0x80] str w0, [x1, #0x28] b G_M000_IG28 G_M000_IG26: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #22 bne G_M000_IG27 ldr w2, [fp, #0x90] sub w2, w2, #1 str w2, [fp, #0x90] b G_M000_IG28 G_M000_IG27: str wzr, [fp, #0xA4] str wzr, [fp, #0xA0] G_M000_IG28: ldr w2, [fp, #0x94] add w2, w2, #1 str w2, [fp, #0x94] ldr w2, [fp, #0x90] add w2, w2, #1 str w2, [fp, #0x90] G_M000_IG29: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG31 G_M000_IG30: add x0, fp, #40 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG31: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x94] cmp w0, w1 bgt G_M000_IG03 ldr w2, [fp, #0x90] ldr w0, [fp, #0x94] cmp w2, w0 bge G_M000_IG32 ldr w2, [fp, #0x94] ldr w0, [fp, #0x90] sub w2, w2, w0 ldr x0, [fp, #0x78] ldr w1, [fp, #0x90] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG32: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 1804 875: JIT compiled System.Text.RegularExpressions.RegexNode:g__ReduceSingleLetterAndNestedAlternations|41_0() [Tier0, IL size=564, code size=1804] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixText|41_3(System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 8 inlinees with PGO data; 35 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp x25, x26, [sp, #0x70] stp x27, x28, [sp, #0x80] mov fp, sp str xzr, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x38] mov x19, x0 G_M000_IG02: ldr x1, [x19, #0x08] mov x20, x1 cbz x20, G_M000_IG05 G_M000_IG03: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG05 G_M000_IG04: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x20, x0 G_M000_IG05: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG08 G_M000_IG06: mov x0, x19 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG07 bl CORINFO_HELP_FAIL_FAST G_M000_IG07: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG08: add x21, fp, #48 mov w22, wzr ldr w0, [x20, #0x10] sub w0, w0, #1 cmp w0, #0 ble G_M000_IG41 G_M000_IG09: ldr w0, [x20, #0x10] cmp w22, w0 bhs G_M000_IG54 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG55 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG43 ldr w23, [x0, #0x28] ldr x1, [x0, #0x10] cbnz x1, G_M000_IG11 G_M000_IG10: mov x2, xzr mov w3, wzr b G_M000_IG12 align [0 bytes for IG21] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG11: add x2, x1, #12 ldr w3, [x1, #0x08] G_M000_IG12: str x2, [fp, #0x20] str w3, [fp, #0x28] ldrb w1, [x0, #0x2E] cmp w1, #9 bne G_M000_IG14 G_M000_IG13: ldrh w0, [x0, #0x2C] strh w0, [x21] str x21, [fp, #0x20] mov w0, #1 str w0, [fp, #0x28] G_M000_IG14: add w24, w22, #1 ldr w0, [x20, #0x10] cmp w24, w0 bge G_M000_IG25 G_M000_IG15: ldr w0, [x20, #0x10] cmp w24, w0 bhs G_M000_IG54 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG55 add x0, x0, #16 ldr x0, [x0, w24, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG25 ldr w1, [x0, #0x28] cmp w1, w23 bne G_M000_IG25 ldrb w1, [x0, #0x2E] cmp w1, #9 bne G_M000_IG17 G_M000_IG16: ldr w1, [fp, #0x28] cmp w1, #0 bls G_M000_IG55 ldr x1, [fp, #0x20] ldrh w1, [x1] ldrh w0, [x0, #0x2C] cmp w1, w0 bne G_M000_IG25 ldr w0, [fp, #0x28] cmp w0, #1 beq G_M000_IG24 ldr w0, [fp, #0x28] cmp w0, #1 blo G_M000_IG53 ldr x0, [fp, #0x20] str x0, [fp, #0x20] mov w0, #1 str w0, [fp, #0x28] b G_M000_IG24 G_M000_IG17: ldr w1, [fp, #0x28] ldr x0, [x0, #0x10] ldr w2, [x0, #0x08] cmp w1, w2 bgt G_M000_IG20 G_M000_IG18: sxtw w2, w1 G_M000_IG19: mov w1, wzr b G_M000_IG22 G_M000_IG20: b G_M000_IG19 G_M000_IG21: add w1, w1, #1 G_M000_IG22: cmp w1, w2 bge G_M000_IG23 ldr w3, [fp, #0x28] cmp w1, w3 bhs G_M000_IG55 ldr x3, [fp, #0x20] ubfiz x4, x1, #1, #32 ldrh w3, [x3, x4] mov x5, x0 ldr w6, [x5, #0x08] cmp w1, w6 bhs G_M000_IG55 add x5, x5, #12 ldrh w4, [x5, x4] cmp w4, w3 beq G_M000_IG21 G_M000_IG23: cbz w1, G_M000_IG25 ldr w0, [fp, #0x28] cmp w1, w0 bhi G_M000_IG53 ldr x0, [fp, #0x20] str x0, [fp, #0x20] str w1, [fp, #0x28] G_M000_IG24: add w24, w24, #1 ldr w0, [x20, #0x10] cmp w24, w0 blt G_M000_IG15 G_M000_IG25: sub w0, w24, w22 cmp w0, #1 ble G_M000_IG40 G_M000_IG26: ldr w0, [fp, #0x28] cmp w0, #1 beq G_M000_IG27 movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 mov x0, x25 bl CORINFO_HELP_NEWSFAST mov x26, x0 add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 mov w14, #12 strb w14, [x26, #0x2E] str w23, [x26, #0x28] add x14, x26, #16 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG28 G_M000_IG27: movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 mov x0, x25 bl CORINFO_HELP_NEWSFAST mov x26, x0 ldr w0, [fp, #0x28] cmp w0, #0 bls G_M000_IG55 ldr x0, [fp, #0x20] ldrh w0, [x0] mov w1, #9 strb w1, [x26, #0x2E] str w23, [x26, #0x28] strh w0, [x26, #0x2C] G_M000_IG28: mov x0, x25 bl CORINFO_HELP_NEWSFAST mov x27, x0 mov w0, #24 strb w0, [x27, #0x2E] str w23, [x27, #0x28] sxtw w28, w22 cmp w28, w24 bge G_M000_IG38 G_M000_IG29: ldr w0, [x20, #0x10] cmp w28, w0 bhs G_M000_IG54 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w28, w1 bhs G_M000_IG55 add x0, x0, #16 ldr x2, [x0, w28, UXTW #3] str x2, [fp, #0x18] ldrb w0, [x2, #0x2E] cmp w0, #25 beq G_M000_IG31 G_M000_IG30: mov x0, x2 b G_M000_IG37 G_M000_IG31: ldr x1, [x2, #0x08] mov x0, x1 cbz x0, G_M000_IG33 G_M000_IG32: ldr x3, [x0] cmp x3, x25 beq G_M000_IG37 G_M000_IG33: mov x3, x1 cbz x3, G_M000_IG36 G_M000_IG34: ldr x0, [x3] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 cmp x0, x4 beq G_M000_IG36 G_M000_IG35: mov x0, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x3, x0 G_M000_IG36: ldr w1, [x3, #0x10] cmp w1, #0 bls G_M000_IG54 ldr x1, [x3, #0x08] ldr w0, [x1, #0x08] cmp w0, #0 bls G_M000_IG55 ldr x0, [x1, #0x10] b G_M000_IG37 G_M000_IG37: ldr x1, [fp, #0x20] ldr w2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w28, w28, #1 cmp w28, w24 blt G_M000_IG29 G_M000_IG38: ldr x0, [x19, #0x18] cbz x0, G_M000_IG39 ldrb w0, [x0, #0x2E] cmp w0, #32 bne G_M000_IG39 mov x0, x25 bl CORINFO_HELP_NEWSFAST mov x28, x0 mov w0, #32 strb w0, [x28, #0x2E] str w23, [x28, #0x28] mov x0, x28 mov x1, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x27, x28 G_M000_IG39: mov x0, x25 bl CORINFO_HELP_NEWSFAST mov x25, x0 mov w0, #25 strb w0, [x25, #0x2E] str w23, [x25, #0x28] mov x0, x25 mov x1, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x25 mov x1, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w22 mov x2, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w2, w24, w22 sub w2, w2, #1 add w1, w22, #1 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG40: add w22, w22, #1 ldr w0, [x20, #0x10] sub w0, w0, #1 cmp w22, w0 blt G_M000_IG09 G_M000_IG41: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 beq G_M000_IG45 mov x0, x19 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG42 bl CORINFO_HELP_FAIL_FAST G_M000_IG42: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG43: mov x0, x19 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG44 bl CORINFO_HELP_FAIL_FAST G_M000_IG44: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG45: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG47 G_M000_IG46: ldr x2, [x0] movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 cmp x2, x25 beq G_M000_IG51 G_M000_IG47: mov x2, x1 cbz x2, G_M000_IG50 G_M000_IG48: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG50 G_M000_IG49: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG50: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG54 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG55 ldr x0, [x0, #0x10] b G_M000_IG51 G_M000_IG51: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG52 bl CORINFO_HELP_FAIL_FAST G_M000_IG52: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG53: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG54: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG55: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1780 876: JIT compiled System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixText|41_3(System.Text.RegularExpressions.RegexNode) [Tier-0 switched to FullOpts, IL size=612, code size=1780] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FindBranchOneOrMultiStart():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #25 beq G_M000_IG03 ldr x0, [fp, #0x28] str x0, [fp, #0x10] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] G_M000_IG04: ldr x0, [fp, #0x10] str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #9 beq G_M000_IG05 ldr w0, [fp, #0x1C] cmp w0, #12 bne G_M000_IG06 G_M000_IG05: mov w0, #1 str w0, [fp, #0x18] b G_M000_IG07 G_M000_IG06: str wzr, [fp, #0x18] G_M000_IG07: ldr w0, [fp, #0x18] cbnz w0, G_M000_IG09 mov x0, xzr G_M000_IG08: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: ldr x0, [fp, #0x20] G_M000_IG10: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 208 877: JIT compiled System.Text.RegularExpressions.RegexNode:FindBranchOneOrMultiStart() [Tier0, IL size=51, code size=208] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixOneNotoneSet|41_1(System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #176 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x1, sp, #0xD1FFAB1E str x1, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF8] mov w0, #0xD1FFAB1E str w0, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG04 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG03: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG04: add x8, fp, #224 ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG05: b G_M000_IG08 G_M000_IG06: add x0, fp, #224 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD8] ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #25 bne G_M000_IG07 ldr x0, [fp, #0xD8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #2 bge G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD0] b G_M000_IG13 G_M000_IG08: ldr w0, [fp, #0x40] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #64 mov w1, #68 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: add x0, fp, #224 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG06 b G_M000_IG11 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG36 G_M000_IG12: b G_M000_IG15 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG36 G_M000_IG14: b G_M000_IG34 G_M000_IG15: str wzr, [fp, #0xCC] b G_M000_IG30 G_M000_IG16: ldr x0, [fp, #0xF8] ldr w1, [fp, #0xCC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xC0] ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xA4] ldr w0, [fp, #0xA4] sub w0, w0, #3 cmp w0, #5 bls G_M000_IG17 ldr w0, [fp, #0xA4] sub w0, w0, #9 cmp w0, #2 bls G_M000_IG18 ldr w0, [fp, #0xA4] sub w0, w0, #43 cmp w0, #2 bls G_M000_IG18 b G_M000_IG29 G_M000_IG17: ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x7C] ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x7C] cmp w0, w1 bne G_M000_IG29 G_M000_IG18: ldr w0, [fp, #0xCC] add w0, w0, #1 str w0, [fp, #0xBC] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0xF8] ldr w1, [fp, #0xBC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x30] ldr x0, [fp, #0x30] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x98] ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x78] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x78] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xC0] ldr w0, [x0, #0x28] ldr x1, [fp, #0x98] ldr w1, [x1, #0x28] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x74] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x74] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x70] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x70] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x6C] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x6C] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG23 ldr w0, [fp, #0xBC] add w0, w0, #1 str w0, [fp, #0xBC] G_M000_IG20: ldr w0, [fp, #0x40] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #0 bgt G_M000_IG22 G_M000_IG21: add x0, fp, #64 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG22: ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xBC] cmp w0, w1 bgt G_M000_IG19 G_M000_IG23: ldr w0, [fp, #0xBC] ldr w1, [fp, #0xCC] sub w0, w0, w1 cmp w0, #1 ble G_M000_IG29 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x28] ldr x0, [fp, #0x58] mov w1, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x58] str x0, [fp, #0xB0] ldr w0, [fp, #0xCC] str w0, [fp, #0x94] b G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0xF8] ldr w1, [fp, #0x94] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [x0, #0x08] str x1, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xF8] ldr w1, [fp, #0x94] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] G_M000_IG25: ldr w0, [fp, #0x40] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #0 bgt G_M000_IG27 G_M000_IG26: add x0, fp, #64 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG27: ldr w0, [fp, #0x94] ldr w1, [fp, #0xBC] cmp w0, w1 blt G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x18] str x0, [fp, #0x88] ldr x0, [fp, #0x88] cbz x0, G_M000_IG28 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #32 bne G_M000_IG28 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x28] ldr x0, [fp, #0x48] mov w1, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x48] str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr x1, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x80] str x0, [fp, #0xB0] G_M000_IG28: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x28] ldr x0, [fp, #0x50] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x50] str x0, [fp, #0xA8] ldr x0, [fp, #0xA8] ldr x1, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xA8] ldr x1, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xCC] ldr x2, [fp, #0xA8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr w2, [fp, #0xBC] ldr w1, [fp, #0xCC] sub w2, w2, w1 sub w2, w2, #1 ldr w1, [fp, #0xCC] add w1, w1, #1 ldr x0, [fp, #0xF8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG29: ldr w0, [fp, #0xCC] add w0, w0, #1 str w0, [fp, #0xCC] G_M000_IG30: ldr w0, [fp, #0x40] sub w0, w0, #1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #0 bgt G_M000_IG32 G_M000_IG31: add x0, fp, #64 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG32: ldr x0, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w0, w0, #1 ldr w1, [fp, #0xCC] cmp w0, w1 bgt G_M000_IG16 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG33: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG34: ldr x0, [fp, #0xD0] G_M000_IG35: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG36: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG37: add x0, fp, #224 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG38: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 2132 878: JIT compiled System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixOneNotoneSet|41_1(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=541, code size=2132] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__RemoveRedundantEmptiesAndNothings|41_2(System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x50] str xzr, [fp, #0x38] str xzr, [fp, #0x20] str x0, [fp, #0x58] G_M000_IG02: ldr x1, [fp, #0x58] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] str wzr, [fp, #0x4C] str wzr, [fp, #0x48] str wzr, [fp, #0x44] mov w0, #0xD1FFAB1E str w0, [fp, #0x28] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x50] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x34] ldr w0, [fp, #0x34] cmp w0, #22 beq G_M000_IG04 ldr w0, [fp, #0x34] cmp w0, #23 bne G_M000_IG05 ldr w0, [fp, #0x44] cbnz w0, G_M000_IG04 mov w0, #1 str w0, [fp, #0x44] b G_M000_IG05 G_M000_IG04: ldr w0, [fp, #0x4C] add w0, w0, #1 str w0, [fp, #0x4C] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x50] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr w1, [fp, #0x48] ldr x0, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr w0, [fp, #0x4C] add w0, w0, #1 str w0, [fp, #0x4C] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] G_M000_IG06: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #40 mov w1, #85 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x4C] cmp w0, w1 bgt G_M000_IG03 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w2, [fp, #0x48] sub w2, w0, w2 str w2, [fp, #0x1C] ldr w2, [fp, #0x1C] ldr w1, [fp, #0x48] ldr x0, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 504 879: JIT compiled System.Text.RegularExpressions.RegexNode:g__RemoveRedundantEmptiesAndNothings|41_2(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=116, code size=504] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FinalOptimize():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x38] str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] str x0, [fp, #0x40] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr x0, [fp, #0x48] ldr w0, [x0, #0x28] mov w1, #0xD1FFAB1E and w0, w0, w1 cbnz w0, G_M000_IG12 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x40] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] mov w0, #1 str w0, [fp, #0x34] G_M000_IG03: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #16 mov w1, #41 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x24] cmp w0, #8 bhi G_M000_IG06 ldr w0, [fp, #0x24] sub w0, w0, #3 cmp w0, #2 bls G_M000_IG09 ldr w0, [fp, #0x24] sub w0, w0, #6 cmp w0, #2 bls G_M000_IG10 b G_M000_IG12 G_M000_IG06: ldr w0, [fp, #0x24] cmp w0, #25 beq G_M000_IG08 ldr w0, [fp, #0x24] cmp w0, #32 beq G_M000_IG07 ldr w0, [fp, #0x24] sub w0, w0, #43 cmp w0, #2 bls G_M000_IG09 b G_M000_IG12 G_M000_IG07: ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] b G_M000_IG03 G_M000_IG08: str wzr, [fp, #0x34] ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] b G_M000_IG03 G_M000_IG09: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG11 b G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bne G_M000_IG12 ldr w0, [fp, #0x34] cbnz w0, G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x38] ldr x0, [x0, #0x18] str x0, [fp, #0x28] ldr x0, [fp, #0x28] cbz x0, G_M000_IG12 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #25 bne G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x38] ldr w2, [x2, #0x28] ldr x0, [fp, #0x18] mov w1, #46 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] ldr x2, [fp, #0x18] mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG12: ldr x0, [fp, #0x40] G_M000_IG13: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 660 880: JIT compiled System.Text.RegularExpressions.RegexNode:FinalOptimize() [Tier0, IL size=187, code size=660] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FindAndMakeLoopsAtomic():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x48] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG06 G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x44] ldr w0, [fp, #0x44] cbz w0, G_M000_IG11 str wzr, [fp, #0x34] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x48] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG08: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #32 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0x34] ldr w1, [fp, #0x44] cmp w0, w1 blt G_M000_IG07 G_M000_IG11: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #25 beq G_M000_IG13 G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: ldr x1, [fp, #0x48] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] str wzr, [fp, #0x30] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x38] ldr w1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x28] ldr w1, [fp, #0x30] add w1, w1, #1 ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x30] add w0, w0, #1 str w0, [fp, #0x30] G_M000_IG15: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #32 mov w1, #106 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr w0, [fp, #0x30] ldr w1, [fp, #0x44] sub w1, w1, #1 cmp w0, w1 blt G_M000_IG14 G_M000_IG18: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 520 881: JIT compiled System.Text.RegularExpressions.RegexNode:FindAndMakeLoopsAtomic() [Tier0, IL size=113, code size=520] ; Assembly listing for method System.Threading.StackHelper:TryEnsureSufficientExecutionStack():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 882: JIT compiled System.Threading.StackHelper:TryEnsureSufficientExecutionStack() [Tier0, IL size=6, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ProcessNode|51_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG03 b G_M000_IG22 G_M000_IG03: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #40 mov w1, #8 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x4C] ldr w0, [fp, #0x4C] cmp w0, #25 beq G_M000_IG06 ldr w0, [fp, #0x4C] cmp w0, #28 bne G_M000_IG07 G_M000_IG06: mov w0, #1 str w0, [fp, #0x48] b G_M000_IG08 G_M000_IG07: str wzr, [fp, #0x48] G_M000_IG08: ldr w0, [fp, #0x48] cbz w0, G_M000_IG09 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w1, w0, #1 str w1, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x58] b G_M000_IG03 G_M000_IG09: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #26 bne G_M000_IG10 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x40] cbz x0, G_M000_IG10 ldr x0, [fp, #0x40] str x0, [fp, #0x58] b G_M000_IG03 G_M000_IG10: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x3C] ldr w0, [fp, #0x3C] cmp w0, #8 bhi G_M000_IG11 ldr w0, [fp, #0x3C] sub w0, w0, #3 cmp w0, #2 bls G_M000_IG12 ldr w0, [fp, #0x3C] sub w0, w0, #6 cmp w0, #2 bls G_M000_IG13 b G_M000_IG22 G_M000_IG11: ldr w0, [fp, #0x3C] cmp w0, #24 beq G_M000_IG14 ldr w0, [fp, #0x3C] sub w0, w0, #33 cmp w0, #1 bls G_M000_IG14 b G_M000_IG22 G_M000_IG12: ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] mov w2, #1 mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG21 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 b G_M000_IG22 G_M000_IG13: ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] mov w2, wzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG21 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w1, w0, #3 uxtb w1, w1 str w1, [fp, #0x20] ldr w1, [fp, #0x20] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 b G_M000_IG22 G_M000_IG14: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x38] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #34 beq G_M000_IG15 str wzr, [fp, #0x30] b G_M000_IG16 G_M000_IG15: mov w0, #1 str w0, [fp, #0x30] G_M000_IG16: ldr w0, [fp, #0x30] str w0, [fp, #0x34] b G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0x58] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG18: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #40 mov w1, #211 bl CORINFO_HELP_PATCHPOINT G_M000_IG20: ldr w0, [fp, #0x34] ldr w1, [fp, #0x38] cmp w0, w1 blt G_M000_IG17 G_M000_IG21: b G_M000_IG22 G_M000_IG22: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 904 883: JIT compiled System.Text.RegularExpressions.RegexNode:g__ProcessNode|51_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier0, IL size=218, code size=904] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:CanBeMadeAtomic(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #112 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG08 b G_M000_IG100 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #25 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #7 bhi G_M000_IG04 ldr w0, [fp, #0x28] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: b G_M000_IG11 G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG07 b G_M000_IG11 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG11 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xD1FFAB1E] G_M000_IG08: ldr w0, [fp, #0x90] sub w0, w0, #1 str w0, [fp, #0x90] ldr w0, [fp, #0x90] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #144 mov w1, #90 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG03 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x28] cmp w0, w1 beq G_M000_IG12 b G_M000_IG100 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #24 beq G_M000_IG13 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #34 bne G_M000_IG19 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #3 bne G_M000_IG19 G_M000_IG13: str wzr, [fp, #0xD1FFAB1E] b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x88] ldr x1, [fp, #0x88] ldr w2, [fp, #0xD1FFAB1E] uxtb w2, w2 ldr x0, [fp, #0xD1FFAB1E] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w0, G_M000_IG15 b G_M000_IG100 G_M000_IG15: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG16: ldr w0, [fp, #0x90] sub w0, w0, #1 str w0, [fp, #0x90] ldr w0, [fp, #0x90] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #144 mov w1, #165 bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG14 b G_M000_IG97 G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #3 str w0, [fp, #0x24] ldr w0, [fp, #0x24] cmp w0, #5 bhi G_M000_IG20 ldr w0, [fp, #0x24] mov w0, w0 adr x1, [@RWD32] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG20: b G_M000_IG85 G_M000_IG21: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG85 G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #3 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #18 bhi G_M000_IG23 ldr w0, [fp, #0x20] mov w0, w0 adr x1, [@RWD56] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG23: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #41 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #4 bhi G_M000_IG24 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD132] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG24: b G_M000_IG41 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xB0] cmp w0, w1 bne G_M000_IG33 b G_M000_IG41 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xB4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xB4] cmp w0, w1 beq G_M000_IG33 b G_M000_IG41 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr w0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG33 b G_M000_IG41 G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG34 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x98] cmp w0, w1 bne G_M000_IG33 b G_M000_IG34 G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG35 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xA0] cmp w0, w1 beq G_M000_IG33 b G_M000_IG35 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG36 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr w0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG33 b G_M000_IG36 G_M000_IG31: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xBC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG102 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr w1, [fp, #0xBC] cmp w0, w1 bne G_M000_IG33 b G_M000_IG41 G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #10 beq G_M000_IG41 G_M000_IG33: b G_M000_IG97 G_M000_IG34: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x9C] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x9C] cmp w0, w1 bne G_M000_IG86 b G_M000_IG41 G_M000_IG35: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xA4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xA4] cmp w0, w1 beq G_M000_IG86 b G_M000_IG41 G_M000_IG36: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xAC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr w0, [fp, #0xAC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG86 b G_M000_IG41 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG86 b G_M000_IG41 G_M000_IG38: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG86 b G_M000_IG41 G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG86 b G_M000_IG41 G_M000_IG40: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG86 G_M000_IG41: b G_M000_IG100 G_M000_IG42: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG85 G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #9 bhi G_M000_IG44 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #3 beq G_M000_IG46 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #6 beq G_M000_IG46 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #9 beq G_M000_IG45 b G_M000_IG50 G_M000_IG44: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #12 beq G_M000_IG47 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #21 beq G_M000_IG48 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #43 beq G_M000_IG46 b G_M000_IG50 G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xC0] cmp w0, w1 beq G_M000_IG48 b G_M000_IG50 G_M000_IG46: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG49 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xC4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xC4] cmp w0, w1 beq G_M000_IG48 b G_M000_IG49 G_M000_IG47: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xCC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG102 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr w1, [fp, #0xCC] cmp w0, w1 bne G_M000_IG50 G_M000_IG48: b G_M000_IG97 G_M000_IG49: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG50 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xC8] cmp w0, w1 beq G_M000_IG86 G_M000_IG50: b G_M000_IG100 G_M000_IG51: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG85 G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #3 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #18 bhi G_M000_IG53 ldr w0, [fp, #0x18] mov w0, w0 adr x1, [@RWD152] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG53: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #41 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #4 bhi G_M000_IG54 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD228] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG54: b G_M000_IG84 G_M000_IG55: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xEC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr w0, [fp, #0xEC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG61 b G_M000_IG84 G_M000_IG56: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG61 b G_M000_IG84 G_M000_IG57: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG62 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr w0, [fp, #0xD0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG61 b G_M000_IG62 G_M000_IG58: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG63 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG61 b G_M000_IG63 G_M000_IG59: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG102 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0xFC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr w0, [fp, #0xFC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG61 b G_M000_IG84 G_M000_IG60: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] mov w0, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG84 G_M000_IG61: b G_M000_IG97 G_M000_IG62: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr w0, [fp, #0xD4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG86 b G_M000_IG84 G_M000_IG63: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG86 b G_M000_IG84 G_M000_IG64: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, gt str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG68 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG65 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG66 G_M000_IG65: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG67 G_M000_IG66: str wzr, [fp, #0xD1FFAB1E] G_M000_IG67: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] G_M000_IG68: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG86 b G_M000_IG84 G_M000_IG69: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, gt str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG73 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG70 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG71 G_M000_IG70: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG72 G_M000_IG71: str wzr, [fp, #0xD1FFAB1E] G_M000_IG72: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] G_M000_IG73: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG86 b G_M000_IG84 G_M000_IG74: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, gt str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG78 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG75 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG76 G_M000_IG75: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG77 G_M000_IG76: str wzr, [fp, #0xD1FFAB1E] G_M000_IG77: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] G_M000_IG78: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG86 b G_M000_IG84 G_M000_IG79: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 cset x0, gt str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG83 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG80 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG81 G_M000_IG80: mov w1, #1 str w1, [fp, #0xD1FFAB1E] b G_M000_IG82 G_M000_IG81: str wzr, [fp, #0xD1FFAB1E] G_M000_IG82: ldr w1, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] G_M000_IG83: ldr w1, [fp, #0xD1FFAB1E] cbnz w1, G_M000_IG86 G_M000_IG84: b G_M000_IG100 G_M000_IG85: b G_M000_IG100 G_M000_IG86: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG87 b G_M000_IG100 G_M000_IG87: ldr w0, [fp, #0x90] sub w0, w0, #1 str w0, [fp, #0x90] ldr w0, [fp, #0x90] cmp w0, #0 bgt G_M000_IG89 G_M000_IG88: add x0, fp, #144 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG89: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x18] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG90 strh wzr, [fp, #0xD1FFAB1E] ldrh w0, [fp, #0xD1FFAB1E] strh w0, [fp, #0xD1FFAB1E] b G_M000_IG91 G_M000_IG90: strh wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w0, [fp, #0xD1FFAB1E] strh w0, [fp, #0xD1FFAB1E] G_M000_IG91: ldrh w0, [fp, #0xD1FFAB1E] strh w0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG96 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #24 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #4 bhi G_M000_IG92 ldr w1, [fp, #0x10] mov w1, w1 adr x0, [@RWD248] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG92: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #32 bne G_M000_IG99 G_M000_IG93: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG94: ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 cmp w0, w1 bne G_M000_IG95 ldr x1, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG95: ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xD1FFAB1E] b G_M000_IG08 G_M000_IG96: b G_M000_IG97 G_M000_IG97: mov w0, #1 G_M000_IG98: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG99: b G_M000_IG100 G_M000_IG100: mov w0, wzr G_M000_IG101: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG102: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 RWD32 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG52 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG51 - G_M000_IG02 RWD56 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG32 - G_M000_IG02 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG32 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 RWD132 dd G_M000_IG39 - G_M000_IG02 dd G_M000_IG40 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 RWD152 dd G_M000_IG57 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG58 - G_M000_IG02 dd G_M000_IG57 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG58 - G_M000_IG02 dd G_M000_IG55 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG56 - G_M000_IG02 dd G_M000_IG59 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG64 - G_M000_IG02 dd G_M000_IG69 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG61 - G_M000_IG02 RWD228 dd G_M000_IG74 - G_M000_IG02 dd G_M000_IG79 - G_M000_IG02 dd G_M000_IG57 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG58 - G_M000_IG02 RWD248 dd G_M000_IG93 - G_M000_IG02 dd G_M000_IG94 - G_M000_IG02 dd G_M000_IG99 - G_M000_IG02 dd G_M000_IG99 - G_M000_IG02 dd G_M000_IG93 - G_M000_IG02 ; Total bytes of code 5300 884: JIT compiled System.Text.RegularExpressions.RegexNode:CanBeMadeAtomic(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool,bool) [Tier0, IL size=1744, code size=5300] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Ch():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrh w0, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 885: JIT compiled System.Text.RegularExpressions.RegexNode:get_Ch() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeLoopAtomic():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x34] ldr w0, [fp, #0x34] sub w0, w0, #3 cmp w0, #2 bls G_M000_IG04 ldr w0, [fp, #0x34] sub w0, w0, #6 cmp w0, #2 bls G_M000_IG06 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add w1, w0, #40 uxtb w1, w1 str w1, [fp, #0x28] ldr w1, [fp, #0x28] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add w1, w0, #37 uxtb w1, w1 str w1, [fp, #0x24] ldr w1, [fp, #0x24] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x20] ldr w1, [fp, #0x20] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG08 ldr x0, [fp, #0x38] mov w1, #23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #43 bne G_M000_IG09 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #2 blt G_M000_IG09 ldr w0, [fp, #0x30] cmp w0, #64 bgt G_M000_IG09 ldr x0, [fp, #0x38] mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr w0, [fp, #0x2C] bl System.String:.ctor(ushort,int):this str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [fp, #0x30] ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr w1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 704 886: JIT compiled System.Text.RegularExpressions.RegexNode:MakeLoopAtomic() [Tier0, IL size=177, code size=704] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:EliminateEndingBacktracking():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x68] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG03 ldr x0, [fp, #0x68] ldr w0, [x0, #0x28] mov w1, #0xD1FFAB1E and w0, w0, w1 cbz w0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG04: ldr x0, [fp, #0x68] str x0, [fp, #0x60] G_M000_IG05: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #32 mov w1, #24 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x54] ldr w0, [fp, #0x54] sub w0, w0, #3 cmp w0, #5 bls G_M000_IG09 ldr w0, [fp, #0x54] sub w0, w0, #24 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #10 bhi G_M000_IG08 ldr w0, [fp, #0x10] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG08: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG09: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG10: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG11: ldr x0, [fp, #0x60] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG12: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w1, w0, #1 str w1, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x58] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x50] ldr w0, [fp, #0x50] cmp w0, #24 beq G_M000_IG13 ldr w0, [fp, #0x50] sub w0, w0, #26 cmp w0, #1 bls G_M000_IG13 ldr w0, [fp, #0x50] sub w0, w0, #33 cmp w0, #1 bhi G_M000_IG14 G_M000_IG13: mov w0, #1 str w0, [fp, #0x4C] b G_M000_IG15 G_M000_IG14: str wzr, [fp, #0x4C] G_M000_IG15: ldr w0, [fp, #0x4C] cbz w0, G_M000_IG17 ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] cbz x0, G_M000_IG16 ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #32 beq G_M000_IG17 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x2, [fp, #0x58] ldr w2, [x2, #0x28] ldr x0, [fp, #0x28] mov w1, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w1, w0, #1 str w1, [fp, #0x18] ldr w1, [fp, #0x18] ldr x0, [fp, #0x60] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG17: ldr x0, [fp, #0x58] str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG18: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x3C] mov w0, #1 str w0, [fp, #0x38] b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x60] ldr w1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x38] G_M000_IG20: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG22 G_M000_IG21: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG22: ldr w0, [fp, #0x38] ldr w1, [fp, #0x3C] cmp w0, w1 blt G_M000_IG19 ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #34 beq G_M000_IG26 ldr x0, [fp, #0x60] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG23: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG24: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG25 ldr x0, [fp, #0x60] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG25: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] cbz x0, G_M000_IG26 ldr x0, [fp, #0x30] str x0, [fp, #0x60] b G_M000_IG05 G_M000_IG26: ldp fp, lr, [sp], #0x70 ret lr RWD00 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 ; Total bytes of code 1160 887: JIT compiled System.Text.RegularExpressions.RegexNode:EliminateEndingBacktracking() [Tier0, IL size=346, code size=1160] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReplaceChild(int,System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x14, [fp, #0x18] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG04 ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w1, [fp, #0x24] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 244 888: JIT compiled System.Text.RegularExpressions.RegexNode:ReplaceChild(int,System.Text.RegularExpressions.RegexNode) [Tier0, IL size=62, code size=244] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceAtomic():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str x0, [fp, #0x88] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0x88] ldr w0, [x0, #0x28] and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG03 ldr x0, [fp, #0x88] str x0, [fp, #0x18] b G_M000_IG46 G_M000_IG03: ldr x0, [fp, #0x88] str x0, [fp, #0x80] ldr x0, [fp, #0x88] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x78] str x0, [fp, #0x80] ldr x0, [fp, #0x80] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x78] G_M000_IG05: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #32 mov w1, #38 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #32 beq G_M000_IG04 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x74] ldr w0, [fp, #0x74] cmp w0, #23 bhi G_M000_IG08 ldr w0, [fp, #0x74] sub w0, w0, #3 cmp w0, #5 bls G_M000_IG11 ldr w0, [fp, #0x74] sub w0, w0, #22 cmp w0, #1 bls G_M000_IG09 b G_M000_IG45 G_M000_IG08: ldr w0, [fp, #0x74] cmp w0, #24 beq G_M000_IG12 ldr w0, [fp, #0x74] sub w0, w0, #43 cmp w0, #2 bls G_M000_IG10 b G_M000_IG45 G_M000_IG09: ldr x0, [fp, #0x78] str x0, [fp, #0x18] b G_M000_IG46 G_M000_IG10: ldr x0, [fp, #0x78] str x0, [fp, #0x18] b G_M000_IG46 G_M000_IG11: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x1, [fp, #0x78] str x1, [fp, #0x18] b G_M000_IG46 G_M000_IG12: ldr x1, [fp, #0x88] ldr w1, [x1, #0x28] and w1, w1, #64 cbnz w1, G_M000_IG45 ldr x1, [fp, #0x78] ldr x1, [x1, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #23 bne G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x2, [fp, #0x78] ldr w2, [x2, #0x28] ldr x0, [fp, #0x28] mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x18] b G_M000_IG46 G_M000_IG13: mov w0, #1 str w0, [fp, #0x60] b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0x68] ldr w1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #23 bne G_M000_IG15 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w2, [fp, #0x60] add w2, w2, #1 sub w2, w0, w2 str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr w1, [fp, #0x60] add w1, w1, #1 ldr x0, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG19 G_M000_IG15: ldr w0, [fp, #0x60] add w0, w0, #1 str w0, [fp, #0x60] G_M000_IG16: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #32 mov w1, #214 bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w0, w0, #1 ldr w1, [fp, #0x60] cmp w0, w1 bgt G_M000_IG14 G_M000_IG19: str wzr, [fp, #0x64] str wzr, [fp, #0x5C] b G_M000_IG42 G_M000_IG20: ldr x0, [fp, #0x68] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG41 ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x4C] b G_M000_IG22 G_M000_IG21: ldr w0, [fp, #0x4C] add w0, w0, #1 str w0, [fp, #0x4C] G_M000_IG22: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w2, [fp, #0x4C] cmp w0, w2 ble G_M000_IG25 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG24 G_M000_IG23: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG24: ldr x0, [fp, #0x68] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG21 G_M000_IG25: ldr w0, [fp, #0x4C] ldr w2, [fp, #0x5C] sub w0, w0, w2 cmp w0, #3 blt G_M000_IG40 ldr w0, [fp, #0x5C] str w0, [fp, #0x48] b G_M000_IG37 G_M000_IG26: ldr x0, [fp, #0x68] ldr w1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] b G_M000_IG28 G_M000_IG27: ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] G_M000_IG28: ldr w0, [fp, #0x48] ldr w1, [fp, #0x4C] cmp w0, w1 bge G_M000_IG31 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG30 G_M000_IG29: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG30: ldr x0, [fp, #0x68] ldr w1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x44] cmp w0, w1 beq G_M000_IG27 G_M000_IG31: ldr w0, [fp, #0x48] ldr w1, [fp, #0x4C] cmp w0, w1 bge G_M000_IG37 ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x40] b G_M000_IG34 G_M000_IG32: ldr x0, [fp, #0x68] ldr w1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x44] cmp w0, w1 bne G_M000_IG33 ldr x0, [fp, #0x68] ldr w1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0x48] str w0, [fp, #0x34] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] ldr x0, [fp, #0x68] ldr w1, [fp, #0x34] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 mov w0, #1 str w0, [fp, #0x64] G_M000_IG33: ldr w0, [fp, #0x40] add w0, w0, #1 str w0, [fp, #0x40] G_M000_IG34: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG36 G_M000_IG35: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG36: ldr w0, [fp, #0x40] ldr w1, [fp, #0x4C] cmp w0, w1 blt G_M000_IG32 G_M000_IG37: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG39 G_M000_IG38: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG39: ldr w0, [fp, #0x48] ldr w1, [fp, #0x4C] cmp w0, w1 blt G_M000_IG26 G_M000_IG40: ldr w0, [fp, #0x4C] str w0, [fp, #0x5C] G_M000_IG41: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] G_M000_IG42: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG44 G_M000_IG43: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG44: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x5C] cmp w0, w1 bgt G_M000_IG20 ldr w0, [fp, #0x64] cbz w0, G_M000_IG45 ldr x0, [fp, #0x80] ldr x2, [fp, #0x78] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x80] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x78] G_M000_IG45: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x80] str x0, [fp, #0x18] b G_M000_IG46 G_M000_IG46: ldr x0, [fp, #0x18] G_M000_IG47: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 1948 889: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceAtomic() [Tier0, IL size=512, code size=1948] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:.ctor(System.Text.RegularExpressions.RegexNode,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #112 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] mov w1, #19 str w1, [x0, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #64 cmp w0, #0 cset x0, ne ldr x1, [fp, #0xD1FFAB1E] strb w0, [x1, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1, #0x24] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] strb w0, [x1, #0x29] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x28] cbz w0, G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #14 bne G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] strb wzr, [x0, #0x29] G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #18 cmp w0, #3 bhi G_M000_IG04 mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG05 G_M000_IG04: str wzr, [fp, #0xD1FFAB1E] G_M000_IG05: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG20 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x28] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #18 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #3 bhi G_M000_IG06 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG06: b G_M000_IG10 G_M000_IG07: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG11 b G_M000_IG12 G_M000_IG08: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG13 b G_M000_IG14 G_M000_IG09: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG15 b G_M000_IG16 G_M000_IG10: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG17 b G_M000_IG18 G_M000_IG11: str wzr, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG12: mov w0, #4 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG13: mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG14: mov w0, #5 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG15: mov w0, #3 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG16: mov w0, #7 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG17: mov w0, #2 str w0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG18: mov w0, #6 str w0, [fp, #0xD1FFAB1E] G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x20] b G_M000_IG55 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x28] cbnz w0, G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] strb w0, [x1, #0x2A] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #20 cmp w0, #1 bhi G_M000_IG21 mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG22 G_M000_IG21: str wzr, [fp, #0xD1FFAB1E] G_M000_IG22: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG25 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] str xzr, [fp, #0x78] add x0, fp, #120 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0x78] str x1, [x0, #0x2C] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #21 beq G_M000_IG23 ldr x0, [fp, #0x70] str x0, [fp, #0x68] mov w0, #9 str w0, [fp, #0x64] b G_M000_IG24 G_M000_IG23: ldr x0, [fp, #0x70] str x0, [fp, #0x68] mov w0, #8 str w0, [fp, #0x64] G_M000_IG24: ldr x0, [fp, #0x68] ldr w1, [fp, #0x64] str w1, [x0, #0x20] b G_M000_IG55 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x14, [fp, #0xD1FFAB1E] ldr w14, [x14, #0x08] cmp w14, #1 ble G_M000_IG28 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #16 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x90] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x28] cbnz w0, G_M000_IG26 ldr x0, [fp, #0x90] str x0, [fp, #0x88] mov w0, #10 str w0, [fp, #0x84] b G_M000_IG27 G_M000_IG26: ldr x0, [fp, #0x90] str x0, [fp, #0x88] mov w0, #11 str w0, [fp, #0x84] G_M000_IG27: ldr x0, [fp, #0x88] ldr w1, [fp, #0x84] str w1, [x0, #0x20] b G_M000_IG55 G_M000_IG28: ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #0xD1FFAB1E cmp w0, #0 cset x0, ne str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] and w0, w0, #8 cbz w0, G_M000_IG29 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 cset x0, eq str w0, [fp, #0xD1FFAB1E] b G_M000_IG30 G_M000_IG29: str wzr, [fp, #0xD1FFAB1E] G_M000_IG30: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG31 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 cset x0, eq str w0, [fp, #0xD1FFAB1E] b G_M000_IG32 G_M000_IG31: str wzr, [fp, #0xD1FFAB1E] G_M000_IG32: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x28] cbz w0, G_M000_IG43 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG42 stp xzr, xzr, [fp, #0xF0] add x0, fp, #240 add x1, fp, #0xD1FFAB1E mov w2, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG33: add x0, fp, #0xD1FFAB1E ldp x1, x2, [fp, #0xF0] stp x1, x2, [x0, #0xF0] G_M000_IG34: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] G_M000_IG35: str xzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG38 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0xAC] ldr w0, [fp, #0xAC] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xAC] cmp w0, #0 ble G_M000_IG38 add x0, fp, #0xD1FFAB1E ldr w2, [fp, #0xD1FFAB1E] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x98] str x1, [fp, #0xA0] G_M000_IG36: add x0, fp, #0xD1FFAB1E ldp x1, x2, [fp, #0x98] stp x1, x2, [x0, #0x98] G_M000_IG37: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] G_M000_IG38: ldr w2, [fp, #0xD1FFAB1E] cbnz w2, G_M000_IG39 ldr x2, [fp, #0xD1FFAB1E] cbz x2, G_M000_IG39 ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x08] cmp w2, #1 bne G_M000_IG39 stp xzr, xzr, [fp, #0xB0] ldr x2, [fp, #0xD1FFAB1E] mov w0, wzr ldr w1, [x2, #0x08] cmp w0, w1 bhs G_M000_IG57 add x2, x2, x0, LSL #1 add x2, x2, #16 ldrh w2, [x2] add x0, fp, #176 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x3, xzr mov w4, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #56 add x13, fp, #176 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0xD1FFAB1E] mov w1, #14 str w1, [x0, #0x20] b G_M000_IG55 G_M000_IG39: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #192 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xE8] str x0, [fp, #0x30] G_M000_IG40: add x0, fp, #136 ldr x1, [x0, #0x38] str x1, [fp, #0x38] ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG41: ldr x0, [fp, #0x30] add x1, fp, #56 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #24 ldr x15, [fp, #0xE8] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] mov w1, #13 str w1, [x0, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG42: b G_M000_IG55 G_M000_IG43: ldr w1, [fp, #0xD1FFAB1E] cmp w1, #0 cset x1, eq ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x8, [fp, #0xD1FFAB1E] cbz x8, G_M000_IG46 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG46 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG44: add x0, fp, #0xD1FFAB1E ldp x3, x4, [fp, #0xD1FFAB1E] stp x3, x4, [x0, #0xD1FFAB1E] G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG46 ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov w3, #16 str w3, [x0, #0x20] stp xzr, xzr, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr x3, [fp, #0xD1FFAB1E] ldr w4, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #56 add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG55 G_M000_IG46: add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG53 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG47 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG53 G_M000_IG47: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG48 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG48 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x8, [fp, #0xD1FFAB1E] str x8, [fp, #0xD1FFAB1E] ldr x8, [fp, #0xD1FFAB1E] cbz x8, G_M000_IG48 ldr x8, [fp, #0xD1FFAB1E] ldr w8, [x8, #0x08] cmp w8, #1 bne G_M000_IG48 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x8, [fp, #0xD1FFAB1E] mov w0, wzr ldr w1, [x8, #0x08] cmp w0, w1 bhs G_M000_IG57 add x8, x8, x0, LSL #1 add x8, x8, #16 ldrh w8, [x8] str w8, [fp, #0xD1FFAB1E] add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 stp xzr, xzr, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr w4, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x3, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #56 add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0xD1FFAB1E] mov w1, #15 str w1, [x0, #0x20] b G_M000_IG55 G_M000_IG48: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #3 ble G_M000_IG49 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sub w2, w0, #3 str w2, [fp, #0x2C] ldr w2, [fp, #0x2C] ldr x0, [fp, #0xD1FFAB1E] mov w1, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG49: ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #24 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG50 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG51 G_M000_IG50: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] mov w0, #17 str w0, [fp, #0xD1FFAB1E] b G_M000_IG52 G_M000_IG51: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] mov w0, #12 str w0, [fp, #0xD1FFAB1E] G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw x1, w0 str x1, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG55 G_M000_IG53: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG54 ldr x14, [fp, #0xD1FFAB1E] mov w13, #18 str w13, [x14, #0x20] ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #72 add x13, fp, #0xD1FFAB1E ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG55 G_M000_IG54: b G_M000_IG55 G_M000_IG55: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG56 bl CORINFO_HELP_FAIL_FAST G_M000_IG56: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG57: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 3124 890: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:.ctor(System.Text.RegularExpressions.RegexNode,int) [Tier0, IL size=974, code size=3124] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ComputeMinLength():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str x0, [fp, #0x68] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG03 b G_M000_IG26 G_M000_IG03: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] ldr w0, [fp, #0x64] sub w0, w0, #3 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #43 bhi G_M000_IG04 ldr w0, [fp, #0x10] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: b G_M000_IG25 G_M000_IG05: b G_M000_IG06 G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [x0, #0x08] str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG09: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG10: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw x0, w0 str x0, [fp, #0x38] ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw x1, w0 ldr x0, [fp, #0x38] mul x1, x1, x0 str x1, [fp, #0x20] ldr x1, [fp, #0x20] mov x0, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG11: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x60] ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x5C] mov w0, #1 str w0, [fp, #0x58] b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x68] ldr w1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr w0, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x5C] ldr w0, [fp, #0x58] add w0, w0, #1 str w0, [fp, #0x58] G_M000_IG13: ldr w0, [fp, #0x58] ldr w1, [fp, #0x60] cmp w0, w1 bge G_M000_IG16 ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr w0, [fp, #0x5C] cmp w0, #0 bgt G_M000_IG12 G_M000_IG16: ldr w0, [fp, #0x5C] str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG17: ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x40] ldr x0, [fp, #0x68] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr w0, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG18: ldr x0, [fp, #0x68] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] ldr x0, [fp, #0x68] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr w0, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG19: str xzr, [fp, #0x50] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x4C] str wzr, [fp, #0x48] b G_M000_IG21 G_M000_IG20: ldr x0, [fp, #0x68] ldr w1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw x1, w0 ldr x0, [fp, #0x50] add x1, x1, x0 str x1, [fp, #0x50] ldr w1, [fp, #0x48] add w1, w1, #1 str w1, [fp, #0x48] G_M000_IG21: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG23 G_M000_IG22: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG23: ldr w0, [fp, #0x48] ldr w1, [fp, #0x4C] cmp w0, w1 blt G_M000_IG20 ldr x1, [fp, #0x50] mov x0, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG24: ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x2C] b G_M000_IG28 G_M000_IG25: b G_M000_IG26 G_M000_IG26: mov w0, wzr G_M000_IG27: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG28: ldr w0, [fp, #0x2C] G_M000_IG29: ldp fp, lr, [sp], #0x70 ret lr RWD00 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 ; Total bytes of code 1216 891: JIT compiled System.Text.RegularExpressions.RegexNode:ComputeMinLength() [Tier0, IL size=455, code size=1216] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_M():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 892: JIT compiled System.Text.RegularExpressions.RegexNode:get_M() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingAnchor(System.Text.RegularExpressions.RegexNode):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 893: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingAnchor(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingOrTrailingAnchor(System.Text.RegularExpressions.RegexNode,bool):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str xzr, [fp, #0x60] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x78] str w1, [fp, #0x74] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG03 b G_M000_IG36 G_M000_IG03: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #56 mov w1, #9 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x70] ldr w0, [fp, #0x70] sub w0, w0, #14 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #18 bhi G_M000_IG06 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG06: ldr w0, [fp, #0x70] cmp w0, #41 bne G_M000_IG35 G_M000_IG07: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x34] b G_M000_IG38 G_M000_IG08: ldr x0, [fp, #0x78] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x78] b G_M000_IG03 G_M000_IG09: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x6C] str xzr, [fp, #0x60] ldr w0, [fp, #0x74] uxtb w0, w0 cbz w0, G_M000_IG18 str wzr, [fp, #0x5C] b G_M000_IG15 G_M000_IG10: ldr x0, [fp, #0x78] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #23 beq G_M000_IG11 ldr w0, [fp, #0x58] sub w0, w0, #30 cmp w0, #1 bhi G_M000_IG12 G_M000_IG11: mov w0, #1 str w0, [fp, #0x54] b G_M000_IG13 G_M000_IG12: str wzr, [fp, #0x54] G_M000_IG13: ldr w0, [fp, #0x54] cbnz w0, G_M000_IG14 ldr x0, [fp, #0x78] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] b G_M000_IG27 G_M000_IG14: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] G_M000_IG15: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #56 mov w1, #197 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr w0, [fp, #0x5C] ldr w1, [fp, #0x6C] cmp w0, w1 blt G_M000_IG10 b G_M000_IG27 G_M000_IG18: ldr w0, [fp, #0x6C] sub w0, w0, #1 str w0, [fp, #0x50] b G_M000_IG24 G_M000_IG19: ldr x0, [fp, #0x78] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x58] ldr w0, [fp, #0x58] cmp w0, #23 beq G_M000_IG20 ldr w0, [fp, #0x58] sub w0, w0, #30 cmp w0, #1 bhi G_M000_IG21 G_M000_IG20: mov w0, #1 str w0, [fp, #0x54] b G_M000_IG22 G_M000_IG21: str wzr, [fp, #0x54] G_M000_IG22: ldr w0, [fp, #0x54] cbnz w0, G_M000_IG23 ldr x0, [fp, #0x78] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] b G_M000_IG27 G_M000_IG23: ldr w0, [fp, #0x50] sub w0, w0, #1 str w0, [fp, #0x50] G_M000_IG24: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG26 G_M000_IG25: add x0, fp, #56 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG26: ldr w0, [fp, #0x50] tbz w0, #31, G_M000_IG19 G_M000_IG27: ldr x0, [fp, #0x60] cbz x0, G_M000_IG35 ldr x0, [fp, #0x60] str x0, [fp, #0x78] b G_M000_IG03 G_M000_IG28: ldr x0, [fp, #0x78] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x74] uxtb w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x4C] ldr w0, [fp, #0x4C] cbnz w0, G_M000_IG29 b G_M000_IG36 G_M000_IG29: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x48] mov w0, #1 str w0, [fp, #0x44] b G_M000_IG32 G_M000_IG30: ldr x0, [fp, #0x78] ldr w1, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w1, [fp, #0x74] uxtb w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x4C] cmp w0, w1 beq G_M000_IG31 b G_M000_IG36 G_M000_IG31: ldr w0, [fp, #0x44] add w0, w0, #1 str w0, [fp, #0x44] G_M000_IG32: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG34 G_M000_IG33: add x0, fp, #56 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG34: ldr w0, [fp, #0x44] ldr w1, [fp, #0x48] cmp w0, w1 blt G_M000_IG30 ldr w0, [fp, #0x4C] str w0, [fp, #0x34] b G_M000_IG38 G_M000_IG35: b G_M000_IG36 G_M000_IG36: mov w0, wzr G_M000_IG37: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG38: ldr w0, [fp, #0x34] uxtb w0, w0 G_M000_IG39: ldp fp, lr, [sp], #0x80 ret lr RWD00 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 ; Total bytes of code 1112 894: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingOrTrailingAnchor(System.Text.RegularExpressions.RegexNode,bool) [Tier0, IL size=355, code size=1112] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingAnchor():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x29] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 895: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingAnchor() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindTrailingAnchor(System.Text.RegularExpressions.RegexNode):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 896: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindTrailingAnchor(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_TrailingAnchor():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x2A] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 897: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_TrailingAnchor() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindPrefix(System.Text.RegularExpressions.RegexNode):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #96 stp fp, lr, [sp, #0x50] add fp, sp, #80 sub x9, fp, #72 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #-0x50] str x0, [fp, #-0x08] G_M000_IG02: stp xzr, xzr, [fp, #-0x48] sub x0, fp, #72 ldr wzr, [sp], #-0x80 mov x1, sp mov w2, #64 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp x0, x1, [fp, #-0x48] stp x0, x1, [fp, #-0x38] G_M000_IG04: ldr x1, [fp, #-0x38] ldr x2, [fp, #-0x30] sub x0, fp, #40 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub x1, fp, #40 ldr x0, [fp, #-0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x50] cmp xip0, xip1 beq G_M000_IG05 bl CORINFO_HELP_FAIL_FAST G_M000_IG05: sub sp, fp, #80 ldp fp, lr, [sp, #0x50] add sp, sp, #96 ret lr ; Total bytes of code 224 898: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindPrefix(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=47, code size=224] ; Assembly listing for method System.Text.ValueStringBuilder:.ctor(System.Span`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x14, [fp, #0x28] str xzr, [x14] ldr x14, [fp, #0x28] add x14, x14, #16 add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x28] str wzr, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 899: JIT compiled System.Text.ValueStringBuilder:.ctor(System.Span`1[ushort]) [Tier0, IL size=22, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__Process|0_0(System.Text.RegularExpressions.RegexNode,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] str xzr, [x9, #0xA0] str x0, [fp, #0xE8] str x1, [fp, #0xE0] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG03 b G_M000_IG34 G_M000_IG03: ldr x0, [fp, #0xE8] ldr w0, [x0, #0x28] and w0, w0, #64 cmp w0, #0 cset x0, ne str w0, [fp, #0xDC] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD4] ldr w0, [fp, #0xD4] sub w0, w0, #3 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #43 bhi G_M000_IG04 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: b G_M000_IG33 G_M000_IG05: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD0] str wzr, [fp, #0xCC] b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0xE8] ldr w1, [fp, #0xCC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr x1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG07 b G_M000_IG34 G_M000_IG07: ldr w0, [fp, #0xCC] add w0, w0, #1 str w0, [fp, #0xCC] G_M000_IG08: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #104 mov w1, #254 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0xCC] ldr w1, [fp, #0xD0] cmp w0, w1 blt G_M000_IG06 ldr w0, [fp, #0xDC] cmp w0, #0 cset x0, eq str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG11: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xC8] ldr x0, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xC4] ldr x0, [fp, #0xE8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr x1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xE0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xC4] sub w0, w0, w1 str w0, [fp, #0xC0] ldr w0, [fp, #0xC0] cbz w0, G_M000_IG17 add x0, fp, #160 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #1 str w0, [fp, #0x9C] b G_M000_IG13 G_M000_IG12: add x0, fp, #160 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xE8] ldr w1, [fp, #0x9C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] add x1, fp, #160 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xE0] ldr w1, [fp, #0xC4] ldr w2, [fp, #0xC0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x80] str x1, [fp, #0x88] add x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] str x1, [fp, #0x78] ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] ldr x2, [fp, #0x70] ldr x3, [fp, #0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str w0, [fp, #0xC0] ldr w0, [fp, #0x9C] add w0, w0, #1 str w0, [fp, #0x9C] G_M000_IG13: ldr w0, [fp, #0x9C] ldr w1, [fp, #0xC8] cmp w0, w1 bge G_M000_IG16 ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #104 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr w0, [fp, #0xC0] cbnz w0, G_M000_IG12 G_M000_IG16: add x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xC4] ldr w0, [fp, #0xC0] add w1, w1, w0 ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG17: b G_M000_IG34 G_M000_IG18: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] ldr w1, [fp, #0x44] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xDC] cmp w0, #0 cset x0, eq str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG19: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xDC] cmp w0, #0 cset x0, eq str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG20: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG33 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x34] ldr w0, [fp, #0x34] mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD8] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x30] ldr w1, [fp, #0x30] ldr x0, [fp, #0xE0] ldr w2, [fp, #0xD8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD8] cmp w0, w1 bne G_M000_IG21 ldr w0, [fp, #0xDC] cmp w0, #0 cset x0, eq str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG21: b G_M000_IG34 G_M000_IG22: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG33 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x2C] ldr w0, [fp, #0x2C] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x98] str wzr, [fp, #0x94] b G_M000_IG25 G_M000_IG23: ldr x0, [fp, #0xE8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG24 b G_M000_IG34 G_M000_IG24: ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] G_M000_IG25: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG27 G_M000_IG26: add x0, fp, #104 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG27: ldr w0, [fp, #0x94] ldr w1, [fp, #0x98] cmp w0, w1 blt G_M000_IG23 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x98] cmp w0, w1 bne G_M000_IG28 ldr w0, [fp, #0xDC] cmp w0, #0 cset x0, eq str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG28: b G_M000_IG34 G_M000_IG29: ldr x0, [fp, #0xE8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x64] b G_M000_IG36 G_M000_IG30: b G_M000_IG31 G_M000_IG31: mov w0, #1 G_M000_IG32: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG33: b G_M000_IG34 G_M000_IG34: mov w0, wzr G_M000_IG35: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG36: ldr w0, [fp, #0x64] uxtb w0, w0 G_M000_IG37: ldp fp, lr, [sp], #0xF0 ret lr RWD00 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 ; Total bytes of code 1756 900: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__Process|0_0(System.Text.RegularExpressions.RegexNode,byref) [Tier0, IL size=588, code size=1756] ; Assembly listing for method System.Text.ValueStringBuilder:get_Length():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 901: JIT compiled System.Text.ValueStringBuilder:get_Length() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.ValueStringBuilder:Append(ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] str w1, [fp, #0x20] ldr x1, [fp, #0x28] G_M000_IG03: ldp x0, x2, [x1, #0x10] stp x0, x2, [fp, #0x10] G_M000_IG04: ldr w1, [fp, #0x20] ldr w0, [fp, #0x18] cmp w1, w0 bhs G_M000_IG06 ldr w1, [fp, #0x20] ldr w0, [fp, #0x18] cmp w1, w0 bhs G_M000_IG08 ldr x1, [fp, #0x10] ldr w0, [fp, #0x20] mov w0, w0 lsl x0, x0, #1 ldr w2, [fp, #0x24] strh w2, [x1, x0] ldr w1, [fp, #0x20] add w1, w1, #1 ldr x0, [fp, #0x28] str w1, [x0, #0x08] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr w1, [fp, #0x24] uxth w1, w1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 172 902: JIT compiled System.Text.ValueStringBuilder:Append(ushort) [Tier0, IL size=52, code size=172] ; Assembly listing for method System.Text.ValueStringBuilder:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0x34] ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x20] blr x2 ldr x14, [fp, #0x38] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x38] ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x14, [fp, #0x38] add x14, x14, #16 add x13, fp, #32 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x38] str wzr, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 164 903: JIT compiled System.Text.ValueStringBuilder:.ctor(int) [Tier0, IL size=42, code size=164] ; Assembly listing for method System.Text.ValueStringBuilder:set_Length(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 904: JIT compiled System.Text.ValueStringBuilder:set_Length(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.ValueStringBuilder:AsSpan(int,int):System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldrsb wzr, [x0] ldr x0, [fp, #0x38] add x0, x0, #16 ldr w1, [fp, #0x34] ldr w2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] str x1, [fp, #0x18] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 132 905: JIT compiled System.Text.ValueStringBuilder:AsSpan(int,int) [Tier0, IL size=19, code size=132] ; Assembly listing for method System.Text.ValueStringBuilder:AsSpan():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldrsb wzr, [x0] ldr x0, [fp, #0x38] add x0, x0, #16 ldr x2, [fp, #0x38] ldr w2, [x2, #0x08] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 128 906: JIT compiled System.Text.ValueStringBuilder:AsSpan() [Tier0, IL size=24, code size=128] ; Assembly listing for method System.Text.ValueStringBuilder:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x28] stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] ldr x0, [fp, #0x20] cbz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] mov w2, wzr ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 907: JIT compiled System.Text.ValueStringBuilder:Dispose() [Tier0, IL size=30, code size=116] ; Assembly listing for method System.Text.ValueStringBuilder:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldrsb wzr, [x0] ldr x0, [fp, #0x38] add x0, x0, #16 ldr x2, [fp, #0x38] ldr w2, [x2, #0x08] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG03: ldp x0, x1, [fp, #0x10] stp x0, x1, [fp, #0x20] G_M000_IG04: add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x30] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 156 908: JIT compiled System.Text.ValueStringBuilder:ToString() [Tier0, IL size=41, code size=156] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindFixedDistanceSets(System.Text.RegularExpressions.RegexNode,bool):System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 3 inlinees with PGO data; 15 single block inlinees; 7 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] stp x25, x26, [sp, #0xD1FFAB1E] str x27, [sp, #0xD1FFAB1E] mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #168 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0xD1FFAB1E] mov x19, x0 mov w20, w1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #53 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x21, #8 bl CORINFO_HELP_ASSIGN_REF str wzr, [fp, #0xF8] uxtb w20, w20 mov w3, w20 add x2, fp, #248 mov x0, x19 mov x1, x21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov w0, wzr ldr w1, [x21, #0x10] cmp w1, #0 ble G_M000_IG13 align [0 bytes for IG03] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: cmp w0, w1 bhs G_M000_IG36 ldr x2, [x21, #0x08] ldr w3, [x2, #0x08] cmp w0, w3 bhs G_M000_IG39 mov w3, #40 umull x3, w0, w3 add x3, x3, #16 add x2, x2, x3 G_M000_IG04: ldp q16, q17, [x2] stp q16, q17, [fp, #0x90] ldr x3, [x2, #0x20] str x3, [fp, #0xB0] G_M000_IG05: ldr x2, [fp, #0x90] cbz x2, G_M000_IG08 G_M000_IG06: ldr w3, [x2, #0x08] cmp w3, #4 bne G_M000_IG08 G_M000_IG07: ldr x2, [x2, #0x0C] cmp x2, #16, LSL #12 beq G_M000_IG10 G_M000_IG08: add w0, w0, #1 cmp w0, w1 blt G_M000_IG03 G_M000_IG09: b G_M000_IG13 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] tbz w0, #0, G_M000_IG37 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x1, [x0] cbnz x1, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x1, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] cbz x15, G_M000_IG38 add x14, x1, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x1, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG12: mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: ldr w0, [x21, #0x10] cbnz w0, G_M000_IG22 G_M000_IG14: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x0, G_M000_IG19 ldr w14, [x0, #0x08] cmp w14, #4 bne G_M000_IG16 G_M000_IG15: ldr x14, [x0, #0x0C] cmp x14, #16, LSL #12 beq G_M000_IG19 G_M000_IG16: str xzr, [fp, #0x80] str x0, [fp, #0x60] G_M000_IG17: add x0, fp, #40 ldr x13, [x0, #0x38] str x13, [fp, #0x38] ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG18: ldr w0, [x21, #0x14] add w0, w0, #1 str w0, [x21, #0x14] ldr x14, [x21, #0x08] ldr w13, [x21, #0x10] ldr w0, [x14, #0x08] cmp w0, w13 bls G_M000_IG21 add w12, w13, #1 str w12, [x21, #0x10] mov w12, #40 umull x13, w13, w12 add x13, x13, #16 add x14, x14, x13 add x13, fp, #56 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG22 G_M000_IG19: mov x0, xzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG20 bl CORINFO_HELP_FAIL_FAST G_M000_IG20: ldr x27, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG21: add x1, fp, #56 mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG22: add x19, fp, #0xD1FFAB1E mov w22, wzr ldr w1, [x21, #0x10] cmp w1, #0 ble G_M000_IG33 G_M000_IG23: ldr w1, [x21, #0x10] cmp w22, w1 bhs G_M000_IG36 ldr x1, [x21, #0x08] ldr w2, [x1, #0x08] cmp w22, w2 bhs G_M000_IG39 mov w2, #40 umull x2, w22, w2 add x23, x2, #16 add x1, x1, x23 G_M000_IG24: ldp q16, q17, [x1] stp q16, q17, [fp, #0xD0] ldr x0, [x1, #0x20] str x0, [fp, #0xF0] G_M000_IG25: ldr x24, [fp, #0xD0] mov x1, x24 ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG39 ldrh w1, [x1, #0x0C] cmp w1, #1 cset x1, eq strb w1, [fp, #0xEC] mov x1, x19 mov w2, #5 mov x0, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w25, w0 ldrb w26, [fp, #0xEC] cbnz w26, G_M000_IG27 G_M000_IG26: cmp w25, #0 ble G_M000_IG27 cmp w25, #5 bhi G_M000_IG35 sxtw x1, w25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x27, x0 add x0, x27, #16 mov w2, w25 lsl x2, x2, #1 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x27, [fp, #0xD8] G_M000_IG27: cbz w20, G_M000_IG31 G_M000_IG28: ldr x2, [fp, #0xD8] cbz x2, G_M000_IG29 cmp w25, #2 ble G_M000_IG31 G_M000_IG29: add x2, fp, #192 add x1, fp, #200 mov x0, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG30 str xzr, [fp, #0xD8] ldrh w1, [fp, #0xC8] ldrh w0, [fp, #0xC0] str xzr, [fp, #0x88] strh w1, [fp, #0x8C] strh w0, [fp, #0x8E] mov w1, #1 strb w1, [fp, #0x88] ldr x1, [fp, #0x88] str x1, [fp, #0xF0] b G_M000_IG31 G_M000_IG30: ldr x1, [fp, #0xD8] cbnz x1, G_M000_IG31 cbnz w26, G_M000_IG31 add x1, fp, #184 mov x0, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG31 ldr x14, [fp, #0xB8] str x14, [fp, #0xE0] G_M000_IG31: ldp q16, q17, [fp, #0xD0] stp q16, q17, [fp, #0x10] ldr x12, [fp, #0xF0] str x12, [fp, #0x30] G_M000_IG32: ldr w0, [x21, #0x10] cmp w22, w0 bhs G_M000_IG36 ldr x14, [x21, #0x08] ldr w13, [x14, #0x08] cmp w22, w13 bhs G_M000_IG39 add x14, x14, x23 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr w1, [x21, #0x14] add w1, w1, #1 str w1, [x21, #0x14] add w22, w22, #1 cmp w22, w0 blt G_M000_IG23 G_M000_IG33: mov x0, x21 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG34 bl CORINFO_HELP_FAIL_FAST G_M000_IG34: ldr x27, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG35: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG37: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #74 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG11 G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG39: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1376 909: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindFixedDistanceSets(System.Text.RegularExpressions.RegexNode,bool) [Tier-0 switched to FullOpts, IL size=399, code size=1376] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, xzr bl CORINFO_HELP_NEWARR_1_VC movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 910: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.cctor() [Tier0, IL size=12, code size=56] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__TryFindFixedSets|1_0(System.Text.RegularExpressions.RegexNode,System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],byref,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x4, sp, #0xD1FFAB1E str x4, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG03 b G_M000_IG85 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG04 b G_M000_IG85 G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #3 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #43 bhi G_M000_IG05 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG05: b G_M000_IG84 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 bge G_M000_IG09 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 ldr x3, [fp, #0xD1FFAB1E] str w0, [x3] add x0, fp, #0xD1FFAB1E ldr w3, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG07: add x0, fp, #152 ldr x1, [x0, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldp q16, q17, [x0, #0xD1FFAB1E] stp q16, q17, [fp, #0xD1FFAB1E] G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG81 G_M000_IG09: b G_M000_IG85 G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] mov w1, #20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG14 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 ldr x3, [fp, #0xD1FFAB1E] str w0, [x3] stp xzr, xzr, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr w3, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG12: ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG14: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bge G_M000_IG17 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 blt G_M000_IG11 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 cset x0, eq str w0, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG18: b G_M000_IG85 G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG23 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG89 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 ldr x3, [fp, #0xD1FFAB1E] str w0, [x3] add x0, fp, #0xD1FFAB1E stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] str xzr, [x0, #0x20] add x0, fp, #0xD1FFAB1E ldr w3, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xE8] G_M000_IG21: add x0, fp, #0xD1FFAB1E ldp q16, q17, [x0, #0xF0] stp q16, q17, [fp, #0xF0] ldr x1, [x0, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG22: ldr x0, [fp, #0xE8] add x1, fp, #240 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG26 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG25 G_M000_IG24: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 blt G_M000_IG20 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 cset x0, eq str w0, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 bge G_M000_IG30 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 ldr x3, [fp, #0xD1FFAB1E] str w0, [x3] add x0, fp, #0xD1FFAB1E ldr w3, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB8] G_M000_IG28: add x0, fp, #0xD1FFAB1E ldp q16, q17, [x0, #0xC0] stp q16, q17, [fp, #0xC0] ldr x1, [x0, #0xE0] str x1, [fp, #0xE0] G_M000_IG29: ldr x0, [fp, #0xB8] add x1, fp, #192 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG81 G_M000_IG30: b G_M000_IG85 G_M000_IG31: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xB4] ldr w0, [fp, #0xB4] mov w1, #20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG35 G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 ldr x3, [fp, #0xD1FFAB1E] str w0, [x3] stp xzr, xzr, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr w3, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x80] G_M000_IG33: add x0, fp, #0xD1FFAB1E ldr x1, [x0, #0x88] str x1, [fp, #0x88] ldp q16, q17, [x0, #0x90] stp q16, q17, [fp, #0x90] G_M000_IG34: ldr x0, [fp, #0x80] add x1, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG35: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bge G_M000_IG38 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG37 G_M000_IG36: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 blt G_M000_IG32 G_M000_IG38: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 cset x0, eq str w0, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG39: b G_M000_IG85 G_M000_IG40: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] add w0, w0, #1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1] b G_M000_IG81 G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w0, w0, w1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1] b G_M000_IG81 G_M000_IG42: b G_M000_IG81 G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x78] ldr x0, [fp, #0x78] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str w0, [fp, #0xD1FFAB1E] b G_M000_IG87 G_M000_IG44: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #0 ble G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x70] ldr x0, [fp, #0x70] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG85 G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG48 G_M000_IG46: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w0, G_M000_IG47 b G_M000_IG85 G_M000_IG47: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG48: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG50 G_M000_IG49: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG50: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG46 b G_M000_IG81 G_M000_IG51: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG84 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG65 G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x60] ldr x0, [fp, #0x60] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 add x2, fp, #0xD1FFAB1E ldr x1, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w1, [fp, #0xD1FFAB1E] and w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG53 b G_M000_IG85 G_M000_IG53: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG55 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG54 add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG55 G_M000_IG54: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w8, [fp, #0xD1FFAB1E] cmp w0, w8 beq G_M000_IG55 str wzr, [fp, #0xD1FFAB1E] G_M000_IG55: add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG56: b G_M000_IG59 G_M000_IG57: add x0, fp, #0xD1FFAB1E add x8, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x2, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz w0, G_M000_IG58 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG59 add x2, fp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2] add w2, w2, #1 ldr x3, [fp, #0xD1FFAB1E] str w2, [x3] ldr x2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 b G_M000_IG59 G_M000_IG58: add x0, fp, #0xD1FFAB1E stp xzr, xzr, [x0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x2, [fp, #0x50] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 G_M000_IG59: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG61 G_M000_IG60: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG61: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG57 b G_M000_IG62 G_M000_IG62: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG90 G_M000_IG63: nop G_M000_IG64: ldr w8, [fp, #0xD1FFAB1E] add w8, w8, #1 str w8, [fp, #0xD1FFAB1E] G_M000_IG65: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG67 G_M000_IG66: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG67: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG52 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG68: b G_M000_IG73 G_M000_IG69: add x0, fp, #0xD1FFAB1E add x8, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #50 blt G_M000_IG70 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG78 G_M000_IG70: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG73 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] str xzr, [x0, #0x20] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x3, [fp, #0xD1FFAB1E] ldr w3, [x3] add w3, w0, w3 str w3, [fp, #0x4C] ldr w3, [fp, #0x4C] add x0, fp, #0xD1FFAB1E ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x18] G_M000_IG71: add x0, fp, #0xD1FFAB1E ldp q16, q17, [x0, #0x20] stp q16, q17, [fp, #0x20] ldr x1, [x0, #0x40] str x1, [fp, #0x40] G_M000_IG72: ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG73: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG75 G_M000_IG74: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG75: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG69 b G_M000_IG76 G_M000_IG76: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG93 G_M000_IG77: b G_M000_IG80 G_M000_IG78: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG93 G_M000_IG79: nop G_M000_IG80: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG83 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0] str w0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] add w0, w0, w1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1] b G_M000_IG81 G_M000_IG81: mov w0, #1 G_M000_IG82: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG83: b G_M000_IG85 G_M000_IG84: b G_M000_IG85 G_M000_IG85: mov w0, wzr G_M000_IG86: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG87: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 G_M000_IG88: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG89: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG90: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG91: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG92: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG93: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG94: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG95: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG40 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG51 - G_M000_IG02 dd G_M000_IG45 - G_M000_IG02 dd G_M000_IG44 - G_M000_IG02 dd G_M000_IG44 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG84 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 ; Total bytes of code 4224 911: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__TryFindFixedSets|1_0(System.Text.RegularExpressions.RegexNode,System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],byref,bool) [Tier0, IL size=1178, code size=4224] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x18] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 912: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor() [Tier0, IL size=18, code size=72] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Clear():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x14] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] str w0, [fp, #0x14] ldr x0, [fp, #0x18] str wzr, [x0, #0x10] ldr w0, [fp, #0x14] cmp w0, #0 ble G_M000_IG05 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr w2, [fp, #0x14] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] str wzr, [x0, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 148 913: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Clear() [Tier0, IL size=61, code size=148] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 914: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]() [Tier0, IL size=2, code size=20] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 915: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Count() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:OneToStringClass(ushort):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x58] str w0, [fp, #0x4C] G_M000_IG02: ldr w0, [fp, #0x4C] strh w0, [fp, #0x50] stp xzr, xzr, [fp, #0x28] add x0, fp, #40 add x1, fp, #80 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp x0, x1, [fp, #0x28] stp x0, x1, [fp, #0x38] G_M000_IG04: ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x58] cmp xip0, xip1 beq G_M000_IG05 bl CORINFO_HELP_FAIL_FAST G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 196 916: JIT compiled System.Text.RegularExpressions.RegexCharClass:OneToStringClass(ushort) [Tier0, IL size=26, code size=196] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CharsToStringClass(System.ReadOnlySpan`1[ushort]):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #136 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) str xzr, [x9, #0x20] str x0, [fp, #0xE0] str x1, [fp, #0xE8] G_M000_IG02: ldr w0, [fp, #0xE8] str w0, [fp, #0xC0] ldr w0, [fp, #0xC0] cmp w0, #2 bhi G_M000_IG03 ldr w0, [fp, #0xC0] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG12 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG06: ldr w0, [fp, #0xE8] cmp w0, #0 bls G_M000_IG17 ldr x0, [fp, #0xE0] ldrh w0, [x0] cmp w0, #128 bge G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #52 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0xB8] ldr w1, [fp, #0xE8] cmp w1, #0 bls G_M000_IG17 ldr x1, [fp, #0xE0] ldrh w1, [x1] ldr x0, [fp, #0xB8] ldr w0, [x0, #0x08] cmp w1, w0 bge G_M000_IG12 ldr w1, [fp, #0xE8] cmp w1, #0 bls G_M000_IG17 ldr x1, [fp, #0xE0] ldrh w1, [x1] mov w1, w1 ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_LDELEMA_REF str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG07 add x0, fp, #136 mov w1, #3 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xE8] cmp w1, #0 bls G_M000_IG17 ldr x1, [fp, #0xE0] ldrh w1, [x1] add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xE8] cmp w1, #0 bls G_M000_IG17 ldr x1, [fp, #0xE0] ldrh w1, [x1] add w1, w1, #1 uxth w1, w1 add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x14, [fp, #0x20] str x14, [fp, #0x80] ldr x14, [fp, #0xB0] ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x80] str x0, [fp, #0x28] G_M000_IG07: ldr x0, [fp, #0x28] G_M000_IG08: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG09: ldr w0, [fp, #0xE8] cmp w0, #0 bls G_M000_IG17 ldr x0, [fp, #0xE0] ldrh w0, [x0] orr w0, w0, #32 str w0, [fp, #0xC4] ldr w0, [fp, #0xC4] sub w0, w0, #97 cmp w0, #25 bhi G_M000_IG12 ldr w0, [fp, #0xC4] ldr w1, [fp, #0xE8] cmp w1, #1 bls G_M000_IG17 ldr x1, [fp, #0xE0] ldrh w1, [x1, #0x02] orr w1, w1, #32 cmp w0, w1 bne G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #52 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0xC4] sub w1, w1, #97 sxtw x1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_LDELEMA_REF str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] ldr x0, [x0] str x0, [fp, #0x48] ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG10 add x0, fp, #136 mov w1, #3 mov w2, #4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xC4] and w1, w1, #0xD1FFAB1E uxth w1, w1 add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xC4] and w1, w1, #0xD1FFAB1E add w1, w1, #1 uxth w1, w1 add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xC4] uxth w1, w1 add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xC4] add w1, w1, #1 uxth w1, w1 add x0, fp, #136 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #136 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x14, [fp, #0x38] str x14, [fp, #0x80] ldr x14, [fp, #0xB0] ldr x15, [fp, #0x38] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x80] str x0, [fp, #0x40] G_M000_IG10: ldr x0, [fp, #0x40] G_M000_IG11: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG12: ldr w0, [fp, #0xE8] lsl w0, w0, #1 str w0, [fp, #0xDC] ldr w0, [fp, #0xE8] sub w0, w0, #1 str w0, [fp, #0x7C] ldr w0, [fp, #0x7C] ldr w1, [fp, #0xE8] cmp w0, w1 bhs G_M000_IG17 ldr x0, [fp, #0xE0] ldr w1, [fp, #0x7C] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] mov w1, #0xD1FFAB1E cmp w0, w1 bne G_M000_IG13 ldr w0, [fp, #0xDC] sub w0, w0, #1 str w0, [fp, #0xDC] G_M000_IG13: ldp x0, x1, [fp, #0xE0] stp x0, x1, [fp, #0xC8] G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #54 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x70] ldr w0, [fp, #0xDC] add w0, w0, #3 str w0, [fp, #0x6C] add x0, fp, #200 str x0, [fp, #0x60] ldr x0, [fp, #0x70] str x0, [fp, #0x58] ldr x0, [fp, #0x70] cbnz x0, G_M000_IG15 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #54 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #54 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x50] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x50] str x0, [fp, #0x58] G_M000_IG15: ldr w0, [fp, #0x6C] ldr x1, [fp, #0x60] ldr x2, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG16: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG17: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 1360 917: JIT compiled System.Text.RegularExpressions.RegexCharClass:CharsToStringClass(System.ReadOnlySpan`1[ushort]) [Tier0, IL size=403, code size=1360] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov w1, #38 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E G_M000_IG03: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E G_M000_IG04: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x15, [fp, #0xD1FFAB1E] movz x14, #0xD1FFAB1E G_M000_IG05: movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #112 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #4 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #5 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #6 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #7 bl CORINFO_HELP_ARRADDR_ST G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #8 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #9 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #10 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #11 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #12 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #13 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #14 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #15 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E G_M000_IG07: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #16 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #17 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #18 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #19 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #20 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #21 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #22 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #23 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #24 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #25 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #26 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #27 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #28 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #29 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #30 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #31 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #32 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] G_M000_IG09: ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #33 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #34 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #35 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #36 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #37 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #38 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #39 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #40 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E G_M000_IG10: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #41 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #42 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #43 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #44 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #45 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #46 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #47 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #48 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #49 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG11: movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #50 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #51 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #52 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #53 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #54 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #55 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #56 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #57 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG12: bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #58 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #59 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #60 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #61 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #62 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #63 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #64 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #65 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #66 G_M000_IG13: bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #67 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #68 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #69 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #70 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #71 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #72 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #73 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #74 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr G_M000_IG14: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #75 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #76 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #77 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #78 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #79 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #80 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] mov x1, #81 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xF8] ldr x0, [fp, #0xF8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xF8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF8] mov x1, #82 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xF0] ldr x0, [fp, #0xF0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xF0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG15: movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xF0] mov x1, #83 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xE8] ldr x0, [fp, #0xE8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xE8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xE8] mov x1, #84 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xE0] ldr x0, [fp, #0xE0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xE0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xE0] mov x1, #85 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD8] ldr x0, [fp, #0xD8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD8] mov x1, #86 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD0] ldr x0, [fp, #0xD0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD0] mov x1, #87 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xC8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xC8] mov x1, #88 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xC0] ldr x0, [fp, #0xC0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xC0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xC0] mov x1, #89 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xB8] ldr x0, [fp, #0xB8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xB8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xB8] mov x1, #90 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xB0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xB0] mov x1, #91 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG16: mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xA8] ldr x0, [fp, #0xA8] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xA8] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xA8] mov x1, #92 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xA0] ldr x0, [fp, #0xA0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xA0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xA0] mov x1, #93 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x98] ldr x0, [fp, #0x98] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x98] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x98] mov x1, #94 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x90] ldr x0, [fp, #0x90] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x90] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x90] mov x1, #95 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x88] ldr x0, [fp, #0x88] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x88] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x88] mov x1, #96 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x80] ldr x0, [fp, #0x80] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x80] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x80] mov x1, #97 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x78] ldr x0, [fp, #0x78] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x78] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x78] mov x1, #98 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x70] ldr x0, [fp, #0x70] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x70] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x70] mov x1, #99 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x68] ldr x0, [fp, #0x68] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x68] G_M000_IG17: mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x68] mov x1, #100 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x60] ldr x0, [fp, #0x60] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x60] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x60] mov x1, #101 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x58] ldr x0, [fp, #0x58] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x58] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x58] mov x1, #102 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x50] ldr x0, [fp, #0x50] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x50] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x50] mov x1, #103 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x48] ldr x0, [fp, #0x48] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x48] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x48] mov x1, #104 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x40] ldr x0, [fp, #0x40] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x40] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x40] mov x1, #105 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x38] ldr x0, [fp, #0x38] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x38] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x38] mov x1, #106 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x30] ldr x0, [fp, #0x30] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x30] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x30] mov x1, #107 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x28] ldr x0, [fp, #0x28] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x28] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x28] mov x1, #108 bl CORINFO_HELP_ARRADDR_ST G_M000_IG18: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x20] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x20] mov x1, #109 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x18] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x18] mov x1, #110 bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x10] ldr x0, [fp, #0x10] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x10] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0x10] mov x1, #111 bl CORINFO_HELP_ARRADDR_ST ldr x15, [fp, #0xD1FFAB1E] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #128 bl CORINFO_HELP_NEWARR_1_OBJ movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #26 bl CORINFO_HELP_NEWARR_1_OBJ movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG19: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 12096 918: JIT compiled System.Text.RegularExpressions.RegexCharClass:.cctor() [Tier0, IL size=3563, code size=12096] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:.ctor(ushort[],System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str w3, [fp, #0x14] G_M000_IG02: ldr x14, [fp, #0x28] strb wzr, [x14, #0x1C] ldr x14, [fp, #0x28] str xzr, [x14, #0x20] ldr x14, [fp, #0x28] str xzr, [x14, #0x10] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr w1, [fp, #0x14] str w1, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 919: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:.ctor(ushort[],System.String,int) [Tier0, IL size=48, code size=96] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Add(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x13, [fp, #0x58] ldr w13, [x13, #0x14] add w13, w13, #1 ldr x14, [fp, #0x58] str w13, [x14, #0x14] ldr x13, [fp, #0x58] ldr x13, [x13, #0x08] str x13, [fp, #0x48] ldr x13, [fp, #0x58] ldr w13, [x13, #0x10] str w13, [fp, #0x44] ldr w13, [fp, #0x44] ldr x14, [fp, #0x48] ldr w14, [x14, #0x08] cmp w13, w14 bhs G_M000_IG04 ldr w13, [fp, #0x44] add w13, w13, #1 ldr x14, [fp, #0x58] str w13, [x14, #0x10] ldr x13, [fp, #0x48] ldr w14, [fp, #0x44] ldr w12, [x13, #0x08] cmp w14, w12 bhs G_M000_IG08 mov w12, #40 madd x14, x14, x12, x13 add x14, x14, #16 ldr x13, [fp, #0x50] bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] str x0, [fp, #0x10] ldr x0, [fp, #0x50] G_M000_IG05: sub x1, x0, #24 ldr x2, [x1, #0x18] str x2, [fp, #0x18] ldp q16, q17, [x1, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x10] add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 252 920: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Add(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier0, IL size=60, code size=252] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:AddWithResize(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] str w1, [fp, #0x1C] ldr w1, [fp, #0x1C] add w1, w1, #1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w13, [fp, #0x1C] add w13, w13, #1 ldr x14, [fp, #0x28] str w13, [x14, #0x10] ldr x13, [fp, #0x28] ldr x13, [x13, #0x08] ldr w14, [fp, #0x1C] ldr w12, [x13, #0x08] cmp w14, w12 bhs G_M000_IG04 mov w12, #40 madd x14, x14, x12, x13 add x14, x14, #16 ldr x13, [fp, #0x20] bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 152 921: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:AddWithResize(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier0, IL size=39, code size=152] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cbz w0, G_M000_IG03 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 str w0, [fp, #0x1C] b G_M000_IG04 G_M000_IG03: mov w0, #4 str w0, [fp, #0x1C] G_M000_IG04: ldr w0, [fp, #0x1C] str w0, [fp, #0x20] ldr w0, [fp, #0x20] movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bls G_M000_IG05 movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0x20] G_M000_IG05: ldr w0, [fp, #0x20] ldr w1, [fp, #0x24] cmp w0, w1 bge G_M000_IG06 ldr w0, [fp, #0x24] str w0, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x28] ldr w1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 164 922: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Grow(int) [Tier0, IL size=53, code size=164] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:set_Capacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr w0, [fp, #0x24] ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] cmp w0, w1 bge G_M000_IG03 mov w0, #7 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr w1, [fp, #0x24] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cmp w1, w0 beq G_M000_IG07 ldr w1, [fp, #0x24] cmp w1, #0 ble G_M000_IG06 ldr w1, [fp, #0x24] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x2, [fp, #0x28] ldr w2, [x2, #0x10] ldr x1, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x28] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 248 923: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:set_Capacity(int) [Tier0, IL size=86, code size=248] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_N():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 924: JIT compiled System.Text.RegularExpressions.RegexNode:get_N() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:GetEnumerator():System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x58] str x8, [fp, #0x50] G_M000_IG02: add x0, fp, #24 ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x50] add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 112 925: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:GetEnumerator() [Tier0, IL size=7, code size=112] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x18] str wzr, [x0, #0x08] ldr x0, [fp, #0x10] ldr w0, [x0, #0x14] ldr x1, [fp, #0x18] str w0, [x1, #0x0C] ldr x0, [fp, #0x18] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] str xzr, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 926: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=39, code size=76] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x13, [fp, #0x18] ldr x13, [x13] str x13, [fp, #0x10] ldr x13, [fp, #0x18] ldr w13, [x13, #0x0C] ldr x14, [fp, #0x10] ldr w14, [x14, #0x14] cmp w13, w14 bne G_M000_IG04 ldr x13, [fp, #0x18] ldr w13, [x13, #0x08] ldr x14, [fp, #0x10] ldr w14, [x14, #0x10] cmp w13, w14 bhs G_M000_IG04 ldr x13, [fp, #0x10] ldr x13, [x13, #0x08] ldr x14, [fp, #0x18] ldr w14, [x14, #0x08] ldr w12, [x13, #0x08] cmp w14, w12 bhs G_M000_IG06 mov w12, #40 madd x13, x14, x12, x13 add x13, x13, #16 ldr x14, [fp, #0x18] add x14, x14, #16 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 216 927: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNext() [Tier0, IL size=81, code size=216] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Current():System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x13, [fp, #0x18] add x13, x13, #16 ldr x14, [fp, #0x10] bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 928: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Current() [Tier0, IL size=7, code size=56] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:Parse(System.String):System.Text.RegularExpressions.RegexCharClass ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 929: JIT compiled System.Text.RegularExpressions.RegexCharClass:Parse(System.String) [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParseRecursive(System.String,int):System.Text.RegularExpressions.RegexCharClass ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x78] str w1, [fp, #0x74] G_M000_IG02: ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] add w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x70] ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] add w1, w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x6C] ldr w0, [fp, #0x74] ldr w1, [fp, #0x70] add w0, w0, w1 ldr w1, [fp, #0x6C] add w0, w0, w1 add w0, w0, #3 str w0, [fp, #0x68] ldr w0, [fp, #0x74] add w0, w0, #3 str w0, [fp, #0x64] ldr w0, [fp, #0x64] ldr w1, [fp, #0x70] add w0, w0, w1 str w0, [fp, #0x60] ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] str x1, [fp, #0x40] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] str xzr, [fp, #0x50] ldr x0, [fp, #0x78] ldr w0, [x0, #0x08] ldr w1, [fp, #0x68] cmp w0, w1 ble G_M000_IG03 ldr x0, [fp, #0x78] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] G_M000_IG03: str xzr, [fp, #0x48] ldr w0, [fp, #0x6C] cmp w0, #0 ble G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x78] ldr w1, [fp, #0x60] ldr w2, [fp, #0x6C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x1, [fp, #0x18] ldr x2, [fp, #0x20] ldr x0, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x48] G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x30] ldr x2, [fp, #0x58] ldr x3, [fp, #0x48] ldr x4, [fp, #0x50] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x30] G_M000_IG05: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 544 930: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParseRecursive(System.String,int) [Tier0, IL size=119, code size=544] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ComputeRanges(System.ReadOnlySpan`1[ushort]):System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x28] str x0, [fp, #0x50] str x1, [fp, #0x58] G_M000_IG02: ldr w0, [fp, #0x58] cmp w0, #1 bls G_M000_IG11 ldr x0, [fp, #0x50] ldrh w0, [x0, #0x02] str w0, [fp, #0x4C] mov w0, #3 str w0, [fp, #0x48] ldr w0, [fp, #0x48] ldr w1, [fp, #0x4C] add w0, w0, w1 str w0, [fp, #0x44] str xzr, [fp, #0x38] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr w0, [fp, #0x4C] cmp w0, #0 ble G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] str x0, [fp, #0x38] b G_M000_IG06 G_M000_IG03: ldr w0, [fp, #0x48] ldr w1, [fp, #0x58] cmp w0, w1 bhs G_M000_IG11 ldr x0, [fp, #0x50] ldr w1, [fp, #0x48] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0x34] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] ldr w1, [fp, #0x44] cmp w0, w1 blt G_M000_IG04 mov w0, #0xD1FFAB1E str w0, [fp, #0x24] b G_M000_IG05 G_M000_IG04: ldr w0, [fp, #0x48] ldr w1, [fp, #0x58] cmp w0, w1 bhs G_M000_IG11 ldr x0, [fp, #0x50] ldr w1, [fp, #0x48] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] sub w0, w0, #1 uxth w0, w0 str w0, [fp, #0x24] G_M000_IG05: ldr w0, [fp, #0x24] uxth w0, w0 str w0, [fp, #0x30] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] str wzr, [fp, #0x18] add x0, fp, #24 ldr w1, [fp, #0x34] ldr w2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #16 mov w1, #90 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x48] ldr w1, [fp, #0x44] cmp w0, w1 blt G_M000_IG03 G_M000_IG09: ldr x0, [fp, #0x38] G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 448 931: JIT compiled System.Text.RegularExpressions.RegexCharClass:ComputeRanges(System.ReadOnlySpan`1[ushort]) [Tier0, IL size=96, code size=448] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 72 932: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String,int) [Tier0, IL size=11, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:.ctor(bool,System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]],System.Text.StringBuilder,System.Text.RegularExpressions.RegexCharClass):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str w1, [fp, #0x34] str x2, [fp, #0x28] str x3, [fp, #0x20] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] ldr w15, [fp, #0x34] strb w15, [x14, #0x24] ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 933: JIT compiled System.Text.RegularExpressions.RegexCharClass:.ctor(bool,System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]],System.Text.StringBuilder,System.Text.RegularExpressions.RegexCharClass) [Tier0, IL size=36, code size=120] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNextRare():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x0C] ldr x1, [fp, #0x18] ldr x1, [x1] ldr w1, [x1, #0x14] cmp w0, w1 beq G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0] ldr w0, [x0, #0x10] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] str xzr, [x0, #0x30] mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 934: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNextRare() [Tier0, IL size=57, code size=112] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 935: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryAddCharClass(System.Text.RegularExpressions.RegexCharClass):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 128 936: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryAddCharClass(System.Text.RegularExpressions.RegexCharClass) [Tier0, IL size=27, code size=128] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:get_CanMerge():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x24] cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] cmp x0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 937: JIT compiled System.Text.RegularExpressions.RegexCharClass:get_CanMerge() [Tier0, IL size=20, code size=60] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:AddCharClass(System.Text.RegularExpressions.RegexCharClass):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG03 str wzr, [fp, #0x24] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] G_M000_IG04: ldr w0, [fp, #0x24] str w0, [fp, #0x3C] ldr w0, [fp, #0x3C] cbz w0, G_M000_IG05 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG05: ldr x0, [fp, #0x40] ldr x0, [x0, #0x10] cbz x0, G_M000_IG06 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x40] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 260 938: JIT compiled System.Text.RegularExpressions.RegexCharClass:AddCharClass(System.Text.RegularExpressions.RegexCharClass) [Tier0, IL size=66, code size=260] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:EnsureRangeList():System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, #6 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] str x14, [fp, #0x30] ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] str x0, [fp, #0x20] G_M000_IG03: ldr x0, [fp, #0x20] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 148 939: JIT compiled System.Text.RegularExpressions.RegexCharClass:EnsureRangeList() [Tier0, IL size=26, code size=148] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ToStringClass():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #96 stp fp, lr, [sp, #0x50] add fp, sp, #80 sub x9, fp, #72 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #-0x50] str x0, [fp, #-0x08] G_M000_IG02: stp xzr, xzr, [fp, #-0x48] sub x0, fp, #72 ldp x1, xzr, [sp], #0xD1FFAB1E mov x1, sp mov w2, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp x0, x1, [fp, #-0x48] stp x0, x1, [fp, #-0x38] G_M000_IG04: ldr x1, [fp, #-0x38] ldr x2, [fp, #-0x30] sub x0, fp, #40 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub x1, fp, #40 ldr x0, [fp, #-0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x50] cmp xip0, xip1 beq G_M000_IG05 bl CORINFO_HELP_FAIL_FAST G_M000_IG05: sub sp, fp, #80 ldp fp, lr, [sp, #0x50] add sp, sp, #96 ret lr ; Total bytes of code 224 940: JIT compiled System.Text.RegularExpressions.RegexCharClass:ToStringClass() [Tier0, IL size=49, code size=224] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ToStringClass(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 mov x9, fp mov x10, #168 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] str x0, [fp, #0x98] ldr x0, [fp, #0x98] str x0, [fp, #0x90] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x98] cbnz x0, G_M000_IG03 str wzr, [fp, #0x8C] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x8C] G_M000_IG04: ldr w0, [fp, #0x8C] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] str x1, [fp, #0x80] G_M000_IG05: ldp x0, x1, [fp, #0x78] stp x0, x1, [fp, #0xF8] G_M000_IG06: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bls G_M000_IG25 ldr x0, [fp, #0xF8] str x0, [fp, #0x70] ldr x0, [fp, #0x70] str x0, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x24] cbnz w0, G_M000_IG07 ldr x0, [fp, #0x68] str x0, [fp, #0x60] str wzr, [fp, #0x5C] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x68] str x0, [fp, #0x60] mov w0, #1 str w0, [fp, #0x5C] G_M000_IG08: ldr x0, [fp, #0x60] ldr w1, [fp, #0x5C] strh w1, [x0] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #1 bls G_M000_IG25 ldr x0, [fp, #0xF8] strh wzr, [x0, #0x02] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #2 bls G_M000_IG25 ldr x0, [fp, #0xF8] ldr w1, [fp, #0xD1FFAB1E] strh w1, [x0, #0x04] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xF0] ldr x0, [fp, #0xF0] cbz x0, G_M000_IG14 str wzr, [fp, #0xEC] b G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0xF0] ldr w1, [fp, #0xEC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] ldrh w1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0xE2] mov w0, #0xD1FFAB1E cmp w1, w0 beq G_M000_IG10 ldrh w1, [fp, #0xE2] add w1, w1, #1 uxth w1, w1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG10: ldr w1, [fp, #0xEC] add w1, w1, #1 str w1, [fp, #0xEC] G_M000_IG11: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #24 mov w1, #157 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr x0, [fp, #0xF0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xEC] cmp w0, w1 bgt G_M000_IG09 G_M000_IG14: ldr w1, [fp, #0xD1FFAB1E] add w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w8, [fp, #0xD1FFAB1E] sub w0, w0, w8 sub w0, w0, #3 ldr x8, [fp, #0x50] strh w0, [x8] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG21 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] add x8, fp, #176 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x0, fp, #176 add x8, fp, #200 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG18 G_M000_IG15: add x0, fp, #200 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] str x1, [fp, #0x38] G_M000_IG16: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0xA0] G_M000_IG17: add x0, fp, #160 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG18: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG20 G_M000_IG19: add x0, fp, #24 mov w1, #237 bl CORINFO_HELP_PATCHPOINT G_M000_IG20: add x0, fp, #200 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG15 G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x18] str x0, [fp, #0x48] ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG23 G_M000_IG22: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG23: ldr x0, [fp, #0x40] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG24: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG25: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 992 941: JIT compiled System.Text.RegularExpressions.RegexCharClass:ToStringClass(byref) [Tier0, IL size=264, code size=992] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:Canonicalize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 8 inlinees with PGO data; 38 single block inlinees; 40 inlinees without PGO data G_M000_IG01: sub sp, sp, #128 stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] stp fp, lr, [sp, #0x70] add fp, sp, #112 str xzr, [fp, #-0x60] str xzr, [fp, #-0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #-0x68] mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x08] cbz x20, G_M000_IG45 G_M000_IG03: ldr w0, [x20, #0x10] cmp w0, #1 ble G_M000_IG15 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] tbz w0, #0, G_M000_IG47 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x1, [x0] cbnz x1, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x1, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] cbz x15, G_M000_IG48 add x14, x1, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x1, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w2, wzr mov w1, wzr mov w0, #1 G_M000_IG06: ldr w3, [x20, #0x10] cmp w1, w3 bhs G_M000_IG56 ldr x4, [x20, #0x08] mov x5, x4 ldr w6, [x5, #0x08] cmp w1, w6 bhs G_M000_IG57 ubfiz x7, x1, #2, #32 add x7, x7, #16 add x5, x5, x7 ldrh w7, [x5, #0x02] G_M000_IG07: mov w8, #0xD1FFAB1E cmp w0, w3 ccmp w7, w8, z, ne beq G_M000_IG10 cmp w0, w3 bhs G_M000_IG56 mov x8, x4 cmp w0, w6 bhs G_M000_IG57 ubfiz x9, x0, #2, #32 add x9, x9, #16 add x8, x8, x9 ldrh w9, [x8] ldrh w8, [x8, #0x02] add w10, w7, #1 cmp w9, w10 bgt G_M000_IG11 uxth w8, w8 cmp w7, w8 bge G_M000_IG09 G_M000_IG08: sxtw w7, w8 G_M000_IG09: add w0, w0, #1 b G_M000_IG07 G_M000_IG10: mov w2, #1 G_M000_IG11: ldrh w8, [x5] strh w8, [x5] strh w7, [x5, #0x02] ldr w5, [x20, #0x14] add w5, w5, #1 str w5, [x20, #0x14] add w1, w1, #1 cbnz w2, G_M000_IG14 cmp w1, w0 bge G_M000_IG13 G_M000_IG12: cmp w0, w3 bhs G_M000_IG56 mov x7, x4 cmp w0, w6 bhs G_M000_IG57 ubfiz x8, x0, #2, #32 add x8, x8, #16 add x7, x7, x8 ldrh w8, [x7] ldrh w7, [x7, #0x02] cmp w1, w3 bhs G_M000_IG56 cmp w1, w6 bhs G_M000_IG57 ubfiz x3, x1, #2, #32 add x3, x3, #16 add x3, x4, x3 strh w8, [x3] strh w7, [x3, #0x02] add w3, w5, #1 str w3, [x20, #0x14] G_M000_IG13: add w0, w0, #1 b G_M000_IG06 G_M000_IG14: sub w2, w3, w1 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldrb w4, [x19, #0x24] cbnz w4, G_M000_IG20 ldr x4, [x19, #0x18] cbnz x4, G_M000_IG20 ldr x4, [x19, #0x10] cbz x4, G_M000_IG16 ldp w4, w0, [x4, #0x18] add w4, w0, w4 cbnz w4, G_M000_IG20 G_M000_IG16: ldr w21, [x20, #0x10] cmp w21, #2 bne G_M000_IG17 cbz w21, G_M000_IG56 ldr x2, [x20, #0x08] mov x4, x2 ldr w0, [x4, #0x08] cmp w0, #0 bls G_M000_IG57 add x22, x4, #16 ldrh w4, [x22] cbnz w4, G_M000_IG20 cmp w21, #1 bls G_M000_IG56 mov x4, x2 ldr w0, [x4, #0x08] cmp w0, #1 bls G_M000_IG57 add x4, x4, #20 ldrh w0, [x4, #0x02] mov w1, #0xD1FFAB1E cmp w0, w1 bne G_M000_IG20 ldrh w0, [x22, #0x02] ldrh w4, [x4] uxth w0, w0 sub w4, w4, #1 cmp w0, w4 bge G_M000_IG20 add w0, w0, #1 strh w0, [x22] strh w4, [x22, #0x02] ldr w4, [x20, #0x14] add w4, w4, #1 str w4, [x20, #0x14] sub w4, w21, #1 str w4, [x20, #0x10] cmp w4, #1 ble G_M000_IG19 sub w4, w4, #1 mov x0, x2 mov w1, #2 mov w3, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG19 align [0 bytes for IG22] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG17: cmp w21, #1 bne G_M000_IG20 ldr x2, [x20, #0x08] ldr w0, [x2, #0x08] cmp w0, #0 bls G_M000_IG57 add x22, x2, #16 ldrh w0, [x22] cbnz w0, G_M000_IG18 ldrh w0, [x22, #0x02] mov w1, #0xD1FFAB1E cmp w0, w1 bne G_M000_IG20 mov x0, x22 mov w1, #0xD1FFAB1E strh w1, [x0] strh w1, [x0, #0x02] b G_M000_IG19 G_M000_IG18: ldrh w0, [x22] cmp w0, #1 bne G_M000_IG20 ldrh w0, [x22, #0x02] mov w1, #0xD1FFAB1E cmp w0, w1 bne G_M000_IG20 mov x0, x22 strh wzr, [x0] strh wzr, [x0, #0x02] G_M000_IG19: ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] mov w0, #1 strb w0, [x19, #0x24] G_M000_IG20: ldrb w0, [x19, #0x24] cbnz w0, G_M000_IG21 ldr x0, [x19, #0x18] cbnz x0, G_M000_IG21 ldr x0, [x19, #0x10] mov x1, x0 cbz x1, G_M000_IG21 ldp w1, w2, [x1, #0x18] add w1, w2, w1 cmp w1, #0 ble G_M000_IG21 ldr w1, [x20, #0x10] cmp w1, #1 bne G_M000_IG21 cbz w1, G_M000_IG56 ldr x1, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG57 add x1, x1, #16 ldrh w2, [x1] cbnz w2, G_M000_IG21 ldrh w1, [x1, #0x02] mov w2, #0xD1FFAB1E cmp w1, w2 bne G_M000_IG21 ldrsb wzr, [x0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: ldrb w0, [x19, #0x24] cbnz w0, G_M000_IG45 ldr x0, [x19, #0x18] cbnz x0, G_M000_IG45 ldr x21, [x19, #0x10] mov x0, x21 cbz x0, G_M000_IG45 ldp w0, w1, [x0, #0x18] add w0, w1, w0 cmp w0, #0 ble G_M000_IG45 ldr w0, [x20, #0x10] cmp w0, #2 bne G_M000_IG45 cbz w0, G_M000_IG56 ldr x1, [x20, #0x08] mov x2, x1 ldr w3, [x2, #0x08] cmp w3, #0 bls G_M000_IG57 add x2, x2, #16 ldrh w3, [x2] cbnz w3, G_M000_IG45 ldrh w2, [x2, #0x02] cmp w0, #1 bls G_M000_IG56 ldr w0, [x1, #0x08] cmp w0, #1 bls G_M000_IG57 add x0, x1, #20 ldrh w1, [x0] uxth w2, w2 add w2, w2, #2 cmp w2, w1 bne G_M000_IG45 ldrh w0, [x0, #0x02] mov w1, #0xD1FFAB1E cmp w0, w1 bne G_M000_IG45 ldp x0, xzr, [sp], #0xD1FFAB1E mov x0, sp str xzr, [fp, #-0x60] str x0, [fp, #-0x50] mov w0, #0xD1FFAB1E str w0, [fp, #-0x48] str wzr, [fp, #-0x58] ldrsb wzr, [x21] mov x22, xzr mov x0, x21 mov w23, wzr G_M000_IG22: add w23, w23, #1 ldr x0, [x0, #0x10] cbnz x0, G_M000_IG22 G_M000_IG23: cmp w23, #8 ble G_M000_IG24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x1, x21 mov w2, w23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG24: mov x23, xzr b G_M000_IG38 G_M000_IG25: cbz x23, G_M000_IG53 ldr x0, [x23, #0x08] ldr w24, [x23, #0x18] cbnz x0, G_M000_IG26 cbnz w24, G_M000_IG55 mov x2, xzr mov w24, wzr b G_M000_IG27 G_M000_IG26: ldr w2, [x0, #0x08] cmp w2, w24 blo G_M000_IG55 mov x2, x0 G_M000_IG27: mov x25, xzr mov w26, wzr cbz x2, G_M000_IG36 G_M000_IG28: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG31 G_M000_IG29: add x25, x2, #12 G_M000_IG30: ldr w26, [x2, #0x08] b G_M000_IG35 G_M000_IG31: ldr x0, [x2] ldr w0, [x0] tst w0, #0xD1FFAB1E beq G_M000_IG49 add x25, x2, #16 b G_M000_IG30 G_M000_IG32: mov x0, x21 ldr x1, [x21, #0x10] cmp x1, x23 beq G_M000_IG34 align [0 bytes for IG33] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG33: ldr x0, [x0, #0x10] ldr x1, [x0, #0x10] cmp x1, x23 bne G_M000_IG33 G_M000_IG34: mov x23, x0 b G_M000_IG25 G_M000_IG35: cmp w24, w26 bhi G_M000_IG55 sxtw w26, w24 G_M000_IG36: ldr w0, [fp, #-0x58] ldr w1, [fp, #-0x48] sub w1, w1, w26 cmp w0, w1 ble G_M000_IG37 sub x0, fp, #96 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG37: ldr w2, [fp, #-0x58] ldr w0, [fp, #-0x48] cmp w2, w0 bhi G_M000_IG55 ldr x1, [fp, #-0x50] ubfiz x3, x2, #1, #32 add x1, x1, x3 sub w2, w0, w2 mov x0, x1 cmp w26, w2 bhi G_M000_IG54 mov w2, w26 lsl x2, x2, #1 mov x1, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #-0x58] add w0, w0, w26 str w0, [fp, #-0x58] G_M000_IG38: cmp x23, x21 beq G_M000_IG40 G_M000_IG39: cbnz x22, G_M000_IG50 b G_M000_IG32 G_M000_IG40: ldr w1, [x20, #0x10] cbz w1, G_M000_IG56 ldr x1, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG57 add x1, x1, #16 ldrh w0, [x1, #0x02] ldr w2, [fp, #-0x58] ldr w1, [fp, #-0x48] cmp w2, w1 bhi G_M000_IG55 ldr x1, [fp, #-0x50] add w0, w0, #1 uxth w0, w0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG42 ldr w21, [x20, #0x10] cmp w21, #1 bls G_M000_IG56 sub w23, w21, #1 str w23, [x20, #0x10] cmp w23, #1 ble G_M000_IG41 sub w4, w23, #1 ldr x2, [x20, #0x08] mov x0, x2 mov w1, #2 mov w3, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG41: ldr w4, [x20, #0x14] add w4, w4, #1 str w4, [x20, #0x14] ldr w4, [x20, #0x10] cbz w4, G_M000_IG56 ldr x4, [x20, #0x08] ldr w0, [x4, #0x08] cmp w0, #0 bls G_M000_IG57 add x4, x4, #16 strh wzr, [x4] mov w0, #0xD1FFAB1E strh w0, [x4, #0x02] b G_M000_IG44 G_M000_IG42: mov w4, #1 strb w4, [x19, #0x24] ldr w21, [x20, #0x10] cmp w21, #1 bls G_M000_IG56 sub w23, w21, #1 str w23, [x20, #0x10] cmp w23, #1 ble G_M000_IG43 sub w4, w23, #1 ldr x2, [x20, #0x08] mov x0, x2 mov w1, #2 mov w3, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG43: ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] ldr w0, [x20, #0x10] cbz w0, G_M000_IG56 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG57 add x0, x0, #16 ldrh w1, [x0, #0x02] add w1, w1, #1 uxth w1, w1 strh w1, [x0] strh w1, [x0, #0x02] G_M000_IG44: ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] ldr x0, [x19, #0x10] ldrsb wzr, [x0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #-0x60] stp xzr, xzr, [fp, #-0x60] stp xzr, xzr, [fp, #-0x50] cbz x1, G_M000_IG45 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG45: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x68] cmp xip0, xip1 beq G_M000_IG46 bl CORINFO_HELP_FAIL_FAST G_M000_IG46: sub sp, fp, #112 ldp fp, lr, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] add sp, sp, #128 ret lr G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #54 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG04 G_M000_IG48: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG49: mov x0, x2 ldr x1, [x2] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 mov x25, x0 mov w26, w1 b G_M000_IG35 G_M000_IG50: mov x0, x22 ldr w1, [x0, #0x10] add w1, w1, #1 str w1, [x0, #0x10] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cmp w0, w1 bgt G_M000_IG51 mov w0, wzr b G_M000_IG52 G_M000_IG51: ldr x0, [x22, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG57 add x0, x0, #16 ldr x23, [x0, w1, UXTW #3] mov w0, #1 G_M000_IG52: cbnz w0, G_M000_IG25 b G_M000_IG40 G_M000_IG53: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG54: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG56: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG57: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 2400 942: JIT compiled System.Text.RegularExpressions.RegexCharClass:Canonicalize() [Tier-0 switched to FullOpts, IL size=974, code size=2400] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 943: JIT compiled System.Text.RegularExpressions.RegexCharClass+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 944: JIT compiled System.Text.RegularExpressions.RegexCharClass+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass+<>c:b__140_0(System.ValueTuple`2[ushort,ushort],System.ValueTuple`2[ushort,ushort]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: add x0, fp, #32 ldrh w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 56 945: JIT compiled System.Text.RegularExpressions.RegexCharClass+<>c:b__140_0(System.ValueTuple`2[ushort,ushort],System.ValueTuple`2[ushort,ushort]) [Tier0, IL size=19, code size=56] ; Assembly listing for method System.Text.ValueStringBuilder:AppendSpan(int):System.Span`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] str w0, [fp, #0x20] ldr x0, [fp, #0x28] add x0, x0, #16 ldr w0, [x0, #0x08] ldr w1, [fp, #0x24] sub w0, w0, w1 ldr w1, [fp, #0x20] cmp w0, w1 bge G_M000_IG03 ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr w0, [fp, #0x20] ldr w1, [fp, #0x24] add w0, w0, w1 ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] ldrsb wzr, [x0] ldr x0, [fp, #0x28] add x0, x0, #16 ldr w1, [fp, #0x20] ldr w2, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] str x1, [fp, #0x18] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 180 946: JIT compiled System.Text.ValueStringBuilder:AppendSpan(int) [Tier0, IL size=53, code size=180] ; Assembly listing for method System.Text.ValueStringBuilder:get_Item(int):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldrsb wzr, [x0] ldr x0, [fp, #0x28] add x0, x0, #16 str x0, [fp, #0x18] ldr w0, [fp, #0x24] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0] ldr w1, [fp, #0x24] mov w1, w1 lsl x1, x1, #1 add x0, x0, x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 100 947: JIT compiled System.Text.ValueStringBuilder:get_Item(int) [Tier0, IL size=13, code size=100] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Key():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 948: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Key() [Tier0, IL size=7, code size=32] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:GetSetChars(System.String,System.Span`1[ushort]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x1, [fp, #0x38] str x2, [fp, #0x40] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG16 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x34] str wzr, [fp, #0x30] mov w0, #3 str w0, [fp, #0x2C] b G_M000_IG12 G_M000_IG05: ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] add w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG16 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x28] ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG16 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x24] b G_M000_IG09 G_M000_IG06: ldr w0, [fp, #0x30] ldr w1, [fp, #0x40] cmp w0, w1 blt G_M000_IG08 mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr w0, [fp, #0x30] str w0, [fp, #0x20] ldr w0, [fp, #0x30] add w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x20] ldr w1, [fp, #0x40] cmp w0, w1 bhs G_M000_IG16 ldr x0, [fp, #0x38] ldr w1, [fp, #0x20] mov w1, w1 lsl x1, x1, #1 ldr w2, [fp, #0x24] strh w2, [x0, x1] ldr w0, [fp, #0x24] add w0, w0, #1 str w0, [fp, #0x24] G_M000_IG09: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #24 mov w1, #79 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w0, [fp, #0x24] ldr w1, [fp, #0x28] cmp w0, w1 blt G_M000_IG06 ldr w0, [fp, #0x2C] add w0, w0, #2 str w0, [fp, #0x2C] G_M000_IG12: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG14 G_M000_IG13: add x0, fp, #24 mov w1, #88 bl CORINFO_HELP_PATCHPOINT G_M000_IG14: ldr w0, [fp, #0x2C] ldr w1, [fp, #0x34] add w1, w1, #3 cmp w0, w1 blt G_M000_IG05 ldr w0, [fp, #0x30] G_M000_IG15: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 440 949: JIT compiled System.Text.RegularExpressions.RegexCharClass:GetSetChars(System.String,System.Span`1[ushort]) [Tier0, IL size=96, code size=440] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 ldr w0, [fp, #0x10] uxtb w0, w0 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 950: JIT compiled System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String) [Tier0, IL size=17, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x10] strb w0, [x1] ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] cmp w0, #3 ble G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] and w0, w0, #1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 212 951: JIT compiled System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String,byref) [Tier0, IL size=51, code size=212] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSubtraction(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] ldr x1, [fp, #0x18] mov w2, #2 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG04 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] ldr x2, [fp, #0x18] mov w3, #1 ldr w4, [x2, #0x08] cmp w3, w4 bhs G_M000_IG04 add x2, x2, x3, LSL #1 add x2, x2, #12 ldrh w2, [x2] add w1, w1, w2 add w1, w1, #3 cmp w0, w1 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 116 952: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSubtraction(System.String) [Tier0, IL size=26, code size=116] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:FindFixedDistanceString(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]):System.Nullable`1[System.ValueTuple`2[System.String,int]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 13 single block inlinees; 11 inlinees without PGO data G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] stp x25, x26, [sp, #0xD1FFAB1E] stp fp, lr, [sp, #0xD1FFAB1E] add fp, sp, #0xD1FFAB1E movi v16.16b, #0 sub x9, fp, #0xD1FFAB1E sub x10, fp, #128 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E str x1, [fp, xip1] mov x19, x0 mov x20, x8 G_M000_IG02: stp xzr, xzr, [fp, #-0x58] str xzr, [fp, #-0x48] ldr w0, [x19, #0x10] cmp w0, #2 blt G_M000_IG34 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] tbz w0, #0, G_M000_IG38 G_M000_IG04: movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 ldr x1, [x21] cbnz x1, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x1, x0 ldr x15, [x21, #-0x08] cbz x15, G_M000_IG39 add x14, x1, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x1, #0x18] mov x14, x21 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr wzr, [sp], #-0x80 mov x21, sp str xzr, [fp, #-0x78] str x21, [fp, #-0x68] mov w0, #64 str w0, [fp, #-0x60] str wzr, [fp, #-0x70] movn w22, #0 mov w23, wzr ldr w0, [x19, #0x10] add w0, w0, #1 cmp w0, #0 ble G_M000_IG33 G_M000_IG06: ldr w0, [x19, #0x10] cmp w23, w0 blt G_M000_IG08 G_M000_IG07: mov x24, xzr b G_M000_IG11 G_M000_IG08: cmp w23, w0 bhs G_M000_IG37 ldr x1, [x19, #0x08] ldr w2, [x1, #0x08] cmp w23, w2 bhs G_M000_IG40 mov w2, #40 umull x2, w23, w2 add x2, x2, #16 add x1, x1, x2 G_M000_IG09: ldp q16, q17, [x1] stp q16, q17, [fp, #-0xA0] ldr x2, [x1, #0x20] str x2, [fp, #-0x80] G_M000_IG10: ldr x24, [fp, #-0x98] G_M000_IG11: cbz x24, G_M000_IG15 G_M000_IG12: ldr w1, [x24, #0x08] cmp w1, #1 bne G_M000_IG15 cmp w23, w0 bhs G_M000_IG37 ldr x1, [x19, #0x08] ldr w2, [x1, #0x08] cmp w23, w2 bhs G_M000_IG40 mov w2, #40 umull x2, w23, w2 add x2, x2, #16 add x1, x1, x2 G_M000_IG13: sub x2, fp, #0xD1FFAB1E ldp q16, q17, [x1] stp q16, q17, [x2] ldr x3, [x1, #0x20] str x3, [x2, #0x20] G_M000_IG14: movn xip1, #0xD1FFAB1E ldrb w1, [fp, xip1] b G_M000_IG16 G_M000_IG15: mov w1, #1 G_M000_IG16: uxtb w25, w1 cbnz w25, G_M000_IG22 G_M000_IG17: cmp w23, #0 ble G_M000_IG29 cmp w23, w0 bhs G_M000_IG37 ldr x1, [x19, #0x08] mov x2, x1 ldr w3, [x2, #0x08] cmp w23, w3 bhs G_M000_IG40 mov w3, #40 umull x3, w23, w3 add x3, x3, #16 add x2, x2, x3 G_M000_IG18: ldp q16, q17, [x2] stp q16, q17, [fp, #-0xF0] ldr x3, [x2, #0x20] str x3, [fp, #-0xD0] G_M000_IG19: sub w2, w23, #1 cmp w2, w0 bhs G_M000_IG37 mov x0, x1 ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG40 mov w1, #40 umull x1, w2, w1 add x1, x1, #16 add x0, x0, x1 G_M000_IG20: ldp x1, x2, [x0] stp x1, x2, [fp, #0xD1FFAB1E] ldp x1, x2, [x0, #0x10] stp x1, x2, [fp, #0xD1FFAB1E] ldr x1, [x0, #0x20] str x1, [fp, #-0xF8] G_M000_IG21: ldr w0, [fp, #-0xD8] ldr w1, [fp, #-0x100] add w1, w1, #1 cmp w0, w1 beq G_M000_IG29 G_M000_IG22: cmn w22, #1 beq G_M000_IG28 sub w0, w23, w22 ldrb w1, [fp, #-0x58] cbz w1, G_M000_IG23 ldr x1, [fp, #-0x50] ldr w1, [x1, #0x08] b G_M000_IG24 G_M000_IG23: mov w1, #2 G_M000_IG24: cmp w0, w1 blt G_M000_IG28 ldr w0, [fp, #-0x70] ldr w1, [fp, #-0x60] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #-0x68] movn xip1, #0xD1FFAB1E str x1, [fp, xip1] movn xip1, #0xD1FFAB1E str w0, [fp, xip1] sub x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x26, x0 ldr x1, [fp, #-0x78] stp xzr, xzr, [fp, #-0x78] stp xzr, xzr, [fp, #-0x68] cbz x1, G_M000_IG25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG25: ldr w0, [x19, #0x10] cmp w22, w0 bhs G_M000_IG37 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG40 mov w1, #40 umull x1, w22, w1 add x1, x1, #16 add x0, x0, x1 G_M000_IG26: add x1, x0, #200 ldr x2, [x1, #-0xC8] str x2, [fp, #-0xC8] ldp q16, q17, [x1, #-0xC0] stp q16, q17, [fp, #-0xC0] G_M000_IG27: ldr w0, [fp, #-0xB0] str x26, [fp, #-0x50] str w0, [fp, #-0x48] mov w0, #1 strb w0, [fp, #-0x58] G_M000_IG28: str xzr, [fp, #-0x78] str x21, [fp, #-0x68] mov w0, #64 str w0, [fp, #-0x60] str wzr, [fp, #-0x70] movn w22, #0 cbnz w25, G_M000_IG32 G_M000_IG29: cmn w22, #1 bne G_M000_IG30 sxtw w22, w23 G_M000_IG30: ldr w0, [x24, #0x08] cmp w0, #0 bls G_M000_IG40 ldrh w1, [x24, #0x10] ldr w0, [fp, #-0x70] ldr x2, [fp, #-0x68] ldr w3, [fp, #-0x60] cmp w0, w3 bhs G_M000_IG31 strh w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0x70] b G_M000_IG32 G_M000_IG31: sub x0, fp, #120 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG32: add w23, w23, #1 ldr w0, [x19, #0x10] add w0, w0, #1 cmp w23, w0 blt G_M000_IG06 G_M000_IG33: ldr x1, [fp, #-0x78] stp xzr, xzr, [fp, #-0x78] stp xzr, xzr, [fp, #-0x68] cbz x1, G_M000_IG34 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG34: mov x14, x20 sub x13, fp, #88 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E ldr xip1, [fp, xip1] cmp xip0, xip1 beq G_M000_IG35 bl CORINFO_HELP_FAIL_FAST G_M000_IG35: sub sp, fp, #0xD1FFAB1E ldp fp, lr, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG37: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #58 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG04 G_M000_IG39: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG40: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1276 953: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:FindFixedDistanceString(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier-0 switched to FullOpts, IL size=331, code size=1276] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLiteralFollowingLeadingLoop(System.Text.RegularExpressions.RegexNode):System.Nullable`1[System.ValueTuple`2[System.Text.RegularExpressions.RegexNode,System.ValueTuple`3[ushort,System.String,ushort[]]]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 5 inlinees with PGO data; 36 single block inlinees; 10 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] stp x25, x26, [sp, #0xD1FFAB1E] str x27, [sp, #0xD1FFAB1E] mov fp, sp movi v16.16b, #0 sub x9, fp, #8 mov x10, #152 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0xD1FFAB1E] mov x19, x0 mov x20, x8 G_M000_IG02: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG10 G_M000_IG03: b G_M000_IG57 G_M000_IG04: ldr x22, [x19, #0x08] mov x19, x22 cbz x19, G_M000_IG06 G_M000_IG05: ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG10 G_M000_IG06: mov x1, x22 mov x2, x1 cbz x2, G_M000_IG09 G_M000_IG07: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG09 G_M000_IG08: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG09: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG62 ldr x19, [x0, #0x10] b G_M000_IG10 G_M000_IG10: ldrb w21, [x19, #0x2E] mov w0, #32 cmp w21, #28 ccmp w21, w0, z, ne beq G_M000_IG04 ldrb w0, [x19, #0x2E] cmp w0, #25 bne G_M000_IG57 G_M000_IG11: ldr x22, [x19, #0x08] mov x23, x22 cbz x23, G_M000_IG13 G_M000_IG12: ldr x0, [x23] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG17 G_M000_IG13: mov x1, x22 mov x2, x1 cbz x2, G_M000_IG16 G_M000_IG14: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG16 G_M000_IG15: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG16: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG62 ldr x24, [x0, #0x10] b G_M000_IG18 G_M000_IG17: mov x24, x23 G_M000_IG18: ldrb w21, [x24, #0x2E] mov w0, #45 cmp w21, #5 ccmp w21, #8, z, ne ccmp w21, w0, z, ne bne G_M000_IG57 ldr w0, [x24, #0x24] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bne G_M000_IG57 mov x21, x22 cbz x21, G_M000_IG20 G_M000_IG19: ldr x0, [x21] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG24 G_M000_IG20: mov x1, x22 mov x2, x1 cbz x2, G_M000_IG23 G_M000_IG21: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG23 G_M000_IG22: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG23: ldr w0, [x2, #0x10] cmp w0, #1 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #1 bls G_M000_IG62 ldr x22, [x0, #0x18] b G_M000_IG25 G_M000_IG24: mov x22, x21 G_M000_IG25: ldrb w0, [x22, #0x2E] cmp w0, #46 bne G_M000_IG31 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 beq G_M000_IG57 ldr x1, [x19, #0x08] mov x22, x1 cbz x22, G_M000_IG27 G_M000_IG26: ldr x0, [x22] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG31 G_M000_IG27: mov x2, x1 cbz x2, G_M000_IG30 G_M000_IG28: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG30 G_M000_IG29: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG30: ldr w0, [x2, #0x10] cmp w0, #2 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #2 bls G_M000_IG62 ldr x22, [x0, #0x20] b G_M000_IG31 G_M000_IG31: ldrb w0, [x22, #0x2E] sub w0, w0, #9 cmp w0, #3 bhi G_M000_IG57 mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG32: ldrh w0, [x22, #0x2C] ldr x19, [x24, #0x10] uxth w21, w0 ldr w23, [x19, #0x08] cmp w23, #1 bls G_M000_IG62 ldrh w3, [x19, #0x0E] cmp w23, #2 bls G_M000_IG62 ldrh w4, [x19, #0x10] add w0, w3, w4 add w25, w0, #3 mov w0, w21 mov x1, x19 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldrh w1, [x19, #0x0C] cmp w1, #1 bne G_M000_IG33 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG35 b G_M000_IG34 G_M000_IG33: cbz w0, G_M000_IG35 G_M000_IG34: cmp w23, w25 ble G_M000_IG35 mov w0, w21 mov x1, x19 mov w2, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG57 b G_M000_IG36 G_M000_IG35: cbnz w0, G_M000_IG57 G_M000_IG36: ldrh w14, [x22, #0x2C] stp xzr, xzr, [fp, #0x40] stp xzr, xzr, [fp, #0x50] str x24, [fp, #0x40] strh w14, [fp, #0x58] G_M000_IG37: ldp q16, q17, [fp, #0x40] stp q16, q17, [fp, #0x20] G_M000_IG38: mov w14, #1 strb w14, [fp, #0x18] mov x14, x20 add x13, fp, #24 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG58 G_M000_IG39: ldr x0, [x22, #0x10] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG62 ldrh w0, [x0, #0x0C] ldr x19, [x24, #0x10] uxth w21, w0 ldr w23, [x19, #0x08] cmp w23, #1 bls G_M000_IG62 ldrh w3, [x19, #0x0E] cmp w23, #2 bls G_M000_IG62 ldrh w4, [x19, #0x10] add w0, w3, w4 add w25, w0, #3 mov w0, w21 mov x1, x19 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cmp w23, #0 bls G_M000_IG62 ldrh w1, [x19, #0x0C] cmp w1, #1 bne G_M000_IG40 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG42 b G_M000_IG41 G_M000_IG40: cbz w0, G_M000_IG42 G_M000_IG41: cmp w23, w25 ble G_M000_IG42 mov w0, w21 mov x1, x19 mov w2, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG57 b G_M000_IG43 G_M000_IG42: cbnz w0, G_M000_IG57 G_M000_IG43: ldr x14, [x22, #0x10] stp xzr, xzr, [fp, #0xD0] stp xzr, xzr, [fp, #0xE0] str x24, [fp, #0xD0] str x14, [fp, #0xD8] G_M000_IG44: ldp q16, q17, [fp, #0xD0] stp q16, q17, [fp, #0xB0] G_M000_IG45: mov w14, #1 strb w14, [fp, #0xA8] mov x14, x20 add x13, fp, #168 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG58 G_M000_IG46: ldr x1, [x22, #0x10] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG62 ldrh w1, [x1, #0x0C] cmp w1, #1 beq G_M000_IG57 add x19, fp, #240 mov x1, x19 mov w2, #5 ldr x0, [x22, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w21, w0 cmp w21, #5 bhi G_M000_IG61 cbz w21, G_M000_IG57 mov w22, wzr cmp w21, #0 ble G_M000_IG54 G_M000_IG47: cmp w22, w21 bhs G_M000_IG62 ldrh w23, [x19, w22, UXTW #2] ldr x25, [x24, #0x10] ldr w26, [x25, #0x08] cmp w26, #1 bls G_M000_IG62 ldrh w3, [x25, #0x0E] cmp w26, #2 bls G_M000_IG62 ldrh w4, [x25, #0x10] add w0, w3, w4 add w27, w0, #3 mov w0, w23 mov x1, x25 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cmp w26, #0 bls G_M000_IG62 ldrh w1, [x25, #0x0C] cmp w1, #1 bne G_M000_IG49 G_M000_IG48: cmp w0, #0 cset x0, eq cbz w0, G_M000_IG52 b G_M000_IG50 G_M000_IG49: cbz w0, G_M000_IG52 G_M000_IG50: cmp w26, w27 ble G_M000_IG52 mov w0, w23 mov x1, x25 mov w2, w27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG53 G_M000_IG51: b G_M000_IG57 G_M000_IG52: cbnz w0, G_M000_IG57 G_M000_IG53: add w22, w22, #1 cmp w22, w21 blt G_M000_IG47 G_M000_IG54: sxtw x1, w21 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 add x0, x22, #16 mov w2, w21 lsl x2, x2, #1 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 stp xzr, xzr, [fp, #0x88] stp xzr, xzr, [fp, #0x98] str x24, [fp, #0x88] str x22, [fp, #0x98] G_M000_IG55: ldp x12, x13, [fp, #0x88] stp x12, x13, [fp, #0x68] ldp x12, x13, [fp, #0x98] stp x12, x13, [fp, #0x78] G_M000_IG56: mov w14, #1 strb w14, [fp, #0x60] mov x14, x20 add x13, fp, #96 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 b G_M000_IG58 G_M000_IG57: stp xzr, xzr, [x20] stp xzr, xzr, [x20, #0x10] str xzr, [x20, #0x20] G_M000_IG58: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG59 bl CORINFO_HELP_FAIL_FAST G_M000_IG59: ldr x27, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG60: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG61: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG62: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG32 - G_M000_IG02 dd G_M000_IG57 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 ; Total bytes of code 1848 954: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLiteralFollowingLeadingLoop(System.Text.RegularExpressions.RegexNode) [Tier-0 switched to FullOpts, IL size=490, code size=1848] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:SortFixedDistanceSetsByQuality(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #74 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x38] str x0, [fp, #0x28] ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #74 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #74 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] str x0, [fp, #0x20] G_M000_IG03: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 280 955: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:SortFixedDistanceSetsByQuality(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=38, code size=280] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 956: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 957: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG03 mov w0, #29 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] cmp w1, #1 ble G_M000_IG04 stp xzr, xzr, [fp, #0x10] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] ldr x3, [fp, #0x28] ldr w3, [x3, #0x10] add x0, fp, #16 mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 176 958: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=58, code size=176] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Item(int):System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x1C] str x8, [fp, #0x20] G_M000_IG02: ldr w0, [fp, #0x1C] ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] cmp w0, w1 blo G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x13, [fp, #0x28] ldr x13, [x13, #0x08] ldr w14, [fp, #0x1C] ldr w12, [x13, #0x08] cmp w14, w12 bhs G_M000_IG05 mov w12, #40 madd x13, x14, x12, x13 add x13, x13, #16 ldr x14, [fp, #0x20] bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 136 959: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Item(int) [Tier0, IL size=27, code size=136] ; Assembly listing for method System.Text.RegularExpressions.Regex:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr w3, [fp, #0x18] uxtb w3, w3 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 72 960: JIT compiled System.Text.RegularExpressions.Regex:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier0, IL size=10, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w4, [fp, #0x18] uxtb w4, w4 ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr w3, [fp, #0x1C] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 124 961: JIT compiled System.Text.RegularExpressions.RegexCompiler:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier0, IL size=15, code size=124] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 962: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 963: JIT compiled System.Text.RegularExpressions.RegexCompiler:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:FactoryInstanceFromCode(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #232 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] str w4, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG04 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG04: ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #16 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x30] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] strb w1, [x0, #0x34] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #106 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #106 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0] cbz w0, G_M000_IG14 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x80] str x1, [fp, #0x88] G_M000_IG05: ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x70] G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] cmp w0, #100 bgt G_M000_IG10 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] str x1, [fp, #0x38] G_M000_IG07: ldp x0, x1, [fp, #0x70] stp x0, x1, [fp, #0x50] G_M000_IG08: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0x40] G_M000_IG09: b G_M000_IG13 G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr mov w2, #100 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x60] str x1, [fp, #0x68] G_M000_IG11: ldp x0, x1, [fp, #0x70] stp x0, x1, [fp, #0x50] G_M000_IG12: ldp x0, x1, [fp, #0x60] stp x0, x1, [fp, #0x40] G_M000_IG13: ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] ldr x2, [fp, #0x40] ldr x3, [fp, #0x48] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0xD1FFAB1E] G_M000_IG14: add x0, fp, #216 mov w1, #41 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #106 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x28] ldr x4, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #216 mov w1, #31 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #106 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x18] ldr x4, [fp, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #216 mov w1, #10 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG15: movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD0] ldr x0, [fp, #0xD0] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD0] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xC8] ldr x4, [fp, #0xD0] ldr x3, [fp, #0xC0] mov x2, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x18] str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB0] ldr x0, [fp, #0xB8] str x0, [fp, #0xA8] ldr x0, [fp, #0xB8] cbnz x0, G_M000_IG16 ldr x0, [fp, #0xB0] str x0, [fp, #0xA0] str xzr, [fp, #0x98] b G_M000_IG17 G_M000_IG16: ldr x0, [fp, #0xB0] str x0, [fp, #0xA0] ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x98] G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3, #0x18] ldr x0, [fp, #0x90] ldr x1, [fp, #0xA0] ldr x2, [fp, #0x98] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x90] G_M000_IG18: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 1632 964: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:FactoryInstanceFromCode(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier0, IL size=445, code size=1632] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:SupportsCompilation(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x28] and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG04 ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] mov w1, #40 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG06 ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: ldr x0, [fp, #0x10] str xzr, [x0] mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 148 965: JIT compiled System.Text.RegularExpressions.RegexNode:SupportsCompilation(byref) [Tier0, IL size=47, code size=148] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ExceedsMaxDepthAllowedDepth|67_0(System.Text.RegularExpressions.RegexNode,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr w0, [fp, #0x34] cmp w0, #0 bgt G_M000_IG04 mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x30] str wzr, [fp, #0x2C] b G_M000_IG08 G_M000_IG05: ldr x0, [fp, #0x38] ldr w1, [fp, #0x2C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0x34] sub w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG07 mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: ldr w0, [fp, #0x2C] add w0, w0, #1 str w0, [fp, #0x2C] G_M000_IG08: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #32 mov w1, #40 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0x2C] ldr w1, [fp, #0x30] cmp w0, w1 blt G_M000_IG05 mov w0, wzr G_M000_IG11: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 252 966: JIT compiled System.Text.RegularExpressions.RegexNode:g__ExceedsMaxDepthAllowedDepth|67_0(System.Text.RegularExpressions.RegexNode,int) [Tier0, IL size=46, code size=252] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 strb w0, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x18] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 204 967: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:.cctor() [Tier0, IL size=63, code size=204] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:DefineDynamicMethod(System.String,System.Type,System.Type,System.Type[]):System.Reflection.Emit.DynamicMethod:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str x4, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x5, [fp, #0x28] ldr x6, [fp, #0x30] ldr x4, [fp, #0x38] mov w2, #22 mov w3, #1 mov w7, wzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr x0, [fp, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x14, [fp, #0x48] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 172 968: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:DefineDynamicMethod(System.String,System.Type,System.Type,System.Type[]) [Tier0, IL size=29, code size=172] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTryFindNextPossibleStartingPosition():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str xzr, [x9, #0x70] str x0, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0x98] str x0, [fp, #0x70] ldr x0, [fp, #0x98] ldr x0, [x0, #0x20] str x0, [fp, #0x58] ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x98] ldr x0, [x0, #0x28] str x0, [fp, #0x48] ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG05 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x80] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] ldr x0, [fp, #0x98] ldr w0, [x0, #0x30] and w0, w0, #64 cmp w0, #0 cset x0, ne strb w0, [fp, #0x8C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #91 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x98] ldr x2, [fp, #0x78] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x98] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x88] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x68] ldr x0, [fp, #0x98] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [fp, #0x8C] cbnz w0, G_M000_IG08 ldr x0, [fp, #0x98] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #91 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x88] cmp w0, #0 ble G_M000_IG07 ldr x0, [fp, #0x98] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x0, [fp, #0x98] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x98] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr x0, [fp, #0x98] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrb w0, [fp, #0x8C] cbnz w0, G_M000_IG10 ldr x0, [fp, #0x98] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #91 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x98] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #91 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x98] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG12 b G_M000_IG20 G_M000_IG12: ldr x0, [fp, #0x98] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x64] ldr w0, [fp, #0x64] sub w0, w0, #10 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #9 bhi G_M000_IG13 ldr w1, [fp, #0x1C] mov w1, w1 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG13: b G_M000_IG19 G_M000_IG14: add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG15: add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG16: add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG17: add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG18: add x1, fp, #112 ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG19: ldr x0, [fp, #0x98] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG20 G_M000_IG20: ldp fp, lr, [sp], #0xA0 ret lr RWD00 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 ; Total bytes of code 1436 969: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTryFindNextPossibleStartingPosition() [Tier0, IL size=490, code size=1436] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DeclareReadOnlySpanChar():System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 970: JIT compiled System.Text.RegularExpressions.RegexCompiler:DeclareReadOnlySpanChar() [Tier0, IL size=22, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DeclareInt32():System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 971: JIT compiled System.Text.RegularExpressions.RegexCompiler:DeclareInt32() [Tier0, IL size=22, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #36 ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3] ldr x3, [x3, #0x80] ldr x3, [x3, #0x20] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #36 ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3] ldr x3, [x3, #0x80] ldr x3, [x3, #0x20] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #36 ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3] ldr x3, [x3, #0x80] ldr x3, [x3, #0x20] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #40 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] movz x1, #40 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #40 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #96 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #136 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #184 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #232 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E G_M000_IG04: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ G_M000_IG05: str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG07: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG08: ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E G_M000_IG09: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] G_M000_IG10: blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 G_M000_IG11: bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E G_M000_IG12: movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] G_M000_IG13: mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] G_M000_IG14: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG15: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] G_M000_IG16: mov x1, #2 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] G_M000_IG17: ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E G_M000_IG18: movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xF8] ldr x2, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xF0] ldr x2, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 G_M000_IG19: bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xE8] ldr x2, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xE0] ldr x2, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD8] ldr x2, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD0] ldr x2, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC8] ldr x2, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] mov x1, #3 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC0] ldr x2, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xB8] ldr x2, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xB0] ldr x2, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0xA8] ldr x2, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 G_M000_IG20: bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xA0] ldr x2, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x98] ldr x2, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x90] ldr x2, [fp, #0x90] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x88] ldr x2, [fp, #0x88] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x80] ldr x2, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x78] ldr x2, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x2, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x2, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 G_M000_IG21: bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] ldr x2, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x58] ldr x2, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x2, [fp, #0x50] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG22: movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x2, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x38] ldr x2, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0xA8] ldr x2, [x2, #0x08] blr x2 str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #3 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #32 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] G_M000_IG23: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #32 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] mov x1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] ldr x1, [x1, #0xA0] ldr x1, [x1, #0x30] blr x1 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2, #0x38] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG24: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 16588 972: JIT compiled System.Text.RegularExpressions.RegexCompiler:.cctor() [Tier0, IL size=4847, code size=16588] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RegexRunnerField(System.String):System.Reflection.FieldInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x10] ldr x1, [fp, #0x18] ldr x0, [fp, #0x10] mov w2, #60 ldr x3, [fp, #0x10] ldr x3, [x3] ldr x3, [x3, #0x80] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 973: JIT compiled System.Text.RegularExpressions.RegexCompiler:RegexRunnerField(System.String) [Tier0, IL size=19, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RegexRunnerMethod(System.String):System.Reflection.MethodInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w2, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 974: JIT compiled System.Text.RegularExpressions.RegexCompiler:RegexRunnerMethod(System.String) [Tier0, IL size=19, code size=60] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Mvfldloc(System.Reflection.FieldInfo,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 975: JIT compiled System.Text.RegularExpressions.RegexCompiler:Mvfldloc(System.Reflection.FieldInfo,System.Reflection.Emit.LocalBuilder) [Tier0, IL size=15, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldthisfld(System.Reflection.FieldInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x30] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 976: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldthisfld(System.Reflection.FieldInfo) [Tier0, IL size=24, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldthis():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 977: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldthis() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Stloc(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x58] ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 978: JIT compiled System.Text.RegularExpressions.RegexCompiler:Stloc(System.Reflection.Emit.LocalBuilder) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldarg_1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 979: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldarg_1() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_MinRequiredLength():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 980: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_MinRequiredLength() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DefineLabel():System.Reflection.Emit.Label:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x1, [x1] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 981: JIT compiled System.Text.RegularExpressions.RegexCompiler:DefineLabel() [Tier0, IL size=12, code size=60] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldloc(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x58] ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 982: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldloc(System.Reflection.Emit.LocalBuilder) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldloca(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x58] ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 983: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldloca(System.Reflection.Emit.LocalBuilder) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Call(System.Reflection.MethodInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x10] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 984: JIT compiled System.Text.RegularExpressions.RegexCompiler:Call(System.Reflection.MethodInfo) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldc(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x24] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x08] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 985: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldc(int) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Sub():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 986: JIT compiled System.Text.RegularExpressions.RegexCompiler:Sub() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ble(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 987: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ble(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:MarkLabel(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0x20] ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 988: JIT compiled System.Text.RegularExpressions.RegexCompiler:MarkLabel(System.Reflection.Emit.Label) [Tier0, IL size=13, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Stfld(System.Reflection.FieldInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x30] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 989: JIT compiled System.Text.RegularExpressions.RegexCompiler:Stfld(System.Reflection.FieldInfo) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ret():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 990: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ret() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitAnchors|154_0(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] add x2, sp, #176 str x2, [fp, #0xA8] str x0, [fp, #0xA0] str x1, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x8C] ldr w0, [fp, #0x8C] cmp w0, #9 bhi G_M000_IG03 ldr w1, [fp, #0x8C] mov w1, w1 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG03: b G_M000_IG16 G_M000_IG04: ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG05: ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG06: ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG07: ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG08: ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG09: ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG10: ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG11: ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 beq G_M000_IG12 str wzr, [fp, #0x44] b G_M000_IG13 G_M000_IG12: mov w0, #1 str w0, [fp, #0x44] G_M000_IG13: ldr w0, [fp, #0x44] str w0, [fp, #0x88] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x88] add w1, w0, w1 str w1, [fp, #0x40] ldr w1, [fp, #0x40] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x88] add w1, w0, w1 str w1, [fp, #0x3C] ldr w1, [fp, #0x3C] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG14 G_M000_IG14: mov w0, #1 G_M000_IG15: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG16: ldr x0, [fp, #0x98] ldrb w0, [x0, #0x1C] cbnz w0, G_M000_IG27 ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x84] ldr w0, [fp, #0x84] cmp w0, #14 bne G_M000_IG24 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] str x1, [fp, #0x50] G_M000_IG17: ldp x0, x1, [fp, #0x48] stp x0, x1, [fp, #0x70] G_M000_IG18: ldr x0, [fp, #0x70] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x18] cbz w1, G_M000_IG20 G_M000_IG19: ldr x1, [fp, #0x98] ldr w1, [x1, #0x18] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG20: ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG21: ldr x0, [fp, #0xA8] bl G_M000_IG30 G_M000_IG22: nop G_M000_IG23: ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG24: ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] sub w0, w0, #20 cmp w0, #1 bhi G_M000_IG27 ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] add x0, fp, #96 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG27 add x0, fp, #96 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x6C] ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #9 beq G_M000_IG25 str wzr, [fp, #0x58] b G_M000_IG26 G_M000_IG25: mov w0, #1 str w0, [fp, #0x58] G_M000_IG26: ldr w0, [fp, #0x58] str w0, [fp, #0x5C] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x90] ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x6C] ldr w0, [fp, #0x5C] add w1, w1, w0 ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x6C] ldr w0, [fp, #0x5C] add w1, w1, w0 ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG27: b G_M000_IG28 G_M000_IG28: mov w0, wzr G_M000_IG29: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG30: stp fp, lr, [sp, #-0x20]! add x3, fp, #176 str x3, [sp, #0x18] G_M000_IG31: add x0, fp, #112 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG32: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 ; Total bytes of code 5288 991: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitAnchors|154_0(byref) [Tier0, IL size=1638, code size=5288] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_FindMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 992: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_FindMode() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitFixedSet_LeftToRight|154_3(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG03: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] G_M000_IG04: mov w0, #0xD1FFAB1E str w0, [fp, #0xD1FFAB1E] G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG06: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] G_M000_IG07: ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG08 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD1FFAB1E] b G_M000_IG09 G_M000_IG08: str wzr, [fp, #0xD1FFAB1E] G_M000_IG09: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG10 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #1 cset x0, gt str w0, [fp, #0xD1FFAB1E] b G_M000_IG11 G_M000_IG10: mov w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG11: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG60 mov w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG14 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG13 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG16 G_M000_IG14: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG15 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG16 G_M000_IG15: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG23 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #2 bhi G_M000_IG17 ldr w1, [fp, #0x14] mov w1, w1 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG17: b G_M000_IG22 G_M000_IG18: ldr x1, [fp, #0xD1FFAB1E] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG20: ldr x1, [fp, #0xD1FFAB1E] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] mov w0, #1 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG21: ldr x1, [fp, #0xD1FFAB1E] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] mov w0, #1 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] mov w0, #2 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG19 add x1, x1, x0, LSL #1 add x1, x1, #16 ldrh w1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] bl System.String:.ctor(ushort[]):this str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG30 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldrh w0, [fp, #0xD1FFAB1E] ldrh w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG27 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrh w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldrb w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG26 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG27: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrh w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrh w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldrb w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG28 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG29 G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG30: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG33 G_M000_IG31: ldr w0, [fp, #0xD1FFAB1E] uxth w0, w0 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG32 ldr w1, [fp, #0xD1FFAB1E] uxth w1, w1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG32: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG33: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG35 G_M000_IG34: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG35: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #127 ble G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG36: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG38: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #128 bne G_M000_IG40 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #127 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG41 G_M000_IG40: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG41: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF8] ldr x1, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xF0] ldr x1, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #127 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xE8] ldr x1, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xE0] ldr x1, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD8] ldr x1, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD0] ldr x1, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG42: blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC8] ldr x1, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC0] ldr x1, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB8] ldr x1, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB0] ldr x1, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movn w1, #0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xA8] ldr x1, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xA0] ldr x1, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG43 G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG71 G_M000_IG44: nop G_M000_IG45: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG74 G_M000_IG46: nop G_M000_IG47: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG52 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG48: add x0, fp, #0xD1FFAB1E ldp x1, x2, [fp, #0xD1FFAB1E] stp x1, x2, [x0, #0xD1FFAB1E] G_M000_IG49: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x98] ldr x1, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x90] ldr x1, [fp, #0x90] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x88] ldr x1, [fp, #0x88] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG50 G_M000_IG50: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG77 G_M000_IG51: b G_M000_IG53 G_M000_IG52: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG53: ldr w8, [fp, #0xD1FFAB1E] cmp w8, #1 ble G_M000_IG60 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] mov w0, #2 str w0, [fp, #0xD1FFAB1E] b G_M000_IG55 G_M000_IG54: add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG55: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG57 G_M000_IG56: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG57: ldr w8, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w8, w0 blt G_M000_IG54 ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 ble G_M000_IG60 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #1 ble G_M000_IG60 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x50] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x20] ldr x3, [fp, #0x50] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 b G_M000_IG60 G_M000_IG58: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w8, [fp, #0xD1FFAB1E] cbz w8, G_M000_IG59 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG59: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] G_M000_IG60: ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 bgt G_M000_IG62 G_M000_IG61: add x0, fp, #0xD1FFAB1E mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG62: ldr w0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG58 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG65 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0xD1FFAB1E] cmp w1, #1 bgt G_M000_IG63 ldr w1, [fp, #0xD1FFAB1E] cbz w1, G_M000_IG64 G_M000_IG63: ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x18] sub w1, w1, #1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG64: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG65: b G_M000_IG66 G_M000_IG66: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG80 G_M000_IG67: nop G_M000_IG68: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG83 G_M000_IG69: nop G_M000_IG70: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG71: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG72: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG73: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG74: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG75: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG76: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG77: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG78: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG79: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG80: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG81: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG82: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG83: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG84: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG85: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 ; Total bytes of code 7308 993: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitFixedSet_LeftToRight|154_3(byref) [Tier0, IL size=2024, code size=7308] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_FixedDistanceSets():System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 994: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_FixedDistanceSets() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RentInt32Local():System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] ldr x0, [x0, #0x20] str x0, [fp, #0x50] ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] str x14, [fp, #0x58] ldr x14, [fp, #0x68] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x58] str x0, [fp, #0x48] G_M000_IG03: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x68] ldr x0, [x0, #0x20] add x1, fp, #96 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x60] str x0, [fp, #0x30] G_M000_IG05: add x0, fp, #32 ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 288 995: JIT compiled System.Text.RegularExpressions.RegexCompiler:RentInt32Local() [Tier0, IL size=54, code size=288] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x10] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x20] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 996: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:.ctor() [Tier0, IL size=18, code size=168] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:TryPop(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x48] str x0, [fp, #0x40] str x1, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x40] ldr w0, [x0, #0x10] sub w0, w0, #1 str w0, [fp, #0x34] ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] str x0, [fp, #0x28] ldr w0, [fp, #0x34] ldr x14, [fp, #0x28] ldr w14, [x14, #0x08] cmp w0, w14 blo G_M000_IG04 ldr x0, [fp, #0x38] str xzr, [x0] mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x14, [fp, #0x40] ldr w14, [x14, #0x14] add w14, w14, #1 ldr x15, [fp, #0x40] str w14, [x15, #0x14] ldr x14, [fp, #0x40] ldr w15, [fp, #0x34] str w15, [x14, #0x10] ldr x14, [fp, #0x28] ldr w15, [fp, #0x34] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG10 add x14, x14, x15, LSL #3 add x14, x14, #16 ldr x15, [x14] ldr x14, [fp, #0x38] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x40] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x18] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG07: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG08 str xzr, [fp, #0x20] ldr w1, [fp, #0x34] sxtw x1, w1 ldr x0, [fp, #0x28] ldr x2, [fp, #0x20] bl CORINFO_HELP_ARRADDR_ST G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 320 997: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:TryPop(byref) [Tier0, IL size=90, code size=320] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:.ctor(System.Collections.Generic.Stack`1[System.Reflection.Emit.LocalBuilder],System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x28] ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 56 998: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:.ctor(System.Collections.Generic.Stack`1[System.Reflection.Emit.LocalBuilder],System.Reflection.Emit.LocalBuilder) [Tier0, IL size=15, code size=56] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RentReadOnlySpanCharLocal():System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] ldr x0, [x0, #0x28] str x0, [fp, #0x50] ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x18] str x14, [fp, #0x58] ldr x14, [fp, #0x68] add x14, x14, #40 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x58] str x0, [fp, #0x48] G_M000_IG03: ldr x0, [fp, #0x48] str x0, [fp, #0x40] ldr x0, [fp, #0x68] ldr x0, [x0, #0x28] add x1, fp, #96 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x60] str x0, [fp, #0x30] G_M000_IG05: add x0, fp, #32 ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 292 999: JIT compiled System.Text.RegularExpressions.RegexCompiler:RentReadOnlySpanCharLocal() [Tier0, IL size=55, code size=292] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str w1, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x18] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x20] str x1, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr w1, [fp, #0x2C] sxtw x1, w1 ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWARR_1_OBJ ldr x14, [fp, #0x30] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 200 1000: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:.ctor(int) [Tier0, IL size=30, code size=200] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:op_Implicit(System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder):System.Reflection.Emit.LocalBuilder ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1001: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:op_Implicit(System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder) [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BltFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1002: JIT compiled System.Text.RegularExpressions.RegexCompiler:BltFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Add():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1003: JIT compiled System.Text.RegularExpressions.RegexCompiler:Add() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x18] stp xzr, xzr, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 1004: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:Dispose() [Tier0, IL size=25, code size=68] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Push(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] str w1, [fp, #0x1C] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] str x1, [fp, #0x10] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] cmp w1, w0 bhs G_M000_IG04 ldr w1, [fp, #0x1C] sxtw x1, w1 ldr x0, [fp, #0x10] ldr x2, [fp, #0x20] bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 164 1005: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Push(System.__Canon) [Tier0, IL size=60, code size=164] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:PushWithResize(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr w1, [x1, #0x10] add w1, w1, #1 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x18] ldr w1, [x1, #0x10] sxtw x1, w1 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x2, [fp, #0x10] bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x18] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x14] ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 128 1006: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:PushWithResize(System.__Canon) [Tier0, IL size=61, code size=128] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x0, [fp, #0x30] str w1, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cbz w0, G_M000_IG03 ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 str w0, [fp, #0x24] b G_M000_IG04 G_M000_IG03: mov w0, #4 str w0, [fp, #0x24] G_M000_IG04: ldr w0, [fp, #0x24] str w0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw x0, w0 ldr w1, [fp, #0x28] mov w1, w1 cmp x0, x1 bge G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x28] G_M000_IG05: ldr w0, [fp, #0x28] ldr w1, [fp, #0x2C] cmp w0, w1 bge G_M000_IG06 ldr w0, [fp, #0x2C] str w0, [fp, #0x28] G_M000_IG06: ldr x0, [fp, #0x30] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x28] cbz x0, G_M000_IG08 G_M000_IG07: ldr x1, [fp, #0x10] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x28] str x1, [fp, #0x18] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG09: ldr x1, [fp, #0x30] ldrsb wzr, [x1] ldr x1, [fp, #0x30] add x1, x1, #8 ldr x0, [fp, #0x18] ldr w2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG10: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 296 1007: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Grow(int) [Tier0, IL size=58, code size=296] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTryMatchAtCurrentPosition():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x88] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x40] str x14, [fp, #0x80] ldr x14, [fp, #0x80] add x14, x14, #8 ldr x15, [fp, #0x88] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] ldr x0, [x0, #0x20] str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x38] cbnz x0, G_M000_IG03 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x88] ldr x0, [x0, #0x28] str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG05 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] ldr x0, [x0, #0x08] str x0, [fp, #0x78] ldr x0, [fp, #0x78] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x78] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x60] ldr w0, [fp, #0x60] sub w0, w0, #9 cmp w0, #3 bhi G_M000_IG11 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #12 beq G_M000_IG07 mov w0, #1 str w0, [fp, #0x1C] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [x0, #0x08] str w0, [fp, #0x1C] G_M000_IG08: ldr w0, [fp, #0x1C] str w0, [fp, #0x64] ldr x0, [fp, #0x78] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG09 ldr w0, [fp, #0x64] neg w0, w0 str w0, [fp, #0x64] G_M000_IG09: ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] ldr w1, [fp, #0x64] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x64] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG10: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG11: ldr x0, [fp, #0x88] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x80] str w0, [x1, #0x40] ldr x0, [fp, #0x80] ldr w1, [x0, #0x40] str w1, [fp, #0x68] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x80] ldr x1, [x1, #0x10] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x80] add x14, x14, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr x1, [x1, #0x30] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x80] str wzr, [x0, #0x38] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x80] ldr x0, [x0, #0x28] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0x80] strb w0, [x1, #0x3C] ldr x0, [fp, #0x80] ldr x1, [fp, #0x78] mov x2, xzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr w1, [x1, #0x38] cmp w1, #0 ble G_M000_IG13 ldr x1, [fp, #0x80] ldr w1, [x1, #0x38] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG12: ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] ldr x1, [x1, #0x18] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x80] ldrb w0, [x0, #0x3C] cbz w0, G_M000_IG14 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x58] ldr x0, [fp, #0x88] ldr w1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x50] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x48] ldr x0, [fp, #0x88] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] ldr w1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x88] ldr w1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG15: ldr x0, [fp, #0x88] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG16: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 2452 1008: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTryMatchAtCurrentPosition() [Tier0, IL size=729, code size=2452] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1009: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Clear():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] cbz x0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x18] str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 ldr x0, [fp, #0x20] ldr x0, [x0, #0x08] ldr x2, [fp, #0x20] ldr w2, [x2, #0x10] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldr x0, [fp, #0x20] str wzr, [x0, #0x10] ldr x0, [fp, #0x20] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x20] str w0, [x1, #0x14] G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 200 1010: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Clear() [Tier0, IL size=47, code size=200] ; Assembly listing for method System.Text.RegularExpressions.RegexTreeAnalyzer:Analyze(System.Text.RegularExpressions.RegexTree):System.Text.RegularExpressions.AnalysisResults ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] mov w2, #1 mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x1, [fp, #0x20] strb w0, [x1, #0x30] ldr x0, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 136 1011: JIT compiled System.Text.RegularExpressions.RegexTreeAnalyzer:Analyze(System.Text.RegularExpressions.RegexTree) [Tier0, IL size=29, code size=136] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:.ctor(System.Text.RegularExpressions.RegexTree):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #40 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 192 1012: JIT compiled System.Text.RegularExpressions.AnalysisResults:.ctor(System.Text.RegularExpressions.RegexTree) [Tier0, IL size=36, code size=192] ; Assembly listing for method System.Text.RegularExpressions.RegexTreeAnalyzer:g__TryAnalyze|0_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.AnalysisResults,bool,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] str xzr, [x9, #0xA0] str x0, [fp, #0xE8] str x1, [fp, #0xE0] str w2, [fp, #0xDC] str w3, [fp, #0xD8] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG04: ldr x0, [fp, #0xE0] ldrb w0, [x0, #0x31] ldr x1, [fp, #0xE8] ldr w1, [x1, #0x28] and w1, w1, #1 cmp w1, #0 cset x1, ne orr w0, w0, w1 ldr x1, [fp, #0xE0] strb w0, [x1, #0x31] ldr x0, [fp, #0xE0] ldrb w0, [x0, #0x32] ldr x1, [fp, #0xE8] ldr w1, [x1, #0x28] and w1, w1, #64 cmp w1, #0 cset x1, ne orr w0, w0, w1 ldr x1, [fp, #0xE0] strb w0, [x1, #0x32] ldr w0, [fp, #0xD8] uxtb w0, w0 cbz w0, G_M000_IG06 ldr x0, [fp, #0xE0] str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr x0, [x0, #0x20] str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x38] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0xC0] ldr x14, [fp, #0xC8] add x14, x14, #32 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xC0] str x0, [fp, #0x30] G_M000_IG05: ldr x0, [fp, #0x30] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldr w0, [fp, #0xDC] uxtb w0, w0 cbz w0, G_M000_IG07 ldr x0, [fp, #0xE0] ldr x0, [x0, #0x08] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG11 G_M000_IG07: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xBC] ldr w0, [fp, #0xBC] sub w0, w0, #3 cmp w0, #5 bls G_M000_IG08 ldr w0, [fp, #0xBC] cmp w0, #24 beq G_M000_IG09 ldr w0, [fp, #0xBC] sub w0, w0, #26 cmp w0, #1 bhi G_M000_IG11 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x44] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x44] cmp w0, w1 bne G_M000_IG09 b G_M000_IG11 G_M000_IG08: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x90] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x90] cmp w0, w1 beq G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0xE0] str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr x0, [x0, #0x18] str x0, [fp, #0x58] ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x58] cbnz x0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x48] str x14, [fp, #0xC0] ldr x14, [fp, #0xC8] add x14, x14, #24 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xC0] str x0, [fp, #0x50] G_M000_IG10: ldr x0, [fp, #0x50] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG11: str wzr, [fp, #0xD4] ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xB8] ldr w0, [fp, #0xB8] sub w0, w0, #26 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #6 bhi G_M000_IG12 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG12: b G_M000_IG16 G_M000_IG13: mov w0, #1 str w0, [fp, #0xD4] b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0xE0] ldr x0, [x0, #0x10] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG16 G_M000_IG15: mov w0, #1 strb w0, [fp, #0xD8] G_M000_IG16: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD0] str wzr, [fp, #0xB4] b G_M000_IG34 G_M000_IG17: ldr x0, [fp, #0xE8] ldr w1, [fp, #0xB4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0xA8] ldr w0, [fp, #0xDC] uxtb w0, w0 ldr w1, [fp, #0xD4] orr w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xA0] ldr w0, [fp, #0xA0] str w0, [fp, #0x9C] ldr w0, [fp, #0x9C] cbz w0, G_M000_IG26 ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x94] ldr w3, [fp, #0x94] sub w3, w3, #24 str w3, [fp, #0x18] ldr w3, [fp, #0x18] cmp w3, #10 bhi G_M000_IG18 ldr w0, [fp, #0x18] mov w0, w0 adr x1, [@RWD28] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG18: b G_M000_IG24 G_M000_IG19: mov w0, #1 str w0, [fp, #0x98] b G_M000_IG25 G_M000_IG20: mov w0, #1 str w0, [fp, #0x98] b G_M000_IG25 G_M000_IG21: mov w0, #1 str w0, [fp, #0x98] b G_M000_IG25 G_M000_IG22: ldr w0, [fp, #0xB4] ldr w1, [fp, #0xD0] sub w1, w1, #1 cmp w0, w1 cset x0, eq str w0, [fp, #0x98] b G_M000_IG25 G_M000_IG23: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG24 mov w0, #1 str w0, [fp, #0x98] b G_M000_IG25 G_M000_IG24: str wzr, [fp, #0x98] G_M000_IG25: ldr w3, [fp, #0x98] str w3, [fp, #0x9C] G_M000_IG26: ldr w3, [fp, #0x9C] str w3, [fp, #0xA4] ldr w3, [fp, #0xD8] uxtb w3, w3 ldr x0, [fp, #0xA8] ldr x1, [fp, #0xE0] ldr w2, [fp, #0xA4] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w0, G_M000_IG28 mov w0, wzr G_M000_IG27: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG28: ldr x0, [fp, #0xE0] ldr x0, [x0, #0x10] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG29 ldr x0, [fp, #0xE0] ldr x0, [x0, #0x10] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG29: ldr w0, [fp, #0xD4] cbnz w0, G_M000_IG33 ldr x0, [fp, #0xE0] ldr x0, [x0, #0x18] str x0, [fp, #0x88] ldr x0, [fp, #0x88] str x0, [fp, #0x80] ldr x0, [fp, #0x88] cbnz x0, G_M000_IG30 str wzr, [fp, #0x7C] b G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0x80] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x7C] G_M000_IG31: ldr w0, [fp, #0x7C] cbz w0, G_M000_IG33 ldr x0, [fp, #0xE0] str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr x0, [x0, #0x18] str x0, [fp, #0x70] ldr x0, [fp, #0x70] str x0, [fp, #0x68] ldr x0, [fp, #0x70] cbnz x0, G_M000_IG32 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x60] str x14, [fp, #0xC0] ldr x14, [fp, #0xC8] add x14, x14, #24 ldr x15, [fp, #0x60] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xC0] str x0, [fp, #0x68] G_M000_IG32: ldr x0, [fp, #0x68] ldr x1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG33: ldr w0, [fp, #0xB4] add w0, w0, #1 str w0, [fp, #0xB4] G_M000_IG34: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG36 G_M000_IG35: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG36: ldr w0, [fp, #0xB4] ldr w1, [fp, #0xD0] cmp w0, w1 blt G_M000_IG17 mov w0, #1 G_M000_IG37: ldp fp, lr, [sp], #0xF0 ret lr RWD00 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 RWD28 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 ; Total bytes of code 1680 1013: JIT compiled System.Text.RegularExpressions.RegexTreeAnalyzer:g__TryAnalyze|0_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.AnalysisResults,bool,bool) [Tier0, IL size=546, code size=1680] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__SliceInputSpan|0():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 172 1014: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__SliceInputSpan|0() [Tier0, IL size=68, code size=172] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:MayContainCapture(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x30] cbz w0, G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1015: JIT compiled System.Text.RegularExpressions.AnalysisResults:MayContainCapture(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=23, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitNode|12(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x98] str x1, [fp, #0x90] str x2, [fp, #0x88] str w3, [fp, #0x84] G_M000_IG02: ldr x0, [fp, #0x98] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #18 bne G_M000_IG05 ldr x0, [fp, #0x98] ldr x0, [x0, #0x08] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] add x8, fp, #88 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x0, fp, #88 str x0, [fp, #0x40] add x0, fp, #88 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG03 str xzr, [fp, #0x18] b G_M000_IG04 G_M000_IG03: add x8, fp, #32 ldr x0, [fp, #0x40] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] str x0, [fp, #0x18] G_M000_IG04: ldr x0, [fp, #0x18] ldr x1, [fp, #0x90] cmp x0, x1 bne G_M000_IG05 ldr x0, [fp, #0x98] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x98] ldr x2, [x2, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG31 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x1, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w4, [fp, #0x84] uxtb w4, w4 ldr x1, [fp, #0x48] ldr x2, [fp, #0x90] ldr x3, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG31 G_M000_IG06: ldr x0, [fp, #0x90] ldr w0, [x0, #0x28] and w0, w0, #64 cbz w0, G_M000_IG07 ldr x0, [fp, #0x98] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x54] ldr w0, [fp, #0x54] sub w0, w0, #3 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #43 bhi G_M000_IG08 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG08: b G_M000_IG31 G_M000_IG09: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG10: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG11: ldr w2, [fp, #0x84] uxtb w2, w2 ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG12: ldr w2, [fp, #0x84] uxtb w2, w2 ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG13: ldr w3, [fp, #0x84] uxtb w3, w3 ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr x2, [fp, #0x88] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG14: ldr w3, [fp, #0x84] uxtb w3, w3 ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr x2, [fp, #0x88] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG15: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG16: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG17: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG18: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG19: ldr w3, [fp, #0x84] uxtb w3, w3 ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr x2, [fp, #0x88] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG20: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG21: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG22: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG23: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG24: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] ldr x2, [fp, #0x88] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG25: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG26: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG27: ldr x0, [fp, #0x98] ldr x0, [x0, #0x08] ldr x1, [fp, #0x98] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG28: b G_M000_IG31 G_M000_IG29: ldr x0, [fp, #0x98] ldr x1, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG30: b G_M000_IG31 G_M000_IG31: ldp fp, lr, [sp], #0xA0 ret lr RWD00 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 ; Total bytes of code 1340 1016: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitNode|12(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool) [Tier0, IL size=524, code size=1340] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAtomic|13(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x3, sp, #128 str x3, [fp, #0x78] str x0, [fp, #0x70] str x1, [fp, #0x68] str x2, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x68] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x58] ldr x0, [fp, #0x70] ldr x0, [x0, #0x28] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x70] ldr x1, [fp, #0x58] ldr x2, [fp, #0x60] mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: ldr x0, [fp, #0x70] ldr w1, [x0, #0x40] str w1, [fp, #0x50] ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] str x1, [fp, #0x38] G_M000_IG05: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0x40] G_M000_IG06: ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] ldr x1, [x1, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] str x0, [fp, #0x28] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x1, [fp, #0x58] ldr x2, [fp, #0x60] mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] str x0, [fp, #0x20] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x0, [x0, #0x08] ldr x1, [fp, #0x70] ldr x1, [x1, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr w1, [fp, #0x50] str w1, [x0, #0x40] b G_M000_IG07 G_M000_IG07: ldr x0, [fp, #0x78] bl G_M000_IG10 G_M000_IG08: nop G_M000_IG09: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG10: stp fp, lr, [sp, #-0x20]! add x3, fp, #128 str x3, [sp, #0x18] G_M000_IG11: add x0, fp, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG12: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 556 1017: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAtomic|13(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier0, IL size=152, code size=556] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:MayBacktrack(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldrb w0, [x0, #0x30] cbz w0, G_M000_IG06 ldr x0, [fp, #0x28] ldr x0, [x0, #0x18] str x0, [fp, #0x18] ldr x0, [fp, #0x18] str x0, [fp, #0x10] ldr x0, [fp, #0x18] cbnz x0, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x10] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 124 1018: JIT compiled System.Text.RegularExpressions.AnalysisResults:MayBacktrack(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=29, code size=124] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAlternation|4(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xC8] str x14, [fp, #0xD1FFAB1E] ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #24 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [x0, #0x40] str w1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x28] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x38] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str xzr, [x0, #0x08] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x3C] cbz w0, G_M000_IG04 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x28] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG03 ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG05 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x28] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cmp w0, #0 cset x1, eq str w1, [fp, #0xC4] b G_M000_IG06 G_M000_IG05: str wzr, [fp, #0xC4] G_M000_IG06: ldr w1, [fp, #0xC4] uxtb w1, w1 str w1, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG07 str xzr, [fp, #0xB8] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xB8] G_M000_IG08: ldr x0, [fp, #0xB8] str x0, [fp, #0xF8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] ldr x0, [fp, #0xB0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xB0] str x14, [fp, #0xF0] ldr x14, [fp, #0xF0] add x14, x14, #8 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xF0] str wzr, [x0, #0x10] b G_M000_IG20 G_M000_IG09: ldr x0, [fp, #0xF0] ldr w0, [x0, #0x10] ldr w1, [fp, #0xD1FFAB1E] sub w1, w1, #1 cmp w0, w1 cset x0, eq str w0, [fp, #0xEC] str wzr, [fp, #0xE0] ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG10 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE0] ldr x1, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xE0] str w0, [x1, #0x40] b G_M000_IG11 G_M000_IG10: ldr x1, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [x1, #0x40] G_M000_IG11: ldr x1, [fp, #0xF0] ldr w1, [x1, #0x10] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] mov x2, xzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w1, [fp, #0xD1FFAB1E] cbnz w1, G_M000_IG18 ldr x1, [fp, #0xF8] cbnz x1, G_M000_IG17 ldr x1, [fp, #0xD1FFAB1E] str x1, [fp, #0x98] mov w1, #2 str w1, [fp, #0x94] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x1, [x1, #0x08] cbnz x1, G_M000_IG12 ldr x1, [fp, #0x98] str x1, [fp, #0x88] ldr w1, [fp, #0x94] str w1, [fp, #0x84] str wzr, [fp, #0x80] b G_M000_IG13 G_M000_IG12: ldr x1, [fp, #0x98] str x1, [fp, #0x88] ldr w1, [fp, #0x94] str w1, [fp, #0x84] mov w1, #1 str w1, [fp, #0x80] G_M000_IG13: ldr w1, [fp, #0x84] ldr w0, [fp, #0x80] add w1, w1, w0 ldr x0, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] ldr x0, [fp, #0x78] ldr x1, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xF0] ldr x0, [x0, #0x08] ldr x0, [x0, #0x08] cbz x0, G_M000_IG15 ldr x0, [fp, #0xF0] ldr x0, [x0, #0x08] ldr x0, [x0, #0x20] str x0, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x40] ldr x0, [fp, #0x48] str x0, [fp, #0x38] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG14 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] str x1, [fp, #0x28] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x30] str x14, [fp, #0xD8] ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD8] str x0, [fp, #0x38] G_M000_IG14: ldr x0, [fp, #0x40] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG15: ldr x0, [fp, #0xF0] ldr x0, [x0, #0x08] ldr x0, [x0, #0x28] str x0, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x68] ldr x0, [fp, #0x70] str x0, [fp, #0x60] ldr x0, [fp, #0x70] cbnz x0, G_M000_IG16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] str x1, [fp, #0x50] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x58] str x14, [fp, #0xD8] ldr x14, [fp, #0x50] add x14, x14, #40 ldr x15, [fp, #0x58] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD8] str x0, [fp, #0x60] G_M000_IG16: ldr x0, [fp, #0x68] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG18 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xF0] ldr w1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG18: ldr x0, [fp, #0xF0] ldr w0, [x0, #0x10] str w0, [fp, #0xAC] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [x0, #0x40] str w1, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xAC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG29 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0xA0] str w1, [x0] ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG19 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x1, [x1, #0x10] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [x1, #0x38] ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x1, [x1, #0x08] cbz x1, G_M000_IG19 ldr x1, [fp, #0xF0] ldr x1, [x1, #0x08] ldr x1, [x1, #0x08] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr x0, [fp, #0xF0] ldr w0, [x0, #0x10] str w0, [fp, #0xD4] ldr w0, [fp, #0xD4] add w0, w0, #1 ldr x1, [fp, #0xF0] str w0, [x1, #0x10] G_M000_IG20: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG22 G_M000_IG21: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG22: ldr x0, [fp, #0xF0] ldr w0, [x0, #0x10] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 blt G_M000_IG09 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG23 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x40] b G_M000_IG27 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x40] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xF8] cbnz x0, G_M000_IG25 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] cbz x0, G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG26 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG28: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG29: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 2496 1019: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAlternation|4(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=919, code size=2496] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_1:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1020: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_1:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:IsAtomicByAncestor(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 1021: JIT compiled System.Text.RegularExpressions.AnalysisResults:IsAtomicByAncestor(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=13, code size=60] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_2:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1022: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_2:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitConcatenation|15(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x68] str w3, [fp, #0x64] G_M000_IG02: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x60] str wzr, [fp, #0x5C] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] b G_M000_IG14 G_M000_IG03: ldr x2, [fp, #0x70] ldr w2, [x2, #0x28] and w2, w2, #64 cmp w2, #0 cset x2, eq ldr w3, [fp, #0x64] uxtb w3, w3 and w2, w2, w3 cbz w2, G_M000_IG12 add x2, fp, #80 add x3, fp, #72 ldr x0, [fp, #0x70] ldr w1, [fp, #0x5C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 cbz w0, G_M000_IG12 ldr x0, [fp, #0x78] ldr w1, [fp, #0x50] mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG09 G_M000_IG04: add x4, fp, #56 add x3, fp, #64 ldr x0, [fp, #0x70] ldr w1, [fp, #0x5C] ldr w2, [fp, #0x48] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] blr x5 cbz w0, G_M000_IG07 ldr x0, [fp, #0x78] ldr w0, [x0, #0x38] cmp w0, #0 ble G_M000_IG05 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr w1, [x1, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] mov w1, #5 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] ldr w0, [x0, #0x38] ldr x1, [fp, #0x38] ldr w1, [x1, #0x08] add w0, w0, w1 ldr x1, [fp, #0x78] str w0, [x1, #0x38] ldr w0, [fp, #0x5C] ldr w1, [fp, #0x40] add w0, w0, w1 sub w0, w0, #1 str w0, [fp, #0x5C] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x70] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x28] ldr w0, [fp, #0x5C] ldr x1, [fp, #0x70] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x28] ldr x0, [fp, #0x78] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG08: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] G_M000_IG09: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w4, [fp, #0x5C] ldr w3, [fp, #0x48] cmp w4, w3 blt G_M000_IG04 ldr w0, [fp, #0x5C] sub w0, w0, #1 str w0, [fp, #0x5C] b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x70] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x30] ldr w0, [fp, #0x5C] ldr x1, [fp, #0x70] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x30] ldr x0, [fp, #0x78] mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG13: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] G_M000_IG14: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG16: ldr w2, [fp, #0x5C] ldr w3, [fp, #0x60] cmp w2, w3 blt G_M000_IG03 G_M000_IG17: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 1032 1023: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitConcatenation|15(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool) [Tier0, IL size=333, code size=1032] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:TryGetJoinableLengthCheckChildRange(int,byref,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x48] str w1, [fp, #0x44] str x2, [fp, #0x38] str x3, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG09 ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x1, [fp, #0x38] str w0, [x1] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x44] add w0, w0, #1 ldr x1, [fp, #0x30] str w0, [x1] b G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x30] ldr w1, [x1] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 ldr x0, [fp, #0x38] ldr w0, [x0] str w0, [fp, #0x20] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x20] add w0, w0, w1 ldr x1, [fp, #0x38] str w0, [x1] ldr x0, [fp, #0x30] ldr w0, [x0] add w0, w0, #1 ldr x1, [fp, #0x30] str w0, [x1] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #72 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr x1, [fp, #0x30] ldr w1, [x1] ldr w0, [fp, #0x24] cmp w1, w0 blt G_M000_IG03 G_M000_IG07: ldr x0, [fp, #0x30] ldr w0, [x0] ldr w1, [fp, #0x44] sub w0, w0, w1 cmp w0, #1 ble G_M000_IG09 mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: ldr x0, [fp, #0x38] str wzr, [x0] ldr x0, [fp, #0x30] str wzr, [x0] mov w0, wzr G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 440 1024: JIT compiled System.Text.RegularExpressions.RegexNode:TryGetJoinableLengthCheckChildRange(int,byref,byref) [Tier0, IL size=94, code size=440] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__CanJoinLengthCheck|60_0(System.Text.RegularExpressions.RegexNode):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] sub w0, w0, #3 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #9 bhi G_M000_IG03 ldr w0, [fp, #0x18] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: ldr w0, [fp, #0x20] sub w0, w0, #43 cmp w0, #2 bls G_M000_IG06 b G_M000_IG07 G_M000_IG04: mov w0, #1 str w0, [fp, #0x24] b G_M000_IG08 G_M000_IG05: mov w0, #1 str w0, [fp, #0x24] b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x1C] cmp w0, w1 bne G_M000_IG07 mov w0, #1 str w0, [fp, #0x24] b G_M000_IG08 G_M000_IG07: str wzr, [fp, #0x24] G_M000_IG08: ldr w0, [fp, #0x24] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr RWD00 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 ; Total bytes of code 240 1025: JIT compiled System.Text.RegularExpressions.RegexNode:g__CanJoinLengthCheck|60_0(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=94, code size=240] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__GetSubsequent|155_41(int,System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str w0, [fp, #0x3C] str x1, [fp, #0x30] str x2, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x3C] add w0, w0, #1 str w0, [fp, #0x20] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG03: ldr x0, [fp, #0x30] ldr w1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #46 beq G_M000_IG05 ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: ldr w0, [fp, #0x20] add w0, w0, #1 str w0, [fp, #0x20] G_M000_IG06: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #16 mov w1, #37 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x20] ldr w1, [fp, #0x24] cmp w0, w1 blt G_M000_IG03 ldr x0, [fp, #0x28] G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 240 1026: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__GetSubsequent|155_41(int,System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier0, IL size=43, code size=240] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleChar|16(System.Text.RegularExpressions.RegexNode,bool,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str w2, [fp, #0x4C] str x3, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x50] ldr w0, [x0, #0x28] and w0, w0, #64 cmp w0, #0 cset x0, ne str w0, [fp, #0x3C] ldr w0, [fp, #0x4C] uxtb w0, w0 cbz w0, G_M000_IG04 ldr w0, [fp, #0x3C] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x58] ldr x2, [fp, #0x40] mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0x3C] cbnz w0, G_M000_IG05 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x58] ldr w1, [x1, #0x38] ldr x0, [fp, #0x58] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x2, [fp, #0x58] ldr x2, [x2, #0x18] ldr x0, [fp, #0x58] movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG07 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x28] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG09 G_M000_IG07: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x30] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG08 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr w0, [fp, #0x3C] cbnz w0, G_M000_IG11 ldr x0, [fp, #0x58] ldr w0, [x0, #0x38] str w0, [fp, #0x38] ldr w0, [fp, #0x38] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x38] G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG11: ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 1064 1027: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleChar|16(System.Text.RegularExpressions.RegexNode,bool,System.Reflection.Emit.LocalBuilder) [Tier0, IL size=394, code size=1064] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSpanLengthCheck|2(int,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x38] ldr w0, [fp, #0x24] add w1, w1, w0 sub w1, w1, #1 ldr x0, [fp, #0x28] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x28] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x28] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 192 1028: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSpanLengthCheck|2(int,System.Reflection.Emit.LocalBuilder) [Tier0, IL size=68, code size=192] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSum|1(int,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr w0, [fp, #0x24] cbnz w0, G_M000_IG06 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 216 1029: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSum|1(int,System.Reflection.Emit.LocalBuilder) [Tier0, IL size=68, code size=216] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BgeUnFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1030: JIT compiled System.Text.RegularExpressions.RegexCompiler:BgeUnFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:LdindU2():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1031: JIT compiled System.Text.RegularExpressions.RegexCompiler:LdindU2() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsSetFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #8 bhi G_M000_IG03 ldr w0, [fp, #0x14] cmp w0, #5 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #8 beq G_M000_IG04 b G_M000_IG05 G_M000_IG03: ldr w0, [fp, #0x14] cmp w0, #11 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #45 bne G_M000_IG05 G_M000_IG04: mov w0, #1 str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: str wzr, [fp, #0x10] G_M000_IG06: ldr w0, [fp, #0x10] G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 1032: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsSetFamily() [Tier0, IL size=39, code size=132] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsOneFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #6 bhi G_M000_IG03 ldr w0, [fp, #0x14] cmp w0, #3 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #6 beq G_M000_IG04 b G_M000_IG05 G_M000_IG03: ldr w0, [fp, #0x14] cmp w0, #9 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #43 bne G_M000_IG05 G_M000_IG04: mov w0, #1 str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: str wzr, [fp, #0x10] G_M000_IG06: ldr w0, [fp, #0x10] G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 1033: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsOneFamily() [Tier0, IL size=39, code size=132] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BneFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1034: JIT compiled System.Text.RegularExpressions.RegexCompiler:BneFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleCharAtomicLoop|25(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #1 bne G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #64 cmp w0, #0 cset x0, ne str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG07: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG14 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD8] ldr x1, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD0] ldr x1, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xC8] ldr x1, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG09: ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG10 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xC0] ldr x1, [fp, #0xC0] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xBC] ldr w1, [fp, #0xBC] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB0] ldr x1, [fp, #0xB0] ldr x0, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xA8] ldr x1, [fp, #0xA8] ldr x0, [fp, #0xF0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG13 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xA0] ldr x1, [fp, #0xA0] ldr x0, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG15 ldr w0, [fp, #0xD1FFAB1E] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bne G_M000_IG15 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x98] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG15 ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x90] ldr x1, [fp, #0x90] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG15: ldr w1, [fp, #0xD1FFAB1E] movn w0, #0xD1FFAB1E LSL #16 cmp w1, w0 bne G_M000_IG19 add x1, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG19 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x38] cmp w0, #0 ble G_M000_IG16 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG17 G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] mov w2, wzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x88] ldr x1, [fp, #0x88] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x80] ldr x1, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x38] cmp w0, #0 ble G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x1, [fp, #0x60] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG21 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x58] ldr x1, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG20: blr x2 b G_M000_IG23 G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x54] ldr w1, [fp, #0x54] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG22 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG23 G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG24: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 ble G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG26: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG27 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG28 G_M000_IG27: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG30 G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG33 G_M000_IG29: b G_M000_IG32 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG33 G_M000_IG31: nop G_M000_IG32: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG33: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG34: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG35: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 5156 1035: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleCharAtomicLoop|25(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=1694, code size=5156] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__CanEmitIndexOf|155_29(System.Text.RegularExpressions.RegexNode,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0xA8] str x0, [fp, #0x90] str x1, [fp, #0x88] G_M000_IG02: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #12 bne G_M000_IG03 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w0, [x0, #0x08] ldr x1, [fp, #0x88] str w0, [x1] b G_M000_IG11 G_M000_IG03: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x88] mov w1, #1 str w1, [x0] b G_M000_IG11 G_M000_IG05: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG13 stp xzr, xzr, [fp, #0x38] add x0, fp, #56 add x1, fp, #152 mov w2, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp x0, x1, [fp, #0x38] stp x0, x1, [fp, #0x50] G_M000_IG07: ldp x0, x1, [fp, #0x50] stp x0, x1, [fp, #0x78] G_M000_IG08: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x78] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x34] ldr w0, [fp, #0x34] str w0, [fp, #0x74] ldr w0, [fp, #0x34] cmp w0, #0 ble G_M000_IG09 ldr x0, [fp, #0x88] mov w1, #1 str w1, [x0] b G_M000_IG11 G_M000_IG09: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] add x1, fp, #104 add x2, fp, #96 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG10 ldr x0, [fp, #0x88] mov w1, #1 str w1, [x0] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] add x1, fp, #72 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG13 ldr x0, [fp, #0x88] mov w1, #1 str w1, [x0] b G_M000_IG11 G_M000_IG11: mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xA8] cmp xip0, xip1 beq G_M000_IG12 bl CORINFO_HELP_FAIL_FAST G_M000_IG12: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG13: ldr x0, [fp, #0x88] str wzr, [x0] b G_M000_IG14 G_M000_IG14: mov w0, wzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xA8] cmp xip0, xip1 beq G_M000_IG15 bl CORINFO_HELP_FAIL_FAST G_M000_IG15: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 660 1036: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__CanEmitIndexOf|155_29(System.Text.RegularExpressions.RegexNode,byref) [Tier0, IL size=139, code size=660] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsNotoneFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #7 bhi G_M000_IG03 ldr w0, [fp, #0x14] cmp w0, #4 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #7 beq G_M000_IG04 b G_M000_IG05 G_M000_IG03: ldr w0, [fp, #0x14] cmp w0, #10 beq G_M000_IG04 ldr w0, [fp, #0x14] cmp w0, #44 bne G_M000_IG05 G_M000_IG04: mov w0, #1 str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: str wzr, [fp, #0x10] G_M000_IG06: ldr w0, [fp, #0x10] G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 1037: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsNotoneFamily() [Tier0, IL size=39, code size=132] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitIndexOf|30(System.Text.RegularExpressions.RegexNode,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #96 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #12 bne G_M000_IG05 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x98] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x90] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG03 ldr x0, [fp, #0x90] str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x90] str x0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x80] G_M000_IG04: ldr x0, [fp, #0x88] ldr x1, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG14 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG07 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cmp w0, #0 cset x0, eq strb w0, [fp, #0xD1FFAB1E] G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x74] ldr w1, [fp, #0x74] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG08 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG09 b G_M000_IG10 G_M000_IG08: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG11 b G_M000_IG12 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG13 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG13 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG13 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG72 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xD1FFAB1E] uxtb w1, w1 eor w0, w0, w1 uxtb w0, w0 str w0, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD0] add x0, fp, #208 add x1, fp, #0xD1FFAB1E mov w2, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldp x0, x1, [fp, #0xD0] stp x0, x1, [fp, #0xF0] G_M000_IG16: ldp x0, x1, [fp, #0xF0] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr x1, [fp, #0xD1FFAB1E] ldr x2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #1 cmp w0, #1 bhi G_M000_IG18 mov w0, #1 str w0, [fp, #0xEC] b G_M000_IG19 G_M000_IG18: str wzr, [fp, #0xEC] G_M000_IG19: ldr w0, [fp, #0xEC] cbnz w0, G_M000_IG33 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] ldr x0, [fp, #0x60] add x1, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG33 ldr w0, [fp, #0xD1FFAB1E] uxth w0, w0 ldr w1, [fp, #0xD1FFAB1E] uxth w1, w1 cmp w0, w1 bne G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG20 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG21 b G_M000_IG22 G_M000_IG20: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG23 b G_M000_IG24 G_M000_IG21: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG25 G_M000_IG24: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG27 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG28 b G_M000_IG29 G_M000_IG27: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG30 b G_M000_IG31 G_M000_IG28: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG32 G_M000_IG29: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG32 G_M000_IG30: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG32 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG33: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 ble G_M000_IG65 add x0, fp, #0xD1FFAB1E ldr w2, [fp, #0xD1FFAB1E] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xA8] str x1, [fp, #0xB0] G_M000_IG34: ldp x0, x1, [fp, #0xA8] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG35: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xE8] ldr w0, [fp, #0xE8] sub w0, w0, #1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #2 bhi G_M000_IG36 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG36: b G_M000_IG58 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #0 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG38 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG39 b G_M000_IG40 G_M000_IG38: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG41 b G_M000_IG42 G_M000_IG39: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG43 G_M000_IG40: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG43 G_M000_IG41: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG43 G_M000_IG42: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG44: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #0 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #1 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1, #0x02] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG45 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG46 b G_M000_IG47 G_M000_IG45: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG48 b G_M000_IG49 G_M000_IG46: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG50 G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG50 G_M000_IG48: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG50 G_M000_IG49: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG50: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG51: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #0 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #1 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1, #0x02] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr w1, [fp, #0xD1FFAB1E] cmp w1, #2 bls G_M000_IG75 ldr x1, [fp, #0xD1FFAB1E] ldrh w1, [x1, #0x04] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG52 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG53 b G_M000_IG54 G_M000_IG52: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG55 b G_M000_IG56 G_M000_IG53: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG57 G_M000_IG54: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG57 G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG57 G_M000_IG56: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG57: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG58: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xA0] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG59 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG60 b G_M000_IG61 G_M000_IG59: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG62 b G_M000_IG63 G_M000_IG60: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG64 G_M000_IG61: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG64 G_M000_IG62: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG64 G_M000_IG63: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG64: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG65: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG72 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC0] str x1, [fp, #0xC8] ldr x1, [fp, #0xC0] ldr x2, [fp, #0xC8] ldr x0, [fp, #0xB8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG66 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG67 b G_M000_IG68 G_M000_IG66: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG69 b G_M000_IG70 G_M000_IG67: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG71 G_M000_IG68: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG71 G_M000_IG69: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] b G_M000_IG71 G_M000_IG70: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] G_M000_IG71: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG73 G_M000_IG72: b G_M000_IG73 G_M000_IG73: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG74 bl CORINFO_HELP_FAIL_FAST G_M000_IG74: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG75: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG44 - G_M000_IG02 dd G_M000_IG51 - G_M000_IG02 ; Total bytes of code 3084 1038: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitIndexOf|30(System.Text.RegularExpressions.RegexNode,bool,bool) [Tier0, IL size=951, code size=3084] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BgeFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1039: JIT compiled System.Text.RegularExpressions.RegexCompiler:BgeFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__TransferSliceStaticPosToPos|3(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x38] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr w1, [x1, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str wzr, [x0, #0x38] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr w0, [fp, #0x14] uxtb w0, w0 cbz w0, G_M000_IG05 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 252 1040: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__TransferSliceStaticPosToPos|3(bool) [Tier0, IL size=95, code size=252] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1041: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitScan(int,System.Reflection.Emit.DynamicMethod,System.Reflection.Emit.DynamicMethod):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str x0, [fp, #0xB8] str w1, [fp, #0xB4] str x2, [fp, #0xA8] str x3, [fp, #0xA0] G_M000_IG02: ldr w0, [fp, #0xB4] and w0, w0, #64 cmp w0, #0 cset x0, ne str w0, [fp, #0x9C] ldr x0, [fp, #0xB8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x90] ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x88] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x84] ldr w0, [fp, #0x84] sub w0, w0, #9 cmp w0, #3 bhi G_M000_IG03 mov w0, #1 str w0, [fp, #0x80] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x80] G_M000_IG04: ldr w0, [fp, #0x80] cbz w0, G_M000_IG09 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] ldr x2, [fp, #0x78] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0xB8] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] str x0, [fp, #0x40] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #12 beq G_M000_IG05 ldr x0, [fp, #0x40] str x0, [fp, #0x38] mov w0, #1 str w0, [fp, #0x34] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [x0, #0x08] str w1, [fp, #0x34] G_M000_IG06: ldr x1, [fp, #0x38] str x1, [fp, #0x28] ldr w1, [fp, #0x34] str w1, [fp, #0x24] ldr w1, [fp, #0x9C] cbz w1, G_M000_IG07 ldr x1, [fp, #0x28] str x1, [fp, #0x18] ldr w1, [fp, #0x24] str w1, [fp, #0x14] movn w1, #0 str w1, [fp, #0x10] b G_M000_IG08 G_M000_IG07: ldr x1, [fp, #0x28] str x1, [fp, #0x18] ldr w1, [fp, #0x24] str w1, [fp, #0x14] mov w1, #1 str w1, [fp, #0x10] G_M000_IG08: ldr w1, [fp, #0x14] ldr w0, [fp, #0x10] mul w1, w1, w0 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG09: ldr x0, [fp, #0xB8] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x6C] ldr w0, [fp, #0x6C] cmp w0, #1 bls G_M000_IG10 ldr w0, [fp, #0x6C] cmp w0, #5 beq G_M000_IG10 ldr w0, [fp, #0x6C] cmp w0, #7 bne G_M000_IG11 G_M000_IG10: mov w0, #1 str w0, [fp, #0x80] b G_M000_IG12 G_M000_IG11: str wzr, [fp, #0x80] G_M000_IG12: ldr w0, [fp, #0x80] cbz w0, G_M000_IG15 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x9C] cbnz w0, G_M000_IG13 ldr x0, [fp, #0xB8] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0xB8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG15: ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x60] ldr x0, [fp, #0xB8] ldr w1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr x1, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x9C] cbnz w0, G_M000_IG16 ldr x0, [fp, #0xB8] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG17 G_M000_IG16: ldr x0, [fp, #0xB8] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG17: ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] str x0, [fp, #0x58] ldr w0, [fp, #0x9C] cbz w0, G_M000_IG18 ldr x0, [fp, #0x58] str x0, [fp, #0x50] movn w0, #0 str w0, [fp, #0x4C] b G_M000_IG19 G_M000_IG18: ldr x0, [fp, #0x58] str x0, [fp, #0x50] mov w0, #1 str w0, [fp, #0x4C] G_M000_IG19: ldr x0, [fp, #0x50] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xB8] ldr w1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG20: ldr x0, [fp, #0xB8] ldr w1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG21: ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 2228 1042: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitScan(int,System.Reflection.Emit.DynamicMethod,System.Reflection.Emit.DynamicMethod) [Tier0, IL size=593, code size=2228] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrfalseFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1043: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrfalseFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrtrueFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1044: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrtrueFar(System.Reflection.Emit.Label) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldarga_s(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr w2, [fp, #0x24] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x08] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1045: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldarga_s(int) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ceq():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1046: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ceq() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTimeoutCheckIfNeeded():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0x34] cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 1047: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTimeoutCheckIfNeeded() [Tier0, IL size=26, code size=96] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunnerFactory:.ctor(System.Reflection.Emit.DynamicMethod,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #16 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 1048: JIT compiled System.Text.RegularExpressions.CompiledRegexRunnerFactory:.ctor(System.Reflection.Emit.DynamicMethod,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo) [Tier0, IL size=28, code size=104] ; Assembly listing for method System.Text.RegularExpressions.RegexRunnerFactory:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1049: JIT compiled System.Text.RegularExpressions.RegexRunnerFactory:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.Regex:Replace(System.String,System.String):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str x1, [fp, #0x60] str x2, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x60] cbnz x0, G_M000_IG03 mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x68] str x0, [fp, #0x50] ldr x0, [fp, #0x60] str x0, [fp, #0x48] ldr x0, [fp, #0x58] str x0, [fp, #0x40] movn w0, #0 str w0, [fp, #0x3C] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x50] str x0, [fp, #0x30] ldr x0, [fp, #0x48] str x0, [fp, #0x28] ldr x0, [fp, #0x40] str x0, [fp, #0x20] ldr w0, [fp, #0x3C] str w0, [fp, #0x1C] str wzr, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x50] str x0, [fp, #0x30] ldr x0, [fp, #0x48] str x0, [fp, #0x28] ldr x0, [fp, #0x40] str x0, [fp, #0x20] ldr w0, [fp, #0x3C] str w0, [fp, #0x1C] ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] str w0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr w3, [fp, #0x1C] ldr w4, [fp, #0x18] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 264 1050: JIT compiled System.Text.RegularExpressions.Regex:Replace(System.String,System.String) [Tier0, IL size=36, code size=264] ; Assembly listing for method System.Text.RegularExpressions.Regex:get_RightToLeft():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x40] and w0, w0, #64 cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1051: JIT compiled System.Text.RegularExpressions.Regex:get_RightToLeft() [Tier0, IL size=13, code size=40] ; Assembly listing for method System.Text.RegularExpressions.Regex:Replace(System.String,System.String,int,int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str w3, [fp, #0x24] str w4, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x30] cbnz x0, G_M000_IG03 mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x28] cbnz x0, G_M000_IG04 mov w0, #13 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x5, [fp, #0x38] ldr w5, [x5, #0x40] ldr x2, [fp, #0x38] ldr x2, [x2, #0x18] ldr x3, [fp, #0x38] ldr w3, [x3, #0x44] ldr x4, [fp, #0x38] ldr x4, [x4, #0x20] ldr x1, [fp, #0x28] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] ldr w3, [fp, #0x24] ldr w4, [fp, #0x20] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] blr x5 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 244 1052: JIT compiled System.Text.RegularExpressions.Regex:Replace(System.String,System.String,int,int) [Tier0, IL size=66, code size=244] ; Assembly listing for method System.Text.RegularExpressions.Regex:get_RegexReplacementWeakReference():System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x30] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x38] ldrsb wzr, [x0] ldr x0, [fp, #0x38] add x0, x0, #48 str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x2, [fp, #0x20] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0x10] ldr x0, [fp, #0x10] str x0, [fp, #0x28] ldr x0, [fp, #0x10] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x38] ldr x0, [x0, #0x30] str x0, [fp, #0x28] G_M000_IG03: ldr x0, [fp, #0x28] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 212 1053: JIT compiled System.Text.RegularExpressions.Regex:get_RegexReplacementWeakReference() [Tier0, IL size=39, code size=212] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:GetOrCreate(System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement],System.String,System.Collections.Hashtable,int,System.Collections.Hashtable,int):System.Text.RegularExpressions.RegexReplacement ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str w3, [fp, #0x34] str x4, [fp, #0x28] str w5, [fp, #0x24] G_M000_IG02: add x1, fp, #24 ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x40] ldr w1, [fp, #0x24] ldr x2, [fp, #0x38] ldr w3, [fp, #0x34] ldr x4, [fp, #0x28] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str x0, [fp, #0x18] ldr x0, [fp, #0x48] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG04: ldr x0, [fp, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 232 1054: JIT compiled System.Text.RegularExpressions.RegexReplacement:GetOrCreate(System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement],System.String,System.Collections.Hashtable,int,System.Collections.Hashtable,int) [Tier0, IL size=46, code size=232] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ParseReplacement(System.String,int,System.Collections.Hashtable,int,System.Collections.Hashtable):System.Text.RegularExpressions.RegexReplacement ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp, #0xD1FFAB1E] add fp, sp, #0xD1FFAB1E movi v16.16b, #0 sub x9, fp, #0xD1FFAB1E sub x10, fp, #112 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x5, sp, #0xD1FFAB1E str x5, [fp, #-0x08] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E str x5, [fp, xip1] str x0, [fp, #-0x10] str w1, [fp, #-0x14] str x2, [fp, #-0x20] str w3, [fp, #-0x24] str x4, [fp, #-0x30] G_M000_IG02: ldr w0, [fp, #-0x14] and w0, w0, #0xD1FFAB1E cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movn xip1, #0xD1FFAB1E str x0, [fp, xip1] G_M000_IG04: movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] str x0, [fp, #-0x38] ldr x0, [fp, #-0x10] str x0, [fp, #-0xE8] ldr w0, [fp, #-0x14] str w0, [fp, #-0xEC] ldr x0, [fp, #-0x38] str x0, [fp, #-0xF8] ldr x0, [fp, #-0x20] str x0, [fp, #-0x100] ldr w0, [fp, #-0x24] movn xip1, #0xD1FFAB1E str w0, [fp, xip1] ldr x0, [fp, #-0x30] movn xip1, #0xD1FFAB1E str x0, [fp, xip1] stp xzr, xzr, [fp, #0xD1FFAB1E] sub x0, fp, #0xD1FFAB1E add sp, sp, #16 ldr wzr, [sp], #-0x80 sub sp, sp, #16 add x1, sp, #16 mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0xD1FFAB1E] G_M000_IG06: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [sp] sub x0, fp, #208 ldr x1, [fp, #-0xE8] ldr w2, [fp, #-0xEC] ldr x3, [fp, #-0xF8] ldr x4, [fp, #-0x100] movn xip1, #0xD1FFAB1E ldr w5, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x6, [fp, xip1] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG07: sub x0, fp, #208 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #-0xD8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST movn xip1, #0xD1FFAB1E str x0, [fp, xip1] movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] ldr x1, [fp, #-0x10] ldr x2, [fp, #-0xD8] ldr x3, [fp, #-0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] str x0, [fp, #-0xE0] ldr x0, [fp, #-0xE0] movn xip1, #0xD1FFAB1E str x0, [fp, xip1] b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #-0x08] bl G_M000_IG12 G_M000_IG09: nop G_M000_IG10: movn xip1, #0xD1FFAB1E ldr x0, [fp, xip1] movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 movn xip1, #0xD1FFAB1E ldr xip1, [fp, xip1] cmp xip0, xip1 beq G_M000_IG11 bl CORINFO_HELP_FAIL_FAST G_M000_IG11: sub sp, fp, #0xD1FFAB1E ldp fp, lr, [sp, #0xD1FFAB1E] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG12: sub sp, sp, #48 stp fp, lr, [sp, #0x20] add x3, fp, #16 str x3, [sp, #0x18] G_M000_IG13: sub x0, fp, #208 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG14: ldp fp, lr, [sp, #0x20] add sp, sp, #48 ret lr ; Total bytes of code 608 1055: JIT compiled System.Text.RegularExpressions.RegexParser:ParseReplacement(System.String,int,System.Collections.Hashtable,int,System.Collections.Hashtable) [Tier0, IL size=112, code size=608] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanReplacement():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x38] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x2, [fp, #0x38] ldr w2, [x2, #0x70] ldr x0, [fp, #0x20] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, #0xD1FFAB1E str w0, [fp, #0x18] G_M000_IG03: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #24 mov w1, #19 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x34] ldr w0, [fp, #0x34] cbz w0, G_M000_IG12 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x30] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x34] sub w0, w0, #1 str w0, [fp, #0x34] G_M000_IG07: ldr w0, [fp, #0x34] cmp w0, #0 ble G_M000_IG10 ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #24 mov w1, #52 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #36 bne G_M000_IG06 G_M000_IG10: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w2, [fp, #0x30] sub w2, w0, w2 str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr w1, [fp, #0x30] ldr x0, [fp, #0x38] mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w0, [fp, #0x34] cmp w0, #0 ble G_M000_IG03 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #36 bne G_M000_IG11 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x38] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG03 G_M000_IG12: ldr x0, [fp, #0x38] ldr x0, [x0, #0x18] G_M000_IG13: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 536 1056: JIT compiled System.Text.RegularExpressions.RegexParser:ScanReplacement() [Tier0, IL size=121, code size=536] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:.ctor(System.String,System.Text.RegularExpressions.RegexNode,System.Collections.Hashtable):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 7 inlinees with PGO data; 37 single block inlinees; 20 inlinees without PGO data G_M000_IG01: sub sp, sp, #240 stp x19, x20, [sp, #0x98] stp x21, x22, [sp, #0xA8] stp x23, x24, [sp, #0xB8] stp x25, x26, [sp, #0xC8] str x27, [sp, #0xD8] stp fp, lr, [sp, #0xE0] add fp, sp, #224 sub x9, fp, #216 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #-0xE0] mov x21, x0 mov x22, x1 mov x19, x2 mov x20, x3 G_M000_IG02: ldp x0, xzr, [sp], #0xD1FFAB1E mov x0, sp str xzr, [fp, #-0x68] str x0, [fp, #-0x58] mov w0, #0xD1FFAB1E str w0, [fp, #-0x50] str wzr, [fp, #-0x60] sub x0, fp, #136 str x0, [fp, #-0x98] mov w0, #4 str w0, [fp, #-0x90] str xzr, [fp, #-0xA8] str wzr, [fp, #-0xA0] ldr wzr, [sp], #-0x100 mov x0, sp str x0, [fp, #-0xB8] mov w0, #64 str w0, [fp, #-0xB0] str xzr, [fp, #-0xC8] str wzr, [fp, #-0xC0] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w23, w0 mov w24, wzr cmp w23, #0 ble G_M000_IG28 G_M000_IG03: ldr x25, [x19, #0x08] cbz x25, G_M000_IG05 G_M000_IG04: ldr x0, [x25] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG09 G_M000_IG05: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG08 G_M000_IG06: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG08 G_M000_IG07: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG08: ldr w0, [x2, #0x10] cmp w24, w0 bhs G_M000_IG46 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG50 add x0, x0, #16 ldr x26, [x0, w24, UXTW #3] b G_M000_IG10 G_M000_IG09: mov x26, x25 G_M000_IG10: ldrb w0, [x26, #0x2E] sub w25, w0, #9 cmp w25, #4 bhi G_M000_IG27 mov w1, w25 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG11: ldr x26, [x26, #0x10] cbz x26, G_M000_IG27 ldr w1, [fp, #-0x60] ldr w27, [x26, #0x08] cmp w27, #1 bne G_M000_IG12 ldr w0, [fp, #-0x50] cmp w1, w0 bhs G_M000_IG12 ldr w0, [fp, #-0x50] cmp w1, w0 bhs G_M000_IG50 ldr x0, [fp, #-0x58] ubfiz x2, x1, #1, #32 add x0, x0, x2 ldrh w2, [x26, #0x0C] strh w2, [x0] add w1, w1, #1 str w1, [fp, #-0x60] b G_M000_IG27 G_M000_IG12: ldr w25, [fp, #-0x60] ldr w1, [fp, #-0x50] sub w1, w1, w27 cmp w1, w25 bge G_M000_IG13 mov w1, w27 sub x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: ldr w2, [fp, #-0x50] cmp w25, w2 bhi G_M000_IG49 ldr x0, [fp, #-0x58] ubfiz x1, x25, #1, #32 add x0, x0, x1 sub w2, w2, w25 cmp w27, w2 bhi G_M000_IG47 add x1, x26, #12 mov w2, w27 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #-0x60] add w0, w0, w27 str w0, [fp, #-0x60] b G_M000_IG27 G_M000_IG14: ldrh w1, [x26, #0x2C] ldr w0, [fp, #-0x60] ldr x2, [fp, #-0x58] ldr w3, [fp, #-0x50] cmp w0, w3 bhs G_M000_IG15 strh w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0x60] b G_M000_IG27 G_M000_IG15: sub x0, fp, #104 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG27 G_M000_IG16: ldr w0, [fp, #-0x60] cmp w0, #0 ble G_M000_IG21 ldr w1, [fp, #-0xA0] ldr w0, [fp, #-0xC0] ldr x2, [fp, #-0xB8] ldr w3, [fp, #-0xB0] cmp w0, w3 bhs G_M000_IG17 str w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0xC0] b G_M000_IG18 G_M000_IG17: sub x0, fp, #200 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG18: ldr w0, [fp, #-0x60] ldr w1, [fp, #-0x50] cmp w0, w1 bhi G_M000_IG49 ldr x1, [fp, #-0x58] str x1, [fp, #-0xD8] str w0, [fp, #-0xD0] sub x0, fp, #216 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x2, x0 ldr w0, [fp, #-0xA0] ldr x14, [fp, #-0x98] ldr w15, [fp, #-0x90] cmp w0, w15 bhs G_M000_IG19 add x14, x14, x0, LSL #3 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF add w0, w0, #1 str w0, [fp, #-0xA0] b G_M000_IG20 G_M000_IG19: sub x0, fp, #168 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG20: str wzr, [fp, #-0x60] G_M000_IG21: ldr w25, [x26, #0x20] cbz x20, G_M000_IG24 tbnz w25, #31, G_M000_IG24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str w25, [x0, #0x08] mov x1, x0 mov x0, x20 ldr x2, [x20] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 mov x25, x0 ldr x1, [x25] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x1, x0 beq G_M000_IG23 G_M000_IG22: mov x1, x25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG23: ldr w25, [x25, #0x08] G_M000_IG24: neg w0, w25 sub w1, w0, #5 ldr w0, [fp, #-0xC0] ldr x2, [fp, #-0xB8] ldr w3, [fp, #-0xB0] cmp w0, w3 bhs G_M000_IG25 str w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0xC0] b G_M000_IG26 G_M000_IG25: sub x0, fp, #200 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG26: mov w0, #1 strb w0, [x21, #0x20] G_M000_IG27: add w24, w24, #1 cmp w24, w23 blt G_M000_IG03 G_M000_IG28: ldr w0, [fp, #-0x60] cmp w0, #0 ble G_M000_IG31 G_M000_IG29: ldr w1, [fp, #-0xA0] ldr w0, [fp, #-0xC0] ldr x2, [fp, #-0xB8] ldr w3, [fp, #-0xB0] cmp w0, w3 bhs G_M000_IG41 str w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0xC0] G_M000_IG30: sub x0, fp, #104 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x2, x0 ldr w0, [fp, #-0xA0] ldr x14, [fp, #-0x98] ldr w15, [fp, #-0x90] cmp w0, w15 bhs G_M000_IG42 add x14, x14, x0, LSL #3 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF add w0, w0, #1 str w0, [fp, #-0xA0] G_M000_IG31: ldr x1, [fp, #-0x68] stp xzr, xzr, [fp, #-0x68] stp xzr, xzr, [fp, #-0x58] cbz x1, G_M000_IG33 G_M000_IG32: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG33: add x14, x21, #24 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF ldr w25, [fp, #-0xA0] ldr w0, [fp, #-0x90] cmp w25, w0 bhi G_M000_IG49 ldr x26, [fp, #-0x98] cbnz w25, G_M000_IG43 G_M000_IG34: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #62 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x15, [x1] G_M000_IG35: add x14, x21, #8 bl CORINFO_HELP_ASSIGN_REF ldr w20, [fp, #-0xC0] ldr w0, [fp, #-0xB0] cmp w20, w0 bhi G_M000_IG49 ldr x19, [fp, #-0xB8] cbnz w20, G_M000_IG45 G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #63 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x15, [x1] G_M000_IG37: add x14, x21, #16 bl CORINFO_HELP_ASSIGN_REF ldr x21, [fp, #-0xC8] cbz x21, G_M000_IG39 G_M000_IG38: str xzr, [fp, #-0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x21 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG39: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0xE0] cmp xip0, xip1 beq G_M000_IG40 bl CORINFO_HELP_FAIL_FAST G_M000_IG40: sub sp, fp, #224 ldp fp, lr, [sp, #0xE0] ldr x27, [sp, #0xD8] ldp x25, x26, [sp, #0xC8] ldp x23, x24, [sp, #0xB8] ldp x21, x22, [sp, #0xA8] ldp x19, x20, [sp, #0x98] add sp, sp, #240 ret lr G_M000_IG41: sub x0, fp, #200 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG30 G_M000_IG42: sub x0, fp, #168 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG43: sxtw x1, w25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ mov x27, x0 add x0, x27, #16 mov x1, x26 mov w2, w25 lsl x2, x2, #3 cmp x2, #4, LSL #12 bhi G_M000_IG48 bl System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) G_M000_IG44: mov x15, x27 b G_M000_IG35 G_M000_IG45: sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 add x0, x22, #16 mov w2, w20 lsl x2, x2, #2 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x15, x22 b G_M000_IG37 G_M000_IG46: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG48: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG44 G_M000_IG49: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG50: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 ; Total bytes of code 1868 1057: JIT compiled System.Text.RegularExpressions.RegexReplacement:.ctor(System.String,System.Text.RegularExpressions.RegexNode,System.Collections.Hashtable) [Tier-0 switched to FullOpts, IL size=436, code size=1868] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] add x0, x0, #120 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1058: JIT compiled System.Text.RegularExpressions.RegexParser:Dispose() [Tier0, IL size=12, code size=56] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[int]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbz x0, G_M000_IG03 ldr x0, [fp, #0x28] str xzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] mov w2, wzr ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 1059: JIT compiled System.Collections.Generic.ValueListBuilder`1[int]:Dispose() [Tier0, IL size=30, code size=112] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:Replace(System.Text.RegularExpressions.Regex,System.String,int,int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp, #0x08] add fp, sp, #8 movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] str w4, [fp, #0xD1FFAB1E] G_M000_IG02: ldr w0, [fp, #0xD1FFAB1E] cmn w0, #1 bge G_M000_IG03 mov w0, #3 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] ldr w1, [fp, #0xD1FFAB1E] cmp w0, w1 bhs G_M000_IG04 mov w0, #14 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG05: ldp fp, lr, [sp, #0x08] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] str w3, [sp] ldr x3, [fp, #0xD1FFAB1E] ldr x4, [fp, #0xD1FFAB1E] ldr x5, [fp, #0xD1FFAB1E] ldr x6, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr x2, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w7, wzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB0] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xAC] add x0, fp, #0xD1FFAB1E str x0, [fp, #0xA0] ldr x0, [fp, #0xC0] str x0, [fp, #0x98] ldr x0, [fp, #0xC0] cbnz x0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] str x0, [fp, #0x98] G_M000_IG07: ldr x0, [fp, #0xB8] str x0, [fp, #0x90] ldr x0, [fp, #0xB0] str x0, [fp, #0x88] ldr w0, [fp, #0xAC] str w0, [fp, #0x84] ldr x0, [fp, #0xA0] str x0, [fp, #0x78] ldr x0, [fp, #0x98] str x0, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x20] cbnz w0, G_M000_IG08 ldr x0, [fp, #0x90] str x0, [fp, #0x68] ldr x0, [fp, #0x88] str x0, [fp, #0x60] ldr w0, [fp, #0x84] str w0, [fp, #0x5C] ldr x0, [fp, #0x78] str x0, [fp, #0x50] ldr x0, [fp, #0x70] str x0, [fp, #0x48] mov w0, #1 str w0, [fp, #0x44] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x90] str x0, [fp, #0x68] ldr x0, [fp, #0x88] str x0, [fp, #0x60] ldr w0, [fp, #0x84] str w0, [fp, #0x5C] ldr x0, [fp, #0x78] str x0, [fp, #0x50] ldr x0, [fp, #0x70] str x0, [fp, #0x48] mov w0, #2 str w0, [fp, #0x44] G_M000_IG09: ldr x0, [fp, #0x68] ldr w6, [fp, #0x44] ldr x2, [fp, #0x60] ldr w3, [fp, #0x5C] ldr x4, [fp, #0x50] ldr x5, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w7, #1 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] ldr wzr, [x0] blr x8 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG10: ldp fp, lr, [sp, #0x08] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG11: add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] str x1, [fp, #0x38] ldr x1, [fp, #0x30] ldr x2, [fp, #0x38] add x0, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG18 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x08] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #77 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0xC8] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xC8] str x0, [fp, #0xD1FFAB1E] G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrb w0, [x0, #0x20] cbnz w0, G_M000_IG14 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] mov w0, #1 str w0, [fp, #0xF4] b G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] mov w0, #2 str w0, [fp, #0xF4] G_M000_IG15: ldr x0, [fp, #0xD1FFAB1E] ldr w6, [fp, #0xF4] ldr x2, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] ldr x4, [fp, #0xD1FFAB1E] ldr x5, [fp, #0xF8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w7, #1 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] ldr wzr, [x0] blr x8 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG17 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG16: ldp fp, lr, [sp, #0x08] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG17: add x0, fp, #0xD1FFAB1E ldr w2, [fp, #0xD1FFAB1E] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xE0] str x1, [fp, #0xE8] ldr x1, [fp, #0xE0] ldr x2, [fp, #0xE8] add x0, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD0] str x1, [fp, #0xD8] ldr x0, [fp, #0xD0] ldr x1, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG18: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG19: ldp fp, lr, [sp, #0x08] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 1596 1060: JIT compiled System.Text.RegularExpressions.RegexReplacement:Replace(System.Text.RegularExpressions.Regex,System.String,int,int) [Tier0, IL size=320, code size=1596] ; Assembly listing for method System.Text.SegmentStringBuilder:Create():System.Text.SegmentStringBuilder ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: stp xzr, xzr, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1061: JIT compiled System.Text.SegmentStringBuilder:Create() [Tier0, IL size=22, code size=56] ; Assembly listing for method System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]:.ctor(System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x28] str x4, [fp, #0x30] str x5, [fp, #0x18] str x6, [fp, #0x20] str w7, [fp, #0x14] G_M000_IG02: ldr x14, [fp, #0x48] ldr x15, [fp, #0x38] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x48] add x14, x14, #16 add x13, fp, #40 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x14, [fp, #0x48] add x14, x14, #32 add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x48] ldr w1, [fp, #0x14] str w1, [x0, #0x08] ldr x0, [fp, #0x48] ldr w1, [fp, #0x50] str w1, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 132 1062: JIT compiled System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]:.ctor(System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int) [Tier0, IL size=38, code size=132] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1063: JIT compiled System.Text.RegularExpressions.RegexReplacement+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1064: JIT compiled System.Text.RegularExpressions.RegexReplacement+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #128 stp fp, lr, [sp, #0x10] add fp, sp, #16 str xzr, [fp, #0x20] str x1, [fp, #0x68] str x0, [fp, #0x60] str x1, [fp, #0x58] str x2, [fp, #0x50] str w3, [fp, #0x4C] str x4, [fp, #0x40] str x5, [fp, #0x38] str w6, [fp, #0x34] str w7, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x58] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 G_M000_IG03: ldr x3, [fp, #0x58] ldr x3, [x3, #0x10] ldr x3, [x3, #0x10] str x3, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD str x0, [fp, #0x18] G_M000_IG05: ldr w3, [fp, #0x34] str w3, [sp] ldr w3, [fp, #0x30] uxtb w3, w3 str w3, [sp, #0x08] ldr x3, [fp, #0x20] ldr x4, [fp, #0x28] ldr x0, [fp, #0x60] ldr x1, [fp, #0x18] ldr x2, [fp, #0x50] ldr w5, [fp, #0x4C] ldr x6, [fp, #0x40] ldr x7, [fp, #0x38] movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 G_M000_IG06: ldp fp, lr, [sp, #0x10] add sp, sp, #128 ret lr ; Total bytes of code 228 1065: JIT compiled System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool) [Tier0, IL size=22, code size=228] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x38] str xzr, [fp, #0x28] str xzr, [fp, #0x20] add x8, sp, #160 str x8, [fp, #0x98] str x1, [fp, #0x90] str x0, [fp, #0x88] str x1, [fp, #0x80] str x2, [fp, #0x78] str x3, [fp, #0x68] str x4, [fp, #0x70] str w5, [fp, #0x64] str x6, [fp, #0x58] str x7, [fp, #0x50] G_M000_IG02: ldr x1, [fp, #0x88] ldrsb wzr, [x1] ldr x1, [fp, #0x88] add x1, x1, #56 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x20] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] G_M000_IG03: ldr x14, [fp, #0x20] str x14, [fp, #0x48] G_M000_IG04: ldr x14, [fp, #0x48] add x14, x14, #8 ldr x15, [fp, #0x78] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x88] ldr x1, [x1, #0x48] ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w0, [fp, #0x64] str w0, [fp, #0x44] G_M000_IG05: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #16 mov w1, #44 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x2, [fp, #0x68] ldr x3, [fp, #0x70] ldr x0, [fp, #0x48] ldr x1, [fp, #0x88] ldr w4, [fp, #0x64] ldr w5, [fp, #0xA0] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 ldr x5, [fp, #0x48] ldr w6, [fp, #0x44] str w6, [x5, #0x4C] ldr x5, [fp, #0x68] ldr x6, [fp, #0x70] ldr w1, [fp, #0xA8] uxtb w1, w1 ldr w0, [fp, #0xA0] ldr x2, [fp, #0x78] ldr x4, [fp, #0x48] mov w3, wzr mov w7, wzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 str x0, [fp, #0x38] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG08 b G_M000_IG14 G_M000_IG08: ldr w0, [fp, #0xA8] uxtb w0, w0 cbnz w0, G_M000_IG09 ldr x0, [fp, #0x48] str xzr, [x0, #0x28] G_M000_IG09: ldr x0, [fp, #0x50] ldr x0, [x0, #0x08] ldr x1, [fp, #0x58] ldr x2, [fp, #0x38] ldr x3, [fp, #0x50] ldr x3, [x3, #0x18] blr x3 cbnz w0, G_M000_IG10 b G_M000_IG16 G_M000_IG10: ldr x0, [fp, #0x48] ldr w0, [x0, #0x4C] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] str w0, [fp, #0x64] ldr w0, [fp, #0x1C] str w0, [fp, #0x44] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG13 ldr w0, [fp, #0x70] str w0, [fp, #0x34] mov w0, #1 str w0, [fp, #0x30] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG11 str wzr, [fp, #0x34] movn w14, #0 str w14, [fp, #0x30] G_M000_IG11: ldr w14, [fp, #0x44] ldr w15, [fp, #0x34] cmp w14, w15 bne G_M000_IG12 b G_M000_IG18 G_M000_IG12: ldr w14, [fp, #0x44] ldr w15, [fp, #0x30] add w14, w14, w15 str w14, [fp, #0x44] G_M000_IG13: ldr x14, [fp, #0x48] ldr x14, [x14, #0x10] ldr w14, [x14, #0x08] ldr x15, [fp, #0x48] str w14, [x15, #0x50] ldr x14, [fp, #0x48] ldr x14, [x14, #0x18] ldr w14, [x14, #0x08] ldr x15, [fp, #0x48] str w14, [x15, #0x54] ldr x14, [fp, #0x48] ldr x14, [x14, #0x20] ldr w14, [x14, #0x08] ldr x15, [fp, #0x48] str w14, [x15, #0x58] b G_M000_IG05 G_M000_IG14: ldr x0, [fp, #0x98] bl G_M000_IG21 G_M000_IG15: b G_M000_IG20 G_M000_IG16: ldr x0, [fp, #0x98] bl G_M000_IG21 G_M000_IG17: b G_M000_IG20 G_M000_IG18: ldr x0, [fp, #0x98] bl G_M000_IG21 G_M000_IG19: nop G_M000_IG20: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG21: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG22: ldr x14, [fp, #0x48] str xzr, [x14, #0x08] ldr x14, [fp, #0x88] add x14, x14, #56 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF G_M000_IG23: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 796 1066: JIT compiled System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool) [Tier0, IL size=233, code size=796] ; Assembly listing for method System.Text.RegularExpressions.Regex:CreateRunner():System.Text.RegularExpressions.RegexRunner:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 1067: JIT compiled System.Text.RegularExpressions.Regex:CreateRunner() [Tier0, IL size=12, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunnerFactory:CreateInstance():System.Text.RegularExpressions.RegexRunner:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x28] cbnz x0, G_M000_IG03 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x10] ldr x14, [fp, #0x10] str x14, [fp, #0x30] ldr x14, [fp, #0x38] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] str x0, [fp, #0x20] G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x38] ldr x2, [x2, #0x10] ldr x3, [fp, #0x38] ldr x3, [x3, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 212 1068: JIT compiled System.Text.RegularExpressions.CompiledRegexRunnerFactory:CreateInstance() [Tier0, IL size=48, code size=212] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:.ctor(System.Text.RegularExpressions.CompiledRegexRunner+ScanDelegate,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #112 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #120 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #128 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 1069: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:.ctor(System.Text.RegularExpressions.CompiledRegexRunner+ScanDelegate,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo) [Tier0, IL size=28, code size=104] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1070: JIT compiled System.Text.RegularExpressions.RegexRunner:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitializeTimeout(System.TimeSpan):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] strb wzr, [x0, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 1071: JIT compiled System.Text.RegularExpressions.RegexRunner:InitializeTimeout(System.TimeSpan) [Tier0, IL size=28, code size=104] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitializeForScan(System.Text.RegularExpressions.Regex,System.ReadOnlySpan`1[ushort],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x78] str x1, [fp, #0x70] str x2, [fp, #0x60] str x3, [fp, #0x68] str w4, [fp, #0x5C] str w5, [fp, #0x58] G_M000_IG02: ldr x14, [fp, #0x78] ldr w15, [fp, #0x58] str w15, [x14, #0x60] ldr x14, [fp, #0x78] add x14, x14, #48 ldr x15, [fp, #0x70] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] ldr w1, [fp, #0x5C] str w1, [x0, #0x48] ldr x0, [fp, #0x78] str wzr, [x0, #0x40] ldr x0, [fp, #0x78] ldr w1, [fp, #0x68] str w1, [x0, #0x44] ldr x0, [fp, #0x78] ldr w1, [fp, #0x5C] str w1, [x0, #0x4C] ldr x0, [fp, #0x78] ldr x0, [x0, #0x28] str x0, [fp, #0x50] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG05 ldr x0, [fp, #0x78] str x0, [fp, #0x38] ldr x0, [fp, #0x78] ldr x0, [x0, #0x30] ldr x0, [x0, #0x18] cbz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x2, [fp, #0x78] ldr x2, [x2, #0x30] ldr x2, [x2, #0x18] ldr x3, [fp, #0x78] ldr x3, [x3, #0x30] ldr w3, [x3, #0x44] ldr x4, [fp, #0x78] ldr x4, [x4, #0x08] ldr x1, [fp, #0x78] ldr x1, [x1, #0x30] ldr x0, [fp, #0x18] ldr w5, [fp, #0x68] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x38] str x0, [fp, #0x28] ldr x0, [fp, #0x18] str x0, [fp, #0x20] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x2, [fp, #0x78] ldr x2, [x2, #0x30] ldr w2, [x2, #0x44] ldr x1, [fp, #0x78] ldr x1, [x1, #0x30] ldr x3, [fp, #0x78] ldr x3, [x3, #0x08] ldr x0, [fp, #0x30] ldr w4, [fp, #0x68] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0x38] str x14, [fp, #0x28] ldr x14, [fp, #0x30] str x14, [fp, #0x20] G_M000_IG04: ldr x14, [fp, #0x28] add x14, x14, #40 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF b G_M000_IG06 G_M000_IG05: ldr x1, [fp, #0x78] ldr x1, [x1, #0x08] ldr x0, [fp, #0x50] ldr w2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG06: ldr x0, [fp, #0x78] ldr x0, [x0, #0x20] cbz x0, G_M000_IG08 ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] ldr w0, [x0, #0x08] ldr x1, [fp, #0x78] str w0, [x1, #0x50] ldr x0, [fp, #0x78] ldr x0, [x0, #0x18] ldr w0, [x0, #0x08] ldr x1, [fp, #0x78] str w0, [x1, #0x54] ldr x0, [fp, #0x78] ldr x0, [x0, #0x20] ldr w0, [x0, #0x08] ldr x1, [fp, #0x78] str w0, [x1, #0x58] G_M000_IG07: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG08: ldr x0, [fp, #0x78] ldr x1, [fp, #0x78] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 ldr x1, [fp, #0x78] ldr w1, [x1, #0x5C] lsl w1, w1, #3 str w1, [fp, #0x44] ldr w1, [fp, #0x44] str w1, [fp, #0x4C] ldr w1, [fp, #0x44] str w1, [fp, #0x48] ldr w1, [fp, #0x48] cmp w1, #32 bge G_M000_IG09 mov w1, #32 str w1, [fp, #0x48] G_M000_IG09: ldr w1, [fp, #0x4C] cmp w1, #16 bge G_M000_IG10 mov w1, #16 str w1, [fp, #0x4C] G_M000_IG10: ldr w1, [fp, #0x48] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x78] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x78] ldr w0, [fp, #0x48] str w0, [x1, #0x50] ldr w1, [fp, #0x4C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x78] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] ldr w1, [fp, #0x4C] str w1, [x0, #0x54] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x78] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x78] mov w1, #32 str w1, [x0, #0x58] G_M000_IG11: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 760 1072: JIT compiled System.Text.RegularExpressions.RegexRunner:InitializeForScan(System.Text.RegularExpressions.Regex,System.ReadOnlySpan`1[ushort],int,int) [Tier0, IL size=326, code size=760] ; Assembly listing for method System.Text.RegularExpressions.Match:.ctor(System.Text.RegularExpressions.Regex,int,System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] str x3, [fp, #0x20] str w4, [fp, #0x1C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x20] ldr x0, [fp, #0x38] mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0x38] add x14, x14, #64 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0x2C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x38] add x14, x14, #80 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0x2C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ ldr x14, [fp, #0x38] add x14, x14, #72 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x38] ldr x0, [x0, #0x48] ldr x2, [fp, #0x38] ldr x2, [x2, #0x18] mov x1, xzr bl CORINFO_HELP_ARRADDR_ST ldr x0, [fp, #0x38] ldr w1, [fp, #0x1C] str w1, [x0, #0x5C] ldr x0, [fp, #0x38] strb wzr, [x0, #0x60] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 252 1073: JIT compiled System.Text.RegularExpressions.Match:.ctor(System.Text.RegularExpressions.Regex,int,System.String,int) [Tier0, IL size=80, code size=252] ; Assembly listing for method System.Text.RegularExpressions.Group:.ctor(System.String,int[],int,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x88] str x1, [fp, #0x80] str x2, [fp, #0x78] str w3, [fp, #0x74] str x4, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x88] str x0, [fp, #0x60] ldr x0, [fp, #0x80] str x0, [fp, #0x58] ldr w0, [fp, #0x74] cbz w0, G_M000_IG03 ldr x0, [fp, #0x60] str x0, [fp, #0x50] ldr x0, [fp, #0x58] str x0, [fp, #0x48] ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] lsl w1, w1, #1 sub w1, w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0x44] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x60] str x0, [fp, #0x50] ldr x0, [fp, #0x58] str x0, [fp, #0x48] str wzr, [fp, #0x44] G_M000_IG04: ldr x0, [fp, #0x50] str x0, [fp, #0x38] ldr x0, [fp, #0x48] str x0, [fp, #0x30] ldr w0, [fp, #0x44] str w0, [fp, #0x2C] ldr w0, [fp, #0x74] cbz w0, G_M000_IG05 ldr x0, [fp, #0x38] str x0, [fp, #0x20] ldr x0, [fp, #0x30] str x0, [fp, #0x18] ldr w0, [fp, #0x2C] str w0, [fp, #0x14] ldr x0, [fp, #0x78] ldr w1, [fp, #0x74] lsl w1, w1, #1 sub w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0x10] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x38] str x0, [fp, #0x20] ldr x0, [fp, #0x30] str x0, [fp, #0x18] ldr w0, [fp, #0x2C] str w0, [fp, #0x14] str wzr, [fp, #0x10] G_M000_IG06: ldr x0, [fp, #0x20] ldr x1, [fp, #0x18] ldr w2, [fp, #0x14] ldr w3, [fp, #0x10] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x14, [fp, #0x88] add x14, x14, #24 ldr x15, [fp, #0x78] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x88] ldr w15, [fp, #0x74] str w15, [x14, #0x30] ldr x14, [fp, #0x88] add x14, x14, #40 ldr x15, [fp, #0x68] bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 384 1074: JIT compiled System.Text.RegularExpressions.Group:.ctor(System.String,int[],int,System.String) [Tier0, IL size=56, code size=384] ; Assembly listing for method System.Text.RegularExpressions.Capture:.ctor(System.String,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 140 1075: JIT compiled System.Text.RegularExpressions.Capture:.ctor(System.String,int,int) [Tier0, IL size=28, code size=140] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Text(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1076: JIT compiled System.Text.RegularExpressions.Capture:set_Text(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Index(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1077: JIT compiled System.Text.RegularExpressions.Capture:set_Index(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Length(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1078: JIT compiled System.Text.RegularExpressions.Capture:set_Length(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitTrackCount():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 1079: JIT compiled System.Text.RegularExpressions.RegexRunner:InitTrackCount() [Tier0, IL size=1, code size=20] ; Assembly listing for method System.Text.RegularExpressions.Regex:ScanInternal(int,bool,System.String,int,System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort],bool):System.Text.RegularExpressions.Match ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x10] str w0, [fp, #0x4C] str w1, [fp, #0x48] str x2, [fp, #0x40] str w3, [fp, #0x3C] str x4, [fp, #0x30] str x5, [fp, #0x20] str x6, [fp, #0x28] str w7, [fp, #0x1C] G_M000_IG02: ldr x1, [fp, #0x20] ldr x2, [fp, #0x28] ldr x0, [fp, #0x30] ldr x3, [fp, #0x30] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x0, [fp, #0x30] ldr x0, [x0, #0x28] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG07 ldr w0, [fp, #0x48] uxtb w0, w0 cbnz w0, G_M000_IG03 ldr x0, [fp, #0x10] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x30] str xzr, [x0, #0x28] b G_M000_IG05 G_M000_IG03: ldr w0, [fp, #0x1C] uxtb w0, w0 cbz w0, G_M000_IG05 ldr x0, [fp, #0x10] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, xzr G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: ldr x1, [fp, #0x30] ldr w1, [x1, #0x4C] ldr x0, [fp, #0x10] ldr w2, [fp, #0x3C] ldr w3, [fp, #0x4C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 ldr x0, [fp, #0x10] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: ldr x0, [fp, #0x10] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 348 1080: JIT compiled System.Text.RegularExpressions.Regex:ScanInternal(int,bool,System.String,int,System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort],bool) [Tier0, IL size=88, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Scan(System.ReadOnlySpan`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x2, [fp, #0x18] ldr x3, [fp, #0x20] ldr x0, [fp, #0x28] ldr x0, [x0, #0x70] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x28] ldr x4, [fp, #0x10] ldr x4, [x4, #0x18] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 76 1081: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Scan(System.ReadOnlySpan`1[ushort]) [Tier0, IL size=14, code size=76] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1082: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1083: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1084: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.Match:AddMatch(int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str x0, [fp, #0x78] str w1, [fp, #0x74] str w2, [fp, #0x70] str w3, [fp, #0x6C] G_M000_IG02: ldr x0, [fp, #0x78] ldr x0, [x0, #0x48] str x0, [fp, #0x48] ldr w0, [fp, #0x74] str w0, [fp, #0x44] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr w1, [fp, #0x44] sxtw x1, w1 ldr x0, [fp, #0x48] bl CORINFO_HELP_ARRADDR_ST G_M000_IG03: ldr x1, [fp, #0x78] ldr x1, [x1, #0x48] str x1, [fp, #0x60] ldr x1, [fp, #0x78] ldr x1, [x1, #0x50] str x1, [fp, #0x58] ldr x1, [fp, #0x58] ldr w0, [fp, #0x74] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] str w1, [fp, #0x54] ldr x1, [fp, #0x60] ldr w0, [fp, #0x74] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 add x1, x1, x0, LSL #3 add x1, x1, #16 ldr x1, [x1] ldr w1, [x1, #0x08] ldr w0, [fp, #0x54] lsl w0, w0, #1 add w0, w0, #2 cmp w1, w0 bge G_M000_IG08 ldr x1, [fp, #0x60] ldr w0, [fp, #0x74] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 add x1, x1, x0, LSL #3 add x1, x1, #16 ldr x1, [x1] str x1, [fp, #0x38] ldr w1, [fp, #0x54] lsl w1, w1, #3 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x30] str wzr, [fp, #0x2C] b G_M000_IG05 G_M000_IG04: ldr x1, [fp, #0x38] ldr w0, [fp, #0x2C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] str w1, [fp, #0x28] ldr x1, [fp, #0x30] ldr w0, [fp, #0x2C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w0, [fp, #0x28] str w0, [x1] ldr w1, [fp, #0x2C] add w1, w1, #1 str w1, [fp, #0x2C] G_M000_IG05: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #32 mov w1, #92 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w1, [fp, #0x2C] ldr w0, [fp, #0x54] lsl w0, w0, #1 cmp w1, w0 blt G_M000_IG04 ldr w1, [fp, #0x74] sxtw x1, w1 ldr x0, [fp, #0x60] ldr x2, [fp, #0x30] bl CORINFO_HELP_ARRADDR_ST G_M000_IG08: ldr x0, [fp, #0x60] ldr w1, [fp, #0x74] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] ldr w1, [fp, #0x54] lsl w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x70] str w1, [x0] ldr x0, [fp, #0x60] ldr w1, [fp, #0x74] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] ldr w1, [fp, #0x54] lsl w1, w1, #1 add w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x6C] str w1, [x0] ldr x0, [fp, #0x58] ldr w1, [fp, #0x74] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x54] add w1, w1, #1 str w1, [x0] G_M000_IG09: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 700 1085: JIT compiled System.Text.RegularExpressions.Match:AddMatch(int,int,int) [Tier0, IL size=129, code size=700] ; Assembly listing for method System.Text.RegularExpressions.Match:get_FoundMatch():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x50] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] cmp w0, #0 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 72 1086: JIT compiled System.Text.RegularExpressions.Match:get_FoundMatch() [Tier0, IL size=12, code size=72] ; Assembly listing for method System.Text.RegularExpressions.Match:Tidy(int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str w1, [fp, #0x64] str w2, [fp, #0x60] str w3, [fp, #0x5C] G_M000_IG02: ldr x1, [fp, #0x68] ldr x1, [x1, #0x50] str x1, [fp, #0x50] ldr x1, [fp, #0x50] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0x68] str w1, [x0, #0x30] ldr x1, [fp, #0x68] ldr w0, [fp, #0x60] str w0, [x1, #0x34] ldr w1, [fp, #0x60] ldr w0, [fp, #0x64] add w1, w1, w0 ldr x0, [fp, #0x68] str w1, [x0, #0x58] ldr x1, [fp, #0x68] ldr w1, [x1, #0x5C] ldr w0, [fp, #0x60] add w1, w1, w0 ldr x0, [fp, #0x68] str w1, [x0, #0x5C] ldr x1, [fp, #0x68] ldr x1, [x1, #0x48] str x1, [fp, #0x48] ldr x1, [fp, #0x48] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #3 add x1, x1, #16 ldr x1, [x1] str x1, [fp, #0x40] ldr x1, [fp, #0x40] mov w0, #1 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x40] mov w0, wzr ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG14 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr w0, [fp, #0x60] add w1, w1, w0 ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x5C] cmp w0, #2 bne G_M000_IG13 ldr x0, [fp, #0x68] ldrb w0, [x0, #0x60] cbz w0, G_M000_IG03 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x60] cbz w0, G_M000_IG13 str wzr, [fp, #0x3C] b G_M000_IG10 G_M000_IG04: ldr x0, [fp, #0x48] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG14 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x30] cbz x0, G_M000_IG09 ldr x0, [fp, #0x50] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG14 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] lsl w0, w0, #1 str w0, [fp, #0x2C] str wzr, [fp, #0x28] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x30] ldr w1, [fp, #0x28] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG14 add x0, x0, x1, LSL #2 add x0, x0, #16 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w0, [x0] ldr w1, [fp, #0x60] add w0, w0, w1 ldr x1, [fp, #0x20] str w0, [x1] ldr w0, [fp, #0x28] add w0, w0, #2 str w0, [fp, #0x28] G_M000_IG06: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #24 mov w1, #143 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x28] ldr w1, [fp, #0x2C] cmp w0, w1 blt G_M000_IG05 G_M000_IG09: ldr w0, [fp, #0x3C] add w0, w0, #1 str w0, [fp, #0x3C] G_M000_IG10: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #24 mov w1, #153 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr w0, [fp, #0x3C] ldr x1, [fp, #0x48] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG04 G_M000_IG13: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 688 1087: JIT compiled System.Text.RegularExpressions.Match:Tidy(int,int,int) [Tier0, IL size=160, code size=688] ; Assembly listing for method System.Text.RegularExpressions.Group:get_Success():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x30] cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1088: JIT compiled System.Text.RegularExpressions.Group:get_Success() [Tier0, IL size=10, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement+<>c:b__16_0(byref,System.Text.RegularExpressions.Match):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str x1, [fp, #0x60] str x2, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x60] ldrsb wzr, [x0] ldr x0, [fp, #0x60] add x0, x0, #16 str x0, [fp, #0x48] ldr x0, [fp, #0x60] ldrsb wzr, [x0] ldr x0, [fp, #0x60] add x0, x0, #32 str x0, [fp, #0x40] ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] str w0, [fp, #0x3C] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x2, [fp, #0x60] ldr w2, [x2, #0x08] sub w2, w0, w2 str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr w1, [fp, #0x3C] ldr x0, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x1, [fp, #0x28] ldr x2, [fp, #0x30] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x24] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [fp, #0x24] add w1, w0, w1 ldr x0, [fp, #0x60] str w1, [x0, #0x08] ldr x1, [fp, #0x60] ldrsb wzr, [x1] ldr x1, [fp, #0x60] add x1, x1, #16 ldr x0, [fp, #0x60] ldr x0, [x0] ldr x2, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x60] ldrsb wzr, [x0] ldr x0, [fp, #0x60] add x0, x0, #12 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w0, [x0] sub w0, w0, #1 str w0, [fp, #0x54] ldr x0, [fp, #0x18] ldr w1, [fp, #0x54] str w1, [x0] ldr w0, [fp, #0x54] cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 404 1089: JIT compiled System.Text.RegularExpressions.RegexReplacement+<>c:b__16_0(byref,System.Text.RegularExpressions.Match) [Tier0, IL size=96, code size=404] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Index():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1090: JIT compiled System.Text.RegularExpressions.Capture:get_Index() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.SegmentStringBuilder:Add(System.ReadOnlyMemory`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x1, [fp, #0x28] str x2, [fp, #0x30] G_M000_IG02: ldr x14, [fp, #0x38] ldr x14, [x14] str x14, [fp, #0x20] ldr x14, [fp, #0x38] ldr w14, [x14, #0x08] str w14, [fp, #0x1C] ldr w14, [fp, #0x1C] ldr x13, [fp, #0x20] ldr w13, [x13, #0x08] cmp w14, w13 bhs G_M000_IG04 ldr x14, [fp, #0x20] ldr w13, [fp, #0x1C] ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG06 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #40 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr w1, [fp, #0x1C] add w1, w1, #1 ldr x2, [fp, #0x38] str w1, [x2, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x1, [fp, #0x28] ldr x2, [fp, #0x30] ldr x0, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 184 1091: JIT compiled System.Text.SegmentStringBuilder:Add(System.ReadOnlyMemory`1[ushort]) [Tier0, IL size=46, code size=184] ; Assembly listing for method System.Text.SegmentStringBuilder:GrowAndAdd(System.ReadOnlyMemory`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x68] str x1, [fp, #0x58] str x2, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x68] ldr x0, [x0] str x0, [fp, #0x50] ldr x0, [fp, #0x50] ldr w0, [x0, #0x08] cbz w0, G_M000_IG03 ldr x0, [fp, #0x50] ldr w0, [x0, #0x08] lsl w0, w0, #1 str w0, [fp, #0x30] b G_M000_IG04 G_M000_IG03: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] G_M000_IG04: ldr w0, [fp, #0x30] str w0, [fp, #0x4C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w1, [fp, #0x4C] ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x28] ldr x14, [fp, #0x28] str x14, [fp, #0x38] ldr x14, [fp, #0x68] ldr x15, [fp, #0x28] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x2, [fp, #0x38] str x2, [fp, #0x40] ldr x2, [fp, #0x68] ldr w2, [x2, #0x08] ldr x0, [fp, #0x50] ldr x1, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x50] mov w2, #1 ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 ldr x14, [fp, #0x68] ldr w14, [x14, #0x08] str w14, [fp, #0x34] ldr w14, [fp, #0x34] add w14, w14, #1 ldr x13, [fp, #0x68] str w14, [x13, #0x08] ldr x14, [fp, #0x40] ldr w13, [fp, #0x34] ldr w12, [x14, #0x08] cmp w13, w12 bhs G_M000_IG06 add x14, x14, x13, LSL #4 add x14, x14, #16 add x13, fp, #88 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG05: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1092: JIT compiled System.Text.SegmentStringBuilder:GrowAndAdd(System.ReadOnlyMemory`1[ushort]) [Tier0, IL size=98, code size=360] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Length():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1093: JIT compiled System.Text.RegularExpressions.Capture:get_Length() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:ReplacementImpl(byref,System.Text.RegularExpressions.Match):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x100]! mov fp, sp movi v16.16b, #0 mov x9, fp mov x10, #136 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) str xzr, [x9, #0x20] str x0, [fp, #0xF8] str x1, [fp, #0xF0] str x2, [fp, #0xE8] G_M000_IG02: ldr x0, [fp, #0xF8] ldr x0, [x0, #0x10] str x0, [fp, #0xE0] str wzr, [fp, #0xDC] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG30 G_M000_IG03: ldr x0, [fp, #0xE0] ldr w1, [fp, #0xDC] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG34 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w0, [x0] str w0, [fp, #0xD8] ldr w0, [fp, #0xD8] tbnz w0, #31, G_M000_IG06 ldr x0, [fp, #0xF8] ldr x0, [x0, #0x08] ldr w1, [fp, #0xD8] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG34 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] G_M000_IG04: ldp x0, x1, [fp, #0x20] stp x0, x1, [fp, #0xB8] G_M000_IG05: b G_M000_IG27 G_M000_IG06: ldr w1, [fp, #0xD8] cmn w1, #4 bge G_M000_IG09 ldr w1, [fp, #0xD8] neg w1, w1 sub w1, w1, #5 ldr x0, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x30] str x1, [fp, #0x38] G_M000_IG07: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0xA8] G_M000_IG08: b G_M000_IG26 G_M000_IG09: ldr w0, [fp, #0xD8] neg w0, w0 sub w0, w0, #5 str w0, [fp, #0x94] ldr w0, [fp, #0x94] add w0, w0, #4 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #3 bhi G_M000_IG10 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG10: b G_M000_IG23 G_M000_IG11: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x70] str x1, [fp, #0x78] G_M000_IG12: ldp x0, x1, [fp, #0x70] stp x0, x1, [fp, #0x98] G_M000_IG13: b G_M000_IG25 G_M000_IG14: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x60] str x1, [fp, #0x68] G_M000_IG15: ldp x0, x1, [fp, #0x60] stp x0, x1, [fp, #0x98] G_M000_IG16: b G_M000_IG25 G_M000_IG17: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x50] str x1, [fp, #0x58] G_M000_IG18: ldp x0, x1, [fp, #0x50] stp x0, x1, [fp, #0x98] G_M000_IG19: b G_M000_IG25 G_M000_IG20: ldr x0, [fp, #0xE8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] str x1, [fp, #0x48] G_M000_IG21: ldp x0, x1, [fp, #0x40] stp x0, x1, [fp, #0x98] G_M000_IG22: b G_M000_IG25 G_M000_IG23: stp xzr, xzr, [fp, #0x80] G_M000_IG24: ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x98] G_M000_IG25: ldp x0, x1, [fp, #0x98] stp x0, x1, [fp, #0xA8] G_M000_IG26: ldp x0, x1, [fp, #0xA8] stp x0, x1, [fp, #0xB8] G_M000_IG27: ldp x0, x1, [fp, #0xB8] stp x0, x1, [fp, #0xC8] G_M000_IG28: add x0, fp, #200 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG29 ldr x1, [fp, #0xC8] ldr x2, [fp, #0xD0] ldr x0, [fp, #0xF0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG29: ldr w0, [fp, #0xDC] add w0, w0, #1 str w0, [fp, #0xDC] G_M000_IG30: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG32 G_M000_IG31: add x0, fp, #24 mov w1, #180 bl CORINFO_HELP_PATCHPOINT G_M000_IG32: ldr w0, [fp, #0xDC] ldr x1, [fp, #0xE0] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 G_M000_IG33: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG34: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 ; Total bytes of code 736 1094: JIT compiled System.Text.RegularExpressions.RegexReplacement:ReplacementImpl(byref,System.Text.RegularExpressions.Match) [Tier0, IL size=190, code size=736] ; Assembly listing for method System.Text.RegularExpressions.Match:Reset(System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] G_M000_IG02: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] str wzr, [x0, #0x34] ldr x0, [fp, #0x48] ldr w1, [fp, #0x3C] str w1, [x0, #0x5C] ldr x0, [fp, #0x48] ldr x0, [x0, #0x50] str x0, [fp, #0x30] str wzr, [fp, #0x2C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x30] ldr w1, [fp, #0x2C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #2 add x0, x0, #16 str wzr, [x0] ldr w0, [fp, #0x2C] add w0, w0, #1 str w0, [fp, #0x2C] G_M000_IG04: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #16 mov w1, #40 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x2C] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 ldr x0, [fp, #0x48] strb wzr, [x0, #0x60] ldr x0, [fp, #0x48] ldr x0, [x0, #0x38] str x0, [fp, #0x20] ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG08 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 292 1095: JIT compiled System.Text.RegularExpressions.Match:Reset(System.String,int) [Tier0, IL size=70, code size=292] ; Assembly listing for method System.Text.RegularExpressions.Match:get_Empty():System.Text.RegularExpressions.Match ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #38 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 1096: JIT compiled System.Text.RegularExpressions.Match:get_Empty() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Text.RegularExpressions.Match:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov x1, xzr mov w2, #1 movz x3, #8 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 mov w4, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 1097: JIT compiled System.Text.RegularExpressions.Match:.cctor() [Tier0, IL size=19, code size=108] ; Assembly listing for method System.Text.SegmentStringBuilder:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1098: JIT compiled System.Text.SegmentStringBuilder:get_Count() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.SegmentStringBuilder:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str x0, [fp, #0xA8] G_M000_IG02: ldr x3, [fp, #0xA8] ldr x3, [x3] str x3, [fp, #0xA0] ldr x3, [fp, #0xA8] ldr w3, [x3, #0x08] add x0, fp, #144 ldr x1, [fp, #0xA0] mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str wzr, [fp, #0x8C] str wzr, [fp, #0x6C] mov w0, #0xD1FFAB1E str w0, [fp, #0x28] b G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x6C] ldr w1, [fp, #0x98] cmp w0, w1 bhs G_M000_IG11 ldr x0, [fp, #0x90] ldr w1, [fp, #0x6C] mov w1, w1 lsl x1, x1, #4 add x0, x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x8C] add w0, w0, w1 str w0, [fp, #0x8C] ldr w0, [fp, #0x6C] add w0, w0, #1 str w0, [fp, #0x6C] G_M000_IG04: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #40 mov w1, #52 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x6C] ldr w1, [fp, #0x98] cmp w0, w1 blt G_M000_IG03 ldr x0, [fp, #0x90] ldr x1, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] str x1, [fp, #0x60] G_M000_IG07: ldp x0, x1, [fp, #0x58] stp x0, x1, [fp, #0x78] G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #26 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x50] ldr w0, [fp, #0x8C] str w0, [fp, #0x4C] add x0, fp, #120 str x0, [fp, #0x40] ldr x0, [fp, #0x50] str x0, [fp, #0x38] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #26 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #26 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] str x0, [fp, #0x38] G_M000_IG09: ldr w0, [fp, #0x4C] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x70] add x0, fp, #144 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA8] stp xzr, xzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0xA0] mov w2, wzr ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x28] blr x3 ldr x0, [fp, #0x70] G_M000_IG10: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1099: JIT compiled System.Text.SegmentStringBuilder:ToString() [Tier0, IL size=141, code size=652] ; Assembly listing for method System.Text.SegmentStringBuilder+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1100: JIT compiled System.Text.SegmentStringBuilder+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.SegmentStringBuilder+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1101: JIT compiled System.Text.SegmentStringBuilder+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x78] str x1, [fp, #0x68] str x2, [fp, #0x70] str x3, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x60] G_M000_IG03: ldp x1, x2, [x0] stp x1, x2, [fp, #0x50] G_M000_IG04: str wzr, [fp, #0x4C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG10 G_M000_IG05: ldr w0, [fp, #0x4C] ldr w1, [fp, #0x58] cmp w0, w1 bhs G_M000_IG14 ldr x0, [fp, #0x50] ldr w1, [fp, #0x4C] mov w1, w1 lsl x1, x1, #4 add x0, x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] str x1, [fp, #0x30] G_M000_IG06: ldp x0, x1, [fp, #0x28] stp x0, x1, [fp, #0x38] G_M000_IG07: ldr x1, [fp, #0x68] ldr x2, [fp, #0x70] add x0, fp, #56 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #104 ldr w1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG08: ldp x0, x1, [fp, #0x18] stp x0, x1, [fp, #0x68] G_M000_IG09: ldr w0, [fp, #0x4C] add w0, w0, #1 str w0, [fp, #0x4C] G_M000_IG10: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG12 G_M000_IG11: add x0, fp, #16 mov w1, #53 bl CORINFO_HELP_PATCHPOINT G_M000_IG12: ldr w0, [fp, #0x4C] ldr w1, [fp, #0x58] cmp w0, w1 blt G_M000_IG05 G_M000_IG13: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 300 1102: JIT compiled System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long) [Tier0, IL size=64, code size=300] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionI():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x70] and w0, w0, #1 cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1103: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionI() [Tier0, IL size=12, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] str x3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x24] uxtb w1, w1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr w1, [fp, #0x20] str w1, [x0, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 128 1104: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,System.String) [Tier0, IL size=28, code size=128] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Str(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1105: JIT compiled System.Text.RegularExpressions.RegexNode:set_Str(System.String) [Tier0, IL size=8, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Str():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1106: JIT compiled System.Text.RegularExpressions.RegexNode:get_Str() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.ValueStringBuilder:Append(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] str w0, [fp, #0x1C] ldr x0, [fp, #0x20] ldr w0, [x0, #0x08] cmp w0, #1 bne G_M000_IG06 ldr w0, [fp, #0x1C] ldr x1, [fp, #0x28] add x1, x1, #16 ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG06 ldr x0, [fp, #0x28] ldrsb wzr, [x0] ldr x0, [fp, #0x28] add x0, x0, #16 str x0, [fp, #0x10] ldr w0, [fp, #0x1C] ldr x1, [fp, #0x10] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG08 ldr x0, [fp, #0x10] ldr x0, [x0] ldr w1, [fp, #0x1C] mov w1, w1 lsl x1, x1, #1 add x0, x0, x1 ldr x1, [fp, #0x20] mov w2, wzr ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG08 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] strh w1, [x0] ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x08] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 256 1107: JIT compiled System.Text.ValueStringBuilder:Append(System.String) [Tier0, IL size=72, code size=256] ; Assembly listing for method System.Text.ValueStringBuilder:AppendSlow(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x1, [fp, #0x38] ldr w1, [x1, #0x08] str w1, [fp, #0x2C] ldr w1, [fp, #0x2C] ldr x0, [fp, #0x38] add x0, x0, #16 ldr w0, [x0, #0x08] ldr x2, [fp, #0x30] ldr w2, [x2, #0x08] sub w0, w0, w2 cmp w1, w0 ble G_M000_IG03 ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] ldr x0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr x0, [fp, #0x38] ldrsb wzr, [x0] ldr x0, [fp, #0x38] add x0, x0, #16 ldr w1, [fp, #0x2C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x1, [fp, #0x18] ldr x2, [fp, #0x20] ldr x0, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x38] ldr w0, [x0, #0x08] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] add w0, w0, w1 ldr x1, [fp, #0x38] str w0, [x1, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 220 1108: JIT compiled System.Text.ValueStringBuilder:AppendSlow(System.String) [Tier0, IL size=78, code size=220] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x0, [fp, #0x18] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1109: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize() [Tier0, IL size=19, code size=84] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize(int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x50] str xzr, [fp, #0x40] str xzr, [fp, #0x38] str xzr, [fp, #0x28] str x0, [fp, #0x68] str x0, [fp, #0x60] str w1, [fp, #0x5C] str w2, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x60] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x0, #0x20] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x10] ldr x1, [x1, #0x30] ldr x1, [x1] ldr x1, [x1, #0x20] str x1, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x20] G_M000_IG05: ldr w1, [fp, #0x5C] sxtw x1, w1 ldr x0, [fp, #0x20] bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x50] ldr x0, [fp, #0x60] ldr w0, [x0, #0x38] str w0, [fp, #0x4C] ldr x0, [fp, #0x60] ldr x0, [x0, #0x10] ldr x1, [fp, #0x50] ldr w2, [fp, #0x4C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w1, #0xD1FFAB1E str w1, [fp, #0x18] b G_M000_IG06 G_M000_IG06: ldr w1, [fp, #0x5C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x60] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x5C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x60] str x0, [x1, #0x30] str wzr, [fp, #0x30] b G_M000_IG09 G_M000_IG07: ldr x1, [fp, #0x50] ldr w0, [fp, #0x30] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 add x1, x1, x0, LSL #5 add x1, x1, #16 ldr w1, [x1, #0x04] cmn w1, #1 blt G_M000_IG08 ldr x1, [fp, #0x50] ldr w0, [fp, #0x30] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 add x1, x1, x0, LSL #5 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x14, [fp, #0x50] ldr w15, [fp, #0x30] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG13 add x14, x14, x15, LSL #5 add x14, x14, #16 add x14, x14, #4 ldr x15, [fp, #0x28] ldr w15, [x15] sub w15, w15, #1 str w15, [x14] ldr w14, [fp, #0x30] add w14, w14, #1 ldr x15, [fp, #0x28] str w14, [x15] G_M000_IG08: ldr w14, [fp, #0x30] add w14, w14, #1 str w14, [fp, #0x30] G_M000_IG09: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #24 mov w1, #241 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w1, [fp, #0x30] ldr w0, [fp, #0x4C] cmp w1, w0 blt G_M000_IG07 ldr x14, [fp, #0x60] add x14, x14, #16 ldr x15, [fp, #0x50] bl CORINFO_HELP_ASSIGN_REF G_M000_IG12: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 540 1110: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize(int,bool) [Tier0, IL size=254, code size=540] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1111: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1112: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x20] cbnz x0, G_M000_IG06 ldr w0, [fp, #0x1C] cbnz w0, G_M000_IG03 ldr w0, [fp, #0x18] cbz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr x0, [fp, #0x28] stp xzr, xzr, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: b G_M000_IG07 G_M000_IG07: ldr w0, [fp, #0x1C] mov w0, w0 ldr w1, [fp, #0x18] mov w1, w1 add x0, x0, x1 ldr x1, [fp, #0x20] ldr w1, [x1, #0x08] mov w1, w1 cmp x0, x1 bls G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x1C] mov w1, w1 mov x2, #40 mul x1, x1, x2 add x0, x0, x1 ldr x1, [fp, #0x28] str x0, [x1] ldr x0, [fp, #0x28] ldr w1, [fp, #0x18] str w1, [x0, #0x08] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 220 1113: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[],int,int) [Tier0, IL size=110, code size=220] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet](System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] mov x1, xzr mov w2, #40 madd x0, x1, x2, x0 add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 1114: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet](System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[]) [Tier0, IL size=7, code size=48] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] add x3, sp, #80 str x3, [fp, #0x48] str x0, [fp, #0x38] str x1, [fp, #0x40] str x2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG03 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: stp fp, lr, [sp, #-0x20]! add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG05: str x0, [fp, #0x18] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 adr x0, [G_M000_IG03] G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG08: str x0, [fp, #0x20] ldr x1, [fp, #0x20] str x1, [fp, #0x28] ldr x1, [fp, #0x28] mov w0, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 adr x0, [G_M000_IG03] G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 200 1115: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=30, code size=200] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntrospectiveSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x30] str x1, [fp, #0x38] str x2, [fp, #0x28] G_M000_IG02: ldr w0, [fp, #0x38] cmp w0, #1 ble G_M000_IG05 G_M000_IG03: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0x18] G_M000_IG04: ldr w0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 lsl w2, w0, #1 add w2, w2, #2 str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] ldr x3, [fp, #0x28] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 124 1116: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntrospectiveSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=34, code size=124] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntroSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x80] str x1, [fp, #0x88] str w2, [fp, #0x7C] str x3, [fp, #0x70] G_M000_IG02: ldr w0, [fp, #0x88] str w0, [fp, #0x6C] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG08 G_M000_IG03: ldr w0, [fp, #0x6C] cmp w0, #16 bgt G_M000_IG06 ldr w0, [fp, #0x6C] cmp w0, #2 bne G_M000_IG04 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] ldr x2, [fp, #0x70] mov w3, wzr mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG11 G_M000_IG04: ldr w0, [fp, #0x6C] cmp w0, #3 bne G_M000_IG05 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] ldr x2, [fp, #0x70] mov w3, wzr mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] ldr x2, [fp, #0x70] mov w3, wzr mov w4, #2 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] ldr x2, [fp, #0x70] mov w3, #1 mov w4, #2 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG11 G_M000_IG05: add x0, fp, #128 ldr w2, [fp, #0x6C] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG11 G_M000_IG06: ldr w0, [fp, #0x7C] cbnz w0, G_M000_IG07 add x0, fp, #128 ldr w2, [fp, #0x6C] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] str x1, [fp, #0x38] ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] ldr x2, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG11 G_M000_IG07: ldr w0, [fp, #0x7C] sub w0, w0, #1 str w0, [fp, #0x7C] add x0, fp, #128 ldr w2, [fp, #0x6C] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x50] str x1, [fp, #0x58] ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] ldr x2, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w0, [fp, #0x68] ldr w2, [fp, #0x68] add w2, w2, #1 str w2, [fp, #0x64] ldr w2, [fp, #0x6C] ldr w0, [fp, #0x64] sub w2, w2, w0 add x0, fp, #128 ldr w1, [fp, #0x64] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x40] str x1, [fp, #0x48] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] ldr w2, [fp, #0x7C] ldr x3, [fp, #0x70] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w0, [fp, #0x68] str w0, [fp, #0x6C] G_M000_IG08: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #24 mov w1, #144 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w0, [fp, #0x6C] cmp w0, #1 bgt G_M000_IG03 b G_M000_IG11 G_M000_IG11: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 676 1117: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntroSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=152, code size=676] ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Slice(int,int):System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] G_M000_IG02: ldr w0, [fp, #0x24] mov w0, w0 ldr w1, [fp, #0x20] mov w1, w1 add x0, x0, x1 ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] mov w1, w1 cmp x0, x1 bls G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: stp xzr, xzr, [fp, #0x10] ldr x1, [fp, #0x28] ldr x1, [x1] ldr w0, [fp, #0x24] mov w0, w0 mov x2, #40 mul x0, x0, x2 add x1, x1, x0 add x0, fp, #16 ldr w2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 160 1118: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Slice(int,int) [Tier0, IL size=39, code size=160] ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(byref,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] str x1, [x0] ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 52 1119: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(byref,int) [Tier0, IL size=15, code size=52] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:InsertionSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str x0, [fp, #0xB0] str x1, [fp, #0xB8] str x2, [fp, #0xA8] G_M000_IG02: str wzr, [fp, #0xA4] mov w0, #0xD1FFAB1E str w0, [fp, #0x68] b G_M000_IG15 G_M000_IG03: ldr w0, [fp, #0xA4] add w0, w0, #1 ldr w1, [fp, #0xB8] cmp w0, w1 bhs G_M000_IG19 ldr x0, [fp, #0xB0] ldr w1, [fp, #0xA4] add w1, w1, #1 mov w1, w1 mov x2, #40 mul x1, x1, x2 add x0, x0, x1 G_M000_IG04: sub x1, x0, #120 ldr x2, [x1, #0x78] str x2, [fp, #0x78] ldp q16, q17, [x1, #0x80] stp q16, q17, [fp, #0x80] G_M000_IG05: ldr w0, [fp, #0xA4] str w0, [fp, #0x74] b G_M000_IG07 G_M000_IG06: ldr w13, [fp, #0x74] add w13, w13, #1 ldr w14, [fp, #0xB8] cmp w13, w14 bhs G_M000_IG19 ldr x13, [fp, #0xB0] ldr w14, [fp, #0x74] add w14, w14, #1 mov w14, w14 mov x12, #40 mul x14, x14, x12 add x14, x13, x14 ldr w13, [fp, #0x74] ldr w12, [fp, #0xB8] cmp w13, w12 bhs G_M000_IG19 ldr x13, [fp, #0xB0] ldr w12, [fp, #0x74] mov w12, w12 mov x15, #40 mul x12, x12, x15 add x13, x13, x12 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr w14, [fp, #0x74] sub w14, w14, #1 str w14, [fp, #0x74] G_M000_IG07: ldr w0, [fp, #0x74] tbnz w0, #31, G_M000_IG14 ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #104 mov w1, #60 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr x0, [fp, #0xA8] str x0, [fp, #0x10] G_M000_IG10: add x0, fp, #56 ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] ldr x1, [x0, #0x60] str x1, [fp, #0x60] G_M000_IG11: ldr w0, [fp, #0x74] ldr w1, [fp, #0xB8] cmp w0, w1 bhs G_M000_IG19 ldr x0, [fp, #0xB0] ldr w1, [fp, #0x74] mov w1, w1 mov x2, #40 mul x1, x1, x2 add x0, x0, x1 G_M000_IG12: sub x1, x0, #24 ldr x2, [x1, #0x18] str x2, [fp, #0x18] ldp q16, q17, [x1, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG13: ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] add x1, fp, #64 add x2, fp, #24 ldr x3, [fp, #0x10] ldr x3, [x3, #0x18] blr x3 tbnz w0, #31, G_M000_IG06 G_M000_IG14: ldr w14, [fp, #0x74] add w14, w14, #1 ldr w13, [fp, #0xB8] cmp w14, w13 bhs G_M000_IG19 ldr x14, [fp, #0xB0] ldr w13, [fp, #0x74] add w13, w13, #1 mov w13, w13 mov x12, #40 mul x13, x13, x12 add x14, x14, x13 add x13, fp, #120 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr w0, [fp, #0xA4] add w0, w0, #1 str w0, [fp, #0xA4] G_M000_IG15: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #104 mov w1, #103 bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr w0, [fp, #0xA4] ldr w1, [fp, #0xB8] sub w1, w1, #1 cmp w0, w1 blt G_M000_IG03 G_M000_IG18: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 584 1120: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:InsertionSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier0, IL size=116, code size=584] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+<>c:b__33_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] ldr w1, [x1, #0x18] ldr x0, [fp, #0x20] add x0, x0, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 1121: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+<>c:b__33_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier0, IL size=19, code size=64] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:b__2_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xF0]! mov fp, sp movi v16.16b, #0 sub x9, fp, #8 mov x10, #128 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) str x0, [fp, #0xE8] str x1, [fp, #0xE0] str x2, [fp, #0xD8] G_M000_IG02: ldr x0, [fp, #0xE0] ldr x0, [x0, #0x08] str x0, [fp, #0x78] ldr x0, [fp, #0x78] str x0, [fp, #0x70] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG03 ldr x0, [fp, #0xE0] ldr x0, [x0, #0x10] str x0, [fp, #0x70] G_M000_IG03: ldr x0, [fp, #0x70] str x0, [fp, #0xD0] ldr x0, [fp, #0xD8] ldr x0, [x0, #0x08] str x0, [fp, #0x68] ldr x0, [fp, #0x68] str x0, [fp, #0x60] ldr x0, [fp, #0x68] cbnz x0, G_M000_IG04 ldr x0, [fp, #0xD8] ldr x0, [x0, #0x10] str x0, [fp, #0x60] G_M000_IG04: ldr x0, [fp, #0x60] str x0, [fp, #0xC8] ldr x0, [fp, #0xD0] cbnz x0, G_M000_IG05 str wzr, [fp, #0x5C] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0xD0] ldr w0, [x0, #0x08] str w0, [fp, #0x5C] G_M000_IG06: ldr w0, [fp, #0x5C] str w0, [fp, #0xC0] ldr x0, [fp, #0xC8] cbnz x0, G_M000_IG07 str wzr, [fp, #0x58] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xC8] ldr w0, [x0, #0x08] str w0, [fp, #0x58] G_M000_IG08: ldr w0, [fp, #0x58] str w0, [fp, #0xBC] ldr x0, [fp, #0xE0] ldrb w0, [x0, #0x1C] str w0, [fp, #0xB8] ldr x0, [fp, #0xD8] ldrb w0, [x0, #0x1C] str w0, [fp, #0xB4] ldr x0, [fp, #0xE0] ldr x1, [x0, #0x20] str x1, [fp, #0x98] add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG09 str wzr, [fp, #0x4C] b G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0xE0] add x0, x0, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x50] ldr w0, [fp, #0x50] ldr w1, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x4C] G_M000_IG10: ldr w0, [fp, #0x4C] str w0, [fp, #0xA8] ldr x0, [fp, #0xD8] ldr x1, [x0, #0x20] str x1, [fp, #0x98] add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG11 str wzr, [fp, #0x3C] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0xD8] add x0, x0, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x40] ldr w0, [fp, #0x40] ldr w1, [fp, #0xB4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x3C] G_M000_IG12: ldr w0, [fp, #0x3C] str w0, [fp, #0xA4] ldr x0, [fp, #0xD0] cbz x0, G_M000_IG14 ldr x0, [fp, #0xC8] cbz x0, G_M000_IG14 ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str s0, [fp, #0x94] ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str s0, [fp, #0x90] ldr s0, [fp, #0x94] ldr s16, [fp, #0x90] fcmp s0, s16 beq G_M000_IG13 add x0, fp, #148 ldr s0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] b G_M000_IG29 G_M000_IG13: ldr x0, [fp, #0xD0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 add x0, fp, #192 ldr w1, [fp, #0xBC] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x14] b G_M000_IG29 G_M000_IG14: ldr w0, [fp, #0xC0] cmp w0, #0 ble G_M000_IG15 ldr w0, [fp, #0xA4] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: ldr w0, [fp, #0xA8] cmp w0, #0 ble G_M000_IG19 ldr w0, [fp, #0xBC] cmp w0, #0 ble G_M000_IG19 G_M000_IG16: ldr w0, [fp, #0xC0] ldr w1, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x80] ldr w0, [fp, #0xBC] ldr w1, [fp, #0xA4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x10] ldr w1, [fp, #0x10] add x0, fp, #128 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x8C] ldr w0, [fp, #0x8C] cbz w0, G_M000_IG17 ldr w0, [fp, #0x8C] str w0, [fp, #0x14] b G_M000_IG29 G_M000_IG17: ldr w0, [fp, #0xC0] cmp w0, #0 bgt G_M000_IG18 b G_M000_IG22 G_M000_IG18: b G_M000_IG25 G_M000_IG19: ldr w0, [fp, #0xC0] cmp w0, #0 cset x0, gt ldr w1, [fp, #0xBC] cmp w1, #0 cset x1, gt cmp w0, w1 beq G_M000_IG21 ldr w0, [fp, #0xC0] cmp w0, #0 bgt G_M000_IG20 b G_M000_IG22 G_M000_IG20: b G_M000_IG25 G_M000_IG21: ldr w0, [fp, #0xA8] cmp w0, #0 cset x0, gt ldr w1, [fp, #0xA4] cmp w1, #0 cset x1, gt cmp w0, w1 beq G_M000_IG27 ldr w0, [fp, #0xA8] cmp w0, #0 bgt G_M000_IG24 b G_M000_IG22 G_M000_IG22: mov w0, #1 G_M000_IG23: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG24: b G_M000_IG25 G_M000_IG25: movn w0, #0 G_M000_IG26: ldp fp, lr, [sp], #0xF0 ret lr G_M000_IG27: ldr w0, [fp, #0xA8] cmp w0, #0 ble G_M000_IG28 add x0, fp, #168 ldr w1, [fp, #0xA4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x14] b G_M000_IG29 G_M000_IG28: ldr x1, [fp, #0xD8] ldr w1, [x1, #0x18] ldr x0, [fp, #0xE0] add x0, x0, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x14] b G_M000_IG29 G_M000_IG29: ldr w0, [fp, #0x14] G_M000_IG30: ldp fp, lr, [sp], #0xF0 ret lr ; Total bytes of code 1184 1122: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:b__2_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier0, IL size=358, code size=1184] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__SumFrequencies|2_2(ushort[]):float ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: str wzr, [fp, #0x54] ldr x0, [fp, #0x58] str x0, [fp, #0x48] str wzr, [fp, #0x44] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG07 G_M000_IG03: ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG11 add x0, x0, x1, LSL #1 add x0, x0, #16 ldrh w0, [x0] str w0, [fp, #0x40] ldr w0, [fp, #0x40] cmp w0, #128 bge G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] str x1, [fp, #0x28] G_M000_IG04: ldp x0, x1, [fp, #0x20] stp x0, x1, [fp, #0x30] G_M000_IG05: ldr w0, [fp, #0x40] ldr w1, [fp, #0x38] cmp w0, w1 bhs G_M000_IG11 ldr x0, [fp, #0x30] ldr w1, [fp, #0x40] mov w1, w1 lsl x1, x1, #2 ldr s0, [x0, x1] ldr s16, [fp, #0x54] fadd s0, s0, s16 str s0, [fp, #0x54] G_M000_IG06: ldr w0, [fp, #0x44] add w0, w0, #1 str w0, [fp, #0x44] G_M000_IG07: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #24 mov w1, #47 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w0, [fp, #0x44] ldr x1, [fp, #0x48] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 ldr s0, [fp, #0x54] G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 276 1123: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__SumFrequencies|2_2(ushort[]) [Tier0, IL size=55, code size=276] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:get_Frequency():System.ReadOnlySpan`1[float] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_FIELDDESC_TO_STUBRUNTIMEFIELD str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1124: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:get_Frequency() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsAscii(System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 1125: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsAscii(System.ReadOnlySpan`1[ushort]) [Tier0, IL size=7, code size=52] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:RemoveRange(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x14] tbz w0, #31, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr w0, [fp, #0x10] tbz w0, #31, G_M000_IG04 mov w0, #27 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] ldr w1, [fp, #0x14] sub w0, w0, w1 ldr w1, [fp, #0x10] cmp w0, w1 bge G_M000_IG05 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr w4, [fp, #0x10] cmp w4, #0 ble G_M000_IG07 ldr x4, [fp, #0x18] ldr w4, [x4, #0x10] ldr w1, [fp, #0x10] sub w4, w4, w1 ldr x1, [fp, #0x18] str w4, [x1, #0x10] ldr w4, [fp, #0x14] ldr x1, [fp, #0x18] ldr w1, [x1, #0x10] cmp w4, w1 bge G_M000_IG06 ldr x4, [fp, #0x18] ldr w4, [x4, #0x10] ldr w1, [fp, #0x14] sub w4, w4, w1 ldr w1, [fp, #0x14] ldr w2, [fp, #0x10] add w1, w1, w2 ldr x2, [fp, #0x18] ldr x2, [x2, #0x08] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr w3, [fp, #0x14] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG06: ldr x0, [fp, #0x18] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x14] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG07 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr w1, [x1, #0x10] ldr w2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 352 1126: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:RemoveRange(int,int) [Tier0, IL size=136, code size=352] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitMatchCharacterClass(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 111 single block inlinees; 29 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xC0] stp x21, x22, [sp, #0xD0] stp x23, x24, [sp, #0xE0] stp x25, x26, [sp, #0xF0] stp x27, x28, [sp, #0xD1FFAB1E] mov fp, sp add x9, fp, #104 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0xB0] mov x19, x0 G_M000_IG02: str x19, [fp, #0x68] str x1, [fp, #0x70] ldr x20, [fp, #0x70] cbz x20, G_M000_IG111 G_M000_IG03: ldr w21, [x20, #0x08] sub w22, w21, #4 cmp w22, #9 bhi G_M000_IG111 mov w1, w22 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG04: cmp w21, #3 bls G_M000_IG190 ldrh w1, [x20, #0x12] cmp w1, #100 bhi G_M000_IG09 cmp w1, #9 bhi G_M000_IG07 cmp w1, #2 bhi G_M000_IG05 mov w0, w1 adr x1, [@RWD40] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG05: cmp w1, #9 bne G_M000_IG111 cmp w21, #4 bne G_M000_IG111 G_M000_IG06: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #9 LSL #48 cmp x1, x0 beq G_M000_IG59 b G_M000_IG111 G_M000_IG07: cmp w1, #15 beq G_M000_IG30 cmp w1, #100 bne G_M000_IG111 cmp w21, #4 bne G_M000_IG111 G_M000_IG08: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #100 LSL #48 cmp x1, x0 beq G_M000_IG63 b G_M000_IG111 G_M000_IG09: mov w0, #0xD1FFAB1E cmp w1, w0 bhi G_M000_IG11 mov w0, #0xD1FFAB1E cmp w1, w0 beq G_M000_IG28 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #4 bne G_M000_IG111 G_M000_IG10: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 beq G_M000_IG69 b G_M000_IG111 G_M000_IG11: mov w0, #0xD1FFAB1E cmp w1, w0 beq G_M000_IG26 mov w0, #0xD1FFAB1E cmp w1, w0 beq G_M000_IG34 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #4 bne G_M000_IG111 G_M000_IG12: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 beq G_M000_IG81 b G_M000_IG111 G_M000_IG13: cmp w21, #4 bls G_M000_IG190 ldrh w1, [x20, #0x14] cmp w1, #2 beq G_M000_IG38 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #13 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD64] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x16] ldr q18, [@RWD80] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG66 b G_M000_IG111 G_M000_IG14: cmp w21, #4 bls G_M000_IG190 ldrh w1, [x20, #0x14] cmp w1, #2 beq G_M000_IG39 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #10 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD96] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x10] ldr q18, [@RWD112] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG72 b G_M000_IG111 G_M000_IG15: cmp w21, #0 bls G_M000_IG190 ldrh w1, [x20, #0x0C] cbz w1, G_M000_IG40 cmp w1, #1 bne G_M000_IG111 cmp w21, #11 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD128] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x12] ldr q18, [@RWD144] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG75 b G_M000_IG111 G_M000_IG16: cmp w21, #4 bls G_M000_IG190 ldrh w1, [x20, #0x14] cmp w1, #13 bhi G_M000_IG17 cmp w1, #9 beq G_M000_IG41 cmp w1, #13 bne G_M000_IG111 cmp w21, #8 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD160] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG90 b G_M000_IG111 G_M000_IG17: mov w0, #0xD1FFAB1E cmp w1, w0 beq G_M000_IG42 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #8 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD176] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG84 b G_M000_IG111 G_M000_IG18: cmp w21, #4 bls G_M000_IG190 ldrh w1, [x20, #0x14] cmp w1, #19 beq G_M000_IG43 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #12 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD192] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x14] ldr q18, [@RWD208] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG87 b G_M000_IG111 G_M000_IG19: cmp w21, #6 bls G_M000_IG190 ldrh w1, [x20, #0x18] cmp w1, #71 bhi G_M000_IG20 cmp w1, #26 beq G_M000_IG44 cmp w1, #71 bne G_M000_IG111 cmp w21, #9 bne G_M000_IG47 ldr q16, [x20, #0x0C] ldr q17, [@RWD224] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD240] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG102 b G_M000_IG47 G_M000_IG20: cmp w1, #91 beq G_M000_IG45 mov w0, #0xD1FFAB1E cmp w1, w0 bne G_M000_IG111 cmp w21, #9 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD256] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD272] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG93 b G_M000_IG111 G_M000_IG21: cmp w21, #6 bls G_M000_IG190 ldrh w1, [x20, #0x18] cmp w1, #71 beq G_M000_IG55 cmp w1, #103 beq G_M000_IG51 cmp w1, #123 bne G_M000_IG111 cmp w21, #7 bne G_M000_IG49 G_M000_IG22: ldr x1, [x20, #0x0C] movz x0, #4 LSL #16 movk x0, #65 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #65 movk x2, #91 LSL #16 movk x2, #97 LSL #32 movk x2, #123 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG96 b G_M000_IG49 G_M000_IG23: cmp w21, #4 bne G_M000_IG111 G_M000_IG24: ldr x0, [x20, #0x0C] cmp x0, #16, LSL #12 bne G_M000_IG111 G_M000_IG25: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG188 G_M000_IG26: cmp w21, #4 bne G_M000_IG111 G_M000_IG27: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 beq G_M000_IG59 b G_M000_IG111 G_M000_IG28: cmp w21, #4 bne G_M000_IG111 G_M000_IG29: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 beq G_M000_IG63 b G_M000_IG111 G_M000_IG30: cmp w21, #4 bne G_M000_IG111 G_M000_IG31: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #15 LSL #48 cmp x1, x0 beq G_M000_IG69 b G_M000_IG111 G_M000_IG32: cmp w21, #4 bne G_M000_IG111 G_M000_IG33: ldr x0, [x20, #0x0C] movz x1, #1 LSL #32 movk x1, #2 LSL #48 cmp x0, x1 beq G_M000_IG78 b G_M000_IG111 G_M000_IG34: cmp w21, #4 bne G_M000_IG111 G_M000_IG35: ldr x1, [x20, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 beq G_M000_IG78 b G_M000_IG111 G_M000_IG36: cmp w21, #4 bne G_M000_IG111 G_M000_IG37: ldr x0, [x20, #0x0C] movz x1, #1 LSL #32 movk x1, #1 LSL #48 cmp x0, x1 beq G_M000_IG81 b G_M000_IG111 G_M000_IG38: cmp w21, #13 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD288] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x16] ldr q18, [@RWD304] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG66 b G_M000_IG111 G_M000_IG39: cmp w21, #10 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD320] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x10] ldr q18, [@RWD336] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG72 b G_M000_IG111 G_M000_IG40: cmp w21, #11 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD352] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x12] ldr q18, [@RWD144] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG75 b G_M000_IG111 G_M000_IG41: cmp w21, #8 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD368] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG84 b G_M000_IG111 G_M000_IG42: cmp w21, #8 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD384] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG90 b G_M000_IG111 G_M000_IG43: cmp w21, #12 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD400] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x14] ldr q18, [@RWD416] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG87 b G_M000_IG111 G_M000_IG44: cmp w21, #9 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD432] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD448] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG93 b G_M000_IG111 G_M000_IG45: cmp w21, #9 bne G_M000_IG46 ldr q16, [x20, #0x0C] ldr q17, [@RWD464] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD480] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG99 G_M000_IG46: cmp w21, #9 bne G_M000_IG111 ldr q16, [x20, #0x0C] ldr q17, [@RWD496] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD480] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG99 b G_M000_IG111 G_M000_IG47: cmp w21, #9 bne G_M000_IG111 G_M000_IG48: ldr q16, [x20, #0x0C] ldr q17, [@RWD512] eor v16.2d, v16.2d, v17.2d ldr q17, [x20, #0x0E] ldr q18, [@RWD240] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG102 b G_M000_IG111 G_M000_IG49: cmp w21, #7 bne G_M000_IG111 G_M000_IG50: ldr x1, [x20, #0x0C] movz x0, #1 movk x0, #4 LSL #16 movk x0, #65 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #65 movk x2, #91 LSL #16 movk x2, #97 LSL #32 movk x2, #123 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG96 b G_M000_IG111 G_M000_IG51: cmp w21, #7 bne G_M000_IG53 G_M000_IG52: ldr x1, [x20, #0x0C] movz x0, #4 LSL #16 movk x0, #48 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #97 LSL #32 movk x2, #103 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG105 G_M000_IG53: cmp w21, #7 bne G_M000_IG111 G_M000_IG54: ldr x1, [x20, #0x0C] movz x0, #1 movk x0, #4 LSL #16 movk x0, #48 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #97 LSL #32 movk x2, #103 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG105 b G_M000_IG111 G_M000_IG55: cmp w21, #7 bne G_M000_IG57 G_M000_IG56: ldr x1, [x20, #0x0C] movz x0, #4 LSL #16 movk x0, #48 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #65 LSL #32 movk x2, #71 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG108 G_M000_IG57: cmp w21, #7 bne G_M000_IG111 G_M000_IG58: ldr x1, [x20, #0x0C] movz x0, #1 movk x0, #4 LSL #16 movk x0, #48 LSL #48 eor x1, x1, x0 ldr x0, [x20, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #65 LSL #32 movk x2, #71 LSL #48 eor x0, x0, x2 orr x1, x1, x0 cbz x1, G_M000_IG108 b G_M000_IG111 G_M000_IG59: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG60: ldr w0, [x1, #0x08] cmp w0, #4 bne G_M000_IG188 G_M000_IG61: ldr x1, [x1, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 cset x1, eq tst w1, #255 beq G_M000_IG188 G_M000_IG62: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG188 G_M000_IG63: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG64: ldr w0, [x1, #0x08] cmp w0, #4 bne G_M000_IG188 G_M000_IG65: ldr x1, [x1, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG66: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #-0x30] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG67: ldr w0, [x1, #0x08] cmp w0, #13 bne G_M000_IG188 G_M000_IG68: ldr q16, [x1, #0x0C] ldr q17, [@RWD64] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x16] ldr q18, [@RWD80] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG69: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG70: ldr w0, [x1, #0x08] cmp w0, #4 bne G_M000_IG188 G_M000_IG71: ldr x1, [x1, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG72: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG73: ldr w0, [x1, #0x08] cmp w0, #10 bne G_M000_IG188 G_M000_IG74: ldr q16, [x1, #0x0C] ldr q17, [@RWD96] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x10] ldr q18, [@RWD112] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG75: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x60] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG76: ldr w0, [x1, #0x08] cmp w0, #11 bne G_M000_IG188 G_M000_IG77: ldr q16, [x1, #0x0C] ldr q17, [@RWD128] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x12] ldr q18, [@RWD144] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG78: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x68] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG79: ldr w0, [x1, #0x08] cmp w0, #4 bne G_M000_IG188 G_M000_IG80: ldr x1, [x1, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG81: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x70] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG82: ldr w0, [x1, #0x08] cmp w0, #4 bne G_M000_IG188 G_M000_IG83: ldr x1, [x1, #0x0C] movz x0, #1 LSL #32 movk x0, #0xD1FFAB1E LSL #48 cmp x1, x0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG84: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x78] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG85: ldr w0, [x1, #0x08] cmp w0, #8 bne G_M000_IG188 G_M000_IG86: ldr q16, [x1, #0x0C] ldr q17, [@RWD176] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG87: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG88: ldr w0, [x1, #0x08] cmp w0, #12 bne G_M000_IG188 G_M000_IG89: ldr q16, [x1, #0x0C] ldr q17, [@RWD192] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x14] ldr q18, [@RWD208] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG90: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x88] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG91: ldr w0, [x1, #0x08] cmp w0, #8 bne G_M000_IG188 G_M000_IG92: ldr q16, [x1, #0x0C] ldr q17, [@RWD384] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG93: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x90] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG94: ldr w0, [x1, #0x08] cmp w0, #9 bne G_M000_IG188 G_M000_IG95: ldr q16, [x1, #0x0C] ldr q17, [@RWD256] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x0E] ldr q18, [@RWD272] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG96: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x28] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG97: ldr w0, [x1, #0x08] cmp w0, #7 bne G_M000_IG188 G_M000_IG98: ldr x0, [x1, #0x0C] movz x2, #1 movk x2, #4 LSL #16 movk x2, #65 LSL #48 eor x0, x0, x2 ldr x1, [x1, #0x12] movz x2, #65 movk x2, #91 LSL #16 movk x2, #97 LSL #32 movk x2, #123 LSL #48 eor x1, x1, x2 orr x1, x0, x1 cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG99: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x40] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG100: ldr w0, [x1, #0x08] cmp w0, #9 bne G_M000_IG188 G_M000_IG101: ldr q16, [x1, #0x0C] ldr q17, [@RWD496] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x0E] ldr q18, [@RWD480] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG102: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x48] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG103: ldr w0, [x1, #0x08] cmp w0, #9 bne G_M000_IG188 G_M000_IG104: ldr q16, [x1, #0x0C] ldr q17, [@RWD512] eor v16.2d, v16.2d, v17.2d ldr q17, [x1, #0x0E] ldr q18, [@RWD240] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG105: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x50] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x70] cbz x1, G_M000_IG188 G_M000_IG106: ldr w0, [x1, #0x08] cmp w0, #7 bne G_M000_IG188 G_M000_IG107: ldr x0, [x1, #0x0C] movz x2, #1 movk x2, #4 LSL #16 movk x2, #48 LSL #48 eor x0, x0, x2 ldr x1, [x1, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #97 LSL #32 movk x2, #103 LSL #48 eor x1, x1, x2 orr x1, x0, x1 cmp x1, #0 cset x1, eq tst w1, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG108: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x58] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] cbz x0, G_M000_IG188 G_M000_IG109: ldr w1, [x0, #0x08] cmp w1, #7 bne G_M000_IG188 G_M000_IG110: ldr x1, [x0, #0x0C] movz x2, #1 movk x2, #4 LSL #16 movk x2, #48 LSL #48 eor x1, x1, x2 ldr x0, [x0, #0x12] movz x2, #48 movk x2, #58 LSL #16 movk x2, #65 LSL #32 movk x2, #71 LSL #48 eor x0, x0, x2 orr x0, x1, x0 cmp x0, #0 cset x0, eq tst w0, #255 beq G_M000_IG188 b G_M000_IG62 G_M000_IG111: add x2, fp, #88 add x1, fp, #96 ldr x0, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG114 ldrh w1, [fp, #0x60] ldrh w0, [fp, #0x58] cmp w1, w0 bne G_M000_IG112 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG113 G_M000_IG112: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [fp, #0x58] ldr w0, [fp, #0x60] sub w1, w1, w0, UXTH add w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG113: ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG190 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x0, eq cbz w0, G_M000_IG188 b G_M000_IG62 G_M000_IG114: add x21, fp, #168 mov x1, x21 mov w2, #1 add x4, fp, #72 add x3, fp, #80 ldr x0, [fp, #0x70] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbz w0, G_M000_IG115 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x98] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x21] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrb w0, [fp, #0x48] cbz w0, G_M000_IG188 b G_M000_IG62 G_M000_IG115: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] str x1, [fp, #0x80] G_M000_IG116: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x23, fp, #160 mov x1, x23 mov w2, #3 ldr x0, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w22, w0 sub w0, w22, #2 cmp w0, #1 bhi G_M000_IG121 ldrh w0, [x23] ldrh w1, [x23, #0x02] eor w20, w0, w1 sxtw w0, w20 sub w1, w0, #1 tst w0, w1 bne G_M000_IG117 cmp w20, #0 ble G_M000_IG117 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [x23, #0x02] orr w1, w1, w20 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG118 G_M000_IG117: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [x23] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [x23, #0x02] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG118: cmp w22, #3 bne G_M000_IG119 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [x23, #0x04] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG119: ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG120 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x0, eq cbz w0, G_M000_IG187 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG120: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG121: add x2, fp, #56 add x1, fp, #64 ldr x0, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG122 ldrh w0, [fp, #0x38] sxtw w1, w0 orr w1, w1, #32 sub w1, w1, #97 cmp w1, #25 bhi G_M000_IG122 ldrh w1, [fp, #0x3A] sxtw w2, w1 orr w2, w2, #32 sub w2, w2, #97 cmp w2, #25 bhi G_M000_IG122 ldrh w2, [fp, #0x40] orr w2, w2, #32 cmp w2, w0 bne G_M000_IG122 ldrh w0, [fp, #0x42] orr w0, w0, #32 cmp w0, w1 bne G_M000_IG122 ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG120 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x20, eq ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [fp, #0x38] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [fp, #0x3A] ldr w0, [fp, #0x38] sub w1, w1, w0, UXTH add w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w20, G_M000_IG187 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG122: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 stp x0, x1, [fp, #0x28] ldrb w0, [fp, #0x28] cbz w0, G_M000_IG140 ldp w21, w20, [fp, #0x30] sub w22, w20, w21 cmp w22, #32 bgt G_M000_IG131 mov w22, wzr ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG120 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x23, eq sxtw w24, w21 cmp w24, w20 bge G_M000_IG130 G_M000_IG123: ldr x25, [fp, #0x70] uxth w26, w24 ldr w27, [x25, #0x08] cmp w27, #1 bls G_M000_IG120 ldrh w3, [x25, #0x0E] cmp w27, #2 bls G_M000_IG120 ldrh w4, [x25, #0x10] add w0, w3, w4 add w28, w0, #3 mov w0, w26 mov x1, x25 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cmp w27, #0 bls G_M000_IG120 ldrh w1, [x25, #0x0C] cmp w1, #1 bne G_M000_IG125 G_M000_IG124: cmp w0, #0 cset x0, eq cbz w0, G_M000_IG127 b G_M000_IG126 G_M000_IG125: cbz w0, G_M000_IG127 G_M000_IG126: cmp w27, w28 ble G_M000_IG127 mov w0, w26 mov x1, x25 mov w2, w28 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cmp w0, #0 cset x0, eq G_M000_IG127: eor w0, w0, w23 cbz w0, G_M000_IG129 G_M000_IG128: sub w0, w24, w21 neg w0, w0 add w0, w0, #31 mov w1, #1 lsl w0, w1, w0 orr w22, w0, w22 G_M000_IG129: add w24, w24, #1 cmp w24, w20 blt G_M000_IG123 G_M000_IG130: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x20, x0 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] movz x1, #209 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #32 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 mov w2, w22 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x08] blr x3 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #104 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 mov w1, #31 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #105 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #105 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 cbz w23, G_M000_IG187 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG131: cmp w22, #64 bgt G_M000_IG140 mov x22, xzr ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG120 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x23, eq sxtw w24, w21 cmp w24, w20 bge G_M000_IG139 G_M000_IG132: ldr x25, [fp, #0x70] uxth w26, w24 ldr w27, [x25, #0x08] cmp w27, #1 bls G_M000_IG120 ldrh w3, [x25, #0x0E] cmp w27, #2 bls G_M000_IG120 ldrh w4, [x25, #0x10] add w0, w3, w4 add w28, w0, #3 mov w0, w26 mov x1, x25 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cmp w27, #0 bls G_M000_IG120 ldrh w1, [x25, #0x0C] cmp w1, #1 bne G_M000_IG134 G_M000_IG133: cmp w0, #0 cset x0, eq cbz w0, G_M000_IG136 b G_M000_IG135 G_M000_IG134: cbz w0, G_M000_IG136 G_M000_IG135: cmp w27, w28 ble G_M000_IG136 mov w0, w26 mov x1, x25 mov w2, w28 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cmp w0, #0 cset x0, eq G_M000_IG136: eor w0, w0, w23 cbz w0, G_M000_IG138 G_M000_IG137: sub w0, w24, w21 neg w0, w0 add w0, w0, #63 mov x1, #1 lsl x0, x1, x0 orr x22, x0, x22 G_M000_IG138: add w24, w24, #1 cmp w24, w20 blt G_M000_IG132 G_M000_IG139: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x20, x0 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] movz x1, #110 movk x1, #0xD1FFAB1E LSL #32 movk x1, #108 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #105 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 mov w1, #63 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #106 movk x1, #0xD1FFAB1E LSL #32 movk x1, #108 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #106 movk x1, #0xD1FFAB1E LSL #32 movk x1, #108 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 cbz w23, G_M000_IG187 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG140: add x2, fp, #24 add x1, fp, #32 ldr x0, [fp, #0x70] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG147 ldr x0, [fp, #0x70] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG120 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x20, eq ldrh w0, [fp, #0x20] ldrh w1, [fp, #0x22] cmp w0, w1 bne G_M000_IG141 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG142 G_M000_IG141: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [fp, #0x22] ldr w0, [fp, #0x20] sub w1, w1, w0, UXTH add w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG142: cbz w20, G_M000_IG143 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG143: ldrh w0, [fp, #0x18] ldrh w1, [fp, #0x1A] cmp w0, w1 bne G_M000_IG144 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG145 G_M000_IG144: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrh w1, [fp, #0x1A] ldr w0, [fp, #0x18] sub w1, w1, w0, UXTH add w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG145: mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w20, G_M000_IG146 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG146: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG187 G_M000_IG147: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x88] str x1, [fp, #0x90] G_M000_IG148: ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 str w0, [fp, #0x9C] ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 str w0, [fp, #0x98] ldrb w1, [fp, #0x2A] cbz w1, G_M000_IG149 add x1, fp, #104 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG186 G_M000_IG149: ldrb w1, [fp, #0x2B] cbz w1, G_M000_IG150 add x1, fp, #104 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG186 G_M000_IG150: ldr x20, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] tbz w0, #0, G_M000_IG184 G_M000_IG151: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x3, [x23, #0xD1FFAB1E] cbnz x3, G_M000_IG154 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr w14, [x14] tbz w14, #0, G_M000_IG183 G_M000_IG152: ldr x15, [x23, #0xD1FFAB1E] cbz x15, G_M000_IG182 add x14, x21, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x21, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr w14, [x14] tbz w14, #0, G_M000_IG181 G_M000_IG153: add x14, x23, #0xD1FFAB1E mov x15, x21 bl CORINFO_HELP_ASSIGN_REF mov x3, x21 G_M000_IG154: mov w1, #8 mov x2, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x20, x0 cbz x20, G_M000_IG159 G_M000_IG155: ldr w1, [x20, #0x08] cmp w1, #8 bne G_M000_IG157 G_M000_IG156: ldr q16, [x20, #0x0C] movi v17.4s, #0 eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbnz w1, G_M000_IG158 G_M000_IG157: ldr w1, [x20, #0x08] cmp w1, #8 bne G_M000_IG159 ldr q16, [x20, #0x0C] mvni v17.4s, #0 eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG159 add x1, fp, #104 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG186 G_M000_IG158: add x1, fp, #104 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG186 G_M000_IG159: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [fp, #0x29] cbnz w0, G_M000_IG160 mov w1, #128 b G_M000_IG161 G_M000_IG160: ldr w1, [fp, #0x34] G_M000_IG161: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr w1, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x20, G_M000_IG177 ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG177 ldr w0, [x20, #0x08] cmp w0, #4 bls G_M000_IG163 ldrh w21, [x20, #0x14] cbz w21, G_M000_IG167 cmp w21, #126 beq G_M000_IG170 mov w0, #0xD1FFAB1E cmp w21, w0 bne G_M000_IG177 ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG165 G_M000_IG162: ldr q16, [x20, #0x0C] ldr q17, [@RWD528] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq b G_M000_IG164 G_M000_IG163: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG164: cbnz w0, G_M000_IG172 G_M000_IG165: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG166 ldr q16, [x20, #0x0C] ldr q17, [@RWD544] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG174 G_M000_IG166: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG177 ldr q16, [x20, #0x0C] ldr q17, [@RWD560] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG177 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x38] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG167: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG168 ldr q16, [x20, #0x0C] ldr q17, [@RWD576] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG173 G_M000_IG168: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG169 ldr q16, [x20, #0x0C] ldr q17, [@RWD592] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG175 G_M000_IG169: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG177 ldr q16, [x20, #0x0C] ldr q17, [@RWD608] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG177 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x50] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG170: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG171 ldr q16, [x20, #0x0C] ldr q17, [@RWD624] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG176 G_M000_IG171: ldr w0, [x20, #0x08] cmp w0, #8 bne G_M000_IG177 ldr q16, [x20, #0x0C] ldr q17, [@RWD640] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG177 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x58] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG172: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x40] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG173: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG174: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x28] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG175: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x30] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG176: ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0x48] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG178 G_M000_IG177: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x80] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #31 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG178: ldr x1, [fp, #0x90] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr w1, [fp, #0x9C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [fp, #0x98] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldrb w0, [fp, #0x29] cbz w0, G_M000_IG179 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x90] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG180 G_M000_IG179: ldrb w0, [fp, #0x2C] cbz w0, G_M000_IG185 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x90] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG180: ldr x0, [x19, #0x08] ldr w1, [fp, #0x9C] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x1, [fp, #0x90] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG186 G_M000_IG181: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #93 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG153 G_M000_IG182: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG183: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #93 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG152 G_M000_IG184: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #93 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE b G_M000_IG151 G_M000_IG185: add x1, fp, #104 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG180 G_M000_IG186: ldp x0, x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 stp xzr, xzr, [fp, #0x88] G_M000_IG187: ldp x0, x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 stp xzr, xzr, [fp, #0x78] G_M000_IG188: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xB0] cmp xip0, xip1 beq G_M000_IG189 bl CORINFO_HELP_FAIL_FAST G_M000_IG189: ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xF0] ldp x23, x24, [sp, #0xE0] ldp x21, x22, [sp, #0xD0] ldp x19, x20, [sp, #0xC0] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG190: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG191: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG192: ldp x0, x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 stp xzr, xzr, [fp, #0x88] G_M000_IG193: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG194: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG195: ldp x0, x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 stp xzr, xzr, [fp, #0x78] G_M000_IG196: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG111 - G_M000_IG02 dd G_M000_IG111 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 RWD40 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG36 - G_M000_IG02 dd G_M000_IG32 - G_M000_IG02 RWD52 dd 00000000h, 00000000h, 00000000h RWD64 dq 0000000A00000000h, FFFDFFFBFFFCFFFEh RWD80 dq FFFFFFFDFFFBFFFCh, 0000FFEDFFF7FFFAh RWD96 dq 0000000700000000h, FFFDFFFBFFFCFFFEh RWD112 dq FFFCFFFE00000007h, 0000FFFFFFFDFFFBh RWD128 dq 0000000800000001h, 0003000500040002h RWD144 dq 0005000400020000h, 0009000000010003h RWD160 dq 0000000500000000h, 0000000C000E000Dh RWD176 dq 0000000500000000h, 0000FFF5FFF6FFF7h RWD192 dq 0000000900000000h, FFE7FFEAFFECFFEDh RWD208 dq FFE7FFEAFFECFFEDh, 0000FFE9FFE8FFEBh RWD224 dq 0030000000060000h, 006100470041003Ah RWD240 dq 003A003000000006h, 0067006100470041h RWD256 dq 0000000600000000h, FFE3FFE6FFE4FFE5h RWD272 dq FFE5000000060000h, 0000FFE3FFE6FFE4h RWD288 dq 0000000A00000000h, 0003000500040002h RWD304 dq 0001000300050004h, 0000001300090006h RWD320 dq 0000000700000000h, 0003000500040002h RWD336 dq 0004000200000007h, 0000000100030005h RWD352 dq 0000000800000000h, 0003000500040002h RWD368 dq 0000000500000000h, 0000000B000A0009h RWD384 dq 0000000500000000h, 0000FFF4FFF2FFF3h RWD400 dq 0000000900000000h, 0019001600140013h RWD416 dq 0019001600140013h, 0000001700180015h RWD432 dq 0000000600000000h, 001D001A001C001Bh RWD448 dq 001B000000060000h, 0000001D001A001Ch RWD464 dq 0030000000060000h, 0061005B0041003Ah RWD480 dq 003A003000000006h, 007B0061005B0041h RWD496 dq 0030000000060001h, 0061005B0041003Ah RWD512 dq 0030000000060001h, 006100470041003Ah RWD528 dq 03FF000000000000h, 07FFFFFE07FFFFFEh RWD544 dq 0000000000000000h, 07FFFFFE07FFFFFEh RWD560 dq 0000000000000000h, 0000000007FFFFFEh RWD576 dq 03FF000000000000h, 0000000000000000h RWD592 dq 0000000000000000h, 07FFFFFE00000000h RWD608 dq 03FF000000000000h, 0000007E00000000h RWD624 dq 03FF000000000000h, 0000007E0000007Eh RWD640 dq 03FF000000000000h, 000000000000007Eh ; Total bytes of code 10856 1127: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitMatchCharacterClass(System.String) [Tier-0 switched to FullOpts, IL size=4648, code size=10856] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetSingleRange(System.String,byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG07 ldr x0, [fp, #0x28] ldr w0, [x0, #0x08] ldr x1, [fp, #0x28] mov w2, #1 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG09 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] add w1, w1, #3 cmp w0, w1 bne G_M000_IG07 ldr x0, [fp, #0x28] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #1 beq G_M000_IG03 ldr w0, [fp, #0x14] cmp w0, #2 beq G_M000_IG05 b G_M000_IG07 G_M000_IG03: ldr x0, [fp, #0x28] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr x1, [fp, #0x20] strh w0, [x1] ldr x0, [fp, #0x18] mov w1, #0xD1FFAB1E strh w1, [x0] mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: ldr x0, [fp, #0x28] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr x1, [fp, #0x20] strh w0, [x1] ldr x0, [fp, #0x28] mov w1, #4 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] sub w0, w0, #1 ldr x1, [fp, #0x18] strh w0, [x1] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: str wzr, [fp, #0x10] ldr x0, [fp, #0x18] strh wzr, [x0] ldr x0, [fp, #0x20] ldr w1, [fp, #0x10] strh w1, [x0] mov w0, wzr G_M000_IG08: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 376 1128: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetSingleRange(System.String,byref,byref) [Tier0, IL size=95, code size=376] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetOnlyCategories(System.String,System.Span`1[int],byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str x0, [fp, #0x68] str x1, [fp, #0x58] str x2, [fp, #0x60] str x3, [fp, #0x50] str x4, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] strb wzr, [x0] ldr x0, [fp, #0x50] str wzr, [x0] str wzr, [fp, #0x44] ldr x0, [fp, #0x68] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x40] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x40] cbz w0, G_M000_IG03 ldr x0, [fp, #0x68] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: b G_M000_IG23 G_M000_IG04: ldr x0, [fp, #0x68] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] add w0, w0, #3 str w0, [fp, #0x3C] mov w0, #3 str w0, [fp, #0x38] b G_M000_IG27 G_M000_IG05: ldr x0, [fp, #0x68] ldr w1, [fp, #0x38] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrsh w0, [x0] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cmp w0, #0 ble G_M000_IG08 ldr w0, [fp, #0x44] ldr x1, [fp, #0x48] ldrb w1, [x1] and w0, w0, w1 cbnz w0, G_M000_IG06 ldr w0, [fp, #0x34] cmp w0, #100 beq G_M000_IG06 ldr x0, [fp, #0x50] ldr w0, [x0] ldr w1, [fp, #0x60] cmp w0, w1 bne G_M000_IG07 G_M000_IG06: b G_M000_IG23 G_M000_IG07: mov w0, #1 str w0, [fp, #0x44] ldr x0, [fp, #0x50] ldr w0, [x0] str w0, [fp, #0x30] ldr w0, [fp, #0x30] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1] ldr w0, [fp, #0x30] ldr w1, [fp, #0x60] cmp w0, w1 bhs G_M000_IG32 ldr x0, [fp, #0x58] ldr w1, [fp, #0x30] mov w1, w1 lsl x1, x1, #2 ldr w2, [fp, #0x34] sub w2, w2, #1 str w2, [x0, x1] b G_M000_IG26 G_M000_IG08: ldr w0, [fp, #0x34] tbz w0, #31, G_M000_IG12 ldr w0, [fp, #0x44] cbz w0, G_M000_IG09 ldr x0, [fp, #0x48] ldrb w0, [x0] cbz w0, G_M000_IG10 G_M000_IG09: ldr w0, [fp, #0x34] cmn w0, #100 beq G_M000_IG10 ldr x0, [fp, #0x50] ldr w0, [x0] ldr w1, [fp, #0x60] cmp w0, w1 bne G_M000_IG11 G_M000_IG10: b G_M000_IG23 G_M000_IG11: mov w0, #1 str w0, [fp, #0x44] ldr x0, [fp, #0x48] mov w1, #1 strb w1, [x0] ldr x0, [fp, #0x50] ldr w0, [x0] str w0, [fp, #0x30] ldr w0, [fp, #0x30] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1] ldr w0, [fp, #0x30] ldr w1, [fp, #0x60] cmp w0, w1 bhs G_M000_IG32 ldr x0, [fp, #0x58] ldr w1, [fp, #0x30] mov w1, w1 lsl x1, x1, #2 ldr w2, [fp, #0x34] neg w2, w2 sub w2, w2, #1 str w2, [x0, x1] b G_M000_IG26 G_M000_IG12: ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x2C] ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x38] ldr x0, [fp, #0x68] ldr w1, [fp, #0x2C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrsh w0, [x0] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cmp w0, #0 ble G_M000_IG18 ldr w0, [fp, #0x44] ldr x1, [fp, #0x48] ldrb w1, [x1] and w0, w0, w1 cbz w0, G_M000_IG13 b G_M000_IG23 G_M000_IG13: mov w0, #1 str w0, [fp, #0x44] G_M000_IG14: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: add x0, fp, #24 mov w1, #220 bl CORINFO_HELP_PATCHPOINT G_M000_IG16: ldr x0, [fp, #0x50] ldr w0, [x0] ldr w1, [fp, #0x60] cmp w0, w1 bne G_M000_IG17 b G_M000_IG23 G_M000_IG17: ldr x0, [fp, #0x50] ldr w0, [x0] str w0, [fp, #0x30] ldr w0, [fp, #0x30] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1] ldr w0, [fp, #0x30] ldr w1, [fp, #0x60] cmp w0, w1 bhs G_M000_IG32 ldr x0, [fp, #0x58] ldr w1, [fp, #0x30] mov w1, w1 lsl x1, x1, #2 ldr w2, [fp, #0x34] sub w2, w2, #1 str w2, [x0, x1] ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x24] ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x38] ldr x0, [fp, #0x68] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrsh w0, [x0] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cbnz w0, G_M000_IG14 b G_M000_IG26 G_M000_IG18: ldr w0, [fp, #0x44] cbz w0, G_M000_IG19 ldr x0, [fp, #0x48] ldrb w0, [x0] cbnz w0, G_M000_IG19 b G_M000_IG23 G_M000_IG19: ldr x0, [fp, #0x48] mov w1, #1 strb w1, [x0] mov w1, #1 str w1, [fp, #0x44] G_M000_IG20: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG22 G_M000_IG21: add x0, fp, #24 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG22: ldr x0, [fp, #0x50] ldr w0, [x0] ldr w1, [fp, #0x60] cmp w0, w1 bne G_M000_IG25 b G_M000_IG23 G_M000_IG23: mov w0, wzr G_M000_IG24: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG25: ldr x0, [fp, #0x50] ldr w0, [x0] str w0, [fp, #0x30] ldr w0, [fp, #0x30] add w0, w0, #1 ldr x1, [fp, #0x50] str w0, [x1] ldr w0, [fp, #0x30] ldr w1, [fp, #0x60] cmp w0, w1 bhs G_M000_IG32 ldr x0, [fp, #0x58] ldr w1, [fp, #0x30] mov w1, w1 lsl x1, x1, #2 ldr w2, [fp, #0x34] neg w2, w2 sub w2, w2, #1 str w2, [x0, x1] ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x38] ldr x0, [fp, #0x68] ldr w1, [fp, #0x28] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG32 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrsh w0, [x0] str w0, [fp, #0x34] ldr w0, [fp, #0x34] cbnz w0, G_M000_IG20 G_M000_IG26: ldr w0, [fp, #0x38] add w0, w0, #1 str w0, [fp, #0x38] G_M000_IG27: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG29 G_M000_IG28: add x0, fp, #24 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG29: ldr w0, [fp, #0x38] ldr w1, [fp, #0x3C] cmp w0, w1 blt G_M000_IG05 ldr x0, [fp, #0x48] ldrb w0, [x0] str w0, [fp, #0x20] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x20] eor w0, w0, w1 ldr x1, [fp, #0x48] strb w0, [x1] b G_M000_IG30 G_M000_IG30: mov w0, #1 G_M000_IG31: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG32: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1280 1129: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetOnlyCategories(System.String,System.Span`1[int],byref,byref) [Tier0, IL size=370, code size=1280] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Or():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1130: JIT compiled System.Text.RegularExpressions.RegexCompiler:Or() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiChar|19(System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x3, [fp, #0x20] ldr w3, [x3, #0x28] and w3, w3, #64 cmp w3, #0 cset x3, ne ldr w2, [fp, #0x1C] uxtb w2, w2 ldr x0, [fp, #0x28] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 1131: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiChar|19(System.Text.RegularExpressions.RegexNode,bool) [Tier0, IL size=26, code size=120] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiCharString|20(System.String,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] str w3, [fp, #0x28] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr w0, [fp, #0x28] uxtb w0, w0 cbz w0, G_M000_IG08 ldr x0, [fp, #0x38] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] ldr w0, [x0, #0x08] sub w0, w0, #1 str w0, [fp, #0x24] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x30] ldr w2, [fp, #0x24] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG10 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x24] sub w0, w0, #1 str w0, [fp, #0x24] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x24] tbz w0, #31, G_M000_IG03 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr w1, [x1, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr w1, [x1, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x38] ldr w0, [x0, #0x38] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] add w0, w0, w1 ldr x1, [fp, #0x38] str w0, [x1, #0x38] G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1072 1132: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiCharString|20(System.String,bool,bool) [Tier0, IL size=418, code size=1072] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldstr(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x38] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1133: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldstr(System.String) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.Regex:Match(System.String):System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x50] str xzr, [fp, #0x40] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x68] str x1, [fp, #0x60] G_M000_IG02: ldr x0, [fp, #0x60] cbnz x0, G_M000_IG03 mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] str w0, [fp, #0x5C] ldr x0, [fp, #0x68] str x0, [fp, #0x50] mov w0, #2 str w0, [fp, #0x4C] movn w0, #0 str w0, [fp, #0x48] ldr x0, [fp, #0x60] str x0, [fp, #0x40] str wzr, [fp, #0x3C] ldr w0, [fp, #0x5C] str w0, [fp, #0x38] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x50] str x0, [fp, #0x30] ldr w0, [fp, #0x4C] str w0, [fp, #0x2C] ldr w0, [fp, #0x48] str w0, [fp, #0x28] ldr x0, [fp, #0x40] str x0, [fp, #0x20] ldr w0, [fp, #0x3C] str w0, [fp, #0x1C] ldr w0, [fp, #0x38] str w0, [fp, #0x18] str wzr, [fp, #0x14] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x50] str x0, [fp, #0x30] ldr w0, [fp, #0x4C] str w0, [fp, #0x2C] ldr w0, [fp, #0x48] str w0, [fp, #0x28] ldr x0, [fp, #0x40] str x0, [fp, #0x20] ldr w0, [fp, #0x3C] str w0, [fp, #0x1C] ldr w0, [fp, #0x38] str w0, [fp, #0x18] ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] str w0, [fp, #0x14] G_M000_IG05: ldr x0, [fp, #0x30] ldr w1, [fp, #0x2C] ldr w2, [fp, #0x28] ldr x3, [fp, #0x20] ldr w4, [fp, #0x1C] ldr w5, [fp, #0x18] ldr w6, [fp, #0x14] movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 320 1134: JIT compiled System.Text.RegularExpressions.Regex:Match(System.String) [Tier0, IL size=43, code size=320] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunSingleMatch(int,int,System.String,int,int,int):System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] add x7, sp, #144 str x7, [fp, #0x88] str x0, [fp, #0x80] str w1, [fp, #0x7C] str w2, [fp, #0x78] str x3, [fp, #0x70] str w4, [fp, #0x6C] str w5, [fp, #0x68] str w6, [fp, #0x64] G_M000_IG02: ldr x0, [fp, #0x70] ldr w0, [x0, #0x08] ldr w1, [fp, #0x64] cmp w0, w1 bhs G_M000_IG03 mov w0, #14 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr x0, [fp, #0x70] ldr w0, [x0, #0x08] ldr w1, [fp, #0x68] cmp w0, w1 bhs G_M000_IG04 mov w0, #8 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x1, [fp, #0x80] ldrsb wzr, [x1] ldr x1, [fp, #0x80] add x1, x1, #56 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG05 ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] G_M000_IG05: ldr x1, [fp, #0x28] str x1, [fp, #0x58] G_M000_IG06: ldr x1, [fp, #0x80] ldr x1, [x1, #0x48] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x14, [fp, #0x58] add x14, x14, #8 ldr x15, [fp, #0x70] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x70] ldr w1, [fp, #0x6C] ldr w2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG07: ldp x2, x3, [fp, #0x18] stp x2, x3, [fp, #0x48] G_M000_IG08: ldr x2, [fp, #0x48] ldr x3, [fp, #0x50] ldr w4, [fp, #0x64] ldr w0, [fp, #0x6C] sub w4, w4, w0 ldr x0, [fp, #0x58] ldr x1, [fp, #0x80] ldr w5, [fp, #0x7C] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 ldr w0, [fp, #0x78] cbnz w0, G_M000_IG11 ldr w0, [fp, #0x50] str w0, [fp, #0x44] mov w0, #1 str w0, [fp, #0x40] ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG09 str wzr, [fp, #0x44] movn w0, #0 str w0, [fp, #0x40] G_M000_IG09: ldr x0, [fp, #0x58] ldr w0, [x0, #0x48] ldr w1, [fp, #0x44] cmp w0, w1 bne G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] b G_M000_IG12 G_M000_IG10: ldr x5, [fp, #0x58] ldr w5, [x5, #0x4C] ldr w6, [fp, #0x40] add w5, w5, w6 ldr x6, [fp, #0x58] str w5, [x6, #0x4C] G_M000_IG11: ldr x5, [fp, #0x48] ldr x6, [fp, #0x50] ldr w1, [fp, #0x7C] cmp w1, #0 cset x1, eq ldr w0, [fp, #0x7C] ldr x2, [fp, #0x70] ldr w3, [fp, #0x6C] ldr x4, [fp, #0x58] mov w7, #1 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 str x0, [fp, #0x38] b G_M000_IG14 G_M000_IG12: ldr x0, [fp, #0x88] bl G_M000_IG18 G_M000_IG13: b G_M000_IG16 G_M000_IG14: ldr x0, [fp, #0x88] bl G_M000_IG18 G_M000_IG15: nop G_M000_IG16: ldr x0, [fp, #0x38] G_M000_IG17: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG18: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG19: ldr x14, [fp, #0x58] str xzr, [x14, #0x08] ldr x14, [fp, #0x80] add x14, x14, #56 ldr x15, [fp, #0x58] bl CORINFO_HELP_ASSIGN_REF G_M000_IG20: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 708 1135: JIT compiled System.Text.RegularExpressions.Regex:RunSingleMatch(int,int,System.String,int,int,int) [Tier0, IL size=199, code size=708] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex2_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1136: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex2_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1137: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1138: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex2_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.Match:NextMatch():System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x10] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x40] str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x3, [fp, #0x10] ldr x5, [fp, #0x28] ldr w5, [x5, #0x5C] ldr x4, [fp, #0x28] ldr w4, [x4, #0x34] sub w5, w5, w4 ldr x4, [fp, #0x28] ldr w4, [x4, #0x34] ldr x6, [fp, #0x28] ldr w6, [x6, #0x58] ldr w2, [fp, #0x1C] ldr x0, [fp, #0x20] mov w1, #2 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] ldr wzr, [x0] blr x7 G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 192 1139: JIT compiled System.Text.RegularExpressions.Match:NextMatch() [Tier0, IL size=57, code size=192] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Text():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1140: JIT compiled System.Text.RegularExpressions.Capture:get_Text() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanCharClass(bool,bool):System.Text.RegularExpressions.RegexCharClass:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #152 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] G_M000_IG02: str wzr, [fp, #0xF8] str wzr, [fp, #0xF4] mov w0, #1 str w0, [fp, #0xF0] str wzr, [fp, #0xEC] mov w0, #0xD1FFAB1E str w0, [fp, #0x80] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] str x0, [fp, #0xC0] b G_M000_IG04 G_M000_IG03: str xzr, [fp, #0xC0] G_M000_IG04: ldr x0, [fp, #0xC0] str x0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #94 bne G_M000_IG41 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG05 ldr x0, [fp, #0xE0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG05: ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x70] and w1, w1, #0xD1FFAB1E cbz w1, G_M000_IG41 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x58] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #93 bne G_M000_IG41 str wzr, [fp, #0xF0] b G_M000_IG41 G_M000_IG06: str wzr, [fp, #0xDC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xFC] ldr w0, [fp, #0xFC] cmp w0, #93 bne G_M000_IG07 ldr w0, [fp, #0xF0] cbnz w0, G_M000_IG31 mov w0, #1 str w0, [fp, #0xEC] b G_M000_IG44 G_M000_IG07: ldr w0, [fp, #0xFC] cmp w0, #92 bne G_M000_IG29 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG29 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xBC] ldr w0, [fp, #0xBC] uxth w0, w0 str w0, [fp, #0xFC] ldr w0, [fp, #0xBC] uxth w0, w0 str w0, [fp, #0xD8] ldr w0, [fp, #0xD8] cmp w0, #83 bhi G_M000_IG09 ldr w0, [fp, #0xD8] cmp w0, #68 bhi G_M000_IG08 ldr w0, [fp, #0xD8] cmp w0, #45 beq G_M000_IG24 ldr w0, [fp, #0xD8] cmp w0, #68 beq G_M000_IG11 b G_M000_IG28 G_M000_IG08: ldr w0, [fp, #0xD8] cmp w0, #80 beq G_M000_IG20 ldr w0, [fp, #0xD8] cmp w0, #83 beq G_M000_IG14 b G_M000_IG28 G_M000_IG09: ldr w0, [fp, #0xD8] cmp w0, #100 bhi G_M000_IG10 ldr w0, [fp, #0xD8] cmp w0, #87 beq G_M000_IG17 ldr w0, [fp, #0xD8] cmp w0, #100 beq G_M000_IG11 b G_M000_IG28 G_M000_IG10: ldr w0, [fp, #0xD8] cmp w0, #112 beq G_M000_IG20 ldr w0, [fp, #0xD8] cmp w0, #115 beq G_M000_IG14 ldr w0, [fp, #0xD8] cmp w0, #119 beq G_M000_IG17 b G_M000_IG28 G_M000_IG11: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr w0, [fp, #0xF4] cbz w0, G_M000_IG13 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x90] ldr x1, [fp, #0xB0] ldr w0, [fp, #0xFC] strh w0, [x1, #0x08] ldr x1, [fp, #0xB0] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x2, [fp, #0x78] ldr x0, [fp, #0xD1FFAB1E] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x74] ldr w1, [fp, #0x74] ldr w2, [fp, #0xFC] cmp w2, #68 cset x2, eq ldr x4, [fp, #0xD1FFAB1E] ldr w4, [x4, #0x58] ldr x3, [fp, #0xD1FFAB1E] ldr x3, [x3, #0x28] ldr x0, [fp, #0xE0] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] blr x5 b G_M000_IG40 G_M000_IG14: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr w0, [fp, #0xF4] cbz w0, G_M000_IG16 G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xA0] ldr x1, [fp, #0xB0] ldr w0, [fp, #0xFC] strh w0, [x1, #0x08] ldr x1, [fp, #0xB0] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x2, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] ldr w1, [fp, #0x64] ldr w2, [fp, #0xFC] cmp w2, #83 cset x2, eq ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG40 G_M000_IG17: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr w0, [fp, #0xF4] cbz w0, G_M000_IG19 G_M000_IG18: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x98] ldr x1, [fp, #0xB0] ldr w0, [fp, #0xFC] strh w0, [x1, #0x08] ldr x1, [fp, #0xB0] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] ldr x2, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG19: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x54] ldr w1, [fp, #0x54] ldr w2, [fp, #0xFC] cmp w2, #87 cset x2, eq ldr x0, [fp, #0xE0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG40 G_M000_IG20: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG23 ldr w0, [fp, #0xF4] cbz w0, G_M000_IG22 G_M000_IG21: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xA8] ldr x1, [fp, #0xB0] ldr w0, [fp, #0xFC] strh w0, [x1, #0x08] ldr x1, [fp, #0xB0] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] mov w1, #25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr w2, [fp, #0xFC] cmp w2, #112 cset x2, ne ldr x5, [fp, #0xD1FFAB1E] ldr w5, [x5, #0x58] ldr x4, [fp, #0xD1FFAB1E] ldr x4, [x4, #0x28] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 ldr x0, [fp, #0xE0] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 b G_M000_IG40 G_M000_IG23: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG40 G_M000_IG24: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr w0, [fp, #0xF4] cbz w0, G_M000_IG27 ldr w0, [fp, #0xF8] ldr w1, [fp, #0xFC] cmp w0, w1 ble G_M000_IG26 G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x38] ldr x2, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] mov w1, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG26: ldr x0, [fp, #0xE0] ldr w1, [fp, #0xF8] ldr w2, [fp, #0xFC] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str wzr, [fp, #0xF4] str wzr, [fp, #0xF8] b G_M000_IG40 G_M000_IG27: ldr x0, [fp, #0xE0] ldr w1, [fp, #0xFC] ldr w2, [fp, #0xFC] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG40 G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xFC] mov w0, #1 str w0, [fp, #0xDC] b G_M000_IG31 G_M000_IG29: ldr w0, [fp, #0xFC] cmp w0, #91 bne G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #58 bne G_M000_IG31 ldr w0, [fp, #0xF4] cbnz w0, G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 blt G_M000_IG30 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #58 bne G_M000_IG30 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #93 beq G_M000_IG31 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG31: ldr w0, [fp, #0xF4] cbz w0, G_M000_IG36 str wzr, [fp, #0xF4] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr w0, [fp, #0xFC] cmp w0, #91 bne G_M000_IG33 ldr w0, [fp, #0xDC] cbnz w0, G_M000_IG33 ldr w0, [fp, #0xF0] cbnz w0, G_M000_IG33 ldr x0, [fp, #0xE0] ldr w1, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr w2, [fp, #0xD1FFAB1E] uxtb w2, w2 ldr w1, [fp, #0xD1FFAB1E] uxtb w1, w1 ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG40 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #93 beq G_M000_IG40 G_M000_IG32: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG33: ldr w0, [fp, #0xF8] ldr w1, [fp, #0xFC] cmp w0, w1 ble G_M000_IG35 G_M000_IG34: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] mov w1, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG35: ldr x0, [fp, #0xE0] ldr w1, [fp, #0xF8] ldr w2, [fp, #0xFC] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG40 G_M000_IG36: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 blt G_M000_IG37 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #45 bne G_M000_IG37 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #93 beq G_M000_IG37 ldr w0, [fp, #0xFC] str w0, [fp, #0xF8] mov w0, #1 str w0, [fp, #0xF4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG40 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG39 ldr w0, [fp, #0xFC] cmp w0, #45 bne G_M000_IG39 ldr w0, [fp, #0xDC] cbnz w0, G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #91 bne G_M000_IG39 ldr w0, [fp, #0xF0] cbnz w0, G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w2, [fp, #0xD1FFAB1E] uxtb w2, w2 ldr w1, [fp, #0xD1FFAB1E] uxtb w1, w1 ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0xC8] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr x0, [fp, #0xE0] ldr x1, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG40 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #93 beq G_M000_IG40 G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x0, [fp, #0xD1FFAB1E] mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG39: ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG40 ldr x0, [fp, #0xE0] ldr w1, [fp, #0xFC] ldr w2, [fp, #0xFC] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG40: str wzr, [fp, #0xF0] G_M000_IG41: ldr w0, [fp, #0x80] sub w0, w0, #1 str w0, [fp, #0x80] ldr w0, [fp, #0x80] cmp w0, #0 bgt G_M000_IG43 G_M000_IG42: add x0, fp, #128 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG43: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 bgt G_M000_IG06 G_M000_IG44: ldr w1, [fp, #0xEC] cbnz w1, G_M000_IG46 G_M000_IG45: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x0, [fp, #0xD1FFAB1E] mov w1, #22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG46: ldr w1, [fp, #0xD1FFAB1E] uxtb w1, w1 cmp w1, #0 cset x1, eq ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 and w1, w1, w0 cbz w1, G_M000_IG47 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x30] ldr x0, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG47: ldr x0, [fp, #0xE0] G_M000_IG48: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 3276 1141: JIT compiled System.Text.RegularExpressions.RegexParser:ScanCharClass(bool,bool) [Tier0, IL size=1015, code size=3276] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1142: JIT compiled System.Text.RegularExpressions.RegexCharClass:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:AddRange(ushort,ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] G_M000_IG02: str wzr, [fp, #0x18] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr w1, [fp, #0x24] uxth w1, w1 ldr w2, [fp, #0x20] uxth w2, w2 add x0, fp, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 136 1143: JIT compiled System.Text.RegularExpressions.RegexCharClass:AddRange(ushort,ushort) [Tier0, IL size=19, code size=136] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x18] str xzr, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 1144: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate() [Tier0, IL size=25, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceSet():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG03 ldr x0, [fp, #0x78] mov w1, #22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG13 G_M000_IG03: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG08 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] str x0, [fp, #0x40] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #11 beq G_M000_IG06 ldr x0, [fp, #0x40] str x0, [fp, #0x28] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #5 beq G_M000_IG05 ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #45 beq G_M000_IG04 ldr x0, [fp, #0x20] str x0, [fp, #0x38] mov w0, #6 str w0, [fp, #0x34] b G_M000_IG07 G_M000_IG04: ldr x0, [fp, #0x20] str x0, [fp, #0x38] mov w0, #43 str w0, [fp, #0x34] b G_M000_IG07 G_M000_IG05: ldr x0, [fp, #0x28] str x0, [fp, #0x38] mov w0, #3 str w0, [fp, #0x34] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x40] str x0, [fp, #0x38] mov w0, #9 str w0, [fp, #0x34] G_M000_IG07: ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG13 G_M000_IG08: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG13 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x18] ldr w1, [fp, #0x18] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] str x0, [fp, #0x68] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #11 beq G_M000_IG11 ldr x0, [fp, #0x68] str x0, [fp, #0x50] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #5 beq G_M000_IG10 ldr x0, [fp, #0x50] str x0, [fp, #0x48] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #45 beq G_M000_IG09 ldr x0, [fp, #0x48] str x0, [fp, #0x60] mov w0, #7 str w0, [fp, #0x5C] b G_M000_IG12 G_M000_IG09: ldr x0, [fp, #0x48] str x0, [fp, #0x60] mov w0, #44 str w0, [fp, #0x5C] b G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0x50] str x0, [fp, #0x60] mov w0, #4 str w0, [fp, #0x5C] b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x68] str x0, [fp, #0x60] mov w0, #10 str w0, [fp, #0x5C] G_M000_IG12: ldr x0, [fp, #0x60] ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG15: ldr x0, [fp, #0x78] G_M000_IG16: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 1216 1145: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceSet() [Tier0, IL size=301, code size=1216] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsEmpty(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 172 1146: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsEmpty(System.String) [Tier0, IL size=38, code size=172] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSingleton(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #2 bne G_M000_IG06 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] add w0, w0, #1 ldr x1, [fp, #0x18] mov w2, #4 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG08 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 304 1147: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSingleton(System.String) [Tier0, IL size=72, code size=304] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSingletonInverse(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, #2 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] mov w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #2 bne G_M000_IG06 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 ldr x0, [fp, #0x18] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG04 ldr x0, [fp, #0x18] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] add w0, w0, #1 ldr x1, [fp, #0x18] mov w2, #4 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG08 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 304 1148: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSingletonInverse(System.String) [Tier0, IL size=72, code size=304] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:TryGetOrdinalCaseInsensitiveString(int,int,byref,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 43 single block inlinees; 12 inlinees without PGO data G_M000_IG01: sub sp, sp, #144 stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] stp x27, x28, [sp, #0x70] stp fp, lr, [sp, #0x80] add fp, sp, #128 str xzr, [fp, #-0x80] str xzr, [fp, #-0x70] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #-0x58] mov x19, x0 mov w21, w1 mov w20, w2 mov x22, x3 mov x23, x4 G_M000_IG02: ldr wzr, [sp], #-0x40 mov x0, sp str xzr, [fp, #-0x80] str x0, [fp, #-0x70] mov w0, #32 str w0, [fp, #-0x68] str wzr, [fp, #-0x78] sub x24, fp, #96 sxtw w25, w21 cmp w21, w20 bge G_M000_IG31 G_M000_IG03: ldr x26, [x19, #0x08] cbz x26, G_M000_IG05 G_M000_IG04: ldr x0, [x26] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG09 G_M000_IG05: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG08 G_M000_IG06: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG08 G_M000_IG07: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG08: ldr w0, [x2, #0x10] cmp w25, w0 bhs G_M000_IG37 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w25, w1 bhs G_M000_IG40 add x0, x0, #16 ldr x27, [x0, w25, UXTW #3] b G_M000_IG10 G_M000_IG09: mov x27, x26 G_M000_IG10: ldrb w26, [x27, #0x2E] cmp w26, #9 bne G_M000_IG13 G_M000_IG11: ldrh w0, [x27, #0x2C] cmp w0, #128 bge G_M000_IG31 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG31 ldrh w1, [x27, #0x2C] ldr w0, [fp, #-0x78] ldr x2, [fp, #-0x70] ldr w3, [fp, #-0x68] cmp w0, w3 bhs G_M000_IG12 strh w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0x78] b G_M000_IG30 G_M000_IG12: sub x0, fp, #128 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG30 G_M000_IG13: cmp w26, #12 bne G_M000_IG20 ldr x0, [x27, #0x10] cbnz x0, G_M000_IG14 mov x0, xzr mov w1, wzr b G_M000_IG15 G_M000_IG14: add x1, x0, #12 ldr w0, [x0, #0x08] mov w2, w0 mov x0, x1 mov w1, w2 G_M000_IG15: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG31 ldr x0, [x27, #0x10] cbnz x0, G_M000_IG16 mov x0, xzr mov w1, wzr b G_M000_IG17 G_M000_IG16: add x1, x0, #12 ldr w0, [x0, #0x08] mov w2, w0 mov x0, x1 mov w1, w2 G_M000_IG17: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG31 ldr x26, [x27, #0x10] cbz x26, G_M000_IG30 ldr w27, [fp, #-0x78] sxtw w1, w27 ldr w28, [x26, #0x08] cmp w28, #1 bne G_M000_IG18 ldr w0, [fp, #-0x68] cmp w1, w0 bhs G_M000_IG18 ldr w0, [fp, #-0x68] cmp w1, w0 bhs G_M000_IG40 ldr x0, [fp, #-0x70] ubfiz x2, x1, #1, #32 add x0, x0, x2 ldrh w2, [x26, #0x0C] strh w2, [x0] add w1, w1, #1 str w1, [fp, #-0x78] b G_M000_IG30 G_M000_IG18: ldr w1, [fp, #-0x68] sub w1, w1, w28 cmp w1, w27 bge G_M000_IG19 mov w1, w28 sub x0, fp, #128 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr w2, [fp, #-0x68] cmp w27, w2 bhi G_M000_IG38 ldr x0, [fp, #-0x70] ubfiz x1, x27, #1, #32 add x0, x0, x1 sub w2, w2, w27 cmp w28, w2 bhi G_M000_IG39 add x1, x26, #12 mov w2, w28 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w1, [fp, #-0x78] add w1, w1, w28 str w1, [fp, #-0x78] b G_M000_IG30 G_M000_IG20: cmp w26, #11 cset x1, eq cbnz w1, G_M000_IG23 mov w1, #45 cmp w26, #5 ccmp w26, #8, z, ne ccmp w26, w1, z, ne bne G_M000_IG21 ldp w1, w2, [x27, #0x20] cmp w1, w2 cset x1, eq b G_M000_IG22 G_M000_IG21: mov w1, wzr G_M000_IG22: uxtb w1, w1 G_M000_IG23: cbz w1, G_M000_IG31 ldr x1, [x27, #0x10] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG40 ldrh w1, [x1, #0x0C] cmp w1, #1 beq G_M000_IG31 mov x1, x24 mov w2, #2 ldr x0, [x27, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cmp w0, #2 bne G_M000_IG31 ldrh w0, [x24] cmp w0, #128 bge G_M000_IG31 ldrh w1, [x24, #0x02] cmp w1, #128 bge G_M000_IG31 cmp w0, w1 beq G_M000_IG31 cmp w0, #127 bhi G_M000_IG24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] tst w0, #96 beq G_M000_IG31 b G_M000_IG25 G_M000_IG24: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #4 bhi G_M000_IG31 G_M000_IG25: ldrh w0, [x24, #0x02] cmp w0, #127 bhi G_M000_IG26 cmp w0, #0xD1FFAB1E bhs G_M000_IG40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] tst w0, #96 beq G_M000_IG31 b G_M000_IG27 G_M000_IG26: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #4 bhi G_M000_IG31 G_M000_IG27: ldrh w1, [x24] orr w1, w1, #32 ldrh w0, [x24, #0x02] orr w0, w0, #32 cmp w1, w0 bne G_M000_IG31 sub x0, fp, #128 ldrb w2, [x27, #0x2E] cmp w2, #11 beq G_M000_IG28 ldr w2, [x27, #0x20] b G_M000_IG29 G_M000_IG28: mov w2, #1 G_M000_IG29: uxth w1, w1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG30: add w25, w25, #1 cmp w25, w20 blt G_M000_IG03 G_M000_IG31: ldr w0, [fp, #-0x78] cmp w0, #2 blt G_M000_IG34 G_M000_IG32: sub x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 mov x14, x23 bl CORINFO_HELP_CHECKED_ASSIGN_REF sub w0, w25, w21 str w0, [x22] mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x58] cmp xip0, xip1 beq G_M000_IG33 bl CORINFO_HELP_FAIL_FAST G_M000_IG33: sub sp, fp, #128 ldp fp, lr, [sp, #0x80] ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] add sp, sp, #144 ret lr G_M000_IG34: str xzr, [x23] str wzr, [x22] ldr x1, [fp, #-0x80] stp xzr, xzr, [fp, #-0x80] stp xzr, xzr, [fp, #-0x70] cbz x1, G_M000_IG35 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG35: mov w0, wzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x58] cmp xip0, xip1 beq G_M000_IG36 bl CORINFO_HELP_FAIL_FAST G_M000_IG36: sub sp, fp, #128 ldp fp, lr, [sp, #0x80] ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] add sp, sp, #144 ret lr G_M000_IG37: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG39: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG40: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1448 1149: JIT compiled System.Text.RegularExpressions.RegexNode:TryGetOrdinalCaseInsensitiveString(int,int,byref,byref) [Tier-0 switched to FullOpts, IL size=527, code size=1448] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x30] str x1, [fp, #0x38] G_M000_IG02: ldp x0, x1, [fp, #0x30] stp x0, x1, [fp, #0x20] G_M000_IG03: str wzr, [fp, #0x1C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG07 G_M000_IG04: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x28] cmp w0, w1 bhs G_M000_IG11 ldr x0, [fp, #0x20] ldr w1, [fp, #0x1C] mov w1, w1 lsl x1, x1, #1 ldrh w0, [x0, x1] str w0, [fp, #0x18] ldr w0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr w0, [fp, #0x1C] add w0, w0, #1 str w0, [fp, #0x1C] G_M000_IG07: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #16 mov w1, #30 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x28] cmp w0, w1 blt G_M000_IG04 mov w0, wzr G_M000_IG10: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 208 1150: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(System.ReadOnlySpan`1[ushort]) [Tier0, IL size=42, code size=208] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: ldr w0, [fp, #0x1C] uxth w0, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] sub w0, w0, #8 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #16 bhi G_M000_IG03 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG06 G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 ; Total bytes of code 124 1151: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(int) [Tier0, IL size=90, code size=124] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex3_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1152: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex3_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1153: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1154: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex3_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex4_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1155: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex4_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1156: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1157: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex4_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex5_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1158: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex5_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1159: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1160: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex5_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex6_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1161: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex6_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1162: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1163: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex6_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex7_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1164: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex7_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1165: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1166: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex7_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex8_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1167: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex8_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1168: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1169: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex8_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex9_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1170: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex9_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1171: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1172: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex9_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex10_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1173: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex10_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1174: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1175: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex10_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method BenchmarksGame.RegexRedux_1+IUB:.ctor(System.String,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x28] ldr x15, [fp, #0x20] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 56 1176: JIT compiled BenchmarksGame.RegexRedux_1+IUB:.ctor(System.String,System.String) [Tier0, IL size=15, code size=56] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitIndexOf_LeftToRight|154_1(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str xzr, [x9, #0x80] add x2, sp, #176 str x2, [fp, #0xA8] str x0, [fp, #0xA0] str x1, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0xA0] ldr x0, [x0, #0x10] ldr x0, [x0, #0x10] str x0, [fp, #0x90] ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] str x1, [fp, #0x68] G_M000_IG03: ldp x0, x1, [fp, #0x60] stp x0, x1, [fp, #0x80] G_M000_IG04: ldr x1, [fp, #0x98] ldr x1, [x1, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #16 bne G_M000_IG07 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] str x1, [fp, #0x30] G_M000_IG05: ldp x0, x1, [fp, #0x28] stp x0, x1, [fp, #0x70] G_M000_IG06: ldr w0, [fp, #0x78] cmp w0, #0 ble G_M000_IG07 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] str x0, [fp, #0x58] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #10 beq G_M000_IG08 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x38] str x1, [fp, #0x40] ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x38] str x0, [fp, #0x48] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x58] str x0, [fp, #0x50] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x48] G_M000_IG09: ldr x0, [fp, #0x50] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [fp, #0x98] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x98] ldr x1, [x1, #0x08] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG10 G_M000_IG10: ldr x0, [fp, #0xA8] bl G_M000_IG13 G_M000_IG11: nop G_M000_IG12: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG13: stp fp, lr, [sp, #-0x20]! add x3, fp, #176 str x3, [sp, #0x18] G_M000_IG14: add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1084 1177: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitIndexOf_LeftToRight|154_1(byref) [Tier0, IL size=275, code size=1084] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingPrefix():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1178: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingPrefix() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex11_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1179: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex11_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1180: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1181: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex11_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FirstCharOfOneOrMulti():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #9 beq G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 144 1182: JIT compiled System.Text.RegularExpressions.RegexNode:FirstCharOfOneOrMulti() [Tier0, IL size=30, code size=144] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:SwapIfGreater(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str x0, [fp, #0xA0] str x1, [fp, #0xA8] str x2, [fp, #0x98] str w3, [fp, #0x94] str w4, [fp, #0x90] G_M000_IG02: ldr x0, [fp, #0x98] str x0, [fp, #0x10] ldr w0, [fp, #0x94] ldr w1, [fp, #0xA8] cmp w0, w1 bhs G_M000_IG10 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x94] mov w1, w1 mov x2, #40 mul x1, x1, x2 add x0, x0, x1 G_M000_IG03: ldp q16, q17, [x0] stp q16, q17, [fp, #0x40] ldr x1, [x0, #0x20] str x1, [fp, #0x60] G_M000_IG04: ldr w0, [fp, #0x90] ldr w1, [fp, #0xA8] cmp w0, w1 bhs G_M000_IG10 ldr x0, [fp, #0xA0] ldr w1, [fp, #0x90] mov w1, w1 mov x2, #40 mul x1, x1, x2 add x0, x0, x1 G_M000_IG05: sub x1, x0, #24 ldr x2, [x1, #0x18] str x2, [fp, #0x18] ldp q16, q17, [x1, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] add x1, fp, #64 add x2, fp, #24 ldr x3, [fp, #0x10] ldr x3, [x3, #0x18] blr x3 cmp w0, #0 ble G_M000_IG09 ldr w13, [fp, #0x94] ldr w14, [fp, #0xA8] cmp w13, w14 bhs G_M000_IG10 ldr x13, [fp, #0xA0] ldr w14, [fp, #0x94] mov w14, w14 mov x12, #40 mul x14, x14, x12 add x13, x13, x14 G_M000_IG07: sub x12, x13, #104 ldr x14, [x12, #0x68] str x14, [fp, #0x68] ldp q16, q17, [x12, #0x70] stp q16, q17, [fp, #0x70] G_M000_IG08: ldr w13, [fp, #0x94] ldr w14, [fp, #0xA8] cmp w13, w14 bhs G_M000_IG10 ldr x13, [fp, #0xA0] ldr w14, [fp, #0x94] mov w14, w14 mov x12, #40 mul x14, x14, x12 add x14, x13, x14 ldr w13, [fp, #0x90] ldr w12, [fp, #0xA8] cmp w13, w12 bhs G_M000_IG10 ldr x13, [fp, #0xA0] ldr w12, [fp, #0x90] mov w12, w12 mov x15, #40 mul x12, x12, x15 add x13, x13, x12 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr w14, [fp, #0x90] ldr w13, [fp, #0xA8] cmp w14, w13 bhs G_M000_IG10 ldr x14, [fp, #0xA0] ldr w13, [fp, #0x90] mov w13, w13 mov x12, #40 mul x13, x13, x12 add x14, x14, x13 add x13, fp, #104 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG09: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 452 1183: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:SwapIfGreater(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,int) [Tier0, IL size=90, code size=452] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetDoubleRange(System.String,byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x68] str x1, [fp, #0x60] str x2, [fp, #0x58] G_M000_IG02: ldr x2, [fp, #0x68] mov w1, #2 ldr w0, [x2, #0x08] cmp w1, w0 bhs G_M000_IG10 add x2, x2, x1, LSL #1 add x2, x2, #12 ldrh w2, [x2] cbnz w2, G_M000_IG08 ldr x2, [fp, #0x68] ldr w2, [x2, #0x08] ldr x1, [fp, #0x68] mov w0, #1 ldr w3, [x1, #0x08] cmp w0, w3 bhs G_M000_IG10 add x1, x1, x0, LSL #1 add x1, x1, #12 ldrh w1, [x1] add w1, w1, #3 cmp w2, w1 bne G_M000_IG08 ldr x2, [fp, #0x68] mov w1, #1 ldr w0, [x2, #0x08] cmp w1, w0 bhs G_M000_IG10 add x2, x2, x1, LSL #1 add x2, x2, #12 ldrh w2, [x2] str w2, [fp, #0x54] ldr w2, [fp, #0x54] sub w2, w2, #3 cmp w2, #1 bhi G_M000_IG03 mov w2, #1 str w2, [fp, #0x50] b G_M000_IG04 G_M000_IG03: str wzr, [fp, #0x50] G_M000_IG04: ldr w2, [fp, #0x50] cbz w2, G_M000_IG08 str wzr, [fp, #0x38] ldr x2, [fp, #0x68] mov w1, #4 ldr w0, [x2, #0x08] cmp w1, w0 bhs G_M000_IG10 add x2, x2, x1, LSL #1 add x2, x2, #12 ldrh w2, [x2] sub w2, w2, #1 uxth w2, w2 ldr x1, [fp, #0x68] mov w0, #3 ldr w3, [x1, #0x08] cmp w0, w3 bhs G_M000_IG10 add x1, x1, x0, LSL #1 add x1, x1, #12 ldrh w1, [x1] add x0, fp, #56 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x60] ldr w1, [fp, #0x38] str w1, [x0] ldr x0, [fp, #0x58] str x0, [fp, #0x30] ldr x0, [fp, #0x68] mov w1, #5 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x2C] ldr w0, [fp, #0x54] cmp w0, #3 beq G_M000_IG05 ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] ldr x0, [fp, #0x68] mov w1, #6 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] sub w0, w0, #1 uxth w0, w0 str w0, [fp, #0x18] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [fp, #0x1C] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] G_M000_IG06: str wzr, [fp, #0x10] add x0, fp, #16 ldr w1, [fp, #0x1C] ldr w2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] ldr w1, [fp, #0x10] str w1, [x0] mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: str wzr, [fp, #0x40] add x0, fp, #64 mov w1, wzr mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x40] str w0, [fp, #0x48] ldr x0, [fp, #0x58] ldr w1, [fp, #0x40] str w1, [x0] ldr x0, [fp, #0x60] ldr w1, [fp, #0x48] str w1, [x0] mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 596 1184: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetDoubleRange(System.String,byref,byref) [Tier0, IL size=142, code size=596] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:Analyze(System.String):System.Text.RegularExpressions.RegexCharClass+CharClassAnalysisResults ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] add x1, fp, #88 ldr x0, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG03 ldr w0, [fp, #0x64] ldr w1, [fp, #0x58] uxtb w1, w1 and w0, w0, w1 cbz w0, G_M000_IG05 G_M000_IG03: movi v16.4s, #0 str q16, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] G_M000_IG04: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG05: ldr x0, [fp, #0x68] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x54] ldr x0, [fp, #0x68] ldr x1, [fp, #0x68] mov w2, #1 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG13 add x1, x1, x2, LSL #1 add x1, x1, #12 ldrh w1, [x1] add w1, w1, #3 sub w1, w1, #1 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] str w0, [fp, #0x50] ldr w0, [fp, #0x64] cbz w0, G_M000_IG09 movi v16.4s, #0 str q16, [fp, #0x40] mov w0, #1 strb w0, [fp, #0x40] ldr w0, [fp, #0x50] cmp w0, #128 cset x0, le strb w0, [fp, #0x44] ldr w0, [fp, #0x54] cmp w0, #128 cset x0, ge strb w0, [fp, #0x43] add x0, fp, #64 str x0, [fp, #0x20] ldr w0, [fp, #0x54] cbnz w0, G_M000_IG06 ldr x0, [fp, #0x20] str x0, [fp, #0x18] ldr x0, [fp, #0x68] mov w1, #4 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #128 cset x0, ge str w0, [fp, #0x14] b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x20] str x0, [fp, #0x18] str wzr, [fp, #0x14] G_M000_IG07: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x02] strb wzr, [fp, #0x41] ldr w0, [fp, #0x54] str w0, [fp, #0x48] ldr w0, [fp, #0x50] str w0, [fp, #0x4C] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] G_M000_IG08: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG09: movi v16.4s, #0 str q16, [fp, #0x40] mov w0, #1 strb w0, [fp, #0x40] strb wzr, [fp, #0x44] add x0, fp, #64 str x0, [fp, #0x38] ldr w0, [fp, #0x54] cbnz w0, G_M000_IG10 ldr x0, [fp, #0x68] mov w1, #4 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #128 blt G_M000_IG10 ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr w0, [fp, #0x58] uxtb w0, w0 cmp w0, #0 cset x0, eq str w0, [fp, #0x2C] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x38] str x0, [fp, #0x30] str wzr, [fp, #0x2C] G_M000_IG11: ldr x0, [fp, #0x30] ldr w1, [fp, #0x2C] strb w1, [x0, #0x03] ldr w0, [fp, #0x50] cmp w0, #128 cset x0, le strb w0, [fp, #0x41] ldr w0, [fp, #0x54] cmp w0, #128 cset x0, ge strb w0, [fp, #0x42] ldr w0, [fp, #0x54] str w0, [fp, #0x48] ldr w0, [fp, #0x50] str w0, [fp, #0x4C] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] G_M000_IG12: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 632 1185: JIT compiled System.Text.RegularExpressions.RegexCharClass:Analyze(System.String) [Tier0, IL size=281, code size=632] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] cmp w0, #1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 68 1186: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String) [Tier0, IL size=11, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CharInClassInternal(ushort,System.String,int,int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str w0, [fp, #0x4C] str x1, [fp, #0x40] str w2, [fp, #0x3C] str w3, [fp, #0x38] str w4, [fp, #0x34] G_M000_IG02: ldr w0, [fp, #0x3C] add w0, w0, #3 str w0, [fp, #0x30] ldr w0, [fp, #0x30] ldr w1, [fp, #0x38] add w0, w0, w1 str w0, [fp, #0x2C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG05 G_M000_IG03: ldr w0, [fp, #0x30] ldr w1, [fp, #0x2C] add w0, w0, w1 asr w0, w0, #1 str w0, [fp, #0x28] ldr x0, [fp, #0x40] ldr w1, [fp, #0x28] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] ldr w1, [fp, #0x4C] uxth w1, w1 cmp w0, w1 ble G_M000_IG04 ldr w0, [fp, #0x28] str w0, [fp, #0x2C] b G_M000_IG05 G_M000_IG04: ldr w0, [fp, #0x28] add w0, w0, #1 str w0, [fp, #0x30] G_M000_IG05: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #16 mov w1, #34 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w0, [fp, #0x30] ldr w1, [fp, #0x2C] cmp w0, w1 bne G_M000_IG03 ldr w0, [fp, #0x30] and w0, w0, #1 ldr w1, [fp, #0x3C] and w1, w1, #1 cmp w0, w1 bne G_M000_IG09 mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: ldr w0, [fp, #0x34] cbnz w0, G_M000_IG11 mov w0, wzr G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: ldr w1, [fp, #0x3C] ldr w0, [fp, #0x38] add w1, w1, w0 add w1, w1, #3 ldr x0, [fp, #0x40] ldr w2, [fp, #0x34] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] str x1, [fp, #0x20] ldr x1, [fp, #0x18] ldr x2, [fp, #0x20] ldr w0, [fp, #0x4C] uxth w0, w0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 376 1187: JIT compiled System.Text.RegularExpressions.RegexCharClass:CharInClassInternal(ushort,System.String,int,int,int) [Tier0, IL size=74, code size=376] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:And():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1188: JIT compiled System.Text.RegularExpressions.RegexCompiler:And() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Shl():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1189: JIT compiled System.Text.RegularExpressions.RegexCompiler:Shl() [Tier0, IL size=17, code size=76] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex12_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1190: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex12_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1191: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1192: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex12_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:LdcI8(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [fp, #0x20] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x50] ldr x3, [x3, #0x08] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 1193: JIT compiled System.Text.RegularExpressions.RegexCompiler:LdcI8(long) [Tier0, IL size=18, code size=84] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex13_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1194: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex13_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1195: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1196: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex13_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; OSR variant for entry point 0x2c ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] mov fp, sp add xip1, sp, #0xD1FFAB1E str xip1, [fp, #0x18] ldr x1, [fp, #0xE8] ldr x22, [fp, #0xD8] ldr w5, [fp, #0xC4] ldr x21, [fp, #0xB8] ldr x19, [fp, #0xB0] ldr w20, [fp, #0xD1FFAB1E] ldr w23, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x24, [fp, #0xC8] mov x2, x24 ldr x25, [fp, #0xD0] mov x3, x25 ldr x0, [fp, #0xA8] mov w4, w5 mov w5, w20 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 ldr x1, [fp, #0xA8] ldr w26, [fp, #0xA4] str w26, [x1, #0x4C] mov x1, x24 mov x2, x25 ldr x0, [fp, #0xA8] mov x3, x0 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x14, [fp, #0xA8] ldr x24, [x14, #0x28] ldr x14, [x24, #0x50] ldr w15, [x14, #0x08] cmp w15, #0 bls G_M000_IG05 ldr w14, [x14, #0x10] cmp w14, #0 ble G_M000_IG06 G_M000_IG03: tst w23, #255 bne G_M000_IG04 add x14, x24, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0xA8] str xzr, [x1, #0x28] G_M000_IG04: ldr x1, [fp, #0xA8] ldr w1, [x1, #0x4C] mov x0, x24 mov w3, w20 mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG07 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG06: str xzr, [x24, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x24, [x0] G_M000_IG07: ldr w0, [x24, #0x30] cbz w0, G_M000_IG14 G_M000_IG08: tst w23, #255 bne G_M000_IG10 G_M000_IG09: ldr x0, [fp, #0xA8] str xzr, [x0, #0x28] G_M000_IG10: ldr x0, [x19, #0x08] mov x1, x21 mov x2, x24 ldr x3, [x19, #0x18] blr x3 cbz w0, G_M000_IG14 ldr x14, [fp, #0xA8] ldr w5, [x14, #0x4C] sxtw w26, w5 ldr w14, [x24, #0x14] cbnz w14, G_M000_IG13 G_M000_IG11: ldr w14, [fp, #0xD0] mov w15, #1 ldr x1, [fp, #0xE8] ldr w12, [x1, #0x40] tbz w12, #6, G_M000_IG12 mov w14, wzr movn w15, #0 G_M000_IG12: cmp w5, w14 beq G_M000_IG14 add w26, w5, w15 G_M000_IG13: ldr x14, [fp, #0xA8] ldr x14, [x14, #0x10] ldr w14, [x14, #0x08] ldr x15, [fp, #0xA8] str w14, [x15, #0x50] ldr x14, [fp, #0xA8] ldr x14, [x14, #0x18] ldr w14, [x14, #0x08] ldr x15, [fp, #0xA8] str w14, [x15, #0x54] ldr x14, [fp, #0xA8] ldr x14, [x14, #0x20] ldr w14, [x14, #0x08] ldr x15, [fp, #0xA8] str w14, [x15, #0x58] str w26, [fp, #0xA4] ldr x1, [fp, #0xE8] b G_M000_IG02 G_M000_IG14: ldr x14, [fp, #0xA8] str xzr, [x14, #0x08] ldr x1, [fp, #0xE8] add x14, x1, #56 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF G_M000_IG15: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 add sp, sp, #160 ret lr G_M000_IG16: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG17: ldr x14, [fp, #0xA8] str xzr, [x14, #0x08] ldr x1, [fp, #0xE8] add x14, x1, #56 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF G_M000_IG18: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 604 1197: JIT compiled System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool) [Tier1-OSR @0x2c, IL size=233, code size=604] ; Assembly listing for method System.Text.SegmentStringBuilder:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; OSR variant for entry point 0x34 ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp ldr x19, [fp, #0xE8] ldr x20, [fp, #0xE0] G_M000_IG02: ldr w21, [fp, #0xD8] ldr w0, [fp, #0xAC] cmp w0, w21 bge G_M000_IG09 ldr x22, [fp, #0xD0] align [0 bytes for IG03] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: cmp w0, w21 bhs G_M000_IG10 ubfiz x1, x0, #4, #32 add x1, x22, x1 ldr w1, [x1, #0x0C] ldr w23, [fp, #0xCC] add w23, w1, w23 add w0, w0, #1 cmp w0, w21 blt G_M000_IG08 G_M000_IG04: ldr x22, [fp, #0xD0] mov x0, x22 sxtw w1, w21 str x0, [fp, #0xB8] str w1, [fp, #0xC0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x2, [x0] add x24, fp, #184 cbnz x2, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x2, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x2, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: mov w0, w23 mov x1, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x23, x0 ubfiz x1, x21, #1, #32 mov x0, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp xzr, xzr, [x19] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x23 G_M000_IG07: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 add sp, sp, #176 ret lr G_M000_IG08: str w23, [fp, #0xCC] b G_M000_IG03 G_M000_IG09: ldr w23, [fp, #0xCC] b G_M000_IG04 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1198: JIT compiled System.Text.SegmentStringBuilder:ToString() [Tier1-OSR @0x34, IL size=141, code size=372] ; Assembly listing for method System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; OSR variant for entry point 0x35 ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 5 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp G_M000_IG02: ldr w19, [fp, #0x98] ldr w20, [fp, #0x8C] cmp w20, w19 bge G_M000_IG10 G_M000_IG03: cmp w20, w19 bhs G_M000_IG14 ldr x2, [fp, #0x90] ubfiz x0, x20, #4, #32 add x21, x2, x0 mov x2, xzr mov w0, wzr ldr x3, [x21] cbz x3, G_M000_IG09 G_M000_IG04: ldr x2, [x3] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x2, x0 bne G_M000_IG07 G_M000_IG05: add x2, x3, #12 G_M000_IG06: ldr w0, [x3, #0x08] b G_M000_IG08 G_M000_IG07: ldr x2, [x3] ldr w0, [x2] tst w0, #0xD1FFAB1E beq G_M000_IG13 add x2, x3, #16 b G_M000_IG06 G_M000_IG08: ldr w1, [x21, #0x08] and w1, w1, #0xD1FFAB1E mov w1, w1 ldr w3, [x21, #0x0C] add x4, x1, w3, UXTW mov w0, w0 cmp x4, x0 bhi G_M000_IG12 lsl x0, x1, #1 add x2, x2, x0 sxtw w0, w3 G_M000_IG09: str x2, [fp, #0x78] str w0, [fp, #0x80] ldr x21, [fp, #0xA8] mov x0, x21 ldr w22, [fp, #0xB0] sxtw w2, w22 ldr w23, [fp, #0x80] cmp w23, w2 bhi G_M000_IG11 ldr x1, [fp, #0x78] mov w2, w23 lsl x24, x2, #1 mov x2, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, x21, x24 sub w1, w22, w23 str x0, [fp, #0xA8] str w1, [fp, #0xB0] add w20, w20, #1 cmp w20, w19 blt G_M000_IG03 G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 add sp, sp, #128 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: mov x0, x3 ldr x1, [x3] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 mov x2, x0 mov w0, w1 b G_M000_IG08 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 388 1199: JIT compiled System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long) [Tier1-OSR @0x35, IL size=64, code size=388] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:set_Negate(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] strb w1, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1200: JIT compiled System.Text.RegularExpressions.RegexCharClass:set_Negate(bool) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:SingletonChar(System.String):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov w1, #3 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #1 add x0, x0, #12 ldrh w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 60 1201: JIT compiled System.Text.RegularExpressions.RegexCharClass:SingletonChar(System.String) [Tier0, IL size=8, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex14_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1202: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex14_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1203: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1204: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex14_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBackslash(bool):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] uxth w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] uxth w0, w0 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #90 bhi G_M000_IG05 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #80 bhi G_M000_IG04 ldr w0, [fp, #0xD1FFAB1E] sub w0, w0, #65 str w0, [fp, #0x14] ldr w0, [fp, #0x14] cmp w0, #6 bhi G_M000_IG03 ldr w0, [fp, #0x14] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #80 beq G_M000_IG33 b G_M000_IG38 G_M000_IG04: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #83 beq G_M000_IG21 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #87 beq G_M000_IG13 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #90 beq G_M000_IG07 b G_M000_IG38 G_M000_IG05: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #112 bhi G_M000_IG06 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #98 beq G_M000_IG07 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #100 beq G_M000_IG25 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #112 beq G_M000_IG33 b G_M000_IG38 G_M000_IG06: ldr w0, [fp, #0xD1FFAB1E] cmp w0, #115 beq G_M000_IG17 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #119 beq G_M000_IG09 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #122 bne G_M000_IG38 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x24] ldr w1, [fp, #0x24] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] ldr x0, [fp, #0xF0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xF0] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG08: b G_M000_IG34 G_M000_IG09: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG12 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0xD1FFAB1E] mov w0, #11 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG10 ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] b G_M000_IG11 G_M000_IG10: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xF8] ldr x0, [fp, #0xF8] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xF8] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG12: b G_M000_IG34 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG16 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0x7C] mov w0, #11 str w0, [fp, #0x78] ldr w0, [fp, #0x7C] str w0, [fp, #0x74] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG14 ldr w0, [fp, #0x78] str w0, [fp, #0x70] ldr w0, [fp, #0x74] str w0, [fp, #0x6C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x60] b G_M000_IG15 G_M000_IG14: ldr w0, [fp, #0x78] str w0, [fp, #0x70] ldr w0, [fp, #0x74] str w0, [fp, #0x6C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x60] G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x58] ldr w1, [fp, #0x70] ldr w2, [fp, #0x6C] ldr x3, [fp, #0x60] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x58] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG16: b G_M000_IG34 G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG20 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0xD1FFAB1E] mov w0, #11 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG18 ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] b G_M000_IG19 G_M000_IG18: ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] str w0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD1FFAB1E] G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr x3, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG20: b G_M000_IG34 G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG24 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0xA4] mov w0, #11 str w0, [fp, #0xA0] ldr w0, [fp, #0xA4] str w0, [fp, #0x9C] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG22 ldr w0, [fp, #0xA0] str w0, [fp, #0x98] ldr w0, [fp, #0x9C] str w0, [fp, #0x94] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x88] b G_M000_IG23 G_M000_IG22: ldr w0, [fp, #0xA0] str w0, [fp, #0x98] ldr w0, [fp, #0x9C] str w0, [fp, #0x94] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x88] G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] ldr x0, [fp, #0x80] ldr w1, [fp, #0x98] ldr w2, [fp, #0x94] ldr x3, [fp, #0x88] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x80] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG24: b G_M000_IG34 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG28 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0xEC] mov w0, #11 str w0, [fp, #0xE8] ldr w0, [fp, #0xEC] str w0, [fp, #0xE4] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG26 ldr w0, [fp, #0xE8] str w0, [fp, #0xE0] ldr w0, [fp, #0xE4] str w0, [fp, #0xDC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD0] b G_M000_IG27 G_M000_IG26: ldr w0, [fp, #0xE8] str w0, [fp, #0xE0] ldr w0, [fp, #0xE4] str w0, [fp, #0xDC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0xD0] G_M000_IG27: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] ldr x0, [fp, #0xC8] ldr w1, [fp, #0xE0] ldr w2, [fp, #0xDC] ldr x3, [fp, #0xD0] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xC8] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG28: b G_M000_IG34 G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG32 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0x54] mov w0, #11 str w0, [fp, #0x50] ldr w0, [fp, #0x54] str w0, [fp, #0x4C] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG30 ldr w0, [fp, #0x50] str w0, [fp, #0x48] ldr w0, [fp, #0x4C] str w0, [fp, #0x44] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x38] b G_M000_IG31 G_M000_IG30: ldr w0, [fp, #0x50] str w0, [fp, #0x48] ldr w0, [fp, #0x4C] str w0, [fp, #0x44] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x38] G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr w1, [fp, #0x48] ldr w2, [fp, #0x44] ldr x3, [fp, #0x38] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x1, [fp, #0x30] str x1, [fp, #0x28] b G_M000_IG40 G_M000_IG32: b G_M000_IG34 G_M000_IG33: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG36 b G_M000_IG34 G_M000_IG34: mov x0, xzr G_M000_IG35: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC0] ldr x0, [fp, #0xC0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xC0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x20] ldr w3, [fp, #0x20] ldr w2, [fp, #0xD1FFAB1E] cmp w2, #112 cset x2, ne ldr x4, [fp, #0xD1FFAB1E] ldr x4, [x4, #0x28] ldr x5, [fp, #0xD1FFAB1E] ldr w5, [x5, #0x58] ldr x1, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG37 ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x30] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG37: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E str w0, [fp, #0xB4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x3, [fp, #0x18] ldr x0, [fp, #0xA8] ldr w2, [fp, #0xB4] mov w1, #11 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xA8] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG38: ldr w1, [fp, #0xD1FFAB1E] uxtb w1, w1 ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #13 bne G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] and w0, w0, #1 cbz w0, G_M000_IG39 ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 strb w1, [x0, #0x74] G_M000_IG39: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x28] b G_M000_IG40 G_M000_IG40: ldr x0, [fp, #0x28] G_M000_IG41: ldp fp, lr, [sp], #0xD1FFAB1E ret lr RWD00 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 ; Total bytes of code 2428 1205: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBackslash(bool) [Tier0, IL size=603, code size=2428] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBasicBackslash(bool):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] stp xzr, xzr, [x9, #0xA0] str x0, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xFC] str wzr, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xF4] mov w0, #0xD1FFAB1E str w0, [fp, #0x68] ldr w0, [fp, #0xF4] cmp w0, #107 bne G_M000_IG11 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 blt G_M000_IG08 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xF4] ldr w0, [fp, #0xF4] cmp w0, #39 beq G_M000_IG03 ldr w0, [fp, #0xF4] cmp w0, #60 bne G_M000_IG04 G_M000_IG03: mov w0, #1 str w0, [fp, #0xF0] b G_M000_IG05 G_M000_IG04: str wzr, [fp, #0xF0] G_M000_IG05: ldr w0, [fp, #0xF0] cbz w0, G_M000_IG08 mov w0, #1 str w0, [fp, #0xF8] ldr w0, [fp, #0xF4] cmp w0, #39 beq G_M000_IG06 mov w0, #62 str w0, [fp, #0x70] b G_M000_IG07 G_M000_IG06: mov w0, #39 str w0, [fp, #0x70] G_M000_IG07: ldr w0, [fp, #0x70] uxth w0, w0 str w0, [fp, #0xFC] G_M000_IG08: ldr w0, [fp, #0xF8] cbz w0, G_M000_IG09 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x58] ldr x2, [fp, #0x58] ldr x0, [fp, #0xD1FFAB1E] mov w1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xF4] b G_M000_IG15 G_M000_IG11: ldr w0, [fp, #0xF4] cmp w0, #60 beq G_M000_IG12 ldr w0, [fp, #0xF4] cmp w0, #39 bne G_M000_IG15 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 ble G_M000_IG15 mov w0, #1 str w0, [fp, #0xF8] ldr w0, [fp, #0xF4] cmp w0, #39 beq G_M000_IG13 mov w0, #62 str w0, [fp, #0x74] b G_M000_IG14 G_M000_IG13: mov w0, #39 str w0, [fp, #0x74] G_M000_IG14: ldr w0, [fp, #0x74] uxth w0, w0 str w0, [fp, #0xFC] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xF4] G_M000_IG15: ldr w0, [fp, #0xF8] cbz w0, G_M000_IG19 ldr w0, [fp, #0xF4] cmp w0, #48 blt G_M000_IG19 ldr w0, [fp, #0xF4] cmp w0, #57 bgt G_M000_IG19 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xE8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG36 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xFC] cmp w0, w1 bne G_M000_IG36 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG18 ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG17 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x78] add x0, fp, #232 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x1, [fp, #0x50] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x2, [fp, #0x48] ldr x0, [fp, #0xD1FFAB1E] mov w1, #11 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] ldr x0, [fp, #0x80] ldr w3, [fp, #0xE8] mov w1, #13 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x80] str x0, [fp, #0x60] b G_M000_IG40 G_M000_IG18: b G_M000_IG37 G_M000_IG19: ldr w0, [fp, #0xF8] cbnz w0, G_M000_IG32 ldr w0, [fp, #0xF4] cmp w0, #49 blt G_M000_IG32 ldr w0, [fp, #0xF4] cmp w0, #57 bgt G_M000_IG32 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG28 movn w0, #0 str w0, [fp, #0xE4] ldr w0, [fp, #0xF4] sub w0, w0, #48 str w0, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sub w0, w0, #1 str w0, [fp, #0xDC] b G_M000_IG23 G_M000_IG20: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xE0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG22 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x38] cbz x0, G_M000_IG21 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x38] str x1, [fp, #0x90] ldr x1, [fp, #0x98] ldr w0, [fp, #0xE0] str w0, [x1, #0x08] ldr x1, [fp, #0x98] ldr x0, [fp, #0x90] ldr x2, [fp, #0x90] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 str x0, [fp, #0x40] ldr x1, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] ldr w1, [fp, #0xDC] cmp w0, w1 bge G_M000_IG22 G_M000_IG21: ldr w0, [fp, #0xE0] str w0, [fp, #0xE4] G_M000_IG22: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG26 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xA4] ldr w0, [fp, #0xA4] uxth w0, w0 str w0, [fp, #0xF4] ldr w0, [fp, #0xA4] cmp w0, #48 blt G_M000_IG26 ldr w0, [fp, #0xF4] cmp w0, #57 bgt G_M000_IG26 ldr w0, [fp, #0xE0] mov w1, #10 mul w0, w0, w1 ldr w1, [fp, #0xF4] add w0, w0, w1 sub w0, w0, #48 str w0, [fp, #0xE0] G_M000_IG23: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG25 G_M000_IG24: add x0, fp, #104 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG25: ldr w0, [fp, #0xE0] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x68] cmp w0, w1 ble G_M000_IG20 G_M000_IG26: ldr w0, [fp, #0xE4] tbnz w0, #31, G_M000_IG36 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG27 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x88] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] ldr x0, [fp, #0x88] ldr w3, [fp, #0xE4] mov w1, #13 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x88] str x0, [fp, #0x60] b G_M000_IG40 G_M000_IG27: b G_M000_IG37 G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD0] ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbz w0, G_M000_IG29 b G_M000_IG37 G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG30 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] ldr x2, [fp, #0xD1FFAB1E] ldr w2, [x2, #0x70] ldr x0, [fp, #0xA8] ldr w3, [fp, #0xD0] mov w1, #13 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xA8] str x0, [fp, #0x60] b G_M000_IG40 G_M000_IG30: ldr w0, [fp, #0xD0] cmp w0, #9 bgt G_M000_IG36 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xB0] add x0, fp, #208 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x0, [fp, #0xD1FFAB1E] mov w1, #11 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG32: ldr w0, [fp, #0xF8] cbz w0, G_M000_IG36 ldr w0, [fp, #0xF4] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG36 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xC8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #0 ble G_M000_IG36 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0xFC] cmp w0, w1 bne G_M000_IG36 ldr w0, [fp, #0xD1FFAB1E] uxtb w0, w0 cbnz w0, G_M000_IG35 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG34 G_M000_IG33: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0xD1FFAB1E] mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG34: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x70] str w0, [fp, #0xC4] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB8] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x1C] ldr w3, [fp, #0x1C] ldr x0, [fp, #0xB8] ldr w2, [fp, #0xC4] mov w1, #13 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0xB8] str x0, [fp, #0x60] b G_M000_IG40 G_M000_IG35: b G_M000_IG37 G_M000_IG36: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xF4] ldr w3, [fp, #0xD1FFAB1E] uxtb w3, w3 cbz w3, G_M000_IG39 b G_M000_IG37 G_M000_IG37: mov x0, xzr G_M000_IG38: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG39: ldr x3, [fp, #0xD1FFAB1E] ldrsb wzr, [x3] ldr x3, [fp, #0xD1FFAB1E] add x3, x3, #92 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x70] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2, #0x30] ldr w0, [fp, #0xF4] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str x0, [fp, #0x60] b G_M000_IG40 G_M000_IG40: ldr x0, [fp, #0x60] G_M000_IG41: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 2392 1206: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBasicBackslash(bool) [Tier0, IL size=659, code size=2392] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Textto(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1207: JIT compiled System.Text.RegularExpressions.RegexParser:Textto(int) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanCharEscape():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x44] ldr w0, [fp, #0x44] cmp w0, #48 blt G_M000_IG03 ldr w0, [fp, #0x44] cmp w0, #55 bgt G_M000_IG03 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG03: ldr w0, [fp, #0x44] sub w0, w0, #97 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #5 bhi G_M000_IG04 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: ldr w0, [fp, #0x44] sub w0, w0, #110 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #10 bhi G_M000_IG05 ldr w0, [fp, #0x18] mov w0, w0 adr x1, [@RWD24] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG05: b G_M000_IG23 G_M000_IG06: ldr x0, [fp, #0x48] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG07: ldr x0, [fp, #0x48] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG08: b G_M000_IG09 G_M000_IG09: mov w0, #7 G_M000_IG10: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: b G_M000_IG12 G_M000_IG12: mov w0, #8 G_M000_IG13: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG14: b G_M000_IG15 G_M000_IG15: mov w0, #27 G_M000_IG16: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG17: mov w0, #12 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG18: mov w0, #10 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG19: mov w0, #13 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG20: mov w0, #9 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG21: mov w0, #11 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG22: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG23: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG25 ldr w0, [fp, #0x44] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG25 G_M000_IG24: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x30] ldr x1, [fp, #0x38] ldr w0, [fp, #0x44] strh w0, [x1, #0x08] ldr x1, [fp, #0x38] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x0, [fp, #0x48] mov w1, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG25: ldr w0, [fp, #0x44] str w0, [fp, #0x2C] b G_M000_IG26 G_M000_IG26: ldr w0, [fp, #0x2C] uxth w0, w0 G_M000_IG27: ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 RWD24 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 ; Total bytes of code 660 1208: JIT compiled System.Text.RegularExpressions.RegexParser:ScanCharEscape() [Tier0, IL size=205, code size=660] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionE():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x70] and w0, w0, #0xD1FFAB1E cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1209: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionE() [Tier0, IL size=16, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsBoundaryWordChar(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x10] str w0, [fp, #0x3C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG03: ldp x0, x1, [fp, #0x10] stp x0, x1, [fp, #0x28] G_M000_IG04: ldr w0, [fp, #0x3C] uxth w0, w0 asr w0, w0, #3 str w0, [fp, #0x24] ldr w0, [fp, #0x24] ldr w1, [fp, #0x30] cmp w0, w1 blo G_M000_IG08 ldr w0, [fp, #0x3C] uxth w0, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, #1 lsl w0, w1, w0 movz w1, #0xD1FFAB1E movk w1, #4 LSL #16 and w0, w0, w1 cbnz w0, G_M000_IG06 ldr w0, [fp, #0x3C] uxth w0, w0 mov w1, #0xD1FFAB1E cmp w0, w1 cset x0, eq ldr w1, [fp, #0x3C] uxth w1, w1 mov w2, #0xD1FFAB1E cmp w1, w2 cset x1, eq orr w0, w0, w1 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr w0, [fp, #0x24] ldr w1, [fp, #0x30] cmp w0, w1 bhs G_M000_IG10 ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldrb w0, [x0, w1, UXTW #2] ldr w1, [fp, #0x3C] uxth w1, w1 and w1, w1, #7 mov w2, #1 lsl w1, w2, w1 and w0, w0, w1 cmp w0, #0 cset x0, ne G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 280 1210: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsBoundaryWordChar(ushort) [Tier0, IL size=81, code size=280] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:get_WordCharAsciiLookup():System.ReadOnlySpan`1[ubyte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: stp xzr, xzr, [fp, #0x10] add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #16 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 1211: JIT compiled System.Text.RegularExpressions.RegexCharClass:get_WordCharAsciiLookup() [Tier0, IL size=13, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddUnitNode(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1212: JIT compiled System.Text.RegularExpressions.RegexParser:AddUnitNode(System.Text.RegularExpressions.RegexNode) [Tier0, IL size=8, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__CanCombineCounts|50_0(int,int,int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] str w1, [fp, #0x18] str w2, [fp, #0x14] str w3, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x1C] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG03 ldr w0, [fp, #0x14] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG03 ldr w0, [fp, #0x1C] ldr w1, [fp, #0x14] add w0, w0, w1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 blo G_M000_IG05 G_M000_IG03: mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr w0, [fp, #0x18] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG07 ldr w0, [fp, #0x10] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG07 ldr w0, [fp, #0x18] ldr w1, [fp, #0x10] add w0, w0, w1 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 blo G_M000_IG07 mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 172 1213: JIT compiled System.Text.RegularExpressions.RegexNode:g__CanCombineCounts|50_0(int,int,int,int) [Tier0, IL size=58, code size=172] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex15_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1214: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex15_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1215: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1216: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex15_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadJittingStop(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #6 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1217: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadJittingStop(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_IterationCleanupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1218: JIT compiled BenchmarkDotNet.Engines.Engine:get_IterationCleanupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_2():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 1219: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_2() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Dummy3Action():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1220: JIT compiled BenchmarkDotNet.Engines.Engine:get_Dummy3Action() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:Dummy3():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] G_M000_IG03: str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] ldr x0, [fp, #0x18] ldr w0, [x0, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x4C] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1300 1221: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:Dummy3() [Tier0, IL size=897, code size=1300] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:WriteLine():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1222: JIT compiled BenchmarkDotNet.Engines.Engine:WriteLine() [Tier0, IL size=12, code size=76] ; Assembly listing for method BenchmarkDotNet.Engines.EngineParameters:get_IterationTime():Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 1223: JIT compiled BenchmarkDotNet.Engines.EngineParameters:get_IterationTime() [Tier0, IL size=22, code size=112] ; Assembly listing for method Perfolizer.Horology.TimeInterval:FromSeconds(double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr d0, [x0] ldr d1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 1224: JIT compiled Perfolizer.Horology.TimeInterval:FromSeconds(double) [Tier0, IL size=12, code size=60] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_LessThan(Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str d0, [fp, #0x28] str d1, [fp, #0x20] G_M000_IG02: add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x18] fcmp d0, d16 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 1225: JIT compiled Perfolizer.Horology.TimeInterval:op_LessThan(Perfolizer.Horology.TimeInterval,Perfolizer.Horology.TimeInterval) [Tier0, IL size=17, code size=88] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex16_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1226: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex16_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1227: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1228: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex16_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex17_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1229: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex17_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1230: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1231: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex17_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex18_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1232: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex18_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1233: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1234: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex18_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex19_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1235: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex19_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1236: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1237: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex19_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex20_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1238: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex20_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1239: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1240: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex20_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex21_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1241: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex21_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1242: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1243: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex21_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex22_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1244: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex22_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1245: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1246: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex22_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex23_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1247: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex23_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1248: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1249: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex23_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex24_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1250: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex24_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1251: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1252: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex24_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex25_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1253: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex25_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1254: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1255: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex25_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex26_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1256: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex26_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1257: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1258: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex26_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex27_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1259: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex27_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1260: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1261: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex27_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex28_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1262: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex28_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1263: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1264: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex28_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex29_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1265: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex29_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1266: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1267: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex29_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex30_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1268: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex30_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1269: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1270: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex30_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x20] ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 1271: JIT compiled BenchmarkDotNet.Characteristics.Resolver+<>c__DisplayClass2_0`1[int]:b__0(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=18, code size=100] ; Assembly listing for method BenchmarkDotNet.Environments.EnvironmentResolver+<>c:<.ctor>b__2_2(BenchmarkDotNet.Characteristics.CharacteristicObject):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x68] str x1, [fp, #0x60] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x60] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0x5C] ldr w0, [fp, #0x5C] cbz w0, G_M000_IG04 ldr w0, [fp, #0x5C] sub w0, w0, #1 cmp w0, #1 bls G_M000_IG06 G_M000_IG03: b G_M000_IG08 G_M000_IG04: mov w0, #16 G_M000_IG05: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: add x0, fp, #48 mov w1, #21 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 ldr w1, [fp, #0x5C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 340 1272: JIT compiled BenchmarkDotNet.Environments.EnvironmentResolver+<>c:<.ctor>b__2_2(BenchmarkDotNet.Characteristics.CharacteristicObject) [Tier0, IL size=72, code size=340] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr w0, [fp, #0x2C] str w0, [x2, #0x08] ldr x2, [fp, #0x20] ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] ldr x3, [fp, #0x30] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 212 1273: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[int](BenchmarkDotNet.Characteristics.Characteristic`1[int],int) [Tier0, IL size=36, code size=212] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w2, [x0] str w2, [fp, #0x14] ldr w2, [fp, #0x14] ldr x1, [fp, #0x40] ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] ldr x3, [fp, #0x30] ldr x3, [x3, #0x18] blr x3 ldr x1, [fp, #0x28] str w0, [x1, #0x08] ldr x0, [fp, #0x28] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 356 1274: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:ResolveValueCore(BenchmarkDotNet.Characteristics.CharacteristicObject,System.Object) [Tier0, IL size=58, code size=356] ; Assembly listing for method BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver():System.Func`3[BenchmarkDotNet.Characteristics.CharacteristicObject,int,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1275: JIT compiled BenchmarkDotNet.Characteristics.Characteristic`1[int]:get_Resolver() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions:WithMinInvokeCount(BenchmarkDotNet.Jobs.Job,int):BenchmarkDotNet.Jobs.Job ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x20] str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x34] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 188 1276: JIT compiled BenchmarkDotNet.Jobs.JobExtensions:WithMinInvokeCount(BenchmarkDotNet.Jobs.Job,int) [Tier0, IL size=32, code size=188] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass57_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1277: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass57_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass57_0:b__0(BenchmarkDotNet.Jobs.Job):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 1278: JIT compiled BenchmarkDotNet.Jobs.JobExtensions+<>c__DisplayClass57_0:b__0(BenchmarkDotNet.Jobs.Job) [Tier0, IL size=18, code size=96] ; Assembly listing for method BenchmarkDotNet.Jobs.AccuracyMode:set_MinInvokeCount(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x18] ldr w2, [fp, #0x14] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 1279: JIT compiled BenchmarkDotNet.Jobs.AccuracyMode:set_MinInvokeCount(int) [Tier0, IL size=13, code size=72] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:Run():BenchmarkDotNet.Engines.RunResults:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #96 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x8, [fp, #0xD1FFAB1E] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr x1, [x1, #0x80] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xF0] ldr x2, [fp, #0xF0] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] mov x3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xE8] ldr x1, [fp, #0xE8] ldr x0, [fp, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 beq G_M000_IG07 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 beq G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG04: add x0, fp, #0xD1FFAB1E ldp x1, x2, [fp, #0xD1FFAB1E] stp x1, x2, [x0, #0xD1FFAB1E] G_M000_IG05: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xE0] ldr x1, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x90] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xDC] ldr w2, [fp, #0xDC] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xD0] ldr x1, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x98] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xCC] ldr w2, [fp, #0xCC] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str x0, [fp, #0xC0] ldr x1, [fp, #0xC0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x90] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xBC] ldr w3, [fp, #0xBC] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 str x0, [fp, #0xB0] ldr x1, [fp, #0xB0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x98] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 cset x3, eq str w3, [fp, #0xAC] ldr w3, [fp, #0xAC] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 str x0, [fp, #0xA0] ldr x1, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x8, [fp, #0xD1FFAB1E] ldrb w8, [x8, #0xBB] cbnz w8, G_M000_IG11 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldp q16, q17, [x8] stp q16, q17, [fp, #0xD1FFAB1E] add x8, fp, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG08: add x0, fp, #0xD1FFAB1E ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [x0, #0xD1FFAB1E] G_M000_IG09: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] ldr x2, [x0, #0x10] str x2, [x1, #0x10] G_M000_IG10: str xzr, [fp, #0xD1FFAB1E] b G_M000_IG15 G_M000_IG11: stp xzr, xzr, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x9C] ldr w5, [fp, #0x9C] add x0, fp, #0xD1FFAB1E ldr x4, [fp, #0xD1FFAB1E] mov w1, #1 mov w2, #3 mov w3, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x70] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x78] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x88] ldr x0, [fp, #0x70] add x1, fp, #120 add x8, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp q16, q17, [x0] stp q16, q17, [x1] G_M000_IG13: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp x2, xip1, [x0] stp x2, xip1, [x1] ldr x2, [x0, #0x10] str x2, [x1, #0x10] G_M000_IG14: ldr d16, [fp, #0xD1FFAB1E] str d16, [fp, #0xD1FFAB1E] G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG16: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] ldr x2, [fp, #0x60] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] str x1, [fp, #0x20] ldr w1, [fp, #0xD1FFAB1E] str w1, [fp, #0x1C] G_M000_IG17: add x1, fp, #0xD1FFAB1E ldp q0, q16, [x1, #0x40] stp q0, q16, [fp, #0x40] G_M000_IG18: add x1, fp, #0xD1FFAB1E ldp x2, x3, [x1, #0x28] stp x2, x3, [fp, #0x28] ldr x2, [x1, #0x38] str x2, [fp, #0x38] G_M000_IG19: ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] add x3, fp, #64 add x4, fp, #40 add x0, fp, #0xD1FFAB1E ldr d0, [fp, #0xD1FFAB1E] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x14, [fp, #0xD1FFAB1E] add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG20: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 1920 1280: JIT compiled BenchmarkDotNet.Engines.Engine:Run() [Tier0, IL size=419, code size=1920] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #47 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x18] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 1281: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.ctor() [Tier0, IL size=18, code size=92] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, xzr bl CORINFO_HELP_NEWARR_1_VC movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 1282: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:.cctor() [Tier0, IL size=12, code size=56] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:AddRange(System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x70] str xzr, [fp, #0x60] str xzr, [fp, #0x10] add x2, sp, #144 str x2, [fp, #0x88] str x0, [fp, #0x80] str x1, [fp, #0x78] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x38] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG03 mov w0, #23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x1, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x0, [fp, #0x70] cbz x0, G_M000_IG06 ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x6C] ldr w1, [fp, #0x6C] cmp w1, #0 ble G_M000_IG14 ldr x1, [fp, #0x80] ldr x1, [x1, #0x08] ldr w1, [x1, #0x08] ldr x0, [fp, #0x80] ldr w0, [x0, #0x10] sub w1, w1, w0 ldr w0, [fp, #0x6C] cmp w1, w0 bge G_M000_IG04 ldr x1, [fp, #0x80] ldr w1, [x1, #0x10] ldr w0, [fp, #0x6C] adds w1, w1, w0 bvs G_M000_IG15 ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x1, [fp, #0x80] ldr x1, [x1, #0x08] ldr x2, [fp, #0x80] ldr w2, [x2, #0x10] ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 ldr x0, [fp, #0x80] ldr w0, [x0, #0x10] ldr w11, [fp, #0x6C] add w0, w0, w11 ldr x11, [fp, #0x80] str w0, [x11, #0x10] ldr x0, [fp, #0x80] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x11, [fp, #0x80] str w0, [x11, #0x14] G_M000_IG05: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG06: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x60] G_M000_IG07: b G_M000_IG09 G_M000_IG08: add x8, fp, #64 ldr x0, [fp, #0x60] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0x80] str x0, [fp, #0x10] ldp x0, x1, [fp, #0x40] stp x0, x1, [fp, #0x18] ldp x0, x1, [fp, #0x50] stp x0, x1, [fp, #0x28] ldr x0, [fp, #0x10] add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x38] ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #56 mov w1, #131 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr x0, [fp, #0x60] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG08 b G_M000_IG12 G_M000_IG12: ldr x0, [fp, #0x88] bl G_M000_IG16 G_M000_IG13: nop G_M000_IG14: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG15: bl CORINFO_HELP_OVERFLOW brk_windows #0 G_M000_IG16: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG17: ldr x0, [fp, #0x60] cbz x0, G_M000_IG18 ldr x0, [fp, #0x60] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG18: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 596 1283: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:AddRange(System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=152, code size=596] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1284: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Count() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],BenchmarkDotNet.Characteristics.IResolver,long):long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str x3, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] ldr x3, [fp, #0x20] ldr x4, [fp, #0x18] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 92 1285: JIT compiled BenchmarkDotNet.Characteristics.CharacteristicObject:ResolveValue[long](BenchmarkDotNet.Characteristics.Characteristic`1[long],BenchmarkDotNet.Characteristics.IResolver,long) [Tier0, IL size=10, code size=92] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[long](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[long],long):long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] str x3, [fp, #0x40] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x14, [fp, #0x38] ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF ldr x1, [fp, #0x38] ldr x1, [x1, #0x08] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x2, [fp, #0x20] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x0, [fp, #0x30] cbz x0, G_M000_IG06 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x2, [fp, #0x38] ldr x2, [x2, #0x08] ldr x0, [fp, #0x30] ldr x1, [fp, #0x50] ldr x3, [fp, #0x40] ldr x4, [fp, #0x10] blr x4 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: ldr x0, [fp, #0x40] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 400 1286: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver:Resolve[long](BenchmarkDotNet.Characteristics.CharacteristicObject,BenchmarkDotNet.Characteristics.Characteristic`1[long],long) [Tier0, IL size=84, code size=400] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass6_0`1[long]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1287: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass6_0`1[long]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass6_0`1[long]:b__0(BenchmarkDotNet.Characteristics.IResolver):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1288: JIT compiled BenchmarkDotNet.Characteristics.CompositeResolver+<>c__DisplayClass6_0`1[long]:b__0(BenchmarkDotNet.Characteristics.IResolver) [Tier0, IL size=13, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_BenchmarkName():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x70] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1289: JIT compiled BenchmarkDotNet.Engines.Engine:get_BenchmarkName() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:BenchmarkStart(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1290: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:BenchmarkStart(System.String) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_Strategy():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0xB4] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1291: JIT compiled BenchmarkDotNet.Engines.Engine:get_Strategy() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage:Run():BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #40 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG06 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] str x1, [fp, #0x40] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] str x1, [fp, #0x50] ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 400 1292: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage:Run() [Tier0, IL size=72, code size=400] ; Assembly listing for method BenchmarkDotNet.Engines.EngineStage:get_TargetJob():BenchmarkDotNet.Jobs.Job:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 1293: JIT compiled BenchmarkDotNet.Engines.EngineStage:get_TargetJob() [Tier0, IL size=12, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage:RunSpecific():BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] str x0, [fp, #0xB8] G_M000_IG02: ldr x0, [fp, #0xB8] mov x1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0xB0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x68] str x0, [fp, #0xA8] str wzr, [fp, #0xA4] str wzr, [fp, #0xA0] mov w0, #0xD1FFAB1E str w0, [fp, #0x48] G_M000_IG03: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG05 G_M000_IG04: add x0, fp, #72 mov w1, #19 bl CORINFO_HELP_PATCHPOINT G_M000_IG05: ldr w5, [fp, #0xA4] add w5, w5, #1 str w5, [fp, #0xA4] ldr x5, [fp, #0xB8] ldr w5, [x5, #0x28] add x8, fp, #128 ldr x0, [fp, #0xB8] ldr x4, [fp, #0xB0] ldr w3, [fp, #0xA4] mov w1, #1 mov w2, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xA8] str x0, [fp, #0x20] ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x28] ldp x0, x1, [fp, #0x90] stp x0, x1, [fp, #0x38] ldr x0, [fp, #0x20] add x1, fp, #40 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x78] ldr x0, [fp, #0xB8] ldr w0, [x0, #0x2C] sxtw x0, w0 str x0, [fp, #0x60] ldr x0, [fp, #0xB0] scvtf d0, x0 ldr x0, [fp, #0xB8] ldr d16, [x0, #0x18] fmul d0, d0, d16 ldr d16, [fp, #0x78] fdiv d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 fcvtzs x1, d0 str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x0, [fp, #0x70] ldr x1, [fp, #0xB0] cmp x0, x1 bge G_M000_IG06 ldr w0, [fp, #0xA0] add w0, w0, #1 str w0, [fp, #0xA0] G_M000_IG06: ldr x0, [fp, #0x70] ldr x1, [fp, #0xB0] sub x0, x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp x0, #1 ble G_M000_IG07 ldr w0, [fp, #0xA0] cmp w0, #3 bge G_M000_IG07 ldr x0, [fp, #0x70] str x0, [fp, #0xB0] b G_M000_IG03 G_M000_IG07: ldr x0, [fp, #0xB8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #80 ldr x1, [fp, #0xB0] ldr x2, [fp, #0xA8] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] G_M000_IG08: ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 628 1294: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage:RunSpecific() [Tier0, IL size=141, code size=628] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage:Autocorrect(long):long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr w1, [x1, #0x28] sxtw x1, w1 add x0, x0, x1 sub x0, x0, #1 ldr x1, [fp, #0x18] ldr w1, [x1, #0x28] sxtw x1, w1 cmp x1, #0 beq G_M000_IG06 cmn x1, #1 bne G_M000_IG03 cmp x0, #1 bvs G_M000_IG05 G_M000_IG03: sdiv x0, x0, x1 ldr x1, [fp, #0x18] ldr w1, [x1, #0x28] sxtw x1, w1 mul x0, x0, x1 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: bl CORINFO_HELP_OVERFLOW G_M000_IG06: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 116 1295: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage:Autocorrect(long) [Tier0, IL size=29, code size=116] ; Assembly listing for method BenchmarkDotNet.Engines.EngineStage:RunIteration(int,int,int,long,int):BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x100]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] stp xzr, xzr, [x9, #0xA0] str xzr, [x9, #0xB0] str x0, [fp, #0xF8] str w1, [fp, #0xEC] str w2, [fp, #0xE8] str w3, [fp, #0xE4] str x4, [fp, #0xD8] str w5, [fp, #0xD4] str x8, [fp, #0xF0] G_M000_IG02: ldr x0, [fp, #0xD8] str x0, [fp, #0x70] ldr w0, [fp, #0xD4] sxtw x0, w0 str x0, [fp, #0x68] ldr x0, [fp, #0x70] ldr x1, [fp, #0x68] cmp x1, #0 beq G_M000_IG08 cmn x1, #1 bne G_M000_IG03 cmp x0, #1 bvs G_M000_IG07 G_M000_IG03: sdiv x0, x0, x1 ldr x1, [fp, #0x68] mul x0, x0, x1 ldr x1, [fp, #0x70] sub x0, x1, x0 cbz x0, G_M000_IG05 G_M000_IG04: add x0, fp, #168 mov w1, #53 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x60] ldr x1, [fp, #0x60] add x0, fp, #168 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #168 ldr x1, [fp, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x58] ldr x1, [fp, #0x58] add x0, fp, #168 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #168 ldr w1, [fp, #0xD4] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x50] ldr x1, [fp, #0x50] add x0, fp, #168 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x78] add x0, fp, #168 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x78] bl CORINFO_HELP_THROW G_M000_IG05: stp xzr, xzr, [fp, #0x88] stp xzr, xzr, [fp, #0x98] ldr x0, [fp, #0xF8] ldr x0, [x0, #0x08] str x0, [fp, #0x80] add x0, fp, #136 ldr w1, [fp, #0xEC] ldr w2, [fp, #0xE8] ldr w3, [fp, #0xE4] ldr x4, [fp, #0xD8] ldr w5, [fp, #0xD4] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x80] str x0, [fp, #0x20] ldr x0, [fp, #0xF0] str x0, [fp, #0x18] ldp x0, x1, [fp, #0x88] stp x0, x1, [fp, #0x28] ldp x0, x1, [fp, #0x98] stp x0, x1, [fp, #0x38] ldr x0, [fp, #0x20] add x1, fp, #40 ldr x8, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG07: bl CORINFO_HELP_OVERFLOW G_M000_IG08: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 624 1296: JIT compiled BenchmarkDotNet.Engines.EngineStage:RunIteration(int,int,int,long,int) [Tier0, IL size=109, code size=624] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadPilotStart(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #7 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1297: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadPilotStart(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex31_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1298: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex31_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1299: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1300: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex31_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex32_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1301: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex32_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1302: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1303: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex32_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex33_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1304: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex33_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1305: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1306: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex33_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex34_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1307: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex34_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1308: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1309: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex34_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex35_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1310: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex35_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1311: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1312: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex35_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex36_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1313: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex36_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1314: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1315: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex36_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex37_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1316: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex37_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1317: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1318: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex37_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex38_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1319: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex38_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1320: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1321: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex38_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex39_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1322: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex39_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1323: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1324: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex39_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex40_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1325: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex40_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1326: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1327: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex40_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex41_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1328: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex41_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1329: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1330: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex41_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex42_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1331: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex42_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1332: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1333: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex42_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex43_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1334: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex43_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1335: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1336: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex43_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex44_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1337: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex44_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1338: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1339: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex44_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex45_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1340: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex45_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1341: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1342: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex45_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex46_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1343: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex46_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1344: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1345: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex46_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex47_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1346: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex47_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1347: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1348: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex47_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex48_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1349: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex48_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1350: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1351: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex48_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex49_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1352: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex49_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1353: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1354: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex49_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex50_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1355: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex50_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1356: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1357: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex50_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex51_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1358: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex51_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1359: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1360: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex51_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex52_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1361: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex52_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1362: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1363: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex52_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex53_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1364: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex53_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1365: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1366: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex53_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex54_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1367: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex54_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1368: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1369: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex54_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex55_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1370: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex55_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1371: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1372: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex55_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex56_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1373: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex56_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1374: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1375: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex56_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex57_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1376: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex57_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1377: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1378: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex57_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex58_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1379: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex58_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1380: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1381: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex58_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex59_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1382: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex59_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1383: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1384: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex59_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex60_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1385: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex60_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1386: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1387: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex60_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex61_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1388: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex61_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1389: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1390: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex61_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex62_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Buffer:Memmove(byref,byref,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl G_M000_IG01: stp System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool fp, lr cbnz , [sp, #-0x10]! w0, G_M000_IG04 mov fp, ldr sp w0, [x19, #0x4C] G_M000_IG02: cmp sub x3, x0, x1 sub x4, x1, x0 cmp x3, x2 ccmp x4, x2, 0, hs w0, w20 beq G_M000_IG04 add w0, w0, #1 str blow0, [x19, #0x4C] G_M000_IG12 b G_M000_IG02 G_M000_IG03: add G_M000_IG04: x3, x1, x2 ldr x21, add x4, x0, x2 [sp, #0x28] cmp x2, #16 ldp x19, x20, [sp, #0x18] bls G_M000_IG06 cmp x2, #64 bhi G_M000_IG09 G_M000_IG04: ldr q16, [x1] str q16, [x0] cmp x2, #32 bls G_M000_IG05 ldp ldr fp, lr, [spq16, [x1, #0x10] ], #0x30 str q16, [x0, #0x10] ret lr cmp x2, #48 bls G_M000_IG05 ; Total bytes of code 108 ldr q16, [x1, #0x20] str q16, [x0, #0x20] G_M000_IG05: ldr q16, [x3, #-0x10] str q16, [x4, #-0x10] b G_M000_IG14 align [4 bytes for IG10] 1391: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex62_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: tst w2, #24 beq G_M000_IG07 ldr x2, [x1] str x2, [x0] ldr x1, [x3, #-0x08] str x1, [x4, #-0x08] b G_M000_IG14 G_M000_IG07: tbz w2, #2, G_M000_IG08 ldr w2, [x1] str w2, [x0] ldr w1, [x3, #-0x04] str w1, [x4, #-0x04] b G_M000_IG14 G_M000_IG08: cbz x2, G_M000_IG14 ldrb w1, [x1] strb w1, [x0] tbz w2, #1, G_M000_IG14 ldrsh w2, [x3, #-0x02] strh w2, [x4, #-0x02] b G_M000_IG14 G_M000_IG09: lsr x5, x2, #6 G_M000_IG10: ldp q16, q17, [x1] stp q16, q17, [x0] ldp q16, q17, [x1, #0x20] stp q16, q17, [x0, #0x20] add x0, x0, #64 add x1, x1, #64 sub x5, x5, #1 cbnz x5, G_M000_IG10 G_M000_IG11: and x2, x2, #63 cmp x2, #16 bhi G_M000_IG04 b G_M000_IG05 G_M000_IG12: cmp x0, x1 beq G_M000_IG14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG13: ldp fp, lr, [sp], #0x10 br x3 G_M000_IG14: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 280 1392: JIT compiled System.Buffer:Memmove(byref,byref,ulong) [Tier1, IL size=479, code size=280] ; Assembly listing for method System.Span`1[ushort]:Slice(int):System.Span`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 29752 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x08] cmp w1, w2 bhi G_M000_IG04 ldr x0, [x0] ubfiz x3, x1, #1, #32 add x0, x0, x3 sub w1, w2, w1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 68 1393: JIT compiled System.Span`1[ushort]:Slice(int) [Tier1 with Static PGO, IL size=41, code size=68] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1394: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.ReadOnlyMemory`1[ushort]:get_Span():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 54272 ; 0 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: mov x0, xzr mov w1, wzr ldr x2, [x19] cbz x2, G_M000_IG07 G_M000_IG03: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG08 G_M000_IG04: add x0, x2, #12 G_M000_IG05: ldr w1, [x2, #0x08] G_M000_IG06: ldr w2, [x19, #0x08] and w2, w2, #0xD1FFAB1E mov w2, w2 ldr w3, [x19, #0x0C] add x4, x2, w3, UXTW mov w1, w1 cmp x4, x1 bhi G_M000_IG10 lsl x1, x2, #1 add x0, x0, x1 sxtw w1, w3 G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: ldr x0, [x2] ldr w1, [x0] tst w1, #0xD1FFAB1E beq G_M000_IG09 add x0, x2, #16 b G_M000_IG05 G_M000_IG09: mov x0, x2 ldr x1, [x2] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 b G_M000_IG06 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 192 1395: JIT compiled System.ReadOnlyMemory`1[ushort]:get_Span() [Tier1 with Static PGO, IL size=218, code size=192] ; Assembly listing for method System.ReadOnlySpan`1[ushort]:CopyTo(System.Span`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 66272 ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp w3, w2 bhi G_M000_IG04 ldr x4, [x0] mov w2, w3 lsl x2, x2, #1 mov x0, x1 mov x1, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 92 1396: JIT compiled System.ReadOnlySpan`1[ushort]:CopyTo(System.Span`1[ushort]) [Tier1 with Static PGO, IL size=47, code size=92] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CharsRight():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x28] ldr w1, [x1, #0x08] ldr w0, [x0, #0x58] sub w0, w1, w0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1397: JIT compiled System.Text.RegularExpressions.RegexParser:CharsRight() [Tier1, IL size=19, code size=32] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Kind():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x2E] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1398: JIT compiled System.Text.RegularExpressions.RegexNode:get_Kind() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1399: JIT compiled System.Collections.Generic.List`1[System.__Canon]:get_Count() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:IsInstanceOfClass(ulong,System.Object):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 9433843 ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: G_M000_IG08: movz x0, #0xD1FFAB1E stp movk x0, #0xD1FFAB1E LSL #16 fp, lr, [sp, #-0x10]! movk x0, #0xD1FFAB1E LSL #32 mov fp, sp ldr x0, [x0] G_M000_IG02: blr x0 cbz x1, G_M000_IG04 brk_windows # G_M000_IG03: 0 ldr G_M000_IG12: x2, [x1] cmp x2, x0 bne G_M000_IG06 G_M000_IG04: mov x0, x1 G_M000_IG05: bl ldp CORINFO_HELP_RNGCHKFAIL fp, lr, [sp], #0x10 brk_windows ret lr # 0 G_M000_IG06: ldr x2, [x1] RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 ldr x2, [x2, #0x10] G_M000_IG07: cmp x2, x0 beq G_M000_IG16 G_M000_IG08: cbz x2, G_M000_IG15 G_M000_IG09: ldr x2, [x2, #0x10] cmp x2, x0 beq 1400: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex62_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] G_M000_IG16 G_M000_IG10: cbz x2, G_M000_IG15 G_M000_IG11: ldr x2, [x2, #0x10] cmp x2, x0 beq G_M000_IG16 G_M000_IG12: cbz x2, G_M000_IG15 G_M000_IG13: ldr x2, [x2, #0x10] cmp x2, x0 beq G_M000_IG16 G_M000_IG14: cbnz x2, G_M000_IG18 G_M000_IG15: mov x1, xzr G_M000_IG16: mov x0, x1 G_M000_IG17: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG18: ldr x2, [x2, #0x10] b G_M000_IG07 ; Total bytes of code 128 1401: JIT compiled System.Runtime.CompilerServices.CastHelpers:IsInstanceOfClass(ulong,System.Object) [Tier1 with Static PGO, IL size=97, code size=128] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:Child(int):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov w19, w1 G_M000_IG02: ldr x1, [x0, #0x08] mov x0, x1 cbz x0, G_M000_IG04 G_M000_IG03: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG09 G_M000_IG04: mov x2, x1 cbz x2, G_M000_IG07 G_M000_IG05: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG07 G_M000_IG06: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG07: ldr w0, [x2, #0x10] cmp w19, w0 bhs G_M000_IG10 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w19, w1 bhs G_M000_IG11 add x0, x0, #16 ldr x0, [x0, w19, UXTW #3] G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 204 1402: JIT compiled System.Text.RegularExpressions.RegexNode:Child(int) [Tier1, IL size=35, code size=204] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1403: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:get_Count() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.ValueStringBuilder:Append(ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x08] add x3, x0, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 bhs G_M000_IG05 G_M000_IG03: strh w1, [x4, w2, UXTW #2] add w1, w2, #1 str w1, [x0, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 84 1404: JIT compiled System.Text.ValueStringBuilder:Append(ushort) [Tier1, IL size=52, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:get_Frequency():System.ReadOnlySpan`1[float] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, #128 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1405: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:get_Frequency() [Tier1, IL size=11, code size=32] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:CreateSpan[float](System.RuntimeFieldHandle):System.ReadOnlySpan`1[float] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: add x2, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl System.Runtime.CompilerServices.RuntimeHelpers:GetSpanDataFrom(System.RuntimeFieldHandle,System.RuntimeTypeHandle,byref):ulong ldr w1, [fp, #0x18] tbnz w1, #31, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 68 1406: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:CreateSpan[float](System.RuntimeFieldHandle) [Tier1, IL size=30, code size=68] ; Assembly listing for method System.Nullable`1[System.ValueTuple`2[ushort,ushort]]:get_HasValue():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1407: JIT compiled System.Nullable`1[System.ValueTuple`2[ushort,ushort]]:get_HasValue() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__SumFrequencies|2_2(ushort[]):float ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movi v0.16b, #0 mov w1, wzr ldr w2, [x0, #0x08] cmp w2, #0 ble G_M000_IG06 add x0, x0, #16 align [0 bytes for IG03] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: ldrh w3, [x0, w1, UXTW #2] cmp w3, #128 bge G_M000_IG05 G_M000_IG04: ubfiz x3, x3, #2, #32 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr s16, [x3, x4] fadd s0, s0, s16 G_M000_IG05: add w1, w1, #1 cmp w2, w1 bgt G_M000_IG03 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 1408: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__SumFrequencies|2_2(ushort[]) [Tier1, IL size=55, code size=88] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1409: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Count() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:get_Item(int):System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 167200 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x10] cmp w1, w2 bhs G_M000_IG04 ldr x0, [x0, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, #16 ldr x0, [x0, w1, UXTW #3] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 84 1410: JIT compiled System.Collections.Generic.List`1[System.__Canon]:get_Item(int) [Tier1 with Static PGO, IL size=27, code size=84] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex63_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1411: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex63_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:ChkCastClass(ulong,System.Object):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 153521 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x1, G_M000_IG04 G_M000_IG03: ldr x2, [x1] cmp x2, x0 bne G_M000_IG06 G_M000_IG04: mov x0, x1 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG07: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 60 1412: JIT compiled System.Runtime.CompilerServices.CastHelpers:ChkCastClass(ulong,System.Object) [Tier1 with Static PGO, IL size=22, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1413: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Reflection.Emit.ILGenerator:InternalEmit(System.Reflection.Emit.OpCode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x1, [fp, #0x18] G_M000_IG02: ldrsh w1, [fp, #0x18] ldr w2, [fp, #0x1C] asr w3, w2, #22 and w3, w3, #3 cmp w3, #1 beq G_M000_IG06 G_M000_IG03: ldr x3, [x0, #0x08] ldr w4, [x0, #0x58] cbnz x3, G_M000_IG04 cbnz w4, G_M000_IG15 mov x5, xzr mov w6, wzr b G_M000_IG05 G_M000_IG04: ldr w7, [x3, #0x08] cmp w7, w4 blo G_M000_IG15 add x5, x3, #16 mov w6, w4 add x5, x5, x6 sub w6, w7, w4 G_M000_IG05: rev16 w7, w1 sxth w1, w7 cmp w6, #2 blo G_M000_IG16 strh w1, [x5] ldr w1, [x0, #0x58] add w1, w1, #2 str w1, [x0, #0x58] b G_M000_IG07 G_M000_IG06: ldr x3, [x0, #0x08] ldr w4, [x0, #0x58] add w5, w4, #1 str w5, [x0, #0x58] ldr w7, [x3, #0x08] cmp w4, w7 bhs G_M000_IG17 add x3, x3, #16 strb w1, [x3, w4, UXTW #2] G_M000_IG07: sxtw w1, w2 asr w2, w2, #28 ldr w3, [x0, #0x74] tbz w3, #31, G_M000_IG09 G_M000_IG08: str wzr, [x0, #0x74] G_M000_IG09: ldr w3, [x0, #0x74] add w2, w3, w2 str w2, [x0, #0x74] tbz w2, #31, G_M000_IG11 G_M000_IG10: ldr x3, [x0, #0x50] sub x2, x3, w2, SXTW str x2, [x0, #0x50] str wzr, [x0, #0x74] b G_M000_IG12 G_M000_IG11: ldr w3, [x0, #0x7C] cmp w3, w2 bge G_M000_IG12 str w2, [x0, #0x7C] G_M000_IG12: ldr w2, [x0, #0x74] str w2, [x0, #0x78] tbz w1, #24, G_M000_IG14 G_M000_IG13: movn w1, #0 str w1, [x0, #0x74] G_M000_IG14: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG17: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1414: JIT compiled System.Reflection.Emit.ILGenerator:InternalEmit(System.Reflection.Emit.OpCode) [Tier1, IL size=98, code size=324] ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str x1, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr w1, [x19, #0x58] add w1, w1, #3 ldr x20, [x19, #0x08] ldr w0, [x20, #0x08] cmp w1, w0 blt G_M000_IG04 G_M000_IG03: ldr w0, [x20, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr w2, [x20, #0x08] mov x0, x20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov x0, x19 ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 br x2 ; Total bytes of code 172 1415: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode) [Tier1, IL size=15, code size=172] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1416: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex63_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 18 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x18] mov x19, x0 G_M000_IG02: cbz x2, G_M000_IG30 ldr w20, [x2, #0x18] ldr x0, [x2, #0x10] ldr x1, [x19, #0x40] cbnz x1, G_M000_IG04 G_M000_IG03: cbz x0, G_M000_IG06 b G_M000_IG05 G_M000_IG04: cmp x0, x1 beq G_M000_IG06 cbz x0, G_M000_IG05 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x10] blr x2 cbnz w0, G_M000_IG06 G_M000_IG05: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG06: ldrsh w1, [fp, #0x18] cmn w1, #0xD1FFAB1E bne G_M000_IG13 G_M000_IG07: cmp w20, #3 bhi G_M000_IG12 mov w0, w20 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG12: cmp w20, #255 bgt G_M000_IG20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] b G_M000_IG20 G_M000_IG13: cmn w1, #0xD1FFAB1E bne G_M000_IG19 cmp w20, #3 bhi G_M000_IG18 mov w0, w20 adr x1, [@RWD16] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] b G_M000_IG20 G_M000_IG18: cmp w20, #255 bgt G_M000_IG20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] b G_M000_IG20 G_M000_IG19: mov w0, #255 cmn w1, #0xD1FFAB1E ccmp w20, w0, 0, eq bgt G_M000_IG20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] G_M000_IG20: ldr w1, [x19, #0x58] add w1, w1, #7 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG22 G_M000_IG21: ldr w0, [x21, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG22: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x1C] and w0, w0, #31 cmp w0, #5 bne G_M000_IG24 G_M000_IG23: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG24: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG28 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] cbnz x0, G_M000_IG25 cbnz w1, G_M000_IG31 mov x2, xzr mov w3, wzr b G_M000_IG26 G_M000_IG25: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG31 add x3, x0, #16 mov w2, w1 add x2, x3, x2 ldr w0, [x0, #0x08] sub w3, w0, w1 G_M000_IG26: sxth w0, w20 cmp w3, #2 blo G_M000_IG32 strh w0, [x2] ldr w0, [x19, #0x58] add w0, w0, #2 str w0, [x19, #0x58] G_M000_IG27: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG28: cmp w20, #255 bgt G_M000_IG33 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] add w2, w1, #1 str w2, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG34 add x0, x0, #16 strb w20, [x0, w1, UXTW #2] G_M000_IG29: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG30: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG32: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG33: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG34: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 RWD16 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 ; Total bytes of code 1112 1417: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.Emit.LocalBuilder) [Tier1, IL size=397, code size=1112] ; Assembly listing for method System.RuntimeType:get_IsGenericType():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 117904 ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x18] mov x2, x1 tbnz w1, #1, G_M000_IG08 G_M000_IG03: ldr w1, [x2] tst w1, #0xD1FFAB1E bne G_M000_IG07 G_M000_IG04: tst w1, #48 cset x1, ne G_M000_IG05: uxtb w1, w1 mov w0, w1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w1, wzr b G_M000_IG05 G_M000_IG08: mov w1, wzr b G_M000_IG05 ; Total bytes of code 72 1418: JIT compiled System.RuntimeType:get_IsGenericType() [Tier1 with Static PGO, IL size=40, code size=72] ; Assembly listing for method System.Runtime.CompilerServices.MethodTable:get_HasInstantiation():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 118542 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0] tst w0, #0xD1FFAB1E bne G_M000_IG05 G_M000_IG03: tst w0, #48 cset x0, ne G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 48 1419: JIT compiled System.Runtime.CompilerServices.MethodTable:get_HasInstantiation() [Tier1 with Static PGO, IL size=29, code size=48] ; Assembly listing for method System.Object:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 1420: JIT compiled System.Object:.ctor() [Tier1, IL size=1, code size=16] ; Assembly listing for method System.Threading.StackHelper:TryEnsureSufficientExecutionStack():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 b System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool ; Total bytes of code 16 1421: JIT compiled System.Threading.StackHelper:TryEnsureSufficientExecutionStack() [Tier1, IL size=6, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex64_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1422: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex64_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ChildCount():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x08] cbnz x1, G_M000_IG05 G_M000_IG03: mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG07 ldr w0, [x0, #0x10] G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 1423: JIT compiled System.Text.RegularExpressions.RegexNode:ChildCount() [Tier1, IL size=34, code size=88] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddElementType(ubyte):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr w1, [x19, #0x18] add w1, w1, #1 ldr x0, [x19, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 ble G_M000_IG04 G_M000_IG03: ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] add w2, w1, #1 str w2, [x19, #0x18] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, #16 strb w20, [x0, w1, UXTW #2] G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 140 1424: JIT compiled System.Reflection.Emit.SignatureHelper:AddElementType(ubyte) [Tier1, IL size=61, code size=140] ; Assembly listing for method System.Reflection.Emit.OpCodes:TakesSingleByteArgument(System.Reflection.Emit.OpCode):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr w0, [fp, #0x1C] and w0, w0, #31 sub w1, w0, #15 cmp w1, #1 ccmp w0, #18, z, hi cinc w0, wzr, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1425: JIT compiled System.Reflection.Emit.OpCodes:TakesSingleByteArgument(System.Reflection.Emit.OpCode) [Tier1, IL size=24, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1426: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1427: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex64_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddOneArgTypeHelperWorker(System.Type,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 15948 ; 3 inlinees with PGO data; 30 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov fp, sp mov x20, x0 mov x19, x1 mov w21, w2 G_M000_IG02: ldr x22, [x19] movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 cmp x22, x23 bne G_M000_IG52 mov x0, x19 bl System.RuntimeTypeHandle:IsGenericVariable(System.RuntimeType):bool cbnz w0, G_M000_IG53 G_M000_IG03: cmp x22, x23 bne G_M000_IG51 mov x0, x19 ldr x0, [x0, #0x18] mov x1, x0 tbnz w0, #1, G_M000_IG49 G_M000_IG04: ldr w0, [x1] tst w0, #0xD1FFAB1E bne G_M000_IG48 G_M000_IG05: tst w0, #48 cset x0, ne G_M000_IG06: uxtb w1, w0 G_M000_IG07: cbnz w1, G_M000_IG24 G_M000_IG08: mov x25, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x22, x0 beq G_M000_IG56 mov x26, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x22, x0 beq G_M000_IG61 cmp x22, x23 bne G_M000_IG09 mov x0, x19 bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #16 bne G_M000_IG10 b G_M000_IG50 G_M000_IG09: mov x0, x19 ldr x25, [x22, #0x58] ldr x1, [x25, #0x18] blr x1 cbnz w0, G_M000_IG50 G_M000_IG10: mov x0, x19 ldr x25, [x22, #0x58] ldr x1, [x25, #0x20] blr x1 cbnz w0, G_M000_IG38 G_M000_IG11: mov x0, x19 ldr x1, [x25, #0x10] blr x1 cbnz w0, G_M000_IG33 G_M000_IG12: mov w21, #34 cmp x22, x23 bne G_M000_IG16 cmp x22, x23 bne G_M000_IG66 mov x0, x19 bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte sxtw w21, w0 cmp w21, #18 bne G_M000_IG16 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x19, x1 bne G_M000_IG15 G_M000_IG14: mov w21, #28 b G_M000_IG18 G_M000_IG15: movz x1, #32 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x19, x1 beq G_M000_IG17 G_M000_IG16: cmp w21, #14 bgt G_M000_IG18 b G_M000_IG19 G_M000_IG17: mov w21, #14 b G_M000_IG19 G_M000_IG18: cmp w21, #22 ccmp w21, #24, z, ne ccmp w21, #25, z, ne ccmp w21, #28, z, ne bne G_M000_IG22 G_M000_IG19: ldr w1, [x20, #0x18] add w1, w1, #1 ldr x0, [x20, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 ble G_M000_IG20 ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG20: ldr x0, [x20, #0x08] ldr w1, [x20, #0x18] add w2, w1, #1 str w2, [x20, #0x18] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG70 add x0, x0, #16 strb w21, [x0, w1, UXTW #2] G_M000_IG21: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG22: ldr x0, [x20, #0x10] cbnz x0, G_M000_IG26 G_M000_IG23: mov x0, x20 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG24: cmp x22, x23 bne G_M000_IG28 G_M000_IG25: b G_M000_IG41 G_M000_IG26: mov x0, x19 ldr x1, [x22, #0x78] ldr x1, [x1, #0x08] blr x1 cbnz w0, G_M000_IG31 G_M000_IG27: ldr x0, [x20, #0x10] mov x1, x19 ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blr x2 sxtw w19, w0 mov x0, x20 mov w1, #18 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG28: mov x0, x19 ldr x1, [x22, #0x60] ldr x1, [x1, #0x10] blr x1 G_M000_IG29: cbz w0, G_M000_IG43 G_M000_IG30: b G_M000_IG42 G_M000_IG31: ldr x0, [x20, #0x10] mov x1, x19 ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blr x2 sxtw w19, w0 mov x0, x20 mov w1, #17 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG32: mov x0, x19 ldr x1, [x24, #0x28] blr x1 mov x19, x0 b G_M000_IG35 G_M000_IG33: mov x0, x19 ldr x1, [x22, #0x60] ldr x1, [x1, #0x18] blr x1 cbz w0, G_M000_IG67 mov x0, x20 mov w1, #29 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x24, [x22, #0x68] ldr x1, [x24, #0x08] blr x1 mov x1, x0 mov x0, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG21 G_M000_IG34: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 G_M000_IG35: ldr w22, [x19, #0x08] mov w1, w22 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w23, wzr cmp w22, #0 ble G_M000_IG21 G_M000_IG36: add x1, x19, #16 ldr x1, [x1, w23, UXTW #3] mov x0, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add w23, w23, #1 cmp w22, w23 bgt G_M000_IG36 G_M000_IG37: b G_M000_IG21 G_M000_IG38: mov x0, x20 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp x22, x23 bne G_M000_IG45 G_M000_IG39: mov x0, x19 bl System.RuntimeTypeHandle:GetElementType(System.RuntimeType):System.RuntimeType mov x1, x0 G_M000_IG40: mov x0, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG21 G_M000_IG41: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG29 G_M000_IG42: tst w21, #255 bne G_M000_IG08 G_M000_IG43: mov x0, x20 mov w1, #21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp x22, x23 bne G_M000_IG47 G_M000_IG44: b G_M000_IG46 G_M000_IG45: mov x0, x19 ldr x24, [x22, #0x68] ldr x1, [x24, #0x08] blr x1 mov x1, x0 b G_M000_IG40 G_M000_IG46: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x20 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG34 G_M000_IG47: mov x0, x19 ldr x24, [x22, #0x68] ldr x1, [x24, #0x18] blr x1 mov x1, x0 mov x0, x20 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG32 G_M000_IG48: mov w0, wzr b G_M000_IG06 G_M000_IG49: mov w0, wzr b G_M000_IG06 G_M000_IG50: mov x0, x20 mov w1, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x24, [x22, #0x68] ldr x1, [x24, #0x08] blr x1 mov x1, x0 mov x0, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG21 G_M000_IG51: mov x0, x19 ldr x1, [x22, #0x60] ldr x1, [x1, #0x08] blr x1 sxtw w1, w0 b G_M000_IG07 G_M000_IG52: mov x0, x19 ldr x25, [x22, #0x58] ldr x1, [x25, #0x30] blr x1 cbz w0, G_M000_IG03 G_M000_IG53: mov x0, x19 ldr x1, [x22, #0x50] ldr x1, [x1, #0x38] blr x1 cbz x0, G_M000_IG54 mov x0, x20 mov w1, #30 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG55 G_M000_IG54: mov x0, x20 mov w1, #19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG55: mov x0, x19 ldr x1, [x22, #0x70] ldr x1, [x1] blr x1 sxtw w1, w0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG56: ldr x0, [x25, #0x10] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG57 mov x0, x25 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w26, w0 b G_M000_IG58 G_M000_IG57: ldr x0, [x20, #0x10] mov x1, x19 ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blr x2 sxtw w26, w0 G_M000_IG58: mov x0, x19 ldr x1, [x22, #0x78] ldr x1, [x1, #0x08] blr x1 cbz w0, G_M000_IG60 mov x0, x20 mov w1, #17 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG59: mov x0, x20 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG60: mov x0, x20 mov w1, #18 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG59 G_M000_IG61: ldr x24, [x26, #0x08] ldr x0, [x24, #0x10] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG62 mov x0, x24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w21, w0 b G_M000_IG63 G_M000_IG62: ldr x0, [x20, #0x10] mov x1, x19 ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blr x2 sxtw w21, w0 G_M000_IG63: mov x0, x19 ldr x1, [x22, #0x78] ldr x1, [x1, #0x08] blr x1 cbz w0, G_M000_IG65 mov x0, x20 mov w1, #17 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG64: mov x0, x20 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG65: mov x0, x20 mov w1, #18 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG64 G_M000_IG66: mov x0, x23 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG67: mov x0, x20 mov w1, #20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x24, [x22, #0x68] ldr x1, [x24, #0x08] blr x1 mov x1, x0 mov x0, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 ldr x1, [x24, #0x10] blr x1 sxtw w19, w0 mov x0, x20 mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex65_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) x2 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data mov x0, x20 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG01: mov stp w21, wzr fp, lr, [sp, #-0x30]! b G_M000_IG69 stp x19, x20, [sp, #0x18] G_M000_IG68: str mov x0, x20 x21, [sp, #0x28] mov w1 mov , wzr fp, sp movz mov x2, #0xD1FFAB1E x19, x0 movk x2, #0xD1FFAB1E LSL #16 mov x21, x1 movk x2, #0xD1FFAB1E LSL #32 mov w20, w2 ldr x2, [x2] G_M000_IG02: blr x2 mov x1, x21 add w21, w21, #1 mov w2, G_M000_IG69: w20 cmp mov w21, w19 x0, x19 blt G_M000_IG68 bl b G_M000_IG21 G_M000_IG70: bl CORINFO_HELP_RNGCHKFAIL System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 brk_windows G_M000_IG03: #0 mov x1, x21 mov w2 ; Total bytes of code 2272 , w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1428: JIT compiled System.Reflection.Emit.SignatureHelper:AddOneArgTypeHelperWorker(System.Type,bool) [Tier1 with Static PGO, IL size=661, code size=2272] 1429: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex65_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:GetJitContext(byref):System.RuntimeType:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w2, wzr ldr x0, [x0, #0x18] ldrb w3, [x0, #0x72] cbz w3, G_M000_IG04 G_M000_IG03: mov w2, #2 b G_M000_IG05 G_M000_IG04: ldrb w3, [x0, #0x71] mov w4, #1 cmp w3, #0 csel w2, w2, w4, eq G_M000_IG05: ldr x0, [x0, #0x38] str w2, [x1] G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 64 1430: JIT compiled System.Reflection.Emit.DynamicResolver:GetJitContext(byref) [Tier1, IL size=55, code size=64] ; Assembly listing for method System.Reflection.Emit.DynamicScope:get_Item(int):System.Object:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: and w1, w1, #0xD1FFAB1E tbnz w1, #31, G_M000_IG04 G_M000_IG03: ldr x2, [x0, #0x08] ldr w3, [x2, #0x10] cmp w1, w3 ble G_M000_IG06 G_M000_IG04: mov x0, xzr G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: cmp w1, w3 bhs G_M000_IG08 ldr x0, [x2, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, #16 ldr x0, [x0, w1, UXTW #3] G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 116 1431: JIT compiled System.Reflection.Emit.DynamicScope:get_Item(int) [Tier1, IL size=42, code size=116] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1432: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1433: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex65_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:ResolveToken(int,byref,byref,byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 24 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x2 mov x19, x3 mov x21, x4 G_M000_IG02: str xzr, [x20] str xzr, [x19] str xzr, [x21] ldr x0, [x0, #0x30] ldrsb wzr, [x0] and w11, w1, #0xD1FFAB1E tbnz w11, #31, G_M000_IG04 G_M000_IG03: ldr x0, [x0, #0x08] ldr w1, [x0, #0x10] cmp w11, w1 ble G_M000_IG05 G_M000_IG04: mov x22, xzr b G_M000_IG06 G_M000_IG05: cmp w11, w1 bhs G_M000_IG46 ldr x0, [x0, #0x08] ldr w1, [x0, #0x08] cmp w11, w1 bhs G_M000_IG52 add x0, x0, #16 ldr x22, [x0, w11, UXTW #3] G_M000_IG06: cbz x22, G_M000_IG47 mov x0, x22 ldr x23, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x23, x0 bne G_M000_IG11 G_M000_IG07: ldr x0, [x22, #0x08] cbz x0, G_M000_IG10 G_M000_IG08: ldr x11, [x0, #0x18] G_M000_IG09: str x11, [x20] b G_M000_IG45 G_M000_IG10: mov x11, xzr b G_M000_IG09 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x23, x0 bne G_M000_IG15 ldr x0, [x22, #0x08] cbz x0, G_M000_IG48 ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG14 G_M000_IG12: ldr x24, [x0, #0x50] G_M000_IG13: str x24, [x19] b G_M000_IG45 G_M000_IG14: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x24, x0 b G_M000_IG13 G_M000_IG15: movz x24, #0xD1FFAB1E movk x24, #0xD1FFAB1E LSL #16 movk x24, #0xD1FFAB1E LSL #32 cmp x23, x24 bne G_M000_IG18 ldr x0, [x22, #0x08] cbnz x0, G_M000_IG16 mov x22, xzr b G_M000_IG17 G_M000_IG16: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x22, x0 G_M000_IG17: str x22, [x21] b G_M000_IG45 G_M000_IG18: mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x23, x1 bne G_M000_IG23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG49 ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG21 G_M000_IG19: ldr x26, [x0, #0x50] G_M000_IG20: str x26, [x19] b G_M000_IG45 G_M000_IG21: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x26, x0 b G_M000_IG20 G_M000_IG22: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 b G_M000_IG44 G_M000_IG23: mov x25, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x23, x0 bne G_M000_IG30 add x0, x25, #8 ldr x0, [x0] cbz x0, G_M000_IG50 ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG29 G_M000_IG24: ldr x27, [x0, #0x50] G_M000_IG25: str x27, [x19] ldr x0, [x25, #0x10] cbz x0, G_M000_IG28 G_M000_IG26: ldr x11, [x0, #0x18] G_M000_IG27: str x11, [x20] b G_M000_IG45 G_M000_IG28: mov x11, xzr b G_M000_IG27 G_M000_IG29: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x27, x0 b G_M000_IG25 G_M000_IG30: mov x26, x22 add x0, x24, #0xD1FFAB1E cmp x23, x0 bne G_M000_IG36 add x0, x26, #8 ldr x0, [x0] cbnz x0, G_M000_IG31 mov x22, xzr b G_M000_IG32 G_M000_IG31: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x22, x0 G_M000_IG32: str x22, [x21] ldr x0, [x26, #0x10] cbz x0, G_M000_IG35 G_M000_IG33: ldr x11, [x0, #0x18] G_M000_IG34: str x11, [x20] b G_M000_IG45 G_M000_IG35: mov x11, xzr b G_M000_IG34 G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x23, x0 bne G_M000_IG45 ldr x0, [x22, #0x10] cbnz x0, G_M000_IG42 ldr x0, [x22, #0x08] ldrsb wzr, [x0] ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG39 G_M000_IG37: ldr x27, [x0, #0x50] G_M000_IG38: str x27, [x19] ldr x0, [x22, #0x08] ldr x0, [x0, #0x38] ldrsb wzr, [x0] ldr x0, [x0, #0x18] str x0, [x20] b G_M000_IG45 G_M000_IG39: movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x27, x0 b G_M000_IG38 G_M000_IG40: ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG22 G_M000_IG41: b G_M000_IG43 G_M000_IG42: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG51 b G_M000_IG40 G_M000_IG43: ldr x0, [x0, #0x50] G_M000_IG44: str x0, [x19] G_M000_IG45: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG46: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x20 bl CORINFO_HELP_THROW G_M000_IG48: mov x24, xzr b G_M000_IG13 G_M000_IG49: mov x26, xzr b G_M000_IG20 G_M000_IG50: mov x27, xzr b G_M000_IG25 G_M000_IG51: mov x0, xzr b G_M000_IG44 G_M000_IG52: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1028 1434: JIT compiled System.Reflection.Emit.DynamicResolver:ResolveToken(int,byref,byref,byref) [Tier1, IL size=327, code size=1028] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Textpos():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1435: JIT compiled System.Text.RegularExpressions.RegexParser:Textpos() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightCharMoveRight():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x28] ldr w2, [x0, #0x58] add w3, w2, #1 str w3, [x0, #0x58] ldr w0, [x1, #0x08] cmp w2, w0 bhs G_M000_IG04 add x0, x1, #12 ldrh w0, [x0, w2, UXTW #2] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 60 1436: JIT compiled System.Text.RegularExpressions.RegexParser:RightCharMoveRight() [Tier1, IL size=29, code size=60] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightChar():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x28] ldr w0, [x0, #0x58] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG04 add x1, x1, #12 ldrh w0, [x1, w0, UXTW #2] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 52 1437: JIT compiled System.Text.RegularExpressions.RegexParser:RightChar() [Tier1, IL size=18, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:get_Category():System.ReadOnlySpan`1[ubyte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #128 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1438: JIT compiled System.Text.RegularExpressions.RegexParser:get_Category() [Tier1, IL size=16, code size=32] ; Assembly listing for method System.ReadOnlySpan`1[ubyte]:.ctor(ulong,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 127792 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: tbnz w2, #31, G_M000_IG04 str x1, [x0] str w2, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 52 1439: JIT compiled System.ReadOnlySpan`1[ubyte]:.ctor(ulong,int) [Tier1 with Static PGO, IL size=51, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsSpecial(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxth w0, w0 cmp w0, #124 bgt G_M000_IG05 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] cmp w0, #4 cset x0, ge G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 64 1440: JIT compiled System.Text.RegularExpressions.RegexParser:IsSpecial(ushort) [Tier1, IL size=29, code size=64] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:MoveRight():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x58] add w1, w1, #1 str w1, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1441: JIT compiled System.Text.RegularExpressions.RegexParser:MoveRight() [Tier1, IL size=15, code size=28] ; Assembly listing for method System.Span`1[ushort]:.ctor(ulong,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: tbnz w2, #31, G_M000_IG04 str x1, [x0] str w2, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 52 1442: JIT compiled System.Span`1[ushort]:.ctor(ulong,int) [Tier1, IL size=46, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:.ctor(ushort[],System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb wzr, [x0, #0x1C] str xzr, [x0, #0x20] str xzr, [x0, #0x10] add x14, x0, #8 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x14, x0 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w3, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 1443: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:.ctor(ushort[],System.String,int) [Tier1, IL size=48, code size=56] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex66_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1444: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex66_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Add(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w13, [x0, #0x14] add w13, w13, #1 str w13, [x0, #0x14] ldr x13, [x0, #0x08] ldr w14, [x0, #0x10] ldr w12, [x13, #0x08] cmp w12, w14 bls G_M000_IG05 G_M000_IG03: add w12, w14, #1 str w12, [x0, #0x10] mov w12, #40 umull x14, w14, w12 add x14, x14, #16 add x14, x13, x14 mov x13, x1 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 120 1445: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Add(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier1, IL size=60, code size=120] ; Assembly listing for method System.ValueTuple`2[ushort,ushort]:.ctor(ushort,ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strh w1, [x0] strh w2, [x0, #0x02] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 1446: JIT compiled System.ValueTuple`2[ushort,ushort]:.ctor(ushort,ushort) [Tier1, IL size=15, code size=24] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Add(System.ValueTuple`2[ushort,ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x1, [fp, #0x18] G_M000_IG02: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x1, [x0, #0x08] ldr w2, [x0, #0x10] ldr w3, [x1, #0x08] cmp w3, w2 bls G_M000_IG05 G_M000_IG03: add w3, w2, #1 str w3, [x0, #0x10] ubfiz x0, x2, #2, #32 add x0, x0, #16 ldr w2, [fp, #0x18] str w2, [x1, x0] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 104 1447: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Add(System.ValueTuple`2[ushort,ushort]) [Tier1, IL size=60, code size=104] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Span`1[ushort]:op_Implicit(System.Span`1[ushort]):System.ReadOnlySpan`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] G_M000_IG01: stp x21, x22, [sp, #0x28] stp stp x23, x24, [sp, #0x38] fp, lr, [sp str , #-0x10]!x25, [ mov fp, sp sp, #0x48] mov G_M000_IG02: fp, sp ldp fp, lr, [sp], #0x10 ret lr mov x19, x0 ; Total bytes of code 16 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 1448: JIT compiled System.Span`1[ushort]:op_Implicit(System.Span`1[ushort]) [Tier1, IL size=19, code size=16] cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1449: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:OneToStringClass(ushort):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x18] G_M000_IG02: strh w0, [fp, #0x10] add x0, fp, #16 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x18] cmp xip0, xip1 beq G_M000_IG03 bl CORINFO_HELP_FAIL_FAST G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 1450: JIT compiled System.Text.RegularExpressions.RegexCharClass:OneToStringClass(ushort) [Tier1, IL size=26, code size=92] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1451: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex66_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CharsToStringClass(System.ReadOnlySpan`1[ushort]):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 9 inlinees with PGO data; 12 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x48] stp x21, x22, [sp, #0x58] stp x23, x24, [sp, #0x68] str x25, [sp, #0x78] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] mov x19, x0 G_M000_IG02: cmp w1, #2 bhi G_M000_IG15 mov w0, w1 adr x2, [@RWD00] ldr w2, [x2, x0, LSL #2] adr x3, [G_M000_IG02] add x2, x2, x3 br x2 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG04: ldr x25, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG05: cmp w1, #0 bls G_M000_IG22 ldrh w21, [x19] cmp w21, #128 bge G_M000_IG15 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x0, [x20] cmp w21, #128 bhs G_M000_IG22 add x0, x0, #16 ubfiz x1, x21, #3, #32 add x21, x0, x1 ldr x0, [x21] cbnz x0, G_M000_IG09 str xzr, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] cbz x0, G_M000_IG19 add x22, x0, #16 ldr w23, [x0, #0x08] G_M000_IG06: str x22, [fp, #0x28] str w23, [fp, #0x30] str wzr, [fp, #0x20] strb wzr, [fp, #0x24] ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG21 ldr x2, [fp, #0x28] ubfiz x3, x0, #1, #32 add x2, x2, x3 sub w0, w1, w0 cmp w0, #3 blo G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x0, x0, #12 ldr w1, [x0] ldr w3, [x0, #0x02] str w1, [x2] str w3, [x2, #0x02] ldr w0, [fp, #0x20] add w0, w0, #3 str w0, [fp, #0x20] b G_M000_IG08 G_M000_IG07: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG08: ldrh w1, [x19] add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [x19] add w1, w1, #1 uxth w1, w1 add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x14, x21 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG09: ldr x25, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG10: cmp w1, #0 bls G_M000_IG22 ldrh w21, [x19] orr w21, w21, #32 sub w0, w21, #97 cmp w0, #25 bhi G_M000_IG15 cmp w1, #1 bls G_M000_IG22 ldrh w2, [x19, #0x02] orr w2, w2, #32 cmp w21, w2 bne G_M000_IG15 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x1, [x20, #0x08] cmp w0, #26 bhs G_M000_IG22 add x1, x1, #16 ubfiz x0, x0, #3, #32 add x0, x1, x0 mov x20, x0 ldr x0, [x20] cbnz x0, G_M000_IG14 str xzr, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] cbz x0, G_M000_IG20 add x24, x0, #16 ldr w25, [x0, #0x08] G_M000_IG11: str x24, [fp, #0x28] str w25, [fp, #0x30] str wzr, [fp, #0x20] strb wzr, [fp, #0x24] ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG21 ldr x2, [fp, #0x28] ubfiz x3, x0, #1, #32 add x2, x2, x3 sub w0, w1, w0 cmp w0, #3 blo G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x0, x0, #12 ldr w1, [x0] ldr w3, [x0, #0x02] str w1, [x2] str w3, [x2, #0x02] ldr w0, [fp, #0x20] add w0, w0, #3 str w0, [fp, #0x20] b G_M000_IG13 G_M000_IG12: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: and w1, w21, #0xD1FFAB1E uxth w1, w1 add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 and w1, w21, #0xD1FFAB1E add w1, w1, #1 uxth w1, w1 add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 uxth w1, w21 add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w1, w21, #1 uxth w1, w1 add x0, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x14, x20 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG14: ldr x25, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG15: lsl w0, w1, #1 sub w2, w1, #1 cmp w2, w1 bhs G_M000_IG22 ldrh w2, [x19, w2, UXTW #2] mov w3, #0xD1FFAB1E cmp w2, w3 bne G_M000_IG16 sub w0, w0, #1 G_M000_IG16: str x19, [fp, #0x38] str w1, [fp, #0x40] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x2, [x20, #0x20] add w19, w0, #3 add x21, fp, #56 cbnz x2, G_M000_IG17 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x15, [x20, #0x10] add x14, x2, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x2, #0x18] add x14, x20, #32 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF G_M000_IG17: mov w0, w19 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG18: ldr x25, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG19: mov x22, xzr mov w23, wzr b G_M000_IG06 G_M000_IG20: mov x24, xzr mov w25, wzr b G_M000_IG11 G_M000_IG21: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG22: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG03 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 1232 1452: JIT compiled System.Text.RegularExpressions.RegexCharClass:CharsToStringClass(System.ReadOnlySpan`1[ushort]) [Tier1, IL size=403, code size=1232] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: ldr x1, [x0] mov x13, x1 ldr w14, [x0, #0x0C] ldr w12, [x13, #0x14] cmp w14, w12 bne G_M000_IG07 G_M000_IG03: ldr w14, [x0, #0x08] str w14, [fp, #0x1C] ldr w12, [x13, #0x10] cmp w14, w12 bhs G_M000_IG05 add x14, x0, #16 ldr x13, [x13, #0x08] ldr w12, [fp, #0x1C] ldr w15, [x13, #0x08] cmp w12, w15 bhs G_M000_IG08 mov w15, #40 umull x12, w12, w15 add x12, x12, #16 add x13, x13, x12 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr w1, [x0, #0x08] add w1, w1, #1 str w1, [x0, #0x08] mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr w1, [x1, #0x10] add w1, w1, #1 str w1, [x0, #0x08] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] str xzr, [x0, #0x30] mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 204 1453: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:MoveNext() [Tier1, IL size=81, code size=204] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: tbnz w1, #31, G_M000_IG07 cbnz w1, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #55 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x19, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, #22 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 156 1454: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:.ctor(int) [Tier1, IL size=47, code size=156] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Current():System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x13, x0, #16 mov x14, x8 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 1455: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Current() [Tier1, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:TryGetValue(int,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x2 G_M000_IG02: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG05 G_M000_IG03: mov x14, x19 mov x13, x0 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 mov w0, #1 G_M000_IG04: ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex67_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame x19, [sp, #0x18] ; partially interruptible ; No PGO data ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: stp xzr, xzr, [x19] mov w0, wzr G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 G_M000_IG01: 1456: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:TryGetValue(int,byref) [Tier1, IL size=39, code size=96] stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1457: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex67_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:FindValue(int):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 2 ; 0 inlinees with PGO data; 7 single block inlinees; 1 inlinees without PGO data 1458: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr x0, [x19, #0x08] cbz x0, G_M000_IG07 G_M000_IG03: ldr x21, [x19, #0x18] cbnz x21, G_M000_IG09 sxtw w1, w20 ldr w11, [x0, #0x08] sxtw w2, w11 ldr x3, [x19, #0x30] mov w4, w1 mul x3, x3, x4 lsr x3, x3, #32 add x3, x3, #1 mov w2, w2 mul x2, x3, x2 lsr x2, x2, #32 cmp w2, w11 bhs G_M000_IG13 add x0, x0, #16 ubfiz x11, x2, #2, #32 add x0, x0, x11 ldr w11, [x0] ldr x2, [x19, #0x10] mov w3, wzr sub w11, w11, #1 ldr w4, [x2, #0x08] G_M000_IG04: cmp w4, w11 bls G_M000_IG07 ubfiz x0, x11, #5, #32 add x0, x0, #16 add x22, x2, x0 ldr w0, [x22] cmp w0, w20 bne G_M000_IG08 ldr w0, [x22, #0x08] cmp w0, w1 bne G_M000_IG08 G_M000_IG05: ldrsb wzr, [x22] add x0, x22, #16 G_M000_IG06: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: mov x0, xzr b G_M000_IG06 G_M000_IG08: ldr w11, [x22, #0x04] add w3, w3, #1 cmp w4, w3 bhs G_M000_IG04 b G_M000_IG12 G_M000_IG09: mov x0, x21 mov w1, w20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 sxtw w23, w0 ldr x1, [x19, #0x08] ldr w0, [x1, #0x08] ldr x2, [x19, #0x30] mov w11, w23 mul x2, x2, x11 lsr x2, x2, #32 add x2, x2, #1 mov w0, w0 mul x0, x2, x0 lsr x0, x0, #32 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 add x1, x1, #16 ubfiz x0, x0, #2, #32 add x1, x1, x0 ldr w24, [x1] ldr x19, [x19, #0x10] mov w25, wzr sub w24, w24, #1 G_M000_IG10: ldr w1, [x19, #0x08] cmp w1, w24 bls G_M000_IG07 ubfiz x1, x24, #5, #32 add x1, x1, #16 add x22, x19, x1 ldr w1, [x22] cmp w1, w23 bne G_M000_IG11 ldr w1, [x22, #0x08] mov x0, x21 mov w2, w20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 cbnz w0, G_M000_IG05 G_M000_IG11: ldr w24, [x22, #0x04] add w25, w25, #1 ldr w0, [x19, #0x08] cmp w0, w25 bhs G_M000_IG10 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 472 1459: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:FindValue(int) [Tier1 with Static PGO, IL size=299, code size=472] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:Parse(System.String):System.Text.RegularExpressions.RegexCharClass ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 36 1460: JIT compiled System.Text.RegularExpressions.RegexCharClass:Parse(System.String) [Tier1, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParseRecursive(System.String,int):System.Text.RegularExpressions.RegexCharClass ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 11 single block inlinees; 1 inlinees without PGO data add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr G_M000_IG01: w1, [x1, #0x02] stp eor w1, w1, w4 fp, lr, orr w1, w3, w1 [ cbnz w1, G_M000_IG08 sp, #-0x60]! stp G_M000_IG07: x19, x20, [sp, #0x18] add w0, w20, #8 stp x21, x22, [sp, #0x28] cmp w0, w2 stp x23, x24, [sp, #0x38] bhi G_M000_IG19 stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov w19, w1 G_M000_IG02: add w0, w19, #1 b ldr w21, [x20, #0x08] G_M000_IG13 cmp w0, w21 G_M000_IG08: bhs G_M000_IG09 sub add x22, x20, #12 w3, w2, w20 ldrh mov w0, [x22, w0, UXTW #2] x1, x0 add cmp w3, #7 w1, w19, #2 bls G_M000_IG17 cmp w1, w21 str bhs G_M000_IG09 x1, [fp, #0x48] ldrh w23, [x22, w1, UXTW #2] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 add w0, w19, w0 blt G_M000_IG17 add w1, w0, w23 G_M000_IG09: add w24, w1, #3 ldr w0, [x4] add w25, w0, #3 cmp w21, movz w5, #116w19 blo G_M000_IG08 movk w5, #116 LSL #16 ubfiz x0, x19, #1, #32 eor w0, w0, w5 add x0 ldr , x22, x0w4, [x4, #0x02] eor w4, w4, w5 sub w1, w21, w19 orr w0, w0, w4 movz cbnz w0, G_M000_IG17 x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG10: movk x2, #0xD1FFAB1E LSL #32 ldrh ldr w4, [x1, #0x06] x2, [x2] orr w0, w4, #4 blr mov w5, #116 x2 cmp w0, #103 mov x26, x0 ccmp w4, w5, z, ne mov x27, xzr bne cmp w21, w24 G_M000_IG17 ble G_M000_IG04 cmp w3, #4 blo G_M000_IG19 G_M000_IG03: add x0, x1, #8 mov sub w1, w3, #4 x0, x20 str mov w1, w24 x0, movz x2, #0xD1FFAB1E [ movk x2, #0xD1FFAB1E LSL #16 fp, #0x38] movk x2, #0xD1FFAB1E LSL #32 str w1, [fp, #0x40] ldr x2, [x2] add x0, fp, #56 ldr x1, [x0] blr x2 ldr w0, [x0, #0x08] cmp w0, #4 mov x27, x0 blt G_M000_IG17 G_M000_IG04: G_M000_IG11: mov x20, xzr cmp w23, #0 ldr x0, [x1] ble G_M000_IG06 movz x1, #99 G_M000_IG05: movk x1, #99 LSL #16 movz x0, #0xD1FFAB1E movk x1, #99 LSL #32 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movk x1, #116 LSL #48 bl CORINFO_HELP_NEWSFAST mov x20, x0 cmp x0, x1 movn w0, #0xD1FFAB1E LSL #16 bne G_M000_IG17 str G_M000_IG12: w0, [x20, #0x20] add w0, w20, #8 cmp w0, w2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bhi G_M000_IG19 G_M000_IG13: mov x1, #16 str w0, [x19, #0x4C] bl CORINFO_HELP_NEWARR_1_VC sxtw w21, w0 cmp w21, w20 add bge G_M000_IG14 x14, x20, #8 mov w0, w20 mov x15, x0 mov w20, w21 bl CORINFO_HELP_ASSIGN_REF mov w21, w0 mov w0, w25 G_M000_IG14: add x1, x0, w23, UXTW ldr mov w2, w21 w0, [x19, #0x58] cmp x1, x2 cbnz w0, G_M000_IG15 bhi G_M000_IG08 lsl x0, x0, #1 add x1, x22, x0 mov sxtw w2, w23 x0, mov x0, x20 x19 movz x3, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x3, movk x1, #0xD1FFAB1E LSL #16 #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movk x3, #0xD1FFAB1E LSL # ldr 32 x1, [x1] ldr blr x1 x3, [x3] blr x3 G_M000_IG15: ldr G_M000_IG06: x3 movz x0, #0xD1FFAB1E , [x19, #0x20] movk x0, #0xD1FFAB1E LSL #16 ldr w0, [x19, #0x58] movk x0, #0xD1FFAB1E LSL #32 sub w0, w0, #1 bl CORINFO_HELP_NEWSFAST str w0, [x19, #0x58] cmp w19, w21 ldr bhs G_M000_IG09 ldrh w2, [x3, #0x08] w14, [x22, w19, UXTW #2] cmp w14, #1 cmp w0, w2 cset x1, eq bhs G_M000_IG20 add x14, x0, #8 add x3, x3, #16 mov x15, x26 str bl CORINFO_HELP_ASSIGN_REF wzr, [x3, w0, UXTW #2] add x14, x0, #16 sub w3, w21, w20 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x28] strb mov w2, w20 w1, [x0, #0x24] mov w1, wzr add x14, x0, #24 movz x4, #0xD1FFAB1E mov x15, x27 movk x4, #0xD1FFAB1E LSL #16 bl movk x4, #0xD1FFAB1E LSL #32 CORINFO_HELP_ASSIGN_REF ldr x4, [x4] G_M000_IG07: ldr ldr wzr, [x0] x27, [sp, #0x58] blr x4 ldp mov w0, #1x25 , x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] G_M000_IG16: ldp x21, x22, [sp, #0x28] ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ldp ret lr x19, x20, [sp, #0x58] G_M000_IG08: ldp fp, lr, [sp], #0x70 mov w0, #33 ret lr movz x1, #0xD1FFAB1E G_M000_IG17: movk x1, #0xD1FFAB1E LSL #16 mov w0, wzr G_M000_IG18: movk x1, #0xD1FFAB1E LSL #32 ldr x21, [sp, #0x68] ldr x1, [x1] ldp x19, x20, [sp, #0x58] blr x1 ldp fp, lr, [sp], #0x70 brk_windows #0 ret lr G_M000_IG09: G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL movz x0, #0xD1FFAB1E brk_windows #0 movk x0, #0xD1FFAB1E LSL #16 ; Total bytes of code 448 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1461: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParseRecursive(System.String,int) [Tier1, IL size=119, code size=448] 1462: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex67_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.MemoryExtensions:AsSpan(System.String,int):System.ReadOnlySpan`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x0, G_M000_IG05 G_M000_IG03: cbnz w1, G_M000_IG07 mov x0, xzr mov w1, wzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG07 add x0, x0, #12 ubfiz x3, x1, #1, #32 add x0, x0, x3 sub w1, w2, w1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 96 1463: JIT compiled System.MemoryExtensions:AsSpan(System.String,int) [Tier1, IL size=66, code size=96] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ComputeRanges(System.ReadOnlySpan`1[ushort]):System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: cmp w20, #1 bls G_M000_IG13 ldrh w21, [x19, #0x02] mov w22, #3 add w23, w21, #3 mov x24, xzr cmp w21, #0 ble G_M000_IG11 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w23, #3 ble G_M000_IG11 G_M000_IG04: cmp w22, w20 bhs G_M000_IG13 ldrh w0, [x19, w22, UXTW #2] add w22, w22, #1 cmp w22, w23 blt G_M000_IG06 G_M000_IG05: mov w1, #0xD1FFAB1E b G_M000_IG07 G_M000_IG06: cmp w22, w20 bhs G_M000_IG13 ldrh w1, [x19, w22, UXTW #2] sub w1, w1, #1 uxth w1, w1 G_M000_IG07: uxth w1, w1 add w22, w22, #1 ldr w2, [x24, #0x14] add w2, w2, #1 str w2, [x24, #0x14] ldr x2, [x24, #0x08] ldr w3, [x24, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG09 G_M000_IG08: add w4, w3, #1 str w4, [x24, #0x10] ubfiz x3, x3, #2, #32 add x3, x3, #16 add x2, x2, x3 strh w0, [x2] strh w1, [x2, #0x02] b G_M000_IG10 G_M000_IG09: strh w0, [fp, #0x18] strh w1, [fp, #0x1A] mov x0, x24 ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG10: cmp w22, w23 blt G_M000_IG04 G_M000_IG11: mov x0, x24 G_M000_IG12: ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 312 1464: JIT compiled System.Text.RegularExpressions.RegexCharClass:ComputeRanges(System.ReadOnlySpan`1[ushort]) [Tier1, IL size=96, code size=312] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 52 1465: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String,int) [Tier1, IL size=11, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:.ctor(bool,System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]],System.Text.StringBuilder,System.Text.RegularExpressions.RegexCharClass):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #16 mov x15, x3 bl CORINFO_HELP_ASSIGN_REF strb w1, [x0, #0x24] add x14, x0, #24 mov x15, x4 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 1466: JIT compiled System.Text.RegularExpressions.RegexCharClass:.ctor(bool,System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]],System.Text.StringBuilder,System.Text.RegularExpressions.RegexCharClass) [Tier1, IL size=36, code size=56] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:set_Item(int,System.ValueTuple`2[System.__Canon,int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 40 1467: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:set_Item(int,System.ValueTuple`2[System.__Canon,int]) [Tier1, IL size=11, code size=40] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex68_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1468: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex68_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:TryInsert(int,System.ValueTuple`2[System.__Canon,int],ubyte):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 1 ; 0 inlinees with PGO data; 7 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x19, x0 mov w20, w1 mov x22, x2 mov w23, w3 mov w21, w4 G_M000_IG02: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG03 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp x24, x25, [x19, #0x10] cbnz x25, G_M000_IG11 sxtw w26, w20 G_M000_IG04: mov w27, wzr ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] sxtw w12, w15 ldr xip0, [x19, #0x30] mov w0, w26 mul xip0, xip0, x0 lsr xip0, xip0, #32 add xip0, xip0, #1 mov w12, w12 mul x12, xip0, x12 lsr x12, x12, #32 cmp w12, w15 bhs G_M000_IG27 add x14, x14, #16 ubfiz x15, x12, #2, #32 add x28, x14, x15 ldr w14, [x28] sub w2, w14, #1 cbnz x25, G_M000_IG17 ldr w25, [x24, #0x08] G_M000_IG05: cmp w25, w2 bhi G_M000_IG12 G_M000_IG06: ldr w14, [x19, #0x40] cmp w14, #0 bgt G_M000_IG25 ldr w21, [x19, #0x38] cmp w25, w21 beq G_M000_IG26 G_M000_IG07: add w14, w21, #1 str w14, [x19, #0x38] ldr x24, [x19, #0x10] G_M000_IG08: ldr w14, [x24, #0x08] cmp w21, w14 bhs G_M000_IG27 ubfiz x14, x21, #5, #32 add x14, x14, #16 add x14, x24, x14 str w26, [x14] ldr w15, [x28] sub w15, w15, #1 stp w15, w20, [x14, #0x04] add x0, x14, #16 mov x14, x0 mov x15, x22 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w23, [x0, #0x08] add w0, w21, #1 str w0, [x28] ldr w0, [x19, #0x44] add w0, w0, #1 str w0, [x19, #0x44] G_M000_IG09: mov w0, #1 G_M000_IG10: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG11: mov x0, x25 mov w1, w20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 sxtw w26, w0 b G_M000_IG04 G_M000_IG12: ubfiz x14, x2, #5, #32 add x14, x14, #16 ldr w14, [x24, x14] cmp w14, w26 bne G_M000_IG13 ubfiz x14, x2, #5, #32 add x14, x14, #16 add x14, x24, x14 ldr w14, [x14, #0x08] cmp w14, w20 beq G_M000_IG14 G_M000_IG13: ubfiz x2, x2, #5, #32 add x14, x2, #16 add x14, x24, x14 ldr w2, [x14, #0x04] sxtw w3, w2 add w27, w27, #1 cmp w25, w27 mov w2, w3 bhs G_M000_IG05 b G_M000_IG24 G_M000_IG14: uxtb w14, w21 cmp w14, #1 bne G_M000_IG16 G_M000_IG15: cmp w2, w25 bhs G_M000_IG27 ubfiz x14, x2, #5, #32 add x14, x14, #16 add x14, x24, x14 add x2, x14, #16 mov x14, x2 mov x15, x22 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w23, [x2, #0x08] b G_M000_IG09 G_M000_IG16: uxtb w1, w21 cmp w1, #2 bne G_M000_IG21 b G_M000_IG18 G_M000_IG17: ldr w1, [x24, #0x08] sxtw w3, w1 cmp w3, w2 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool bls G_M000_IG20 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows mov w0, w3 ; optimized code ; fp based frame ; partially interruptible ; No PGO data mov x3, x25 ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data mov w25, w0 ubfiz x1, x2, #5, #32 add x1, x1, #16 ldr w1, [x24, x1] cmp w1, w26 bne G_M000_IG23 str w2, [fp, #0x1C] ubfiz x1, x2, #5, #32 add x1, x1, #16 add x1, x24, x1 ldr w1, [x1, #0x08] str x3, [fp, #0x10] mov x0, x3 mov w2, w20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x4, [x11] blr x4 G_M000_IG01: ldr stp fp, lr, [sp, #-0x50]!x3, [fp, #0x10] cbz stp x19, x20, [sp, #0x18] w0 stp , G_M000_IG19 x21, uxtb x22, [sp, #0x28] w0 stp x23, x24, [sp, #0x38] , w21 str x25cmp w0, #1 , [sp, #0x48] ldr w2, [fp, #0x1C] mov fp, sp beq G_M000_IG15 uxtb mov w0, w21 x19, x0 cmp w0, #2 bne G_M000_IG21 G_M000_IG02: ldr G_M000_IG18: w20, [x19, #0x4C] sxtw w21, w2 mov sub w0, w21, #8 w0, w20 cmp movz x1, #0xD1FFAB1E w20, w0 movk x1, ble G_M000_IG05 #0xD1FFAB1E LSL #16 G_M000_IG03: movk str w21, [x19, #0x4C] x1, #0xD1FFAB1E LSL #32 mov w0, wzr ldr x1, [x1] blr x1 G_M000_IG04: brk_windows ldr x25, [sp, #0x48] #0 ldp G_M000_IG19: x23, x24, [sp, #0x38] ldr w2, [fp, #0x1C] ldp b G_M000_IG23 x21, x22, [sp, #0x28] G_M000_IG20: ldp x19, x20, [sp, #0x18 mov w25, w3 ] b G_M000_IG06 ldp fp, lr, [sp], #0x50 G_M000_IG21: ret mov w0, wzr lr G_M000_IG22: ldp G_M000_IG05: x27, x28, [sp, #0x60] cmp w20, w21 ldp x25, x26, [sp, #0x50] bhi G_M000_IG12 ldp x23, x24, [sp, #0x40] ubfiz x0, x20, #1, #32 ldp x21, x22, [sp, #0x30] add x22, x1, x0 ldp x19, x20, [sp, #0x20] sub w23, w21, w20 mov w24, wzr ldp fp, lr, [sp], #0x70 sub w25, w23, #7 ret lr G_M000_IG23: cmp w25, #0 ubfiz x2, x2, #5, #32 ble G_M000_IG03 add G_M000_IG06: x0, x2, add w0, w24, #3 #16 cmp w0, w23 add x0, x24, x0 bhi G_M000_IG12 ldr w2, [x0, #0x04] ubfiz x1, x0, # add w27, w27, #1 1, cmp #32 w25, w27 add x1, mov x25, x3 x22, x1 bhs G_M000_IG17 sub w3, w23, w0 mov x0, x1 G_M000_IG24: mov movz x0, #0xD1FFAB1E w1, #97 mov w2, #103 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E ldr movk x4, #0xD1FFAB1E LSL #16 x0, [x0] movk x4, #0xD1FFAB1E LSL # 32 blr ldr x0 x4, [x4] brk_windows blr #0 G_M000_IG25: x4 add w24, w24, w0 ldr tbnz w0, #w21, [x19, #0x3C] 31 mov w0, G_M000_IG03 , w21 add w1, cmp w0, w25 w24, #6 bhs G_M000_IG27 ubfiz x0, x0, #5, #32 add x0, x0, #16 cmp add x0, x24 , w1, w23 x0 bhs ldr w0, [x0, #0x04] G_M000_IG03 neg w0, w0 add w2, w24, #1 sub w0, w0, #3 cmp w2, w23 str w0, [x19, #0x3C] bhs G_M000_IG13 ldrh w0, ldr w0, [x19, #0x40] [x22, w2, UXTW #2] sub w0, w0, #1 mov w3, #116 str w0, [x19, #0x40] cmp w0, #103 b G_M000_IG08 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG26: mov x0, x19 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] movz x1, #0xD1FFAB1E orr w0, w0, movk #2 x1, #0xD1FFAB1E LSL #16 cmp w0, #99 movk x1, #0xD1FFAB1E LSL #32 beq G_M000_IG10 ldr x1, [x1] G_M000_IG08: blr x1 sxtw w24, w2 ldr cmp w24, w25 x0, [x19, #0x08] blt G_M000_IG06 ldr G_M000_IG09: b G_M000_IG03 w1, [x0, #0x08] G_M000_IG10: ldr x2, [x19, #0x30] add w0, w20, w24 mov w3, w26 str w0, [x19, #0x4C] mul x2, x2, x3 lsr x2, x2, #32 add mov w0, #1 x2, G_M000_IG11: x2 ldr x25, [sp, #0x48] , #1 ldp x23, x24, [sp, #0x38] mov w1, w1 mul x1, x2, x1 ldp x21, x22, [sp, #0x28] lsr x1, x1, #32 ldr w2, [x0, #0x08] ldp x19, x20, [sp, #0x18] cmp w1, w2 ldp fp, lr, [sp], #0x50 bhs G_M000_IG27 ret lr G_M000_IG12: add x0, x0, #16 movz x0, #0xD1FFAB1E ubfiz x1, x1, #2, #32 movk x0, #0xD1FFAB1E LSL #16 add x28, x0, x1 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: b G_M000_IG07 G_M000_IG27: bl bl CORINFO_HELP_RNGCHKFAIL brk_windows CORINFO_HELP_RNGCHKFAIL #0 brk_windows #0 ; Total bytes of code 324 ; Total bytes of code 956 1469: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] 1470: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:TryInsert(int,System.ValueTuple`2[System.__Canon,int],ubyte) [Tier1 with Static PGO, IL size=569, code size=956] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:get_CanMerge():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w1, [x0, #0x24] cbnz w1, G_M000_IG05 G_M000_IG03: ldr x0, [x0, #0x18] cmp x0, #0 cset x0, eq G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 48 1471: JIT compiled System.Text.RegularExpressions.RegexCharClass:get_CanMerge() [Tier1, IL size=20, code size=48] ; Assembly listing for method System.Text.ValueStringBuilder:get_Length():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1472: JIT compiled System.Text.ValueStringBuilder:get_Length() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Span`1[ushort]:Slice(int,int):System.Span`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, w1 add x3, x1, w2, UXTW ldr w4, [x0, #0x08] cmp x3, x4 bhi G_M000_IG04 ldr x0, [x0] lsl x1, x1, #1 add x0, x0, x1 sxtw w1, w2 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 76 1473: JIT compiled System.Span`1[ushort]:Slice(int,int) [Tier1, IL size=39, code size=76] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:get_Item(int):System.ValueTuple`2[ushort,ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x10] cmp w1, w2 bhs G_M000_IG04 ldr x0, [x0, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 ubfiz x1, x1, #2, #32 add x1, x1, #16 ldr w0, [x0, x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 88 1474: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:get_Item(int) [Tier1, IL size=27, code size=88] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Value():System.ValueTuple`2[System.__Canon,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x0, x0, #8 ldr x2, [x0] ldr w1, [x0, #0x08] mov x0, x2 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1475: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Value() [Tier1, IL size=7, code size=32] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1476: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex68_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:b__2_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 8 inlinees with PGO data; 14 single block inlinees; 7 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] mov fp, sp mov x19, x1 mov x20, x2 G_M000_IG02: ldp x0, x1, [x19, #0x08] cmp x0, #0 csel x0, x0, x1, ne ldp x21, x1, [x20, #0x08] cmp x21, #0 csel x21, x21, x1, ne cbnz x0, G_M000_IG04 G_M000_IG03: mov w22, wzr b G_M000_IG05 align [0 bytes for IG18] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: ldr w22, [x0, #0x08] G_M000_IG05: cbnz x21, G_M000_IG07 G_M000_IG06: mov w23, wzr b G_M000_IG08 G_M000_IG07: ldr w23, [x21, #0x08] G_M000_IG08: ldrb w1, [x19, #0x1C] ldrb w2, [x20, #0x1C] ldr x3, [x19, #0x20] str x3, [fp, #0x18] ldrb w3, [fp, #0x18] cbnz w3, G_M000_IG10 G_M000_IG09: mov w24, wzr b G_M000_IG12 G_M000_IG10: ldrb w3, [x19, #0x20] cbz w3, G_M000_IG55 add x3, x19, #36 ldrh w4, [x3] ldrh w3, [x3, #0x02] sub w3, w3, w4 add w24, w3, #1 cbnz w1, G_M000_IG11 b G_M000_IG12 G_M000_IG11: neg w1, w24 add w24, w1, #16, LSL #12 G_M000_IG12: ldr x1, [x20, #0x20] str x1, [fp, #0x18] ldrb w1, [fp, #0x18] cbnz w1, G_M000_IG14 G_M000_IG13: mov w25, wzr b G_M000_IG16 G_M000_IG14: ldrb w1, [x20, #0x20] cbz w1, G_M000_IG55 add x1, x20, #36 ldrh w3, [x1] ldrh w1, [x1, #0x02] sub w1, w1, w3 add w25, w1, #1 cbnz w2, G_M000_IG15 b G_M000_IG16 G_M000_IG15: neg w1, w25 add w25, w1, #16, LSL #12 G_M000_IG16: cbz x0, G_M000_IG36 G_M000_IG17: cbz x21, G_M000_IG36 movi v16.16b, #0 mov w1, wzr ldr w2, [x0, #0x08] cmp w2, #0 ble G_M000_IG21 add x3, x0, #16 G_M000_IG18: ldrh w4, [x3, w1, UXTW #2] cmp w4, #128 bge G_M000_IG20 G_M000_IG19: ubfiz x4, x4, #2, #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr s17, [x4, x5] fadd s16, s16, s17 G_M000_IG20: add w1, w1, #1 cmp w2, w1 bgt G_M000_IG18 G_M000_IG21: movi v17.16b, #0 mov w1, wzr ldr w3, [x21, #0x08] sxtw w26, w3 cmp w26, #0 ble G_M000_IG25 add x3, x21, #16 align [0 bytes for IG22] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG22: ldrh w4, [x3, w1, UXTW #2] cmp w4, #128 bge G_M000_IG24 G_M000_IG23: ubfiz x4, x4, #2, #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr s18, [x4, x5] fadd s17, s17, s18 G_M000_IG24: add w1, w1, #1 cmp w26, w1 bgt G_M000_IG22 G_M000_IG25: fcmp s16, s17 beq G_M000_IG32 fcmp s16, s17 bhs G_M000_IG27 G_M000_IG26: movn w0, #0 b G_M000_IG31 G_M000_IG27: fcmp s16, s17 bgt G_M000_IG30 b G_M000_IG29 G_M000_IG28: mov w0, wzr b G_M000_IG31 G_M000_IG29: fcmp s16, s16 beq G_M000_IG30 fcmp s17, s17 bne G_M000_IG28 b G_M000_IG26 G_M000_IG30: mov w0, #1 G_M000_IG31: b G_M000_IG53 G_M000_IG32: add x0, x0, #16 sxtw w1, w2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG36 add x0, x21, #16 sxtw w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG36 cmp w22, w23 bge G_M000_IG35 G_M000_IG33: movn w0, #0 G_M000_IG34: b G_M000_IG53 G_M000_IG35: cmp w22, w23 cset x0, gt b G_M000_IG34 G_M000_IG36: cmp w22, #0 ccmp w25, #0, nzc, gt cset x0, le cmp w24, #0 ccmp w23, #0, nzc, gt cset x1, le tst w0, w1 bne G_M000_IG41 sxtw w0, w22 cmp w0, w24 csel w0, w22, w24, ge cmp w23, w25 csel w1, w23, w25, ge cmp w0, w1 bge G_M000_IG39 G_M000_IG37: movn w0, #0 G_M000_IG38: cbz w0, G_M000_IG40 b G_M000_IG53 G_M000_IG39: cmp w0, w1 cset x0, gt b G_M000_IG38 G_M000_IG40: cmp w22, #0 bgt G_M000_IG45 b G_M000_IG43 G_M000_IG41: cmp w22, #0 cset x0, gt cmp w23, #0 cset x1, gt cmp w0, w1 beq G_M000_IG42 cmp w22, #0 bgt G_M000_IG45 b G_M000_IG43 G_M000_IG42: cmp w24, #0 cset x0, gt cmp w25, #0 cset x1, gt cmp w0, w1 beq G_M000_IG47 cmp w24, #0 bgt G_M000_IG45 G_M000_IG43: mov w0, #1 G_M000_IG44: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG45: movn w0, #0 G_M000_IG46: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG47: cmp w24, #0 ble G_M000_IG51 cmp w24, w25 bge G_M000_IG50 G_M000_IG48: movn w0, #0 G_M000_IG49: b G_M000_IG53 G_M000_IG50: cmp w24, w25 cset x0, gt b G_M000_IG49 G_M000_IG51: ldr w0, [x20, #0x18] ldr w1, [x19, #0x18] cmp w1, w0 bge G_M000_IG54 G_M000_IG52: movn w0, #0 G_M000_IG53: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG54: ldr w1, [x19, #0x18] cmp w1, w0 cset x0, gt b G_M000_IG53 G_M000_IG55: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 892 1477: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer+<>c:b__2_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier1, IL size=358, code size=892] ; Assembly listing for method System.RuntimeType:IsPointerImpl():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #15 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1478: JIT compiled System.RuntimeType:IsPointerImpl() [Tier1, IL size=7, code size=28] ; Assembly listing for method System.RuntimeType:IsArrayImpl():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #20 beq G_M000_IG04 G_M000_IG03: cmp w0, #29 cset x0, eq b G_M000_IG05 G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 1479: JIT compiled System.RuntimeType:IsArrayImpl() [Tier1, IL size=7, code size=44] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:IsSimpleType(ubyte):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxtb w1, w0 cmp w1, #14 bgt G_M000_IG05 G_M000_IG03: mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: cmp w1, #22 ccmp w1, #24, z, ne ccmp w1, #25, z, ne ccmp w1, #28, z, ne cinc w0, wzr, eq G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 60 1480: JIT compiled System.Reflection.Emit.SignatureHelper:IsSimpleType(ubyte) [Tier1, IL size=31, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex69_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldloc(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 G_M000_IG01: mov w20, w2 stp fp, G_M000_IG02: lr, [sp, #-0x10]! mov x1, x21 mov w2, w20 mov mov x0, x19 fp, sp bl mov x2, x1 G_M000_IG02: ldr System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool x0, [x0, #0x08] cbz w0, G_M000_IG04 G_M000_IG03: movz x1, #0xD1FFAB1E mov x1, x21 mov w2, w20 mov x0, x19 bl movk x1, #0xD1FFAB1E LSL #32System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 movk ldr x1, w0, [#x19, #0x4C]0xD1FFAB1E LSL #48 cmp ldr w0, w20 x3, [x0] beq G_M000_IG04 add ldr w0, w0, #1 x3, [x3, #0x58] str ldr x3, [x3] w0, [x19, #0x4C] G_M000_IG03: b G_M000_IG02 ldp fp, lr, [sp G_M000_IG04: ] ldr , #0x10 x21 br x3 , [sp, #0x28] ; Total bytes of code 48 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1481: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldloc(System.Reflection.Emit.LocalBuilder) [Tier1, IL size=18, code size=48] 1482: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex69_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1483: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 20 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] str x23, [sp, #0x48] mov fp, sp str x1, [fp, #0x20] mov x19, x0 mov w20, w2 G_M000_IG02: ldrsh w21, [fp, #0x20] cmp w21, #32 bne G_M000_IG17 G_M000_IG03: cmn w20, #1 ccmp w20, #8, 0, ge bgt G_M000_IG15 add w22, w20, #1 cmp w22, #8 bhi G_M000_IG13 mov w0, w22 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: mov w23, #21 b G_M000_IG14 G_M000_IG05: mov w23, #22 b G_M000_IG14 G_M000_IG06: mov w23, #23 b G_M000_IG14 G_M000_IG07: mov w23, #24 b G_M000_IG14 G_M000_IG08: mov w23, #25 b G_M000_IG14 G_M000_IG09: mov w23, #26 b G_M000_IG14 G_M000_IG10: mov w23, #27 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows b G_M000_IG14 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG11: mov w23, #28 b G_M000_IG14 G_M000_IG12: mov w23, #29 b G_M000_IG14 G_M000_IG13: mov w23, #30 G_M000_IG14: str w23, [fp, #0x18] movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0x1C] mov x0, x19 ldr x1, [fp, #0x18] ldr x2, [x19] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] blr x2 b G_M000_IG33 G_M000_IG15: mov w1, #127 cmn w20, #128 ccmp w20, w1, 0, ge bgt G_M000_IG29 ldr w1, [x19, #0x58] add w1, w1, #4 ldr x22, [x19, #0x08] ldr w0, [x22, #0x08] cmp w1, w0 blt G_M000_IG16 ldr w0, [x22, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge G_M000_IG01: sxtw x1 , w1 stp movz x0, #0xD1FFAB1E fp, movk x0, #0xD1FFAB1E LSL #16 lr movk x0, #0xD1FFAB1E LSL #32 , [sp, #-0x50]! bl CORINFO_HELP_NEWARR_1_VC stp mov x21, x0 x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov ldr fp, sp w2, [x22, #0x08] str xzr, [fp, #0x28] mov x0, x22 str xzr, [fp, #0x30] mov x1, x21 str xzr, [fp, movz x3, #0xD1FFAB1E#0x18] str xzr, movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 [fp add x14, x19, #8 , #0x20] mov mov x19, x0 x15, x21 bl G_M000_IG02: CORINFO_HELP_ASSIGN_REF ldr w20, [x19, #0x4C] G_M000_IG16: cmp mov w0, #31 w20, w2 bhi G_M000_IG15 str w0, [fp, #0x18] ubfiz movz w0, #0xD1FFAB1E x0, x20, #1, #32 movk w0, #0xD1FFAB1E LSL #16 add str w0, [fp, x0, x1, x0 # mov x1, x0 0x1C] sub w3, w2, w20 mov x0, x19 cmp w3, #7 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 bls G_M000_IG06 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: blr x2 str x1, [fp, #0x18] ldr x0, [x19, #0x08] str w3, [fp, #0x20] ldr w1, [x19, #0x58] add add w2, w1, #x3, fp, #24 1 ldr str w2, [x19, #0x58] x4 ldr w2, [x0, #0x08] , [x3] cmp w1, w2 ldr bhs G_M000_IG36 w3, [x3, #0x08] add x0, x0, #16 cmp strb w3, #6 w20, [x0, w1, UXTW #2] blt G_M000_IG06 b G_M000_IG33 G_M000_IG04: G_M000_IG17: cmn w21, #0xD1FFAB1E ldr x3 bne G_M000_IG25 , [x4] cmp w20, #3 bhi G_M000_IG23 movz x5, #97 cmp w20, #2 movk x5, # bhi G_M000_IG21 103 LSL #16 mov w0, w20 movk x5, #103 LSL #32 adr x1, [ movk x5, #103 LSL #48 @RWD36] eor x3, x3, x5 ldr w1, [x1, x0, LSL # ldr 2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG18: mov w23, #2 b G_M000_IG22 w4, [x4, #0x08] G_M000_IG19: movz w5, #116 mov w23, #3 movk w5, #97 LSL #16 b G_M000_IG22 eor w4, w4, w5 mov w4, w4 G_M000_IG20: orr x3, x3, x4 mov w23, #4 cbnz x3, G_M000_IG06 b G_M000_IG22 G_M000_IG21: mov w23, #5 G_M000_IG18: G_M000_IG22: ldrh str w3, [x1, #0x0C] w23, [fp, #0x18] orr movz w0, #0xD1FFAB1E w4, movk w0, #0xD1FFAB1E LSL #16 w3, str w0, [fp, #0x1C] #4 mov x0, x19 mov w5, #116 ldr x1, [fp, #0x18] ldr x2, [x19] cmp w4, #103 ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] ccmp w3, w5, z, ne blr x2 bne G_M000_IG06 b G_M000_IG33 ldrh G_M000_IG23: w1, [x1, #0x0E] cmp w20, #255 bhi G_M000_IG24 cmp w1, #97 movz x1, bne G_M000_IG06 #14 add w0, w20, #8 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 cmp w0, w2 uxtb w2, w20 mov x0, x19 bhi G_M000_IG15 ldr x3, [x19] ldr x3, [x3, #0x40] b G_M000_IG09 ldr x3, [x3, #0x38] blr G_M000_IG06: x3 sub w3, w2, w20 b G_M000_IG33 mov x1, x0 G_M000_IG24: cmp w3, #7 mov w1, #0xD1FFAB1E bls G_M000_IG13 cmp w20, w1 ldrh w0, [x1] bhi G_M000_IG29 cmp w0, #116 movz x1, #0xD1FFAB1E bne G_M000_IG13 movk x1, #0xD1FFAB1E LSL #32 ldrh w0, [x1, #0x02] movk x1, #0xD1FFAB1E LSL #48 sxth w2, w20 orr w4, w0, #2 mov x0, x19 mov w5, #103 ldr x3, [x19] cmp w4, #99 ldr x3, [x3, #0x48] ccmp w0, w5, z, ne ldr x3, [x3] bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 blr x3 b G_M000_IG33 add x0, x1, #4 G_M000_IG25: sub w1, w3, #2 cmn w21, #0xD1FFAB1E str bne G_M000_IG27 x0, [fp, #0x28] cmp w20, #255 str w1, [fp, #0x30] bhi G_M000_IG26 add x0, fp, #40 movz x1, #15 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x0] movk x1, #0xD1FFAB1E LSL #48 ldr w0, [x0, #0x08] cmp w0, #6 uxtb w2, w20 blt G_M000_IG13 mov x0, x19 G_M000_IG07: ldr x3, [x19] ldr x3, [x3, #0x40] ldr x0, [x1] ldr x3, [x3, #0x38] movz x3, #116 blr x3 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 b G_M000_IG33 ldr w1, [x1, #0x08] movz w3, #99 G_M000_IG26: mov movk w3, #116 LSL #16 w1, #0xD1FFAB1E eor w1, w1, cmp w20, w1 w3 bhi G_M000_IG29 movz x1, #0xD1FFAB1E mov w1, w1 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 orr x0, sxth w2, x0, x1 w20 cbnz x0, G_M000_IG13 mov x0, x19 ldr G_M000_IG08: x3, [x19] add w0, w20, #8 ldr cmp w0, w2 x3, [x3, #0x48] ldr x3, [x3] bhi G_M000_IG15 blr x3 G_M000_IG09: b G_M000_IG33 str G_M000_IG27: w0, cmn w21, #0xD1FFAB1E [x19, #0x4C] bne G_M000_IG29 sxtw w21, w0 cmp w20, #255 bhi G_M000_IG28 cmp w21, w20 bge G_M000_IG10 movz x1, #16 movk x1, #0xD1FFAB1E LSL #32 mov w0, w20 movk x1, #0xD1FFAB1E LSL #48 mov w20, w21 uxtb w2, w20 mov w21, w0 mov x0, x19 G_M000_IG10: ldr x3, [x19] ldr x3, [x3, ldr w0, [x19, #0x58] # cbnz w0, G_M000_IG11 0x40] mov x0, x19 ldr x3, [x3, #0x38] movz x1, #0xD1FFAB1E blr x3 b G_M000_IG33 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG28: movk x1, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E ldr x1, [x1] cmp w20, w1 blr x1 bhi G_M000_IG29 G_M000_IG11: movz x1, #0xD1FFAB1E ldr movk x1, #0xD1FFAB1E LSL #32 x3, [x19, #0x20] ldr w0, [x19, #0x58] movk x1, #0xD1FFAB1E LSL #48 sub sxth w2, w20 w0, w0, #1 mov x0, x19 ldr x3, [x19] str w0, [x19, #0x58] ldr x3, [x3, #0x48] ldr w2, [x3, #0x08] ldr x3, [x3] cmp w0, w2 blr x3 bhs G_M000_IG16 b G_M000_IG33 add x3, x3, #16 G_M000_IG29: str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] ldr mov w2, w20 w1, [x19, #0x58] mov w1, wzr add w1, w1, #7 movz x4, #0xD1FFAB1E ldr x22, [x19, #0x08] movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr w0, [x22, #0x08] ldr x4, [x4] cmp w1, w0 ldr wzr, [x0] blt G_M000_IG30 blr x4 ldr w0, [x22, #0x08] mov w0, #1 lsl w0, w0, #1 G_M000_IG12: cmp w0, w1 ldr csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 x21 movk, [sp, #0x48] x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldp mov x23, x0 x19, x20, [sp, #0x38] ldr w2, [x22, #0x08] ldp fp, lr, [sp], #0x50 mov x0, x22 ret lr mov x1, x23 movz G_M000_IG13: x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E mov w0, wzr LSL #16 G_M000_IG14: movk x3, #0xD1FFAB1E LSL #32 ldr ldr x21, [sp, #0x48] x3, [x3] ldp x19, x20, [sp, #0x38] blr x3 ldp fp, lr, [sp], #0x50 add x14, x19, #8 ret lr mov x15, x23 G_M000_IG15: bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk G_M000_IG30: x0, #0xD1FFAB1E LSL #16 mov x0, x19 movk x0, #0xD1FFAB1E LSL #32 ldr ldr x0, [x0] x1 blr , [fp, #0x20] x0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 brk_windows movk x2, #0xD1FFAB1E LSL #32 #0 G_M000_IG16: ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] bl cbnz x0, G_M000_IG31 cbnz w1, G_M000_IG34 CORINFO_HELP_RNGCHKFAIL mov brk_windows x2, xzr #0 mov w3, wzr b G_M000_IG32 ; Total bytes of code 572 G_M000_IG31: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG34 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG32: cmp w3, #41484: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex69_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] blo G_M000_IG35 str w20, [x2] ldr w0, [x19, #0x58] add w0, w0, #4 str w0, [x19, #0x58] G_M000_IG33: ldr x23, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG34: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG35: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG36: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 RWD36 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 ; Total bytes of code 1160 1485: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,int) [Tier1, IL size=457, code size=1160] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldc(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #32 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x48] ldr x3, [x3, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1486: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldc(int) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Array:Copy(System.Array,System.Array,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65432 ; 1 inlinees with PGO data; 7 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov w21, w2 G_M000_IG02: cbz x19, G_M000_IG11 cbz x20, G_M000_IG12 ldr x0, [x19] ldr x1, [x20] cmp x0, x1 bne G_M000_IG09 ldr w1, [x0, #0x04] cmp w1, #24 bhi G_M000_IG09 ldr w1, [x19, #0x08] cmp w21, w1 bhi G_M000_IG09 ldr w1, [x20, #0x08] cmp w21, w1 bhi G_M000_IG09 ldrh w1, [x0] umull x2, w21, w1 add x1, x19, #16 add x3, x20, #16 ldr w0, [x0] tbz w0, #24, G_M000_IG07 G_M000_IG03: cmp x2, #4, LSL #12 bhi G_M000_IG05 mov x0, x3 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 b System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) G_M000_IG05: mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x3 G_M000_IG07: mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w22, w0 mov x0, x20 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w3, w0 mov w1, w22 mov x2, x20 mov x0, x19 mov w4, w21 mov w5, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] G_M000_IG10: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x6 G_M000_IG11: mov w0, #65 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG12: mov w0, #67 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 388 1487: JIT compiled System.Array:Copy(System.Array,System.Array,int) [Tier1 with Static PGO, IL size=154, code size=388] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:op_Implicit(System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder):System.Reflection.Emit.LocalBuilder ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x0, x1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1488: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:op_Implicit(System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder) [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Stloc(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x58] ldr x3, [x3] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1489: JIT compiled System.Text.RegularExpressions.RegexCompiler:Stloc(System.Reflection.Emit.LocalBuilder) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Call(System.Reflection.MethodInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #40 movk x1, #0xD1FFAB1E LSL #32 movk x1, #119 LSL #48 ldr x3, [x0] ldr x3, [x3, #0x48] ldr x3, [x3, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1490: JIT compiled System.Text.RegularExpressions.RegexCompiler:Call(System.Reflection.MethodInfo) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex70_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1491: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex70_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1492: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.MethodInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 46 single block inlinees; 6 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] stp x23, x24, [sp, #0x48] str x25, [sp, #0x58] mov fp, sp str x1, [fp, #0x20] mov x19, x0 mov x20, x2 G_M000_IG02: cbz x20, G_M000_IG33 mov w21, wzr mov x1, x20 str x1, [fp, #0x18] ldr x22, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x22, x0 beq G_M000_IG09 G_M000_IG03: mov x23, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x22, x0 bne G_M000_IG34 ldr x24, [x23, #0x38] cbz x24, G_M000_IG08 mov x0, x24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 mov x0, x24 bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #20 beq G_M000_IG04 cmp w0, #29 bne G_M000_IG08 G_M000_IG04: ldr x25, [x19, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x25, #0x08] add x14, x2, #8 mov x15, x23 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x24 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG06 G_M000_IG05: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG07 G_M000_IG06: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldr x0, [x25, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w23, w0, #0xD1FFAB1E b G_M000_IG13 G_M000_IG08: ldr x0, [x19, #0x80] mov x1, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 sxtw w23, w0 b G_M000_IG13 G_M000_IG09: ldrsh w24, [fp, #0x20] cmp w24, #208 beq G_M000_IG35 cmn w24, #0xD1FFAB1E beq G_M000_IG35 cmn w24, #0xD1FFAB1E beq G_M000_IG35 ldr x23, [x19, #0x80] ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows x0, [x23, #0x08] ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ldr w2, [x0, #0x14] add w2, w2, #1 str w2, [x0, #0x14] ldr x2, [x0, #0x08] ldr w3, [x0, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG11 G_M000_IG10: add w4, w3, #1 str w4, [x0, #0x10] sxtw x1, w3 mov x0, x2 ldr x2, [fp, #0x18] bl CORINFO_HELP_ARRADDR_ST b G_M000_IG12 G_M000_IG11: ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldr x1, [x23, #0x08] ldr G_M000_IG01: w1, [x1, #0x10] stp sub w1, w1, #1 fp, orr w23, w1, #0xD1FFAB1E lr, [sp, #-0x50]! G_M000_IG13: ldr stp w1, [x19, #0x58] x19, x20, [sp add w1, w1, #7 , #0x38] ldr x24, [x19, #0x08] str ldr w0, [x24, #0x08] x21, [sp cmp w1, w0 , #0x48] blt G_M000_IG15 G_M000_IG14: mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] ldr str xzr, [fp, #0x18] w0, [x24, #0x08] str xzr, [fp, #0x20] lsl w0, w0, #1 mov cmp w0, w1 x19, x0 csel w1, w0, w1, ge sxtw x1, w1 G_M000_IG02: movz x0, #0xD1FFAB1E ldr w20, [x19, #0x4C] movk x0, #0xD1FFAB1E LSL #16 cmp movk x0, #0xD1FFAB1E LSL #32 w20, bl w2 CORINFO_HELP_NEWARR_1_VC bhi G_M000_IG15 mov x25, x0 ubfiz ldr w2, [x24, #0x08] x0, x20, #1, #32 mov x0, x24 add mov x1, x25 x0, x1, x0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL mov x1, x0 # sub w3, w2, w20 16 movk x3, #0xD1FFAB1E LSL #32 cmp ldr x3, [x3] w3, #7 blr x3 add x14, x19, #8 mov x15, x25 bls G_M000_IG06 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: str G_M000_IG15: x1, [fp, #0x18] mov x0, x19 str w3, [fp, #0x20] ldr x1, [fp, #0x20] add x3, fp, #24 movz x2, #0xD1FFAB1E ldr x4, [x3] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr ldr w24, [fp, #0x24] w3, [x3, #0x08] asr w0, w24, #17 cmp w3, #7 and w0, w0, #31 cmp w0, #27 blt G_M000_IG06 bne G_M000_IG17 G_M000_IG16: mov x0, x20 G_M000_IG02: ldr x1, [x22, #0x60] ldr x3, [x4] ldr x1, [x1, #0x28] blr x1 movz x5, #97 movz x1, #0xD1FFAB1E movk x5, #103 LSL #16 movk x1, #0xD1FFAB1E LSL #16 movk x5, #103 LSL #32 movk x1, #0xD1FFAB1E LSL #32 movk x5, #103 LSL #48 mov w2, #1 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 cmp x0, x1 movk x5, #116 LSL #16 csel w21, w21, w2, eq movk x5, #97 LSL #32 G_M000_IG17: movk x5, #97 LSL #48 asr w0, w24, # eor x4, x4, x5 12 orr x3, x3, x4 and w0, w0, #31 cbnz x3, G_M000_IG06 G_M000_IG05: cmp w0, #26 ldrh bne G_M000_IG19 w3, [x1, #0x0E] G_M000_IG18: orr w1, w3, mov x0, x20 #4 ldr x1, [x22, #0x50] ldr x1, [x1, #0x10] mov w4, #116 blr x1 cmp w1, #103 ldr w0, [x0, #0x08] ccmp w3, w4, z, ne sub w21, w21, w0 bne G_M000_IG06 G_M000_IG19: add w0, w20, #8 mov x0, x20 cmp w0, w2 ldr x1, [x22, #0x50] ldr x1, [x1, #0x20] blr x1 bhi G_M000_IG15 tbnz w0, #4, G_M000_IG21 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 G_M000_IG20: mov x1, x0 ldrsh w0, [fp, #0x20] cmp w3, #7 bls G_M000_IG13 cmp w0, #115 ldrh w0, [x1] orr w4, w0, #2 beq G_M000_IG21 cmp w0, #208 beq G_M000_IG21 mov w5, #103 cmp w4, #99 sub w1, w21, #1 ccmp w0, w5, z, ne cmn w0, #0xD1FFAB1E bne G_M000_IG13 csel w21, w21, w1, eq cmp w3, #1 blo G_M000_IG15 G_M000_IG21: add x0, x1, #2 sub w1, w3, #1 ldr str w0, [x19, #0x74] x0, [fp, #0x28] tbz w0, # str w1, [fp, #0x30] 31, G_M000_IG23 add x0, fp, #40 G_M000_IG22: ldr x1, [x0] str wzr, [x19, #0x74] ldr w0, [x0, #0x08 G_M000_IG23: ] cmp w0, #7ldr w0, [x19, #0x74] add w0, w0, w21 blt G_M000_IG13 str w0, [x19, #0x74] tbz G_M000_IG07: w0, #31, G_M000_IG25 ldr x0, [x1] G_M000_IG24: movz x3, #116 ldr x1, [x19, #0x50] movk x3, #116 LSL #16 sub x0, x1, movk x3, #97 LSL #32 w0, movk x3, #99 LSL #48 SXTW eor x0, x0, x3 str x0, [x19, #0x50] ldr str wzr, [x19, #0x74] x1, [x1, #0x06] b G_M000_IG26 movz x3, #99 G_M000_IG25: ldr w1, [x19, #0x7C] movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 cmp w1, w0 eor x1, x1, x3 bge G_M000_IG26 orr x0, x0, x1 cbnz x0, G_M000_IG13 str w0, [x19, #0x7C] G_M000_IG08: G_M000_IG26: add w0, w20, #8 ldr cmp w0, w2 w0, bhi G_M000_IG15 [x19, #0x74] G_M000_IG09: str w0, [x19, #0x78] str tbz w24, #24, G_M000_IG28 w0, [x19, #0x4C] sxtw w21, w0 G_M000_IG27: cmp w21, w20 movn w0, #0 bge G_M000_IG10 str w0, [x19, #0x74] mov w0, w20 G_M000_IG28: ldr x0, [x19, #0x08] mov w20, w21 ldr w1, [x19, #0x58] mov w21, w0 cbnz x0, G_M000_IG30 G_M000_IG10: G_M000_IG29: ldr w0, [x19, #0x58] cbnz w1, G_M000_IG36 cbnz w0, G_M000_IG11 mov x0, x19 mov x2, xzr mov w3movz x1, #0xD1FFAB1E , wzr movk x1, #0xD1FFAB1E LSL b G_M000_IG31 #16 G_M000_IG30: movk x1, #0xD1FFAB1E LSL #32 ldr w2, [x0, #0x08] ldr x1, [x1] cmp w2, w1 blr x1 blo G_M000_IG36 G_M000_IG11: add x3, x0, #16 ldr x3, [x19, #0x20] mov w2, w1 ldr add x2, x3, x2 w0, [x19, #0x58] ldr w0, [x0, #0x08] sub w3, w0, w1 sub w0, w0, #1 G_M000_IG31: str w0, [x19 cmp w3, #4 , #0x58] ldr w2, [x3, #0x08] blo G_M000_IG37 cmp w0, w2 str w23, [x2] bhs G_M000_IG16 ldr w0, [x19, #0x58] add x3, x3, #16 add w0, w0, #4 str wzr, [x3, w0, UXTW #2] str w0, [x19, #0x58] G_M000_IG32: ldr x25, [sp, #0x58] ldp sub x23, w3, w21, w20 x24, ldr [sp, #0x48] x0, [x19, #0x28] mov w2, w20 mov w1, wzr ldp movz x4, #0xD1FFAB1Ex21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] movk x4, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x60 movk x4, #0xD1FFAB1E ret lr LSL #32 ldr x4, [x4] ldr wzr, [x0] G_M000_IG33: movz w0, #0xD1FFAB1E blr x4 mov w0, #1 movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E G_M000_IG12: movk x1, #0xD1FFAB1E LSL #16 ldr x21, [sp, #0x48] movk x1, #0xD1FFAB1E LSL #32 ldp bl x19, CORINFO_HELP_STRCNS x20, [sp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x50 movk x1, #0xD1FFAB1E LSL #32 ret ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG34: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG35: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 lr mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E G_M000_IG13: movk x2, #0xD1FFAB1E LSL #16 movk x2 mov , #0xD1FFAB1E LSL #32 w0, wzr ldr x2, [x2] G_M000_IG14: blr x2 mov x0, x19 ldr bl CORINFO_HELP_THROW x21, [sp, #0x48] G_M000_IG36: ldp x19, x20, [sp, #0x38] movz x0 , #0xD1FFAB1E ldp fp, lr, [sp], #0x50 movk ret x0, lr #0xD1FFAB1E LSL #16 G_M000_IG15: movk movz x0 x0, #0xD1FFAB1E LSL #32 , #0xD1FFAB1E ldr x0, [x0] blr x0 movk brk_windows # x0, #0xD1FFAB1E LSL #16 0 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG37: ldr mov w0, #40 x0, [x0] blr x0 movz brk_windows # x1, #0xD1FFAB1E 0 movk x1, G_M000_IG16: #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 1252 bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1493: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex70_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] 1494: JIT compiled System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.MethodInfo) [Tier1, IL size=324, code size=1252] ; Assembly listing for method System.Object:GetHashCode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 b System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int ; Total bytes of code 16 1495: JIT compiled System.Object:GetHashCode() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Collections.Generic.ObjectEqualityComparer`1[System.__Canon]:GetHashCode(System.__Canon):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65344 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG02: add x0, fp, #24 ldr x1, [fp, #0x10] cbnz x1, G_M000_IG04 G_M000_IG03: ldr x0, [x0] str x0, [fp, #0x10] add x0, fp, #16 ldr x1, [fp, #0x10] cbz x1, G_M000_IG08 G_M000_IG04: ldr x0, [x0] ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG07 G_M000_IG05: bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x18] blr x1 b G_M000_IG06 G_M000_IG08: mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 120 1496: JIT compiled System.Collections.Generic.ObjectEqualityComparer`1[System.__Canon]:GetHashCode(System.__Canon) [Tier1 with Static PGO, IL size=49, code size=120] ; Assembly listing for method System.Reflection.RuntimeMethodInfo:get_ReturnType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x30] cbnz x1, G_M000_IG04 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG04: ldr x0, [x1, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 1497: JIT compiled System.Reflection.RuntimeMethodInfo:get_ReturnType() [Tier1, IL size=12, code size=52] ; Assembly listing for method System.Reflection.RuntimeMethodInfo:GetParametersNoCopy():System.Reflection.ParameterInfo[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 32 1498: JIT compiled System.Reflection.RuntimeMethodInfo:GetParametersNoCopy() [Tier1, IL size=7, code size=32] ; Assembly listing for method System.Reflection.RuntimeMethodInfo:FetchNonReturnParameters():System.Reflection.ParameterInfo[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp str xzr, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x20] cbnz x0, G_M000_IG05 G_M000_IG03: ldr x2, [x19, #0x30] cbnz x2, G_M000_IG04 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x2, x0 G_M000_IG04: add x3, fp, #16 mov x0, x19 mov x1, x19 mov w4, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 str xzr, [fp, #0x10] add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 128 1499: JIT compiled System.Reflection.RuntimeMethodInfo:FetchNonReturnParameters() [Tier1, IL size=33, code size=128] ; Assembly listing for method System.Reflection.RuntimeMethodInfo:get_Attributes():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x5C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1500: JIT compiled System.Reflection.RuntimeMethodInfo:get_Attributes() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:GetTokenFor(System.Reflection.RuntimeMethodInfo,System.RuntimeType):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp G_M000_IG02: ldr x19, [x0, #0x80] ldrsb wzr, [x1] mov x20, x1 ldrsb wzr, [x2] mov x21, x2 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x19, #0x08] add x14, x2, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG04 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x19, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w0, w0, #0xD1FFAB1E G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 196 1501: JIT compiled System.Reflection.Emit.DynamicILGenerator:GetTokenFor(System.Reflection.RuntimeMethodInfo,System.RuntimeType) [Tier1, IL size=24, code size=196] ; Assembly listing for method System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeMethodHandle,System.RuntimeTypeHandle):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex71_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ]!; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x19, #0x08] add x14, x2, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr G_M000_IG01: stp fp, lr, [sp, #-0x30]! w4, [x3, #0x08] stp x19, x20, [sp, #cmp 0x18] w4, w1 str bls x21, [sp, #0x28] G_M000_IG04 mov fp, sp mov G_M000_IG03: x19, x0 add w4, w1, #1 mov x21, x1 str w4, [x0 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl , #0x10] sxtw x1, w1 mov x0, x3 System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 bl CORINFO_HELP_ARRADDR_ST G_M000_IG03: b G_M000_IG05 mov x1, x21 mov w2, w20 G_M000_IG04: mov x0, x19 mov x1, x2 bl movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk cbnz w0, G_M000_IG04 x2, #0xD1FFAB1E LSL #32 ldr ldr w0, [x19, #0x4C] x2, [x2] cmp blr w0, w20 x2 beq G_M000_IG04 add G_M000_IG05: w0, w0, #1 ldr str x0, [x19, #0x08] w0, [x19, #0x4C] ldr w0, [x0, #0x10] b G_M000_IG02 sub w0 , w0, #1 G_M000_IG04: orr w0, w0, ldr x21, [sp, #0x28] #0xD1FFAB1E ldp x19, x20, [sp, G_M000_IG06: #0x18] ldr ldp fp x21, [sp, #0x28] , ldplr, [sp], #0x30 ret lr x19, x20, [sp, # ; Total bytes of code 108 0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 1502: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex71_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] 1503: JIT compiled System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeMethodHandle,System.RuntimeTypeHandle) [Tier1, IL size=38, code size=188] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldloca(System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x58] ldr x3, [x3] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1504: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldloca(System.Reflection.Emit.LocalBuilder) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU str w21, - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz G_M000_IG01: x4, #0xD1FFAB1E stp movk x4, #0xD1FFAB1E LSL #16 fp, lr, [sp, #-0x40]! movk x4, #0xD1FFAB1E LSL #32stp x19, x20, [sp, ldr x4#, [x40x20] ] blr x4 stp x21, x22, [sp, #0x30] mov tbnz fp, w0, #sp 31, G_M000_IG03 str x1, [fp, #0x18] mov x19, x0 mov add w20, w2 w0, w20, w0 G_M000_IG02: str ldr w0, [x19, #w1, [x19, #0x58] 0x4C] add mov w0, #1 w1, w1, #7 ldr G_M000_IG06: ldr x21, [sp, #x21, [x19, #0x08] 0x28] ldr w0, [x21, #0x08] ldp x19, x20, [spcmp , #0x18] ldp fp, lr, [sp], #w1, w0 0x30 blt G_M000_IG04 G_M000_IG03: ret ldr w0lr , [x21, #0x08] G_M000_IG07: movz x0, #0xD1FFAB1Elsl w0, w0, # 1 movk x0, #0xD1FFAB1E LSL cmp w0, w1 #16 movk x0, #0xD1FFAB1E LSL #32 csel w1, w0, w1, ge ldr sxtw x1, w1 movz x0, #x0, [x0] 0xD1FFAB1E blr x0 movk x0 , #0xD1FFAB1E LSL #16 brk_windows movk x0, #0xD1FFAB1E LSL #32 #0 bl ; Total bytes of code 184 CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] 1505: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov x0, x19 ldr x21, [fp, #0x18] mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 G_M000_IG05: ldr w2, [x19, #0x58] add w0, w2, #1 str w0, [x19, #0x58] mov x0, x19 mov w1, w20 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG06: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 br x4 G_M000_IG07: ldr w2, [x19, #0x58] mov x0, x19 mov w1, w20 mov w3, #4 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w0, [x19, #0x58] add w0, w0, #4 str w0, [x19, #0x58] G_M000_IG08: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 316 1506: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.Emit.Label) [Tier1, IL size=77, code size=316] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Reflection.Emit.ILGenerator:AddFixup(System.Reflection.Emit.Label,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] G_M000_IG01: cmp w20, w2 stp bhi G_M000_IG11 fp , lr, ubfiz [x0, x20, #1, #32 sp, add #-0x40]!x0, x1, x0 sub w1, w2, w20 stp cmp x19, x20, [sp , #w1, #30x10] stp x21, x22, [sp, bls G_M000_IG09 #0x20] G_M000_IG03: stp x23, x24, [sp, #0x30] str mov x0 , [fp, #0x18] fp, sp str mov w1, [fp, #0x20] x19, x0 add mov w20, w1 x1 mov w21, w2 , fp mov w22, w3 , #24 G_M000_IG02: ldr ldr x23, [x19, #0x18] x2, [x1] cbnz x23, G_M000_IG04 ldr G_M000_IG03: w1, [x1, #0x08] movz x0, #0xD1FFAB1E cmp w1, #3 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 blt G_M000_IG09 mov x1, #8 bl G_M000_IG04: CORINFO_HELP_NEWARR_1_VC ldr w1, [x2] add movz w3, #116 x14, x19, #24 mov x15, x0 movk w3, #72 LSL #16 bl CORINFO_HELP_ASSIGN_REF eor w1, w1, w3 ldr w2, b G_M000_IG05 [x2, G_M000_IG04: #0x02] ldr movz w1, w3, #72 [x23, #0x08] movk ldr w0, [x19, #0x60] w3, #97 LSL # cmp 16w1, w0 bgt G_M000_IG05 eor w2, w2, w3 ldr w1, [x23, #0x08 orr w1, w1, w2 ] cbnz w1, G_M000_IG09 lsl G_M000_IG05: w1, w1, # 1 sxtw ldrh x1, w1 w0, [x0, #0x06] mov w1, #116 movz x0, # cmp w0, #78 0xD1FFAB1E ccmp w0, w1, z, ne movk bne G_M000_IG09 x0, # add w0, w200xD1FFAB1E LSL #, #4 16 str w0, [x19, #0x4C] movk x0 sxtw w21, w0 , #0xD1FFAB1E LSL #32 cmp w21, w20 bl bge G_M000_IG06 CORINFO_HELP_NEWARR_1_VC mov w0, w20 mov w20, w21 mov mov w21, w0 x24, G_M000_IG06:x0 ldr ldr w0, [x19, #0x58] w2, [x23, #0x08] cbnz w0, G_M000_IG07 mov x0, x19 mov x0, x23 mov movz x1, #0xD1FFAB1E x1 , x24 movk x1, movz x3, #0xD1FFAB1E #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 LSL #16 movk x3, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 LSL #32 ldr x1, [x1] ldr x3, [x3] blr x1 blr G_M000_IG07: x3 ldr x3, [x19, #0x20] add ldr w0, [x19, #0x58] x14, x19, #24 sub w0, w0, #1 mov x15, x24 str bl CORINFO_HELP_ASSIGN_REF w0, [x19, #0x58] ldr w2, [x3, G_M000_IG05: #0x08] ldr x0, [x19 cmp , #0x18] w0, w2 ldr w1, [x19, #0x60] bhs G_M000_IG12 add w2, w1, #1 add x3, x3, #16 str w2, [x19, #0x60] str wzr, [x3, ldr w2, [x0, #0x08] w0, UXTW #2] cmp w1, w2 sub w3, w21, w20 bhs G_M000_IG10 ldr mov w2, #12 x0, umull [x19, #0x28] mov w2, w20 x1, w1 mov w1, wzr , w2 movz add x1, x1x4, #0xD1FFAB1E, #16 add movk x4, #0xD1FFAB1E LSL #16 x0, x0, movk x4, #0xD1FFAB1E LSL #32 x1 ldr x4, [x4] stp ldr wzr, [x0] blr x4 w20 mov , w21, [x0]w0, #1 str G_M000_IG08: w22, [x0, #0x08] ldr tbnz w20, #31, G_M000_IG09 x21, [sp, #0x38 ldr w0, [x19, #0x5C] ] cmp w20, w0 ldp bge G_M000_IG09 ldr x0, [x19, #0x10] x19, x20, [sp cbz x0, G_M000_IG09, #0x28] ldp fp, ldr w1, [x0, #0x08] lr, [sp], # cmp w20, w1 0x40 bhs G_M000_IG10 ret lr ubfiz G_M000_IG09: mov x1, x20, #3, #32 add x1, x1, #16 w0, wzr add x0, x0, x1 G_M000_IG10: ldr w1, [x0, #0x04] ldr ldr w2, [x19, #0x78] x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] cmp w1, w2 ldp bge G_M000_IG08 fp, lr, [sp], #0x40 ret G_M000_IG06: tbnz lr w1, #31, G_M000_IG07 G_M000_IG11: sub w1, w2 , w1 movz x0, #0xD1FFAB1E ldr movk x0 , #0xD1FFAB1E x3, [x19, #0x50 LSL #16 ] movk x0, #0xD1FFAB1E LSL #32 add x1, x3, w1, SXTW ldr x0, [x0] blr str x1, [x19, # x0 0x50 brk_windows ]#0 G_M000_IG12: G_M000_IG07: str w2, [x0, #0x04] G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] bl ldp x19, x20, [sp, #0x10] CORINFO_HELP_RNGCHKFAIL ldp brk_windows fp, lr, [sp], #0x40 #0 ret lr ; Total bytes of code 360 G_M000_IG09: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 1507: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex71_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 416 1508: JIT compiled System.Reflection.Emit.ILGenerator:AddFixup(System.Reflection.Emit.Label,int,int) [Tier1, IL size=226, code size=416] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex72_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddData(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 11 single block inlinees; 4 inlinees without PGO data cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1509: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex72_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr w1, [x19, #0x18] add w1, w1, #4 ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] cmp w1, w0 ble G_M000_IG04 G_M000_IG03: ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: cmp w20, #127 bgt G_M000_IG07 G_M000_IG05: ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] add w2, w1, #1 str w2, [x19, #0x18] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG18 add x2, x0, #16 strb w20, [x2, w1, UXTW #2] G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, #0xD1FFAB1E cmp w20, w0 bgt G_M000_IG11 ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] cbnz x0, G_M000_IG08 cbnz w1, G_M000_IG16 mov x2, xzr mov w3, wzr b G_M000_IG09 G_M000_IG08: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG16 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG09: orr w0, w20, #0xD1FFAB1E sxth w0, w0 rev16 w0, w0 sxth w0, w0 cmp w3, #2 blo G_M000_IG17 strh w0, [x2] ldr w0, [x19, #0x18] add w0, w0, #2 str w0, [x19, #0x18] G_M000_IG10: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: movn w0, #0xD1FFAB1E LSL #16 cmp w20, w0 bgt G_M000_IG15 ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] cbnz x0, G_M000_IG12 cbnz w1, G_M000_IG16 mov x2, xzr mov w3, wzr b G_M000_IG13 G_M000_IG12: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG16 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG13: orr w0, w20, #0xD1FFAB1E rev w0, w0 cmp w3, #4 blo G_M000_IG17 str w0, [x2] ldr w0, [x19, #0x18] add w0, w0, #4 str w0, [x19, #0x18] G_M000_IG14: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG15: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG17: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG18: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 520 1510: JIT compiled System.Reflection.Emit.SignatureHelper:AddData(int) [Tier1, IL size=186, code size=520] ; Assembly listing for method System.ArgumentOutOfRangeException:ThrowIfNegative[int](int,System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 64989 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w0 G_M000_IG02: tbnz w2, #31, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: mov x0, x1 mov w1, w2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 56 1511: JIT compiled System.ArgumentOutOfRangeException:ThrowIfNegative[int](int,System.String) [Tier1 with Static PGO, IL size=22, code size=56] ; Assembly listing for method System.Int32:IsNegative(int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: lsr w0, w0, #31 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1512: JIT compiled System.Int32:IsNegative(int) [Tier1, IL size=5, code size=20] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1513: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Reflection.Emit.ILGenerator:GetLabelPos(System.Reflection.Emit.Label):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: tbnz w1, #31, G_M000_IG04 ldr w2, [x0, #0x5C] cmp w1, w2 bge G_M000_IG04 ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 ubfiz x1, x1, #3, #32 add x1, x1, #16 ldr w0, [x0, x1] tbnz w0, #31, G_M000_IG05 G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG05: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 236 1514: JIT compiled System.Reflection.Emit.ILGenerator:GetLabelPos(System.Reflection.Emit.Label) [Tier1, IL size=75, code size=236] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Str():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1515: JIT compiled System.Text.RegularExpressions.RegexNode:get_Str() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass+<>c:b__140_0(System.ValueTuple`2[ushort,ushort],System.ValueTuple`2[ushort,ushort]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x1, [fp, #0x18] str x2, [fp, #0x10] G_M000_IG02: ldrh w0, [fp, #0x18] ldrh w1, [fp, #0x10] sub w0, w0, w1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 1516: JIT compiled System.Text.RegularExpressions.RegexCharClass+<>c:b__140_0(System.ValueTuple`2[ushort,ushort],System.ValueTuple`2[ushort,ushort]) [Tier1, IL size=19, code size=36] ; Assembly listing for method System.Char:CompareTo(ushort):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrh w0, [x0] sub w0, w0, w1, UXTH G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 1517: JIT compiled System.Char:CompareTo(ushort) [Tier1, IL size=5, code size=24] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionX():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x70] tst w0, #32 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1518: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionX() [Tier1, IL size=13, code size=28] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:GetBucket(uint):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x0, #0x08] ldr w3, [x2, #0x08] sxtw w4, w3 ldr x0, [x0, #0x30] mov w1, w1 mul x0, x0, x1 lsr x0, x0, #32 add x0, x0, #1 mov w1, w4 mul x0, x0, x1 lsr x0, x0, #32 cmp w0, w3 bhs G_M000_IG04 add x1, x2, #16 ubfiz x0, x0, #2, #32 add x0, x1, x0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 88 1519: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:GetBucket(uint) [Tier1, IL size=29, code size=88] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:EnsureRangeList():System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x0, x20 G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 1520: JIT compiled System.Text.RegularExpressions.RegexCharClass:EnsureRangeList() [Tier1, IL size=26, code size=104] ; Assembly listing for method System.String:Ctor(System.ReadOnlySpan`1[ushort]):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 8964 ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x20, x0 mov w19, w1 G_M000_IG02: cbz w19, G_M000_IG04 mov w0, w19 bl System.String:FastAllocateString(int):System.String mov x21, x0 ldrsb wzr, [x21] add x0, x21, #12 G_M000_IG01: mov w2, w19 lsl x2, x2, #1 stp mov x1, x20 movz x3, #0xD1FFAB1Efp, lr, [sp, #-0x80]! movk x3, #0xD1FFAB1E LSL #16 stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movk movi x3, #0xD1FFAB1E LSL #32v16.16b, #0 ldr stp x3, [x3] q16, q16, [x9] stp blr x3 q16, q16, [x9, #0x20] mov x0, x21 mov x19, x0 G_M000_IG02: G_M000_IG01: ldr ldr x21, [sp, #0x28]w20, [x19 , #0x4C] ldp cmp w20, w2 bhi G_M000_IG22 x19, x20, [sp, #0x18] ubfiz x0, x20, #1, #32 ldp fp, lr, [sp], #0x30 add ret lr x21, x1, x0 G_M000_IG04: movz x0, #8 mov x0, x21 movk x0, #0xD1FFAB1E LSL #16 sub w22, w2, w20 sxtw w1, w22 movk x0, #0xD1FFAB1E LSL #32 str G_M000_IG05: x0, [fp, #0x40] ldr x21, [sp, #0x28] str w1, [fp, #0x48] ldp x19, x20, [sp, #0x18] add x0, fp, #64 ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 128 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #31521: JIT compiled System.String:Ctor(System.ReadOnlySpan`1[ushort]) [Tier1 with Static PGO, IL size=55, code size=128] bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:SwapIfGreater(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]],int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x5, x2 1522: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex72_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] mov w2, w1 G_M000_IG02: cmp w3, w2 bhs G_M000_IG05 ubfiz x1, x3, #2, #32 add x19, x0, x1 ldr w1, [x19] cmp w4, w2 bhs G_M000_IG05 ubfiz x2, x4, #2, #32 add x20, x0, x2 ldr w2, [x20] ldr x0, [x5, #0x08] ldr x3, [x5, #0x18] blr x3 cmp w0, #0 ble G_M000_IG04 G_M000_IG03: mov x0, x19 ldrh w1, [x0] ldrh w0, [x0, #0x02] ldr w2, [x20] str w2, [x19] strh w1, [x20] strh w0, [x20, #0x02] G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 128 1523: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:SwapIfGreater(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]],int,int) [Tier1, IL size=90, code size=128] ; Assembly listing for method System.Text.ValueStringBuilder:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0] stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] cbz x1, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG04: ldp fp, lr, [sp], #0x10 br x3 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 76 1524: JIT compiled System.Text.ValueStringBuilder:Dispose() [Tier1, IL size=30, code size=76] ; Assembly listing for method System.Text.ValueStringBuilder:.ctor(System.Span`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str xzr, [x0] add x3, x0, #16 str x1, [x3] str w2, [x3, #0x08] str wzr, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 1525: JIT compiled System.Text.ValueStringBuilder:.ctor(System.Span`1[ushort]) [Tier1, IL size=22, code size=36] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex73_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ; Assembly listing for method System.Text.ValueStringBuilder:ToString():System.String:this ret ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data lr ; Total bytes of code 108 1526: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex73_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x10] mov x19, x0 G_M000_IG02: add x0, x19, #16 ldr w1, [x19, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhi G_M000_IG06 ldr x0, [x0] str x0, [fp, #0x10] str w1, [fp, #0x18] add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x20, x0 ldr x1, [x19] stp xzr, xzr, [x19] stp xzr, xzr, [x19, #0x10] cbz x1, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: mov x0, x20 G_M000_IG05: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 176 1527: JIT compiled System.Text.ValueStringBuilder:ToString() [Tier1, IL size=41, code size=176] ; Assembly listing for method System.Span`1[ushort]:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: ldr x1, [x0] ldr w0, [x0, #0x08] str w0, [fp, #0x1C] mov x0, x1 ldr w1, [fp, #0x1C] bl System.String:.ctor(System.ReadOnlySpan`1[ushort]):this G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1528: JIT compiled System.Span`1[ushort]:ToString() [Tier1, IL size=144, code size=40] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:GetSetChars(System.String,System.Span`1[ushort]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x21, x0 mov x19, x1 mov w20, w2 G_M000_IG02: mov x0, x21 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movz ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG05 G_M000_IG03: mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: ldr w0, [x21, #0x08] cmp w0, #1 bls G_M000_IG17 ldrh w1, [x21, #0x0E] mov w2, wzr mov w3, #3 add w1, w1, #3 cmp w1, #3 ble G_M000_IG14 G_M000_IG01: add stp fp, lr, [sp, #-0x50]! x4, x21, #12 stp G_M000_IG06: x19, x20, [sp, #0x18] add w5, w3, #1 stp x21, x22, [sp, #0x28] cmp w5, w0 stp x23, x24, [sp, #0x38] str bhs G_M000_IG17 x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldrh ldr w5, w20, [x19, #0x4C] [x4, w5, UXTW #2] sxtw w21, w2 cmp w3, w0 sub bhs G_M000_IG17 w0, w21, #2 ldrh w6, [x4, w3, UXTW #2] cmp w6, w5 bge G_M000_IG13 align [0 bytes for IG07] align [0 bytes] cmp align [0 bytes] w20, w0 align ble G_M000_IG05 [0 bytes] G_M000_IG07: G_M000_IG01: str cmp w2, w20 w21, bge G_M000_IG15 [x19, #0x4C] add w7, w2, #1 mov w0, wzr strh w6, [x19, w2, UXTW #2] G_M000_IG04: add w6, w6, #1 ldr x25, [sp, #0x48] cmp w6, w5 ldp blt G_M000_IG12 x23, x24, [sp, #0x38] G_M000_IG08: ldp x21 add w3, w3, #2 , x22, [sp, #0x28] cmp w3, w1 blt G_M000_IG11 ldp G_M000_IG09: x19, x20, [sp, #0x18] mov w0, w7 ldp fp, lr, [sp], #0x50 G_M000_IG10: ret ldr lr x21, [sp, #0x28] ldp G_M000_IG05: x19, x20, [sp, #0x18] cmp w20, w21 ldp fp, lr, [sp], #0x30 bhi G_M000_IG10 ret lr G_M000_IG11: ubfiz x0, x20, #1, #32 mov w2, w7 add x22, x1, x0 b G_M000_IG06 G_M000_IG12: sub w23, w21, w20 mov w2, w7 mov w24, wzr b G_M000_IG07 G_M000_IG13: sub w25, w23, #1 mov w7, w2 cmp w25, #0 b G_M000_IG08 ble G_M000_IG03 G_M000_IG14: G_M000_IG06: cmp w24, w23 mov w7, w2 bhi G_M000_IG10 b G_M000_IG09 ubfiz x0, x24, #1, #32 add x0, x22, x0 G_M000_IG15: sub w3, w23, w24 mov mov w1, #66 w0 mov w2, #97 , wzr movz x4, #0xD1FFAB1E G_M000_IG16: movk x4, #0xD1FFAB1E LSL # ldr x21, [sp, #0x28] 16 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr movk x4, #0xD1FFAB1E LSL #32 G_M000_IG17: ldr bl x4, [x4] CORINFO_HELP_RNGCHKFAIL blr x4 brk_windows #0 add w24, w24 ; Total bytes of code 272 , w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 1529: JIT compiled System.Text.RegularExpressions.RegexCharClass:GetSetChars(System.String,System.Span`1[ushort]) [Tier1, IL size=96, code size=272] lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1530: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG05 G_M000_IG03: ldrb w0, [fp, #0x18] cmp w0, #0 cset x0, eq G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 1531: JIT compiled System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String) [Tier1, IL size=17, code size=68] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 strb w0, [x20] ldr w0, [x19, #0x08] cmp w0, #3 ble G_M000_IG05 G_M000_IG03: ldrh w0, [x19, #0x0E] cmp w0, #0 ble G_M000_IG05 tbnz w0, #0, G_M000_IG05 ldrh w0, [x19, #0x10] cmp w0, #0 cset x0, eq G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 1532: JIT compiled System.Text.RegularExpressions.RegexCharClass:CanEasilyEnumerateSetContents(System.String,byref) [Tier1, IL size=51, code size=116] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSubtraction(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x08] cmp w1, #2 bls G_M000_IG04 ldrh w2, [x0, #0x10] ldrh w0, [x0, #0x0E] add w0, w2, w0 add w0, w0, #3 cmp w1, w0 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 60 1533: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSubtraction(System.String) [Tier1, IL size=26, code size=60] ; Assembly listing for method System.Single:CompareTo(float):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr s16, [x0] fcmp s16, s0 blo G_M000_IG04 G_M000_IG03: fcmp s16, s0 bgt G_M000_IG08 fcmp s16, s0 beq G_M000_IG06 fcmp s16, s16 beq G_M000_IG08 fcmp s0, s0 bne G_M000_IG06 G_M000_IG04: movn w0, #0 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 1534: JIT compiled System.Single:CompareTo(float) [Tier1, IL size=44, code size=88] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ; Assembly listing for method System.RuntimeType:get_IsGenericTypeDefinition():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65936 ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: G_M000_IG06: ldr x3, [x19, #0x20] stp ldr w0, [x19, #0x58] fp, lr, [sp, #-0x10]! sub w0, w0, #1 mov str w0, [x19, #0x58] fp ldr w2, [x3, #0x08] , sp cmp w0, w2 bhs G_M000_IG14 G_M000_IG02: add x3, x3, #16 ldr str wzr, [x3, w0, UXTW #x1, [x0, #0x18] 2] mov sub w3, w21, w20 x2, x1 ldr x0, [x19, #0x28] mov w2, w20 tbnz w1, #1, G_M000_IG05 mov w1, wzr ldr w1, [x2 movz x4, #0xD1FFAB1E ] movk x4, # movz w2, #480xD1FFAB1E LSL #16 movk movk w2, #0xD1FFAB1E LSL #16 x4, #0xD1FFAB1E LSL #32 and w1, w1, w2 ldr x4, [x4] cmp w1, #48 cset ldr wzr, [x0] x1, eq blr x4 G_M000_IG03: mov w0, #1 uxtb w1, w1 G_M000_IG10: mov w0, w1 ldr x21, [sp, #0x38] G_M000_IG04: ldp ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 fp, lr, [sp], #0x10 ret lr ret lr G_M000_IG11: G_M000_IG05: mov w0, wzr mov w1, wzr G_M000_IG12: b G_M000_IG03 ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ; Total bytes of code 68 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 1535: JIT compiled System.RuntimeType:get_IsGenericTypeDefinition() [Tier1 with Static PGO, IL size=40, code size=68] movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1536: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex73_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.String:Equals(System.String,System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x0, x1 bne G_M000_IG05 G_M000_IG03: mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: cbz x0, G_M000_IG06 cbz x1, G_M000_IG06 ldr w2, [x0, #0x08] ldr w3, [x1, #0x08] cmp w2, w3 beq G_M000_IG08 G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: add x0, x0, #12 lsl w2, w2, #1 mov w2, w2 add x1, x1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 108 1537: JIT compiled System.String:Equals(System.String,System.String) [Tier1, IL size=36, code size=108] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Item(int):System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w13, [x0, #0x10] cmp w1, w13 bhs G_M000_IG04 ldr x13, [x0, #0x08] ldr w14, [x13, #0x08] cmp w1, w14 bhs G_M000_IG05 mov w14, #40 umull x14, w1, w14 add x14, x14, #16 add x13, x13, x14 mov x14, x8 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 116 1538: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:get_Item(int) [Tier1, IL size=27, code size=116] ; Assembly listing for method System.Reflection.Emit.ILGenerator:DeclareLocal(System.Type):System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w2, wzr ldr x3, [x0] ldr x3, [x3, #0x60] ldr x3, [x3, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 32 1539: JIT compiled System.Reflection.Emit.ILGenerator:DeclareLocal(System.Type) [Tier1, IL size=9, code size=32] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:DeclareLocal(System.Type,bool):System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov w21, w2 G_M000_IG02: cbz x20, G_M000_IG04 mov x0, x20 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 ldr w14, [x19, #0x70] ldr x0, [x19, #0x40] strb wzr, [x22, #0x1C] str w14, [x22, #0x18] add x14, x22, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x22, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x48] uxtb w2, w21 mov x1, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr w0, [x19, #0x70] add w0, w0, #1 str w0, [x19, #0x70] mov x0, x22 G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG05: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 316 1540: JIT compiled System.Reflection.Emit.DynamicILGenerator:DeclareLocal(System.Type,bool) [Tier1, IL size=86, code size=316] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddArgument(System.Type,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: cbz x20, G_M000_IG09 ldr w1, [x19, #0x1C] cmn w1, #1 beq G_M000_IG04 G_M000_IG03: ldr w1, [x19, #0x20] add w1, w1, #1 str w1, [x19, #0x20] G_M000_IG04: tst w2, #255 beq G_M000_IG07 G_M000_IG05: ldr w1, [x19, #0x18] add w1, w1, #1 ldr x0, [x19, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 ble G_M000_IG06 ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] add w2, w1, #1 str w2, [x19, #0x18] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, #16 mov w2, #69 strb w2, [x0, w1, UXTW #2] G_M000_IG07: mov x0, x19 mov x1, x20 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG09: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 256 1541: JIT compiled System.Reflection.Emit.SignatureHelper:AddArgument(System.Type,bool) [Tier1, IL size=26, code size=256] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DefineLabel():System.Reflection.Emit.Label:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 32 1542: JIT compiled System.Text.RegularExpressions.RegexCompiler:DefineLabel() [Tier1, IL size=12, code size=32] ; Assembly listing for method System.Reflection.Emit.ILGenerator:DefineLabel():System.Reflection.Emit.Label:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movn w1, #0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 36 1543: JIT compiled System.Reflection.Emit.ILGenerator:DefineLabel() [Tier1, IL size=8, code size=36] ; Assembly listing for method System.Reflection.Emit.ILGenerator:DefineLabel(int):System.Reflection.Emit.Label:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr x0, [x19, #0x10] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr w1, [x19, #0x5C] ldr x21, [x19, #0x10] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG06 G_M000_IG05: ldr w1, [x21, #0x08] lsl w1, w1, #1 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #16 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldr x0, [x19, #0x10] ldr w1, [x19, #0x5C] sxtw w2, w1 ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG08 ubfiz x2, x2, #3, #32 add x2, x2, #16 add x0, x0, x2 movn w2, #0 stp w2, w20, [x0] add w0, w1, #1 str w0, [x19, #0x5C] mov w0, w1 G_M000_IG07: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 240 1544: JIT compiled System.Reflection.Emit.ILGenerator:DefineLabel(int) [Tier1, IL size=122, code size=240] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ComputeMinLength():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 11 inlinees with PGO data; 6 single block inlinees; 11 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG73 G_M000_IG03: ldrb w0, [x19, #0x2E] sub w1, w0, #3 cmp w1, #43 bhi G_M000_IG73 mov w0, w1 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: ldr x20, [x19, #0x08] mov x19, x20 cbz x19, G_M000_IG06 G_M000_IG05: ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG10 G_M000_IG06: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG09 G_M000_IG07: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG09 G_M000_IG08: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG09: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG77 ldr x19, [x0, #0x10] b G_M000_IG10 G_M000_IG10: b G_M000_IG02 G_M000_IG11: mov w0, #1 G_M000_IG12: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG13: ldr x0, [x19, #0x10] ldr w0, [x0, #0x08] b G_M000_IG75 G_M000_IG14: ldr w0, [x19, #0x20] b G_M000_IG75 G_M000_IG15: ldrsw x21, [x19, #0x20] ldr x20, [x19, #0x08] mov x0, x20 cbz x0, G_M000_IG17 G_M000_IG16: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG21 G_M000_IG17: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG20 G_M000_IG18: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG20 G_M000_IG19: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG20: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG77 ldr x0, [x0, #0x10] b G_M000_IG21 G_M000_IG21: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw x1, w0 mul x1, x1, x21 mov x0, #0xD1FFAB1E mov x2, #0xD1FFAB1E cmp x1, x0 csel x0, x2, x1, ge b G_M000_IG75 G_M000_IG22: ldr x20, [x19, #0x08] cbnz x20, G_M000_IG23 mov w21, wzr b G_M000_IG25 G_M000_IG23: mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG24 ldr w21, [x0, #0x10] b G_M000_IG25 G_M000_IG24: mov w21, #1 G_M000_IG25: mov x0, x20 cbz x0, G_M000_IG27 G_M000_IG26: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG31 G_M000_IG27: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG30 G_M000_IG28: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG30 G_M000_IG29: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG30: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG77 ldr x0, [x0, #0x10] b G_M000_IG31 G_M000_IG31: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w20, w0 mov w22, #1 b G_M000_IG41 G_M000_IG32: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG34 G_M000_IG33: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG38 G_M000_IG34: mov x2, x1 cbz x2, G_M000_IG37 G_M000_IG35: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG37 G_M000_IG36: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex74_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG37: ldr w0, [x2, #0x10] cmp w22, w0 bhs G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG77 add x0, x0, #16 ldr x0, [x0, w22, G_M000_IG01: UXTW #3] stp b G_M000_IG38 fp, lr, [sp, #-0x30]! G_M000_IG38: movz x1, #0xD1FFAB1E stp movk x1, #0xD1FFAB1E LSL #16 x19, x20, [sp, #0x18] movk x1, #0xD1FFAB1E LSL #32 str ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w20, w0 bgt G_M000_IG43 x21 G_M000_IG39: , sxtw w0, w20 [sp, #0x28] G_M000_IG40: sxtw w20, w0 mov add w22, w22, #1 fp, sp G_M000_IG41: mov cmp w22, w21 x19, ccmp w20, #0, nzc, lt x0 bgt G_M000_IG32 mov x21, x1 G_M000_IG42: mov w20, w2 sxtw w0 , w20 G_M000_IG02: b G_M000_IG75 mov x1, x21 G_M000_IG43: mov w2, w20 b G_M000_IG40 mov x0, x19 bl G_M000_IG44: ldr x20, [x19, #0x08] mov x0, x20 cbz x0, G_M000_IG46 G_M000_IG45: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x2, #0xD1FFAB1E LSL #32 cbz w0, G_M000_IG04 cmp x1, x2 beq G_M000_IG03: G_M000_IG50 mov x1 G_M000_IG46: , x21 mov x1, x20 mov w2, w20 mov x2, x1 mov x0, x19 cbz x2, G_M000_IG49 bl G_M000_IG47: ldr x0, [x2] movz x3, #0xD1FFAB1E System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x3, #0xD1FFAB1E LSL #16 cbnz w0, G_M000_IG04 movk x3, #0xD1FFAB1E LSL #32 ldr cmp x0, x3 w0, beq [x19, #0x4C] G_M000_IG49 cmp G_M000_IG48: w0, w20 mov x0, x3 beq G_M000_IG04 movz x2, #0xD1FFAB1E add movk x2, #0xD1FFAB1E LSL #16 w0, w0 movk x2, #0xD1FFAB1E LSL #32 , #1 ldr x2, str w0, [x19, #0x4C] [x2] b G_M000_IG02 blr x2 G_M000_IG04: mov x2, x0 ldr x21, [sp, #0x28] G_M000_IG49: ldp x19, x20, [sp, #0x18] ldr ldp fp, lr, [sp], #0x30 w0, [x2, #0x10] ret lr cmp ; Total bytes of code 108 w0, #0 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG77 ldr 1545: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex74_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] x0, [x0, #0x10] b G_M000_IG50 G_M000_IG50: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w20, w0 ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG52 G_M000_IG51: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG56 G_M000_IG52: mov x2, x1 cbz x2, G_M000_IG55 G_M000_IG53: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG55 G_M000_IG54: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG55: ldr w0, [x2, #0x10] cmp w0, #1 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #1 bls G_M000_IG77 ldr x0, [x0, #0x18] b G_M000_IG56 G_M000_IG56: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w20, w0 csel w0, w20, w0, le b G_M000_IG75 G_M000_IG57: ldr x20, [x19, #0x08] mov x0, x20 cbz x0, G_M000_IG59 G_M000_IG58: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG63 G_M000_IG59: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG62 G_M000_IG60: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG62 G_M000_IG61: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG62: ldr w0, [x2, #0x10] cmp w0, #1 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #1 bls G_M000_IG77 ldr x0, [x0, #0x18] b G_M000_IG63 G_M000_IG63: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w20, w0 ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG65 G_M000_IG64: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG69 G_M000_IG65: mov x2, x1 cbz x2, G_M000_IG68 G_M000_IG66: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG68 G_M000_IG67: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG68: ldr w0, [x2, #0x10] cmp w0, #2 bls G_M000_IG76 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #2 bls G_M000_IG77 ldr x0, [x0, #0x20] b G_M000_IG69 G_M000_IG69: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w20, w0 csel w0, w20, w0, le b G_M000_IG75 G_M000_IG70: mov x20, xzr mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w21, w0 mov w22, wzr cmp w21, #0 ble G_M000_IG72 G_M000_IG71: mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x20, x20, w0, SXTW add w22, w22, #1 cmp w22, w21 blt G_M000_IG71 G_M000_IG72: mov x0, #0xD1FFAB1E mov x1, #0xD1FFAB1E cmp x20, x0 csel x0, x1, x20, ge b G_M000_IG75 G_M000_IG73: mov w0, wzr G_M000_IG74: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG75: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG76: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG77: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG70 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG44 - G_M000_IG02 dd G_M000_IG57 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG73 - G_M000_IG02 ; Total bytes of code 1744 1546: JIT compiled System.Text.RegularExpressions.RegexNode:ComputeMinLength() [Tier1, IL size=455, code size=1744] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1547: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:AddWithResize(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w21, [x19, #0x10] add w22, w21, #1 sxtw w0, w22 ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] cbnz w1, G_M000_IG06 G_M000_IG03: mov w1, #4 G_M000_IG04: movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 cmp w1, w2 csel w1, w1, w3, ls cmp w1, w0 csel w1, w1, w0, ge mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w22, [x19, #0x10] ldr x0, [x19, #0x08] sxtw x1, w21 mov x2, x20 bl CORINFO_HELP_ARRADDR_ST G_M000_IG05: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] lsl w1, w1, #1 b G_M000_IG04 ; Total bytes of code 160 1548: JIT compiled System.Collections.Generic.List`1[System.__Canon]:AddWithResize(System.__Canon) [Tier1, IL size=39, code size=160] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65904 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x0, #0x08] ldr w2, [x2, #0x08] cbnz w2, G_M000_IG06 G_M000_IG03: mov w2, #4 G_M000_IG04: movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 movz w4, #0xD1FFAB1E movk w4, #0xD1FFAB1E LSL #16 cmp w2, w3 csel w2, w2, w4, ls cmp w2, w1 csel w2, w2, w1, ge mov w1, w2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG05: ldp fp, lr, [sp], #0x10 br x2 G_M000_IG06: ldr x2, [x0, #0x08] ldr w2, [x2, #0x08] lsl w2, w2, #1 b G_M000_IG04 ; Total bytes of code 100 1549: JIT compiled System.Collections.Generic.List`1[System.__Canon]:Grow(int) [Tier1 with Static PGO, IL size=53, code size=100] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:set_Capacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65240 G_M000_IG01: stp G_M000_IG01: fp, lr, [sp, #-0x30]! stp stp x19, x20, [sp, #0x10] fp stp x21, x22, [sp, #, lr, [sp, #-0x30]! 0x20] stp mov x19, x20, [sp, #0x18] fp, sp str mov x21, [sp, #0x28] x19, x0 mov fp, sp G_M000_IG02: ldr str w20, [x19, #0x4C] x0, [fp, #0x10] cmp mov w20, w2 x19, x0 bhi G_M000_IG09 mov w20, w1 ubfiz x0, x20, #1, #32 G_M000_IG02: add ldr x21, x1, x0 w21, [x19, #0x10] sub w22, w2, w20 cmp cmp w22, w20, w21 #0 blt G_M000_IG13 ldr x0, [x19, #0x08] bls G_M000_IG07 ldr w0, [x0, #0x08] cmp w0, w20 G_M000_IG03: beq G_M000_IG12 ldrh cmp w20, #0w0, [x21] cmp w0 ble G_M000_IG09 , #60 ldr bne G_M000_IG07 x0, [x19] cmp w22, #1 ldr blo G_M000_IG09 x1, [x0, #0x30] add x0, x21, #2 ldr x1, [x1] sub w2, w22, #1 ldr x2, [x1, #0x38] mov w1, #62 cbz movz x3, #0xD1FFAB1E x2, G_M000_IG04 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG03: mov x0, x2 ldr b G_M000_IG05 x3, [x3] blr G_M000_IG04: x3 movz x1, # sub 0xD1FFAB1Ew1, w22, #1 cmp w0, #0 movk x1, #0xD1FFAB1E LSL #16 csel w0, w0, w1, ge movk x1, #0xD1FFAB1E cmp w0, w22 LSL #32 bhi G_M000_IG09 bl ubfiz x1, x0, #1, #32 CORINFO_HELP_RUNTIMEHANDLE_CLASS add x21, x21, x1 G_M000_IG05: sub w22, w22, w0 sxtw x1, w20 bl add w0, w20, w0 CORINFO_HELP_NEWARR_1_OBJ cmp w22, #1 mov x20, x0 cmp w21, #0 bls G_M000_IG07 bgt G_M000_IG08 G_M000_IG06: ldrh add x14, x19, #8 w1, [x21, # mov x15, x20 0x02] bl cmp w1, #62 CORINFO_HELP_ASSIGN_REF bne G_M000_IG07 G_M000_IG07: add w0, w0, #2 ldr str x21, [sp, #0x28] w0 ldp , [x19, #0x4C] x19, x20, [sp, #0x18] sxtw ldp fp, lr, [sp], w21, w0 #0x30 cmp w21, w20 ret lr bge G_M000_IG04 G_M000_IG08: mov w0, w20 ldr x0, [x19, #0x08] mov w20, w21 mov w2, w21 mov w21, w0 mov x1, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG06 G_M000_IG04: G_M000_IG09: ldr ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x1, [x1, #0x30] w0, [x19, #0x58] cbz x1, G_M000_IG10 b G_M000_IG11 cbnz G_M000_IG10: w0, G_M000_IG05 movz x1, #0xD1FFAB1E mov x0, x19 movk x1, #0xD1FFAB1E LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS ldr x1, [x1] mov x1, x0 blr x1 G_M000_IG11: mov x0, x1 G_M000_IG04: bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr ldr x15, [x0] add x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 x14 str, x19, #8 w0 bl , [x19, #0x58] CORINFO_HELP_ASSIGN_REF ldr w2, [x3, #0x08] cmp w0, w2 G_M000_IG12: bhs G_M000_IG10 ldr add x3, x3, #16 x21 str wzr, [x3, w0, UXTW #2] , [sp, #0x28] sub w3, w21, w20 ldp ldr x0, [x19, #0x28] mov w2, w20 x19, x20, [sp, #0x18] mov w1, wzr movz x4, #0xD1FFAB1E ldp fp, lr, [sp], #0x30 movk x4, #0xD1FFAB1E LSL # ret lr 16 G_M000_IG13: movk x4, #0xD1FFAB1E LSL #32 mov w0, #7 ldr x4, [x4] mov w1, #15 ldr wzr, [x0] movz x2, #0xD1FFAB1E movk x2 blr x4 , #0xD1FFAB1E LSL #16 mov w0, movk x2, #0xD1FFAB1E LSL #32 #1 ldr x2, [x2] G_M000_IG06: blr x2 ldp brk_windows x21, x22, [sp, #0 #0x20] ; Total bytes of code 304 ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp 1550: JIT compiled System.Collections.Generic.List`1[System.__Canon]:set_Capacity(int) [Tier1 with Static PGO, IL size=86, code size=304] x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1551: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex74_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_FindMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1552: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_FindMode() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:InternalAddRuntimeType(System.Type):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 3435 ; 1 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w1, [x19, #0x18] add w1, w1, #1 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 ble G_M000_IG03 ldr w22, [x21, #0x08] lsl w1, w22, #1 sxtw w0, w1 cmp w22, w0 csel w0, w0, w1, le sxtw x1, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x23, x0 mov w4, w22 mov x0, x21 mov x2, x23 mov w1, wzr mov w3, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add x14, x19, #8 mov x15, x23 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldr x1, [x19, #0x08] ldr w0, [x19, #0x18] add w2, w0, #1 str w2, [x19, #0x18] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG13 add x1, x1, #16 mov w2, #33 strb w2, [x1, w0, UXTW #2] ldr x1, [x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x1, x0 bne G_M000_IG12 G_M000_IG04: cbz x20, G_M000_IG11 G_M000_IG05: ldr x1, [x20, #0x18] G_M000_IG06: str x1, [fp, #0x10] ldr w1, [x19, #0x18] add w1, w1, #8 ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] cmp w1, w0 bgt G_M000_IG10 G_M000_IG07: add x0, fp, #16 mov w1, wzr ldr x2, [x19, #0x08] align [0 bytes for IG08] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG08: mov x3, x2 ldr w4, [x19, #0x18] add w5, w4, #1 str w5, [x19, #0x18] ldrb w5, [x0, w1, SXTW #2] ldr w6, [x3, #0x08] cmp w4, w6 bhs G_M000_IG13 add x3, x3, #16 strb w5, [x3, w4, UXTW #2] add w1, w1, #1 cmp w1, #8 blt G_M000_IG08 G_M000_IG09: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG07 G_M000_IG11: mov x1, xzr b G_M000_IG06 G_M000_IG12: mov x0, x20 ldr x1, [x20] ldr x1, [x1, #0x98] ldr x1, [x1, #0x08] blr x1 mov x20, x0 b G_M000_IG04 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 424 1553: JIT compiled System.Reflection.Emit.SignatureHelper:InternalAddRuntimeType(System.Type) [Tier1 with Static PGO, IL size=116, code size=424] ; Assembly listing for method System.Type:GetRootElementType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 247082 ; 2 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp G_M000_IG02: mov x19, x0 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG03: ldr x0, [x19] cmp x0, x20 bne G_M000_IG14 mov x0, x19 bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #20 ccmp w0, #29, z, ne ccmp w0, #15, z, ne beq G_M000_IG08 G_M000_IG04: cmp w0, #16 cset x1, eq b G_M000_IG09 G_M000_IG05: ldr x0, [x19] cmp x0, x20 bne G_M000_IG10 G_M000_IG06: mov x0, x19 bl System.RuntimeTypeHandle:GetElementType(System.RuntimeType):System.RuntimeType G_M000_IG07: mov x19, x0 b G_M000_IG03 G_M000_IG08: mov w1, #1 G_M000_IG09: b G_M000_IG11 G_M000_IG10: mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x68] ldr x1, [x1, #0x08] blr x1 b G_M000_IG07 G_M000_IG11: cbnz w1, G_M000_IG05 G_M000_IG12: mov x0, x19 G_M000_IG13: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG14: mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x68] ldr x1, [x1] blr x1 sxtw w1, w0 b G_M000_IG11 ; Total bytes of code 184 1554: JIT compiled System.Type:GetRootElementType() [Tier1 with Static PGO, IL size=21, code size=184] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldthis():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #2 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1555: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldthis() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:MarkLabel(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 32 1556: JIT compiled System.Text.RegularExpressions.RegexCompiler:MarkLabel(System.Reflection.Emit.Label) [Tier1, IL size=13, code size=32] ; Assembly listing for method System.Reflection.Emit.ILGenerator:MarkLabel(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x2, [x0, #0x10] cbz x2, G_M000_IG10 tbnz w1, #31, G_M000_IG10 ldr w3, [x2, #0x08] cmp w3, w1 ble G_M000_IG10 mov x3, x2 ldr w4, [x3, #0x08] cmp w1, w4 bhs G_M000_IG12 ubfiz x1, x1, #3, #32 add x1, x1, #16 ldr w3, [x3, x1] cmn w3, #1 bne G_M000_IG11 add x1, x2, x1 ldr w2, [x0, #0x58] str w2, [x1] ldr w2, [x1, #0x04] tbz w2, #31, G_M000_IG06 G_M000_IG03: ldr w3, [x0, #0x74] tbz w3, #31, G_M000_IG04 str wzr, [x0, #0x74] G_M000_IG04: add x3, x1, #4 ldr w0, [x0, #0x74] str w0, [x3] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: ldr w3, [x0, #0x74] cmp w2, w3 bge G_M000_IG08 ldr x4, [x0, #0x50] sub w2, w3, w2 add x2, x4, w2, SXTW str x2, [x0, #0x50] str w3, [x1, #0x04] G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: cmp w2, w3 ble G_M000_IG09 str w2, [x0, #0x74] G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG10: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG11: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 356 1557: JIT compiled System.Reflection.Emit.ILGenerator:MarkLabel(System.Reflection.Emit.Label) [Tier1, IL size=230, code size=356] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Text(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1558: JIT compiled System.Text.RegularExpressions.Capture:set_Text(System.String) [Tier1, IL size=8, code size=28] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Length(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1559: JIT compiled System.Text.RegularExpressions.Capture:set_Length(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Text.RegularExpressions.Capture:set_Index(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1560: JIT compiled System.Text.RegularExpressions.Capture:set_Index(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.TimeSpan:op_Inequality(System.TimeSpan,System.TimeSpan):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x0, x1 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 1561: JIT compiled System.TimeSpan:op_Inequality(System.TimeSpan,System.TimeSpan) [Tier1, IL size=18, code size=24] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunSingleMatch(int,int,System.String,int,int,int):System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 11 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] mov fp, sp add x7, sp, #112 str x7, [fp, #0x28] str x0, [fp, #0x20] mov w22, w1 mov w24, w2 mov x19, x3 mov w20, w4 mov w21, w5 mov w23, w6 G_M000_IG02: ldr w25, [x19, #0x08] cmp w25, w23 blo G_M000_IG19 cmp w25, w21 blo G_M000_IG20 ldrsb wzr, [x0] add x1, x0, #56 mov x2, xzr swpal x2, x26, [x1] cbnz x26, G_M000_IG04 G_M000_IG03: ldr x1, [x0, #0x10] mov x0, x1 ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 mov x26, x0 ldr x0, [fp, #0x20] G_M000_IG04: str x26, [fp, #0x18] G_M000_IG05: ldr x1, [x0, #0x48] mov x0, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x14, x26, #8 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF mov w2, w20 add x2, x2, w21, UXTW mov w3, w25 cmp x2, x3 bhi G_M000_IG15 G_M000_IG06: add x2, x19, #12 ubfiz x3, x20, #1, #32 add x25, x2, x3 mov x2, x25 mov w3, w21 sub w4, w23, w20 mov x0, x26 ldr x1, [fp, #0x20] mov w5, w22 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 cbnz w24, G_M000_IG10 G_M000_IG07: sxtw w1, w21 mov w2, #1 ldr x0, [fp, #0x20] ldr w3, [x0, #0x40] tbz w3, #6, G_M000_IG08 mov w1, wzr movn w2, #0 G_M000_IG08: ldr w3, [x26, #0x48] cmp w3, w1 bne G_M000_IG09 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x3, [x2] b G_M000_IG17 G_M000_IG09: ldr w1, [x26, #0x4C] add w1, w1, w2 str w1, [x26, #0x4C] G_M000_IG10: mov x1, x25 mov w2, w21 mov x0, x26 ldr x3, [x26] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x21, [x26, #0x28] ldr x14, [x21, #0x50] ldr w15, [x14, #0x08] cmp w15, #0 bls G_M000_IG11 ldr w14, [x14, #0x10] cmp w14, #0 ble G_M000_IG16 cbz w22, G_M000_IG12 add x14, x21, #8 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF str xzr, [x26, #0x28] b G_M000_IG13 G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG12: str xzr, [x21, #0x08] mov x3, xzr b G_M000_IG14 G_M000_IG13: ldr w1, [x26, #0x4C] mov x0, x21 mov w2, w20 mov w3, w22 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x3, x21 G_M000_IG14: b G_M000_IG17 G_M000_IG15: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG16: str xzr, [x21, #0x08] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] b G_M000_IG14 G_M000_IG17: str xzr, [x26, #0x08] ldr x0, [fp, #0x20] add x14, x0, #56 mov x15, x26 bl CORINFO_HELP_ASSIGN_REF mov x0, x3 G_M000_IG18: ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: mov w0, #14 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG20: mov w0, #8 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG21: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] add x3, fp, #112 str x3, [sp, #0x18] G_M000_IG22: ldr x26, [fp, #0x18] str xzr, [x26, #0x08] ldr x0, [fp, #0x20] add x14, x0, #56 mov x15, x26 bl CORINFO_HELP_ASSIGN_REF G_M000_IG23: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 716 1562: JIT compiled System.Text.RegularExpressions.Regex:RunSingleMatch(int,int,System.String,int,int,int) [Tier1, IL size=199, code size=716] ; Assembly listing for method System.Threading.Interlocked:Exchange[System.__Canon](byref,System.__Canon):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x0, x1 mov x1, x2 bl System.Threading.Interlocked:Exchange(byref,System.Object):System.Object G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1563: JIT compiled System.Threading.Interlocked:Exchange[System.__Canon](byref,System.__Canon) [Tier1, IL size=23, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex75_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitializeTimeout(System.TimeSpan):this System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG01: G_M000_IG04: stp ldr x21, [sp, #0x28] fp, lr, [sp, #-0x10]! ldp x19, x20, [sp, #0x18] mov ldp fp, lr, [sp], #0x30 fp, sp ret lr ; Total bytes of code 108 G_M000_IG02: strb wzr, [x0, #0x68] movn x2, #0xD1FFAB1E 1564: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex75_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] cmp x1, x2 beq G_M000_IG05 G_M000_IG03: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG04: ldp fp, lr, [sp], #0x10 br x2 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 1565: JIT compiled System.Text.RegularExpressions.RegexRunner:InitializeTimeout(System.TimeSpan) [Tier1, IL size=28, code size=56] ; Assembly listing for method System.MemoryExtensions:AsSpan(System.String,int,int):System.ReadOnlySpan`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65528 ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG04 mov w1, w1 add x3, x1, w2, UXTW ldr w4, [x0, #0x08] cmp x3, x4 bhi G_M000_IG06 add x0, x0, #12 lsl x1, x1, #1 add x0, x0, x1 sxtw w1, w2 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: orr w0, w1, w2 cbnz w0, G_M000_IG06 mov x0, xzr mov w1, wzr G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 108 1566: JIT compiled System.MemoryExtensions:AsSpan(System.String,int,int) [Tier1 with Static PGO, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1567: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitializeForScan(System.Text.RegularExpressions.Regex,System.ReadOnlySpan`1[ushort],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov w20, w3 G_M000_IG02: str w5, [x19, #0x60] add x14, x19, #48 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF str w4, [x19, #0x48] stp wzr, w20, [x19, #0x40] str w4, [x19, #0x4C] ldr x0, [x19, #0x28] cbnz x0, G_M000_IG06 G_M000_IG03: mov x21, x19 ldr x22, [x21, #0x30] ldr x23, [x22, #0x18] cbz x23, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 mov x1, x22 ldr w2, [x22, #0x44] ldr x3, [x21, #0x08] mov x0, x24 mov w4, w20 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add x14, x24, #104 mov x15, x23 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 ldr w2, [x22, #0x44] mov x1, x22 ldr x3, [x21, #0x08] mov x0, x24 mov w4, w20 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG05: add x14, x19, #40 mov x15, x24 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG07 G_M000_IG06: ldr x1, [x19, #0x08] mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldr x0, [x19, #0x20] cbz x0, G_M000_IG10 G_M000_IG08: ldr x0, [x19, #0x10] ldr w0, [x0, #0x08] str w0, [x19, #0x50] ldr x0, [x19, #0x18] ldr w0, [x0, #0x08] str w0, [x19, #0x54] ldr x0, [x19, #0x20] ldr w0, [x0, #0x08] str w0, [x19, #0x58] G_M000_IG09: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 ldr w1, [x19, #0x5C] lsl w20, w1, #3 sxtw w21, w20 mov w1, #32 cmp w20, #32 csel w21, w21, w1, ge mov w1, #16 cmp w20, #16 csel w20, w20, w1, ge sxtw x1, w21 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 mov x0, x22 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str w21, [x19, #0x50] sxtw x1, w20 mov x0, x22 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str w20, [x19, #0x54] mov x0, x22 mov x1, #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov w0, #32 str w0, [x19, #0x58] G_M000_IG11: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 500 1568: JIT compiled System.Text.RegularExpressions.RegexRunner:InitializeForScan(System.Text.RegularExpressions.Regex,System.ReadOnlySpan`1[ushort],int,int) [Tier1, IL size=326, code size=500] ; Assembly listing for method System.Text.RegularExpressions.Match:.ctor(System.Text.RegularExpressions.Regex,int,System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov x20, x1 mov w22, w2 mov x21, x3 mov w23, w4 G_M000_IG02: movz x24, #0xD1FFAB1E movk x24, #0xD1FFAB1E LSL #16 movk x24, #0xD1FFAB1E LSL #32 mov x0, x24 mov x1, #2 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, G_M000_IG01: #8 stp mov x15, x21 fp, lr, [sp bl CORINFO_HELP_ASSIGN_REF , #-0x30]! str xzr, [x19, #0x10] stp add x19, x20, [sp, #0x10] x14, x19, #24 stp x21, x22, [sp, #0x20] mov x15, x0 mov bl CORINFO_HELP_ASSIGN_REF fp, str sp wzr, [x19, #0x30] mov x19, x0 movz x14, #0xD1FFAB1E G_M000_IG02: ldr movk x14, #0xD1FFAB1E LSL #16 w20, [x19, #0x4C] movk x14, #0xD1FFAB1E LSL #32 cmp str x14, [x19, #0x28] w20, w2 bhi G_M000_IG09 add x14, x19, #64 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF sxtw x20, w22 mov x1, x20 mov x0, x24 ubfiz bl CORINFO_HELP_NEWARR_1_VC x0, x20, #1, #32 add x14, x19, #80 mov x15, x0 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh bl w0, [x21] CORINFO_HELP_ASSIGN_REF cmp w0, #124 mov bne G_M000_IG07 x1, x20 cmp w22, #1 movz x0, #0xD1FFAB1E blo G_M000_IG09 add x0, x21, #2 movk x0, #0xD1FFAB1E LSL #16 sub w2, w22, #1 movk x0, #0xD1FFAB1E LSL #32 mov w1, #124 bl CORINFO_HELP_NEWARR_1_OBJ movz x3, #0xD1FFAB1E add x14, x19, #72 movk x3, #0xD1FFAB1E LSL #16 mov x15, x0 movk x3, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x3, [x3] blr x3 ldr sub w1, w22, #1 x0, [x19, #0x48] cmp w0, #0 ldr csel w0, w0, w1, ge x2, [x19, #0x18] cmp w0, #0 mov x1, xzr ble G_M000_IG07 bl CORINFO_HELP_ARRADDR_ST cmp w0, w22 str w23, [x19, #0x5C] bhi G_M000_IG09 ubfiz x1, x0, #1, #32 strb add x21, x21, x1 wzr, [x19, #0x60] sub G_M000_IG03: w22, w22, w0 ldp add w0, w20, w0x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] cmp w22, #1 ldp x19, x20 bls G_M000_IG07 , [sp, #0x10] ldrh ldp fp, lr, [sp], #w1, [x21, #0x02] 0x40 cmp w1, #124 ret lr bne G_M000_IG07 ; Total bytes of code 228 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 1569: JIT compiled System.Text.RegularExpressions.Match:.ctor(System.Text.RegularExpressions.Regex,int,System.String,int) [Tier1, IL size=80, code size=228] mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1570: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex75_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.Group:.ctor(System.String,int[],int,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz w3, G_M000_IG04 G_M000_IG03: lsl w14, w3, #1 sub w14, w14, #2 ldr w15, [x2, #0x08] cmp w14, w15 bhs G_M000_IG10 add x15, x2, #16 ldr w5, [x15, w14, UXTW #2] b G_M000_IG05 G_M000_IG04: mov w5, wzr G_M000_IG05: mov x15, x1 cbz w3, G_M000_IG07 G_M000_IG06: lsl w14, w3, #1 sub w14, w14, #1 ldr w12, [x2, #0x08] cmp w14, w12 bhs G_M000_IG10 add x12, x2, #16 ldr w1, [x12, w14, UXTW #2] b G_M000_IG08 G_M000_IG07: mov w1, wzr G_M000_IG08: add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF stp w5, w1, [x0, #0x10] add x14, x0, #24 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF str w3, [x0, #0x30] add x14, x0, #40 mov x15, x4 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 148 1571: JIT compiled System.Text.RegularExpressions.Group:.ctor(System.String,int[],int,System.String) [Tier1, IL size=56, code size=148] ; Assembly listing for method System.Text.RegularExpressions.Capture:.ctor(System.String,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF stp w2, w3, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1572: JIT compiled System.Text.RegularExpressions.Capture:.ctor(System.String,int,int) [Tier1, IL size=28, code size=32] ; Assembly listing for method System.Text.RegularExpressions.Regex:ScanInternal(int,bool,System.String,int,System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort],bool):System.Text.RegularExpressions.Match ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov w21, w0 mov w22, w1 mov x20, x2 mov w23, w3 mov x19, x4 mov w24, w7 G_M000_IG02: mov x1, x5 mov w2, w6 mov x0, x19 ldr x3, [x19] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x25, [x19, #0x28] ldr x14, [x25, #0x50] ldr w15, [x14, #0x08] cmp w15, #0 bls G_M000_IG10 ldr w14, [x14, #0x10] cmp w14, #0 ble G_M000_IG08 G_M000_IG03: tst w22, #255 bne G_M000_IG04 add x14, x25, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF str xzr, [x19, #0x28] b G_M000_IG06 G_M000_IG04: tst w24, #255 beq G_M000_IG06 str xzr, [x25, #0x08] mov x0, xzr G_M000_IG05: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: ldr w1, [x19, #0x4C] mov x0, x25 mov w2, w23 mov w3, w21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x0, x25 G_M000_IG07: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: str xzr, [x25, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 292 1573: JIT compiled System.Text.RegularExpressions.Regex:ScanInternal(int,bool,System.String,int,System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort],bool) [Tier1, IL size=88, code size=292] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Scan(System.ReadOnlySpan`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x4, x0 mov w3, w2 G_M000_IG02: mov x2, x1 ldr x5, [x4, #0x70] ldr x0, [x5, #0x08] mov x1, x4 ldr x4, [x5, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x4 ; Total bytes of code 44 1574: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Scan(System.ReadOnlySpan`1[ushort]) [Tier1, IL size=14, code size=44] ; Assembly listing for method System.Text.RegularExpressions.Match:get_FoundMatch():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x50] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG04 ldr w0, [x0, #0x10] cmp w0, #0 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 52 1575: JIT compiled System.Text.RegularExpressions.Match:get_FoundMatch() [Tier1, IL size=12, code size=52] ; Assembly listing for method System.Text.RegularExpressions.Group:get_Success():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x30] cmp w0, #0 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1576: JIT compiled System.Text.RegularExpressions.Group:get_Success() [Tier1, IL size=10, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Kind(ubyte):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb w1, [x0, #0x2E] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1577: JIT compiled System.Text.RegularExpressions.RegexNode:set_Kind(ubyte) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.String:op_Equality(System.String,System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x0, x1 bne G_M000_IG04 G_M000_IG03: mov w0, #1 b G_M000_IG07 G_M000_IG04: cbz x0, G_M000_IG05 cbz x1, G_M000_IG05 ldr w2, [x0, #0x08] ldr w3, [x1, #0x08] cmp w2, w3 beq G_M000_IG06 G_M000_IG05: mov w0, wzr b G_M000_IG07 G_M000_IG06: add x0, x0, #12 lsl w2, w2, #1 mov w2, w2 add x1, x1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 100 1578: JIT compiled System.String:op_Equality(System.String,System.String) [Tier1, IL size=8, code size=100] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:Reduce():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldrb w1, [x0, #0x2E] sxtw w2, w1 cmp w2, #13 beq G_M000_IG04 G_M000_IG03: ldr w2, [x0, #0x28] and w2, w2, #0xD1FFAB1E str w2, [x0, #0x28] G_M000_IG04: cmp w1, #8 bhi G_M000_IG06 G_M000_IG05: cmp w1, #5 ccmp w1, #8, z, ne beq G_M000_IG14 b G_M000_IG17 G_M000_IG06: cmp w1, #11 beq G_M000_IG14 sub w19, w1, #24 cmp w19, #10 bhi G_M000_IG07 mov w1, w19 adr x2, [@RWD00] ldr w2, [x2, x1, LSL #2] adr x3, [G_M000_IG02] add x2, x2, x3 br x2 G_M000_IG07: cmp w1, #45 beq G_M000_IG14 b G_M000_IG17 G_M000_IG08: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG09: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG10: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG11: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex76_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG12: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG17 G_M000_IG14: movz x1, #0xD1FFAB1E movk G_M000_IG01: x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 stp fpldr x1, [x1] , lr, [sp, #-0x30]! blr x1 stp b G_M000_IG17 x19, x20, [sp, #0x18] G_M000_IG15: str movz x1, #0xD1FFAB1E x21, [sp, #0x28] movk x1, #0xD1FFAB1E LSL #16 mov movk x1, #0xD1FFAB1E LSL #32 fp ldr x1, [x1] , sp blr x1 mov x19, x0 b G_M000_IG17 mov x21, x1 G_M000_IG16: mov w20, w2 movz x1, #0xD1FFAB1E G_M000_IG02: movk x1, #0xD1FFAB1E LSL #16 mov x1, x21 mov w2, w20 mov x0, x19 bl movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ] cbz blr x1 w0, G_M000_IG04 G_M000_IG03: b G_M000_IG17 mov x1, x21 mov w2, w20 G_M000_IG17: mov x0, x19 ldr bl x19, [sp, #0x18] ldp System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool fp, lr, [sp], #0x20 cbnz w0, G_M000_IG04 ret lr ldr w0, [x19, #0x4C] RWD00 cmp dd G_M000_IG08 - G_M000_IG02 w0, w20 dd G_M000_IG10 - G_M000_IG02 beq dd G_M000_IG12 - G_M000_IG02 G_M000_IG04 dd G_M000_IG12 - G_M000_IG02 add dd G_M000_IG17 - G_M000_IG02 w0, w0, #1 dd G_M000_IG11 - G_M000_IG02 str w0, [x19, #0x4C] dd G_M000_IG13 - G_M000_IG02 b G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 G_M000_IG04: dd G_M000_IG09 - G_M000_IG02 ldr x21, [sp, #0x28] dd G_M000_IG16 - G_M000_IG02 ldp dd G_M000_IG15 - G_M000_IG02 x19, x20, [sp, #0x18] ; Total bytes of code 348 ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1579: JIT compiled System.Text.RegularExpressions.RegexNode:Reduce() [Tier1, IL size=204, code size=348] 1580: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex76_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ToStringClass():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: sub sp, sp, #64 stp fp, lr, [sp, #0x30] add fp, sp, #48 str xzr, [fp, #-0x20] str xzr, [fp, #-0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #-0x28] G_M000_IG02: ldp x1, xzr, [sp], #0xD1FFAB1E mov x1, sp str xzr, [fp, #-0x20] str x1, [fp, #-0x10] mov w1, #0xD1FFAB1E str w1, [fp, #-0x08] str wzr, [fp, #-0x18] sub x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x28] cmp xip0, xip1 beq G_M000_IG03 bl CORINFO_HELP_FAIL_FAST G_M000_IG03: sub sp, fp, #48 ldp fp, lr, [sp, #0x30] add sp, sp, #64 ret lr ; Total bytes of code 156 1581: JIT compiled System.Text.RegularExpressions.RegexCharClass:ToStringClass() [Tier1, IL size=49, code size=156] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1582: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1583: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex76_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ToStringClass(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 7 inlinees with PGO data; 16 single block inlinees; 10 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w21, [x19, #0x08] sxtw w22, w21 ldr x0, [x20, #0x10] cbnz x0, G_M000_IG04 G_M000_IG03: mov w23, wzr b G_M000_IG05 align [0 bytes for IG21] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: ldp w0, w1, [x0, #0x18] add w23, w1, w0 G_M000_IG05: ldr w0, [x19, #0x18] sub w0, w0, #3 cmp w21, w0 ble G_M000_IG07 G_M000_IG06: mov x0, x19 mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: add w0, w21, #3 str w0, [x19, #0x08] add x24, x19, #16 mov x0, x24 mov w1, w21 add x1, x1, #3 ldr w2, [x0, #0x08] cmp x1, x2 bhi G_M000_IG47 ldr x0, [x0] ubfiz x1, x21, #1, #32 add x0, x0, x1 ldrb w1, [x20, #0x24] cbnz w1, G_M000_IG09 G_M000_IG08: mov w1, wzr b G_M000_IG10 G_M000_IG09: mov w1, #1 G_M000_IG10: strh w1, [x0] strh wzr, [x0, #0x02] strh w23, [x0, #0x04] ldr x21, [x20, #0x08] cbz x21, G_M000_IG19 G_M000_IG11: mov w25, wzr ldr w0, [x21, #0x10] cmp w0, #0 ble G_M000_IG19 G_M000_IG12: ldr w0, [x21, #0x10] cmp w25, w0 bhs G_M000_IG44 ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex77_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) x0, [x21, #0x08]; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ldr w1, [x0, #0x08] ; optimized code ; fp based frame ; partially interruptible ; No PGO data cmp w25, w1 bhs G_M000_IG52 ubfiz x1, x25, #2, #32 add x1, x1, #16 add x0, x0, x1 ldrh w1, [x0] ldrh w26, [x0, #0x02] ldr w0, [x19, #0x08] mov x2, x24 ldr x3, [x2] ldr w2, [x2, #0x08] cmp w0, w2 bhs G_M000_IG14 G_M000_IG01: stp G_M000_IG13: fp , lr, [sp, #-0x30]!strh w1, [x3, w0, UXTW #2] add w0, w0, #1 stp str w0, [x19, #0x08] x19, x20, [sp, #0x18] b G_M000_IG15 G_M000_IG14: str mov x0, x19 x21, [sp, #0x28] movz x2, #0xD1FFAB1E mov fp, movk x2, #0xD1FFAB1E LSL #16 sp movk x2, #0xD1FFAB1E LSL #32 mov ldr x2, [x2] x19, x0 blr x2 mov x21, x1 G_M000_IG15: mov uxth w0, w26 mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG18 w20 G_M000_IG16: , w2 add w0, w26, #1 uxth w1, w0 G_M000_IG02: ldr w0, [x19, #0x08] mov x1, x21 mov x2, x24 mov w2, w20 ldr x3, [x2] mov x0, x19 ldr w2, [x2, #0x08] bl cmp w0, w2 bhs G_M000_IG17 strh w1, [x3, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool b G_M000_IG18 cbz G_M000_IG17: w0, G_M000_IG04 mov x0, x19 G_M000_IG03: movz x2, #0xD1FFAB1E mov x1, x21 mov w2, w20 movk x2, #0xD1FFAB1E LSL #16 mov x0, x19 movk x2, #0xD1FFAB1E LSL #32 bl ldr x2, [x2] blr System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool x2 cbnz w0, G_M000_IG04 G_M000_IG18: ldr w0, [x19, #0x4C] add w25, w25, #1 cmp ldr w0, [x21, #0x10] w0, w20 beq cmp w25, w0 G_M000_IG04 blt G_M000_IG12 add G_M000_IG19: w0, w0, #1 str w0, [x19, #0x4C] add b G_M000_IG02 w0, w22, #1 G_M000_IG04: mov x1, x24 ldr x21, [sp, #0x28] ldr w2, [x1, #0x08] cmp w0, w2 ldp bhs G_M000_IG52 x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ldr ; Total bytes of code 108 x1, [x1] ubfiz x0, x0, #1, #32 add x0, x1, x0 ldr w1, [x19, #0x08] sub w1, w1, w22 sub w1, w1, #3 1584: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex77_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] strh w1, [x0] cbz w23, G_M000_IG25 G_M000_IG20: ldr x21, [x20, #0x10] ldrsb wzr, [x21] mov x22, xzr mov x0, x21 mov w23, wzr G_M000_IG21: add w23, w23, #1 ldr x0, [x0, #0x10] cbnz x0, G_M000_IG21 G_M000_IG22: cmp w23, #8 ble G_M000_IG23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x1, x21 mov w2, w23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG23: mov x23, xzr G_M000_IG24: cmp x23, x21 bne G_M000_IG41 G_M000_IG25: ldr x0, [x20, #0x18] cbnz x0, G_M000_IG42 G_M000_IG26: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG27: cbz x23, G_M000_IG45 ldr x0, [x23, #0x08] ldr w25, [x23, #0x18] cbnz x0, G_M000_IG28 cbnz w25, G_M000_IG47 mov x2, xzr mov w25, wzr b G_M000_IG29 G_M000_IG28: ldr w2, [x0, #0x08] cmp w2, w25 blo G_M000_IG47 mov x2, x0 G_M000_IG29: mov x26, xzr mov w27, wzr cbz x2, G_M000_IG39 G_M000_IG30: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG33 G_M000_IG31: add x26, x2, #12 G_M000_IG32: ldr w27, [x2, #0x08] b G_M000_IG37 G_M000_IG33: ldr x0, [x2] ldr w0, [x0] tst w0, #0xD1FFAB1E beq G_M000_IG46 add x26, x2, #16 b G_M000_IG32 G_M000_IG34: mov x0, x21 ldr x1, [x21, #0x10] cmp x1, x23 beq G_M000_IG36 align [0 bytes for IG35] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG35: ldr x0, [x0, #0x10] ldr x1, [x0, #0x10] cmp x1, x23 bne G_M000_IG35 G_M000_IG36: mov x23, x0 b G_M000_IG27 G_M000_IG37: cmp w25, w27 bhi G_M000_IG47 G_M000_IG38: sxtw w27, w25 G_M000_IG39: ldr w0, [x19, #0x08] ldr w1, [x19, #0x18] sub w1, w1, w27 cmp w0, w1 ble G_M000_IG40 mov x0, x19 mov w1, w27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG40: mov x2, x24 ldr w0, [x19, #0x08] ldr w1, [x2, #0x08] cmp w0, w1 bhi G_M000_IG47 ldr x2, [x2] ubfiz x3, x0, #1, #32 add x2, x2, x3 sub w0, w1, w0 str x2, [fp, #0x10] cmp w27, w0 bhi G_M000_IG48 mov w0, w27 lsl x2, x0, #1 ldr x0, [fp, #0x10] mov x1, x26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x08] add w0, w0, w27 str w0, [x19, #0x08] b G_M000_IG24 G_M000_IG41: cbnz x22, G_M000_IG49 b G_M000_IG34 G_M000_IG42: mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG43: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG44: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG45: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG46: mov x0, x2 ldr x1, [x2] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 mov x26, x0 mov w27, w1 cmp w25, w27 bls G_M000_IG38 G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG48: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG49: mov x0, x22 ldr w1, [x0, #0x10] add w1, w1, #1 str w1, [x0, #0x10] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cmp w0, w1 bgt G_M000_IG50 mov w0, wzr b G_M000_IG51 G_M000_IG50: ldr x0, [x22, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG52 add x0, x0, #16 ldr x23, [x0, w1, UXTW #3] mov w0, #1 G_M000_IG51: cbnz w0, G_M000_IG27 b G_M000_IG25 G_M000_IG52: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1240 1585: JIT compiled System.Text.RegularExpressions.RegexCharClass:ToStringClass(byref) [Tier1, IL size=264, code size=1240] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Sort(System.Comparison`1[System.ValueTuple`2[ushort,ushort]]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 G_M000_IG01: movz stp x4, #0xD1FFAB1E fp, lr, [sp, #-0x20]! movk x4, str #0xD1FFAB1E LSL #16 x19, [sp, #0x18] movk x4, #0xD1FFAB1E LSL #32 mov ldr fp, sp x4, [x4] blr x4 mov add x19, x0 w24, w24, w0 mov x2, x1 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 G_M000_IG02: cmp w1, w23 cbz x2, G_M000_IG08 bhs G_M000_IG13 ldr ldrh w1, [x19, #0x10] w0, cmp w1, #1[x22, w1, UXTW #2] ble G_M000_IG06 mov w2, #116 G_M000_IG03: cmp w0, #103 ldr x0, [x19, #0x08] ccmp w0, w2, z, ne cbnz x0, G_M000_IG04 bne G_M000_IG08 cbnz w1, G_M000_IG09 G_M000_IG07: mov x0, xzr add w0, w24, #2 mov w1, wzr cmp w0, w23 b G_M000_IG05 bhs G_M000_IG13 G_M000_IG04: ldr w3, [x0, #0x08] ldrh w0, [x22, w0, UXTW #2] cmp mov w2, #116 w3, w1 cmp w0, #103 ccmp w0, w2, z, ne blo G_M000_IG09 beq G_M000_IG10 add x0, x0, #16 G_M000_IG08: sxtw w24, w1 G_M000_IG05: cmp w24, w25 movz x3, #0xD1FFAB1E blt G_M000_IG06 G_M000_IG09: movk x3, #0xD1FFAB1E LSL #16 b G_M000_IG03 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG10: ldr add w0, w20, w24 x3, [x3] str blr x3 w0, [x19, #0x4C] G_M000_IG06: mov w0, #1 ldr G_M000_IG11: w0, ldr x25, [sp, #0x48] [x19, #0x14] ldp add w0, w0, #1 x23, x24, [sp, #0x38] str w0, [x19, #0x14] ldp x21, x22, [sp G_M000_IG07: , #0x28] ldr x19, [sp, #0x18] ldp x19, x20, [sp, #0x18] ldp ldp fp, lr, [sp]fp, lr, [sp], #0x20 , #0x50 ret lr G_M000_IG08: ret lr mov w0, #29 G_M000_IG12: movz x1, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movk x0, #0xD1FFAB1E LSL #32 blr x1 ldr x0, [x0] blr x0 brk_windows brk_windows ##0 0 G_M000_IG13: G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] bl blr x0 CORINFO_HELP_RNGCHKFAIL brk_windows #0 brk_windows #0 ; Total bytes of code 172 ; Total bytes of code 328 1586: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Sort(System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) [Tier1, IL size=58, code size=172] 1587: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:Sort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp add x3, sp, #32 str x3, [fp, #0x18] str x2, [fp, #0x10] mov x3, x2 G_M000_IG02: cmp w1, #1 ble G_M000_IG03 orr w2, w1, #1 clz w2, w2 eor w2, w2, #31 lsl w2, w2, #1 add w2, w2, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: stp fp, lr, [sp, #-0x20]! add x3, fp, #32 str x3, [sp, #0x18] G_M000_IG05: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 adr x0, [G_M000_IG03] G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #32 str x3, [sp, #0x18] G_M000_IG08: mov x1, x0 mov w0, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 adr x0, [G_M000_IG03] G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 180 1588: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:Sort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) [Tier1, IL size=30, code size=180] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:IntrospectiveSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x3, x2 G_M000_IG02: cmp w1, #1 ble G_M000_IG04 G_M000_IG03: orr w2, w1, #1 clz w2, w2 eor w2, w2, #31 lsl w2, w2, #1 add w2, w2, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 68 1589: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:IntrospectiveSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) [Tier1, IL size=34, code size=68] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1590: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex77_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:IntroSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],int,System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 119 ; 0 inlinees with PGO data; 4 single block inlinees; 8 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x20, x0 mov w21, w1 mov w22, w2 mov x19, x3 G_M000_IG02: sxtw w23, w21 cmp w21, #1 ble G_M000_IG15 G_M000_IG03: cmp w23, #16 bgt G_M000_IG06 G_M000_IG04: cmp w23, #2 bne G_M000_IG10 G_M000_IG05: b G_M000_IG09 G_M000_IG06: cbz w22, G_M000_IG16 sub w22, w22, #1 cmp w23, w21 bhi G_M000_IG17 sxtw w1, w23 mov x0, x20 mov x2, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w24, w0 add w0, w24, #1 sub w1, w23, w0 mov w0, w0 add x2, x0, w1, UXTW mov w3, w21 cmp x2, x3 bhi G_M000_IG17 G_M000_IG07: lsl x0, x0, #2 add x0, x20, x0 mov w2, w22 mov x3, x19 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 sxtw w23, w24 cmp w23, #1 bgt G_M000_IG03 G_M000_IG08: b G_M000_IG15 G_M000_IG09: mov x21, x20 mov x22, x21 ldr w1, [x22] add x24, x21, #4 ldr w2, [x24] ldr x0, [x19, #0x08] ldr x3, [x19, #0x18] blr x3 cmp w0, #0 ble G_M000_IG15 ldrh w0, [x21] ldrh w1, [x21, #0x02] ldr w2, [x24] str w2, [x22] strh w0, [x24] strh w1, [x24, #0x02] b G_M000_IG15 G_M000_IG10: cmp w23, #3 bne G_M000_IG14 G_M000_IG11: mov x2, x20 mov x22, x2 ldr w1, [x22] add x24, x2, #4 ldr w2, [x24] ldr x0, [x19, #0x08] ldr x3, [x19, #0x18] blr x3 cmp w0, #0 ble G_M000_IG12 ldrh w1, [x20] ldrh w2, [x20, #0x02] ldr w0, [x24] str w0, [x22] mov x0, x24 strh w1, [x0] strh w2, [x0, #0x02] G_M000_IG12: mov x2, x20 ldr w1, [x22] cmp w21, #2 bls G_M000_IG18 add x23, x2, #8 ldr w2, [x23] ldr x0, [x19, #0x08] ldr x3, [x19, #0x18] blr x3 cmp w0, #0 ble G_M000_IG13 ldrh w1, [x20] ldrh w2, [x20, #0x02] ldr w0, [x23] str w0, [x22] mov x0, x23 strh w1, [x0] strh w2, [x0, #0x02] G_M000_IG13: ldr w1, [x24] ldr w2, [x23] ldr x0, [x19, #0x08] ldr x3, [x19, #0x18] blr x3 cmp w0, #0 ble G_M000_IG15 mov x0, x24 ldrh w1, [x0] ldrh w0, [x0, #0x02] ldr w2, [x23] str w2, [x24] strh w1, [x23] strh w0, [x23, #0x02] b G_M000_IG15 G_M000_IG14: cmp w23, w21 bhi G_M000_IG17 mov x0, x20 mov w1, w23 mov x2, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG16: cmp w23, w21 bhi G_M000_IG17 mov x0, x20 sxtw w1, w23 mov x2, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG15 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG18: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 612 1591: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:IntroSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],int,System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) [Tier1 with Static PGO, IL size=152, code size=612] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:RemoveRange(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 mov w3, w1 G_M000_IG02: tbnz w3, #31, G_M000_IG06 tbnz w2, #31, G_M000_IG07 ldr w4, [x19, #0x10] sub w1, w4, w3 cmp w1, w2 blt G_M000_IG08 cmp w2, #0 ble G_M000_IG05 G_M000_IG03: sub w4, w4, w2 str w4, [x19, #0x10] cmp w3, w4 bge G_M000_IG04 sub w4, w4, w3 add w1, w3, w2 ldr x0, [x19, #0x08] mov x2, x0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG04: ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG07: mov w0, #27 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG08: mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 212 1592: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:RemoveRange(int,int) [Tier1, IL size=136, code size=212] ; Assembly listing for method System.Text.ValueStringBuilder:AppendSpan(int):System.Span`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr w21, [x19, #0x08] ldr w0, [x19, #0x18] sub w0, w0, w20 cmp w0, w21 bge G_M000_IG04 G_M000_IG03: mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: add w0, w21, w20 str w0, [x19, #0x08] add x0, x19, #16 mov w1, w21 add x2, x1, w20, UXTW ldr w3, [x0, #0x08] cmp x2, x3 bhi G_M000_IG06 ldr x0, [x0] lsl x1, x1, #1 add x0, x0, x1 sxtw w1, w20 G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 160 1593: JIT compiled System.Text.ValueStringBuilder:AppendSpan(int) [Tier1, IL size=53, code size=160] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex78_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl ; Assembly listing for method System.Text.ValueStringBuilder:get_Item(int):byref:this System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows cbz w0, G_M000_IG04 ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 G_M000_IG01: add w0, w0, #1 stp fp, lr str w0, [x19, #0x4C] , [sp, # b G_M000_IG02 -0x10]! G_M000_IG04: mov ldr fp, sp x21, [sp, #0x28] ldp G_M000_IG02: x19, add x20, [sp, #0x18] x0, x0, #16 ldp fp, lr, [sp], # ldr 0x30 w2, [x0, #0x08] ret lr cmp ; Total bytes of code 108 w1, w2 bhs G_M000_IG04 ldr x0, [x0] ubfiz x1, x1, #1, #32 add x0, x0, x1 G_M000_IG03: 1594: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex78_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 52 1595: JIT compiled System.Text.ValueStringBuilder:get_Item(int) [Tier1, IL size=13, code size=52] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1596: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBlank():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 29 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x70] tbz w0, #5, G_M000_IG18 G_M000_IG03: b G_M000_IG05 align [0 bytes for IG13] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: ldr w0, [x19, #0x58] add w2, w0, #1 str w2, [x19, #0x58] G_M000_IG05: ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG07 G_M000_IG06: mov x1, x0 sxtw w3, w2 ldr w4, [x1, #0x08] cmp w3, w4 bhs G_M000_IG27 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #32 bgt G_M000_IG07 cmp w1, #128 bhs G_M000_IG27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldrb w1, [x3, w1, UXTW #2] cmp w1, #2 beq G_M000_IG04 G_M000_IG07: ldr w1, [x0, #0x08] sub w1, w1, w2 cbz w1, G_M000_IG24 mov x1, x0 sxtw w3, w2 ldr w4, [x1, #0x08] cmp w3, w4 bhs G_M000_IG27 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #35 beq G_M000_IG10 G_M000_IG08: ldr w3, [x0, #0x08] sub w3, w3, w2 cmp w3, #3 blt G_M000_IG24 b G_M000_IG12 G_M000_IG09: add w0, w1, #1 str w0, [x19, #0x58] G_M000_IG10: ldr x0, [x19, #0x28] ldr w2, [x0, #0x08] ldr w1, [x19, #0x58] sub w2, w2, w1 cmp w2, #0 ble G_M000_IG05 sxtw w2, w1 ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG27 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, #10 bne G_M000_IG09 G_M000_IG11: b G_M000_IG05 G_M000_IG12: mov x3, x0 add w4, w2, #2 ldr w5, [x3, #0x08] cmp w4, w5 bhs G_M000_IG27 add x3, x3, #12 ldrh w3, [x3, w4, UXTW #2] cmp w3, #35 bne G_M000_IG24 add w2, w2, #1 ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG27 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, #63 bne G_M000_IG24 cmp w1, #40 bne G_M000_IG24 b G_M000_IG14 G_M000_IG13: add w0, w2, #1 str w0, [x19, #0x58] G_M000_IG14: ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG16 G_M000_IG15: mov x1, x0 sxtw w3, w2 ldr w4, [x1, #0x08] cmp w3, w4 bhs G_M000_IG27 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #41 bne G_M000_IG13 G_M000_IG16: ldr w0, [x0, #0x08] sub w0, w0, w2 cbz w0, G_M000_IG25 G_M000_IG17: b G_M000_IG04 G_M000_IG18: ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #3 blt G_M000_IG19 add w1, w2, #2 ldr w3, [x0, #0x08] cmp w1, w3 bhs G_M000_IG27 add x0, x0, #12 ldrh w1, [x0, w1, UXTW #2] cmp w1, #35 bne G_M000_IG19 add w1, w2, #1 cmp w1, w3 bhs G_M000_IG27 ldrh w1, [x0, w1, UXTW #2] cmp w1, #63 bne G_M000_IG19 cmp w2, w3 bhs G_M000_IG27 ldrh w0, [x0, w2, UXTW #2] cmp w0, #40 beq G_M000_IG21 G_M000_IG19: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG20: add w0, w2, #1 str w0, [x19, #0x58] G_M000_IG21: ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG23 G_M000_IG22: mov x1, x0 sxtw w3, w2 ldr w4, [x1, #0x08] cmp w3, w4 bhs G_M000_IG27 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #41 bne G_M000_IG20 G_M000_IG23: ldr w0, [x0, #0x08] sub w0, w0, w2 cbz w0, G_M000_IG26 add w0, w2, #1 str w0, [x19, #0x58] b G_M000_IG18 G_M000_IG24: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG27: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 768 1597: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBlank() [Tier1, IL size=302, code size=768] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1598: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex78_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:AddChild(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: add x14, x19, #24 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 add x14, x19, #24 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr x1, [x20, #0x08] cbnz x1, G_M000_IG05 G_M000_IG03: add x14, x20, #8 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov x21, x1 ldr x0, [x21] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 bne G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x22, #8 bl CORINFO_HELP_ASSIGN_REF ldr w0, [x22, #0x14] add w0, w0, #1 str w0, [x22, #0x14] mov x0, x22 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x22, #0x14] add w1, w1, #1 str w1, [x22, #0x14] ldr x0, [x22, #0x08] ldr w1, [x22, #0x10] ldr w2, [x0, #0x08] cmp w2, w1 bls G_M000_IG07 G_M000_IG06: add w2, w1, #1 str w2, [x22, #0x10] sxtw x1, w1 mov x2, x19 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG08 G_M000_IG07: mov x0, x22 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG08: add x14, x20, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG10: mov x0, x1 ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG13 G_M000_IG11: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x2, [x0, #0x08] ldr w1, [x0, #0x10] ldr w3, [x2, #0x08] cmp w3, w1 bls G_M000_IG15 G_M000_IG12: add w3, w1, #1 str w3, [x0, #0x10] sxtw x1, w1 mov x0, x2 mov x2, x19 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG14 G_M000_IG13: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG14: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x2 ; Total bytes of code 504 1599: JIT compiled System.Text.RegularExpressions.RegexNode:AddChild(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=97, code size=504] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FindAndMakeLoopsAtomic():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbnz w0, G_M000_IG04 G_M000_IG03: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG06 G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 cbz w20, G_M000_IG14 mov w21, wzr cmp w20, #0 ble G_M000_IG14 G_M000_IG07: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG09 G_M000_IG08: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG13 G_M000_IG09: mov x2, x1 cbz x2, G_M000_IG12 G_M000_IG10: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG12 G_M000_IG11: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG12: ldr w0, [x2, #0x10] cmp w21, w0 bhs G_M000_IG22 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w21, w1 bhs G_M000_IG23 add x0, x0, #16 ldr x0, [x0, w21, UXTW #3] b G_M000_IG13 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add w21, w21, #1 cmp w21, w20 blt G_M000_IG07 G_M000_IG14: ldrb w0, [x19, #0x2E] cmp w0, #25 beq G_M000_IG16 G_M000_IG15: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG16: ldr x1, [x19, #0x08] mov x19, x1 cbz x19, G_M000_IG19 G_M000_IG17: ldr x0, [x19] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG19 G_M000_IG18: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x19, x0 G_M000_IG19: mov w2, wzr sub w20, w20, #1 cmp w20, #0 ble G_M000_IG21 G_M000_IG20: ldr w0, [x19, #0x10] cmp w2, w0 bhs G_M000_IG22 ldr x1, [x19, #0x08] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG23 add x1, x1, #16 ldr x4, [x1, w2, UXTW #3] add w21, w2, #1 sxtw w2, w21 cmp w2, w0 bhs G_M000_IG22 mov x0, x4 cmp w2, w3 bhs G_M000_IG23 ldr x1, [x1, w2, UXTW #3] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w2, w21 cmp w2, w20 blt G_M000_IG20 G_M000_IG21: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 540 1600: JIT compiled System.Text.RegularExpressions.RegexNode:FindAndMakeLoopsAtomic() [Tier1, IL size=113, code size=540] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex79_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1601: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex79_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1602: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1603: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex79_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__TryFindFixedSets|1_0(System.Text.RegularExpressions.RegexNode,System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],byref,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 4 inlinees with PGO data; 54 single block inlinees; 14 inlinees without PGO data G_M000_IG01: stp x19, x20, [sp, #-0x50]! stp x21, x22, [sp, #0x10] stp x23, x24, [sp, #0x20] stp x25, x26, [sp, #0x30] stp x27, x28, [sp, #0x40] sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #96 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] mov x21, x0 mov x19, x1 mov x20, x2 mov w22, w3 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG83 G_M000_IG03: ldr w0, [x21, #0x28] tbnz w0, #6, G_M000_IG83 ldrb w0, [x21, #0x2E] sub w1, w0, #3 cmp w1, #43 bhi G_M000_IG83 mov w0, w1 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG04: ldr w0, [x19, #0x10] cmp w0, #50 bge G_M000_IG83 ldrh w0, [x21, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w22, [x20] add w14, w22, #1 str w14, [x20] str xzr, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str w22, [fp, #0xD1FFAB1E] G_M000_IG05: add x12, fp, #120 ldp q16, q17, [x12, #0xD1FFAB1E] stp q16, q17, [fp, #0xD1FFAB1E] ldr x13, [x12, #0xD1FFAB1E] str x13, [fp, #0xD1FFAB1E] G_M000_IG06: ldr w14, [x19, #0x14] add w14, w14, #1 str w14, [x19, #0x14] ldr x14, [x19, #0x08] ldr w13, [x19, #0x10] ldr w12, [x14, #0x08] cmp w12, w13 bls G_M000_IG07 add w12, w13, #1 str w12, [x19, #0x10] mov w12, #40 umull x13, w13, w12 add x13, x13, #16 add x14, x14, x13 add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG86 G_M000_IG07: add x1, fp, #0xD1FFAB1E mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG86 G_M000_IG08: ldr w0, [x21, #0x20] cmp w0, #0 ble G_M000_IG83 ldrh w0, [x21, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x23, x0 ldr w14, [x21, #0x20] mov w13, #20 cmp w14, #20 csel w24, w14, w13, le mov w25, wzr b G_M000_IG14 G_M000_IG09: ldr w22, [x20] add w14, w22, #1 str w14, [x20] stp xzr, xzr, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] str x23, [fp, #0xD1FFAB1E] str w22, [fp, #0xD1FFAB1E] G_M000_IG10: ldr x12, [fp, #0xD1FFAB1E] str x12, [fp, #0xD1FFAB1E] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [fp, #0xD1FFAB1E] G_M000_IG11: ldr w14, [x19, #0x14] add w14, w14, #1 str w14, [x19, #0x14] ldr x14, [x19, #0x08] ldr w13, [x19, #0x10] ldr w12, [x14, #0x08] cmp w12, w13 bls G_M000_IG12 add w12, w13, #1 str w12, [x19, #0x10] mov w12, #40 umull x13, w13, w12 add x13, x13, #16 add x14, x14, x13 add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG13 G_M000_IG12: add x1, fp, #0xD1FFAB1E mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: add w25, w25, #1 G_M000_IG14: cmp w25, w24 bge G_M000_IG15 ldr w14, [x19, #0x10] cmp w14, #50 blt G_M000_IG09 G_M000_IG15: ldr w0, [x21, #0x20] cmp w25, w0 bne G_M000_IG83 ldr w0, [x21, #0x24] cmp w25, w0 cset x23, eq b G_M000_IG88 G_M000_IG16: ldr x23, [x21, #0x10] mov w21, wzr ldr w24, [x23, #0x08] b G_M000_IG22 G_M000_IG17: add x0, x23, #12 ldrh w0, [x0, w21, UXTW #2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w22, [x20] add w14, w22, #1 str w14, [x20] add x14, fp, #0xD1FFAB1E stp xzr, xzr, [x14] stp xzr, xzr, [x14, #0x10] str xzr, [x14, #0x20] str x0, [fp, #0xD1FFAB1E] str w22, [fp, #0xD1FFAB1E] G_M000_IG18: add x12, fp, #0xD1FFAB1E ldp q16, q17, [x12, #0xD1FFAB1E] stp q16, q17, [fp, #0xD1FFAB1E] ldr x13, [x12, #0xD1FFAB1E] str x13, [fp, #0xD1FFAB1E] G_M000_IG19: ldr w14, [x19, #0x14] add w14, w14, #1 str w14, [x19, #0x14] ldr x14, [x19, #0x08] ldr w13, [x19, #0x10] ldr w12, [x14, #0x08] cmp w12, w13 bls G_M000_IG20 add w12, w13, #1 str w12, [x19, #0x10] mov w12, #40 umull x13, w13, w12 add x13, x13, #16 add x14, x14, x13 add x13, fp, #0xD1FFAB1E bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG21 G_M000_IG20: add x1, fp, #0xD1FFAB1E mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: add w21, w21, #1 G_M000_IG22: cmp w24, w21 ble G_M000_IG23 ldr w0, [x19, #0x10] cmp w0, #50 blt G_M000_IG17 G_M000_IG23: cmp w24, w21 cset x23, eq b G_M000_IG88 G_M000_IG24: ldr w14, [x19, #0x10] cmp w14, #50 bge G_M000_IG83 ldr x14, [x21, #0x10] ldr w22, [x20] add w13, w22, #1 str w13, [x20] str xzr, [fp, #0xD1FFAB1E] str x14, [fp, #0xD1FFAB1E] str w22, [fp, #0xD1FFAB1E] G_M000_IG25: add x12, fp, #0xD1FFAB1E ldr x13, [x12, #0xD8] str x13, [fp, #0xD8] ldp q16, q17, [x12, #0xE0] stp q16, q17, [fp, #0xE0] G_M000_IG26: ldr w14, [x19, #0x14] add w14, w14, #1 str w14, [x19, #0x14] ldr x14, [x19, #0x08] ldr w13, [x19, #0x10] ldr w12, [x14, #0x08] cmp w12, w13 bls G_M000_IG27 add w12, w13, #1 str w12, [x19, #0x10] mov w12, #40 umull x13, w13, w12; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex80_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data add G_M000_IG01: x13, x13, #16 add x14, x14, x13 stp fp, lr, [sp, # add x13, fp, #216 -0x30]! bl CORINFO_HELP_ASSIGN_BYREF stp bl x19, x20, [sp, #0x18] CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF str ldp x21, [sp, #0x28] x12, x15, [ mov x13], #0x10 fp, sp mov x19, x0 stp mov x12, x15, [x14], #0x10 x21, x1 b G_M000_IG86 mov w20, w2 G_M000_IG27: G_M000_IG02: add mov x1, x21 mov w2, w20 x1, fp, #216 mov mov x0, x19 x0, x19 movz x2, #0xD1FFAB1E bl movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool #32 cbz w0, G_M000_IG04 ldr x2, [x2] blr x2 G_M000_IG03: b G_M000_IG86 mov x1, x21 G_M000_IG28: mov w2, w20 mov x0, x19 bl ldr System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):boolw14, [x21, #0x20] cmp cbnz w0, G_M000_IG04 w14, #0 ldr w0, [x19, #0x4C] ble cmp G_M000_IG83 ldr w14, [x21, #0x20] w0, w20 mov w13, #20 beq G_M000_IG04 cmp w14, add #20 w0, w0, #1 csel w23, w14, w13, le str w0 mov w24, wzr , [x19, #0x4C] b G_M000_IG34 b G_M000_IG02 G_M000_IG04: G_M000_IG02: ldr ldr x14, [x21, #0x10]x21, [sp, #0x28] ldp ldr w22, [x20] x19, x20, [sp, #0x18] add w13, w22, #1 ldp fp, lr, [sp], #0x30 str w13, [x20] ret lr stp ; Total bytes of code 108 xzr, xzr, [fp, #0xD1FFAB1E] stp xzr, xzr, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] str x14, [fp, #0xD1FFAB1E] str w22, [fp, #0xD1FFAB1E] G_M000_IG30: 1604: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex80_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [fp, #0xB0] ldr x12, [fp, #0xD1FFAB1E] str x12, [fp, #0xD0] G_M000_IG31: ldr w14, [x19, #0x14] add w14, w14, #1 str w14, [x19, #0x14] ldr x14, [x19, #0x08] ldr w13, [x19, #0x10] ldr w12, [x14, #0x08] cmp w12, w13 bls G_M000_IG32 add w12, w13, #1 str w12, [x19, #0x10] mov w12, #40 umull x13, w13, w12 add x13, x13, #16 add x14, x14, x13 add x13, fp, #176 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG33 G_M000_IG32: add x1, fp, #176 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG33: add w24, w24, #1 G_M000_IG34: cmp w24, w23 bge G_M000_IG35 ldr w14, [x19, #0x10] cmp w14, #50 blt G_M000_IG29 G_M000_IG35: ldr w0, [x21, #0x20] cmp w24, w0 bne G_M000_IG83 ldr w0, [x21, #0x24] cmp w24, w0 cset x23, eq b G_M000_IG88 G_M000_IG36: ldr w0, [x20] add w0, w0, #1 str w0, [x20] b G_M000_IG86 G_M000_IG37: ldp w0, w1, [x21, #0x20] cmp w0, w1 bne G_M000_IG83 ldr w0, [x20] ldr w1, [x21, #0x20] add w0, w0, w1 str w0, [x20] b G_M000_IG86 G_M000_IG38: ldr x1, [x21, #0x08] mov x0, x1 cbz x0, G_M000_IG40 G_M000_IG39: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG44 G_M000_IG40: mov x2, x1 cbz x2, G_M000_IG43 G_M000_IG41: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG43 G_M000_IG42: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG43: ldr w3, [x2, #0x10] cmp w3, #0 bls G_M000_IG90 ldr x3, [x2, #0x08] ldr w0, [x3, #0x08] cmp w0, #0 bls G_M000_IG93 ldr x0, [x3, #0x10] b G_M000_IG44 G_M000_IG44: uxtb w24, w22 mov w3, w24 mov x1, x19 mov x2, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 sxtw w23, w0 b G_M000_IG88 G_M000_IG45: ldr w0, [x21, #0x20] cmp w0, #0 ble G_M000_IG83 ldr x1, [x21, #0x08] mov x0, x1 cbz x0, G_M000_IG47 G_M000_IG46: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG51 G_M000_IG47: mov x2, x1 cbz x2, G_M000_IG50 G_M000_IG48: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG50 G_M000_IG49: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG50: ldr w3, [x2, #0x10] cmp w3, #0 bls G_M000_IG90 ldr x3, [x2, #0x08] ldr w0, [x3, #0x08] cmp w0, #0 bls G_M000_IG93 ldr x0, [x3, #0x10] b G_M000_IG51 G_M000_IG51: uxtb w24, w22 mov w3, w24 mov x1, x19 mov x2, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG83 G_M000_IG52: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w23, w0 mov w24, wzr cmp w23, #0 ble G_M000_IG86 uxtb w0, w22 sxtw w25, w0 G_M000_IG53: mov x0, x21 mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w3, w25 mov x1, x19 mov x2, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG83 add w24, w24, #1 cmp w24, w23 blt G_M000_IG53 G_M000_IG54: b G_M000_IG86 G_M000_IG55: uxtb w25, w22 cbz w25, G_M000_IG83 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w22, w0 mov w23, #1 mov w24, wzr mov w26, wzr movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x27, x0 mov w1, wzr mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x28, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x28, #8 bl CORINFO_HELP_ASSIGN_REF str wzr, [fp, #0xD1FFAB1E] cmp w22, #0 ldr w3, [fp, #0xD1FFAB1E] ble G_M000_IG72 G_M000_IG56: ldr w0, [x28, #0x14] add w0, w0, #1 str w0, [x28, #0x14] ldr w2, [x28, #0x10] str wzr, [x28, #0x10] cmp w2, #0 ble G_M000_IG58 G_M000_IG57: str w3, [fp, #0xD1FFAB1E] ldr x0, [x28, #0x08] mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr w3, [fp, #0xD1FFAB1E] G_M000_IG58: str wzr, [fp, #0xD1FFAB1E] mov x0, x21 str w3, [fp, #0xD1FFAB1E] mov w1, w3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w3, w25 add x2, fp, #0xD1FFAB1E mov x1, x28 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 and w0, w0, w23 uxtb w23, w0 ldr w0, [x28, #0x10] cbz w0, G_M000_IG83 cbz w23, G_M000_IG61 G_M000_IG59: tst w24, #255 bne G_M000_IG60 ldr w26, [fp, #0xD1FFAB1E] mov w24, #1 b G_M000_IG61 G_M000_IG60: ldr w0, [fp, #0xD1FFAB1E] cmp w26, w0 beq G_M000_IG61 mov w23, wzr G_M000_IG61: stp xzr, xzr, [fp, #0x78] stp xzr, xzr, [fp, #0x88] stp xzr, xzr, [fp, #0x98] str xzr, [fp, #0xA8] str x28, [fp, #0x78] ldr w0, [x28, #0x14] str w0, [fp, #0x84] stp xzr, xzr, [fp, #0x88] stp xzr, xzr, [fp, #0x98] str xzr, [fp, #0xA8] G_M000_IG62: add x0, fp, #0xD1FFAB1E ldr x1, [fp, #0x78] str x1, [x0, #0x78] ldp q16, q17, [fp, #0x80] stp q16, q17, [x0, #0x80] ldr q16, [fp, #0xA0] str q16, [x0, #0xA0] G_M000_IG63: b G_M000_IG67 G_M000_IG64: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E ldp q16, q17, [x0] stp q16, q17, [x1] ldr x3, [x0, #0x20] str x3, [x1, #0x20] G_M000_IG65: mov x0, x27 ldr w3, [fp, #0xD1FFAB1E] str w3, [fp, #0x18] mov w1, w3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz x0, G_M000_IG66 ldr x2, [x0] str x2, [fp, #0x10] ldr w3, [x0, #0x08] str w3, [fp, #0x1C] ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x1, x0 ldr x0, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbz w0, G_M000_IG67 ldr w0, [fp, #0x1C] ldr x3, [fp, #0x10] ldr w5, [fp, #0x18] add w0, w0, #1 mov x2, x3 mov w3, w0 mov x0, x27 mov w1, w5 mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG67 G_M000_IG66: ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov w3, #1 mov x0, x27 ldr w1, [fp, #0x18] mov w4, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG67: ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w3, [x0, #0x14] cmp w1, w3 bne G_M000_IG91 G_M000_IG68: ldr w1, [fp, #0xD1FFAB1E] ldr w3, [x0, #0x10] cmp w1, w3 bhs G_M000_IG71 ldr x0, [x0, #0x08] sxtw w3, w1 ldr w4, [x0, #0x08] cmp w3, w4 bhs G_M000_IG93 mov w4, #40; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data umull x3, w3, w4 add x3, x3, #16 add x0, x0, x3 G_M000_IG69: add x3, fp, #0xD1FFAB1E ldp q16, q17, [x0] stp q16, q17, [x3] ldr x4, [x0, #0x20] str x4, [x3, #0x20] G_M000_IG70: add w0, w1, #1 G_M000_IG01: str w0, [fp, #0xD1FFAB1E] stp b G_M000_IG64 fp, lr, [sp, #-0x50]! G_M000_IG71: ldr w2, [fp, #0xD1FFAB1E] stp x19, x20, [sp, #0x18] add w2, w2, #1 stp x21, x22, [sp, #0x28] cmp w2, w22 stp x23, x24, [sp, #0x38] mov w3, w2 str blt G_M000_IG56 x25, [sp, #0x48] G_M000_IG72: str x27, [fp, #0x48] mov ldr w0, [x27, #0x44] str w0, [fp, #0x50] mov w0, #2 str w0, [fp, #0x58] fp, sp stp mov xzr, xzr, [fp, #0x60] x19, x0 str xzr, [fp, #0x70] G_M000_IG73: add x0, fp, #0xD1FFAB1E G_M000_IG01: ldp ldr x1, x2, [fp, #0x48] w20, [x19, #0x4C] stp x1, x2, [x0, #0x48] sxtw w21, w2 ldp x1, x2, [fp, #0x58] sub w0, w21, #8 stp x1, x2, [x0, #0x58] cmp w20, w0 ldp x1, x2, [fp, #0x68] stp x1, x2, [x0, #0x68] ble G_M000_IG05 G_M000_IG74: G_M000_IG03: add str w21, [x19, #0x4C] x0, fp, #0xD1FFAB1E mov w0, wzr movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 G_M000_IG04: movk x21, #0xD1FFAB1E LSL #32 ldr x25, [sp, mov x1, x21 #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ldp movk x2, #0xD1FFAB1E LSL #32 x23, x24, [sp, #0x38] ldr x2, [x2] blr x2 ldp x21, x22, [sp, #0x28] cbz w0, G_M000_IG82 ldp x19, G_M000_IG75: x20, [sp, #0x18] add x0, fp, #0xD1FFAB1E ldp fp, lr, [sp], #0x50 add x1, fp, #0xD1FFAB1E ret lr ldp x2, xip1, [x0] G_M000_IG05: stp x2, xip1, [x1] cmp w20, w21 ldr bhi G_M000_IG12 x2, [x0, #0x10] ubfiz x0, x20, #1, #32 str x2, [x1, #0x10] add x22, x1, x0 G_M000_IG76: sub w23, w21, w20 ldr w0, [x19, #0x10] mov w24, wzr cmp w0, #50 sub w25, w23, #7 cmp w25, #0 bge G_M000_IG83 ldr w0, [fp, #0xD1FFAB1E] ble G_M000_IG03 G_M000_IG06: cmp w0, w22 add w0, w24, #3 bne G_M000_IG81 G_M000_IG77: cmp w0, w23 ldr x0, [fp, #0xD1FFAB1E] bhi G_M000_IG12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ubfiz x1, x0, #1, #32 movk x1, #0xD1FFAB1E LSL #32 add x1, x22, x1 ldr sub w3, w23, w0 x1, [x1] mov x0, x1 ldr wzr, [x0] blr x1 mov w1, #97 add x14, fp, #0xD1FFAB1E mov w2, #103 stp xzr, xzr, [x14] movz x4, #0xD1FFAB1E stp movk x4, #0xD1FFAB1E LSL #xzr, xzr, [x14, #0x10] 16 str xzr, [x14, #0x20] movk x4, # ldr w14, [fp, #0xD1FFAB1E] 0xD1FFAB1E LSL # ldr w13, [x20] 32 add w14, w14, w13 str x0, [fp, #0xD1FFAB1E] str w14, [fp, #0xD1FFAB1E] G_M000_IG78: ldr add x12, fp, #0xD1FFAB1E x4, [x4] ldp q16, q17, [x12, #0x20] blr x4 stp q16, q17, [fp, #0x20] ldr add x13, [x12, #0x40] w24, str x13, [fp, #0x40] w24, w0 G_M000_IG79: tbnz w0, #31, G_M000_IG03 ldr w14, [x19, #0x14] add w1, w24, #6 add w14, w14, #1 cmp w1, w23 str w14 bhs G_M000_IG03 , [x19, #0x14] add w2, w24, #1 cmp w2, w23 ldr x14, [x19, #0x08] bhs G_M000_IG13 ldr w13, [x19, #0x10] ldrh w0, [x22, w2, UXTW #2] ldr w12, [x14, #0x08] mov cmp w12, w13 w3, #116 bls G_M000_IG80 add w12, w13, #1 cmp w0, #103 ccmp w0, w3, z, ne str bne G_M000_IG08 w12, [x19, #0x10] mov w12, #40 G_M000_IG07: umull x13, w13, w12 ldrh w0, [x22, w1, UXTW #2] add x13, x13, #16 orr w0, w0, add x14, x14, x13 #2 add x13, fp, #32 bl cmp w0, #99 CORINFO_HELP_ASSIGN_BYREF beq G_M000_IG10 bl CORINFO_HELP_ASSIGN_BYREF G_M000_IG08: bl CORINFO_HELP_ASSIGN_BYREF sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: ldp b G_M000_IG03 x12, x15, [x13], #0x10 G_M000_IG10: add w0, w20, w24 stp x12, x15, [x14], #0x10 str b G_M000_IG81 w0, [x19, #0x4C] mov w0, #1 G_M000_IG80: G_M000_IG11: add ldr x25, [sp, #0x48] x1, fp, #32 ldp mov x0, x19 x23, x24, [sp, #0x38] movz x2, #0xD1FFAB1E ldp x21, x22, [sp, #0x28] movk x2, #0xD1FFAB1E LSL #16 ldp x19, x20, [sp, #0x18] movk x2, #0xD1FFAB1E LSL #32 ldp fp, lr, [sp] ldr , #0x50 x2, [x2] blr x2 ret lr G_M000_IG81: G_M000_IG12: add x0, fp, #0xD1FFAB1E mov x1, x21 movz x0, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movk x0, #0xD1FFAB1E LSL #16 cbnz w0, G_M000_IG75 G_M000_IG82: movk x0, #0xD1FFAB1E LSL #32 cbnz w23, G_M000_IG85 G_M000_IG83: ldr mov w0, wzr x0, [x0] G_M000_IG84: blr x0 ldp brk_windows #0 fp, lr, [sp] G_M000_IG13: add sp, sp, #0xD1FFAB1E ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] ldp x23, x24, [sp, #0x20] bl CORINFO_HELP_RNGCHKFAIL ldp x21, x22, [sp, #0x10] brk_windows #0 ldp x19, x20, [sp], #0x50 ; Total bytes of code 324 ret lr G_M000_IG85: ldr w0, [x20] tst w24, #255 beq G_M000_IG92 add w0, w0, w26 str w0, [x20] G_M000_IG86: mov w0, #1 G_M000_IG87: ldp fp, lr, [sp] 1605: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] add sp, sp, #0xD1FFAB1E ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] ldp x23, x24, [sp, #0x20] ldp x21, x22, [sp, #0x10] ldp x19, x20, [sp], #0x50 ret lr G_M000_IG88: uxtb w0, w23 G_M000_IG89: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] ldp x23, x24, [sp, #0x20] ldp x21, x22, [sp, #0x10] ldp x19, x20, [sp], #0x50 ret lr G_M000_IG90: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG91: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG92: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG93: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG36 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG55 - G_M000_IG02 dd G_M000_IG52 - G_M000_IG02 dd G_M000_IG45 - G_M000_IG02 dd G_M000_IG45 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG38 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG83 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG86 - G_M000_IG02 ; Total bytes of code 3236 1606: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__TryFindFixedSets|1_0(System.Text.RegularExpressions.RegexNode,System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],byref,bool) [Tier1, IL size=1178, code size=3236] ; Assembly listing for method System.ValueTuple`2[System.__Canon,int]:.ctor(System.__Canon,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x14, x0 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w3, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 1607: JIT compiled System.ValueTuple`2[System.__Canon,int]:.ctor(System.__Canon,int) [Tier1, IL size=15, code size=32] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryAddCharClass(System.Text.RegularExpressions.RegexCharClass):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w2, [x1, #0x24] cbnz w2, G_M000_IG04 G_M000_IG03: ldr x2, [x1, #0x18] cbnz x2, G_M000_IG04 ldrb w2, [x0, #0x24] cbnz w2, G_M000_IG04 ldr x2, [x0, #0x18] cbz x2, G_M000_IG06 G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 84 1608: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryAddCharClass(System.Text.RegularExpressions.RegexCharClass) [Tier1, IL size=27, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:AddCharClass(System.Text.RegularExpressions.RegexCharClass):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: ldr x0, [x19, #0x08] cbz x0, G_M000_IG04 G_M000_IG03: ldr w0, [x0, #0x10] cbz w0, G_M000_IG04 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG04: ldr x0, [x19, #0x10] cbz x0, G_M000_IG06 G_M000_IG05: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x19, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 160 1609: JIT compiled System.Text.RegularExpressions.RegexCharClass:AddCharClass(System.Text.RegularExpressions.RegexCharClass) [Tier1, IL size=66, code size=160] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1610: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex80_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:AddRange(System.Collections.Generic.IEnumerable`1[System.ValueTuple`2[ushort,ushort]]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 2 ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] mov fp, sp add x2, sp, #80 str x2, [fp, #0x28] mov x19, x0 mov x20, x1 G_M000_IG02: cbz x20, G_M000_IG14 mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x21, x0 cbz x21, G_M000_IG05 mov x0, x21 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 mov x11, x22 ldr x1, [x11] blr x1 sxtw w20, w0 cmp w20, #0 ble G_M000_IG12 ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] ldr w2, [x19, #0x10] sub w1, w1, w2 cmp w1, w20 blt G_M000_IG15 G_M000_IG03: ldr x1, [x19, #0x08] ldr w2, [x19, #0x10] mov x0, x21 add x11, x22, #8 ldr x3, [x11] blr x3 ldr w0, [x19, #0x10] add w0, w0, w20 str w0, [x19, #0x10] ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] G_M000_IG04: ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: mov x0, x20 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 sub x11, x22, #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] G_M000_IG06: b G_M000_IG09 G_M000_IG07: ldr x0, [fp, #0x10] sub x11, x22, #16 ldr x1, [x11] blr x1 str w0, [fp, #0x20] ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] ldr x0, [x19, #0x08] ldr w1, [x19, #0x10] ldr w2, [x0, #0x08] cmp w2, w1 bls G_M000_IG08 add w2, w1, #1 str w2, [x19, #0x10] ubfiz x1, x1, #2, #32 add x1, x1, #16 ldr w2, [fp, #0x20] str w2, [x0, x1] b G_M000_IG09 G_M000_IG08: ldr w0, [fp, #0x20] str w0, [fp, #0x18] mov x0, x19 ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr x0, [fp, #0x10] sub x11, x22, #24 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG07 G_M000_IG10: ldr x0, [fp, #0x28] bl G_M000_IG16 G_M000_IG11: nop G_M000_IG12: ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: bl CORINFO_HELP_OVERFLOW G_M000_IG14: mov w0, #23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG15: ldr w1, [x19, #0x10] adds w1, w1, w20 bvs G_M000_IG13 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG03 G_M000_IG16: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] add x3, fp, #80 str x3, [sp, #0x18] G_M000_IG17: ldr x0, [fp, #0x10] cbz x0, G_M000_IG18 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 sub x11, x22, #8 ldr x1, [x11] blr x1 G_M000_IG18: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 548 1611: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:AddRange(System.Collections.Generic.IEnumerable`1[System.ValueTuple`2[ushort,ushort]]) [Tier1 with Static PGO, IL size=152, code size=548] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:IsInstanceOfInterface(ulong,System.Object):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 1697726 ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x1, G_M000_IG15 G_M000_IG03: ldr x2, [x1] ldrh w3, [x2, #0x0E] cbz x3, G_M000_IG13 G_M000_IG04: ldr x4, [x2, #0x38] cmp x3, #4 blt G_M000_IG11 G_M000_IG05: ldr x5, [x4] cmp x5, x0 beq G_M000_IG15 G_M000_IG06: ldr x5, [x4, #0x08] cmp x5, x0 beq G_M000_IG15 G_M000_IG07: ldr x5, [x4, #0x10] cmp x5, x0 beq G_M000_IG15 G_M000_IG08: ldr x5, [x4, #0x18] cmp x5, x0 beq G_M000_IG15 G_M000_IG09: add x4, x4, #32 sub x3, x3, #4 cmp x3, #4 bge G_M000_IG05 G_M000_IG10: cbz x3, G_M000_IG13 G_M000_IG11: ldr x5, [x4] cmp x5, x0 beq G_M000_IG15 G_M000_IG12: add x4, x4, #8 sub x3, x3, #1 cmp x3, #0 bgt G_M000_IG11 G_M000_IG13: ldr w2, [x2] mov w3, #0xD1FFAB1E tst w2, w3 bne G_M000_IG17 G_M000_IG14: mov x1, xzr G_M000_IG15: mov x0, x1 G_M000_IG16: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG17: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG18: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 188 1612: JIT compiled System.Runtime.CompilerServices.CastHelpers:IsInstanceOfInterface(ulong,System.Object) [Tier1 with Static PGO, IL size=152, code size=188] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:CopyTo(System.ValueTuple`2[ushort,ushort][],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x4, x0 mov w3, w2 G_M000_IG02: ldr x0, [x4, #0x08] ldr w4, [x4, #0x10] mov x2, x1 mov w1, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x5 ; Total bytes of code 56 1613: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:CopyTo(System.ValueTuple`2[ushort,ushort][],int) [Tier1, IL size=21, code size=56] ; Assembly listing for method System.Array:Copy(System.Array,int,System.Array,int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 64905 ; 1 inlinees with PGO data; 7 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG08 cbz x2, G_M000_IG08 ldr x5, [x0] ldr x6, [x2] cmp x5, x6 bne G_M000_IG08 G_M000_IG03: ldr w6, [x5, #0x04] cmp w6, #24 bhi G_M000_IG08 orr w6, w4, w1 orr w6, w6, w3 tbnz w6, #31, G_M000_IG08 add w6, w1, w4 ldr w7, [x0, #0x08] cmp w6, w7 bhi G_M000_IG08 add w6, w3, w4 ldr w7, [x2, #0x08] cmp w6, w7 bhi G_M000_IG08 ldrh w6, [x5] mov w4, w4 mul x4, x4, x6 add x0, x0, #16 mov w1, w1 mul x1, x1, x6 add x1, x0, x1 add x0, x2, #16 mov w2, w3 mul x2, x2, x6 add x0, x0, x2 ldr w2, [x5] tbz w2, #24, G_M000_IG06 G_M000_IG04: cmp x4, #4, LSL #12 bhi G_M000_IG10 mov x2, x4 G_M000_IG05: ldp fp, lr, [sp], #0x10 b System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) G_M000_IG06: mov x2, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: mov w5, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] G_M000_IG09: ldp fp, lr, [sp], #0x10 br x6 G_M000_IG10: mov x2, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG11: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 248 1614: JIT compiled System.Array:Copy(System.Array,int,System.Array,int,int) [Tier1 with Static PGO, IL size=181, code size=248] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.ValueTuple`2[System.__Canon,int]]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 2 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] G_M000_IG02: ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex81_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data w14, [x0, #0x08] ldr x13, [x0] ldr w13, [x13, #0x44] cmp w14, w13 bne G_M000_IG08 G_M000_IG03: ldr w14, [x0, #0x0C] G_M000_IG01: ldr stp x13, fp, lr, [sp, #-0x30]![x0] ldr stp w1, [x13, #0x38] x19, x20, [sp cmp w14, w1 , #0x18] str x21, [sp, #0x28] mov blo fp, G_M000_IG06 sp mov G_M000_IG04: x19, x0 add mov x21, x1 w1, w1, #1 mov w20, w2 str G_M000_IG02: mov x1, x21 w1, mov w2, w20 [x0, #0x0C] mov x0, x19 stp bl xzr, xzr, [x0, #0x18] str xzr, [x0, #0x28] mov w0, wzr System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG05: cbz w0, ldp fp, lr, [sp], #0x30 G_M000_IG04 ret lr G_M000_IG03: G_M000_IG06: mov x1, x21 ldr mov w2, w20 x13, mov x0, x19 [x13 bl , #0x10] add w12, w14, System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool #1 cbnz w0 str , G_M000_IG04 w12 ldr , [x0, #0x0C] w0, [x19, #0x4C] ldr w12, [x13, #0x08] cmp w0, w20 cmp w14, w12 beq G_M000_IG04 bhs G_M000_IG09 ubfiz x14, x14, #5, #32 add add x14, x14, #16 w0, w0, #1 add x14, x13, x14 str w0, [x19, #0x4C] ldr w13, [x14, #0x04] b G_M000_IG02 cmn w13, #1 G_M000_IG04: ldr x21, [sp, #0x28] blt G_M000_IG03 ldp stp x19, x20, [sp, #0x18] xzr, xzr, [fp, #0x18] str ldp xzr, [fp, #0x28] fp, lr, [sp], #0x30 ret lr ldr w13, [x14, #0x08] add x14, x14, #16 ; Total bytes of code 108 ldr x12, [x14] ldr w14, [x14, #0x08] str w13, [fp, #0x18] str x12, [fp, #0x20] str w14, [fp, #0x28] add x14, x0, #24 1615: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex81_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] add x13, fp, #24 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 236 1616: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.ValueTuple`2[System.__Canon,int]]:MoveNext() [Tier1 with Static PGO, IL size=146, code size=236] ; Assembly listing for method System.Collections.Generic.Dictionary`2+Enumerator[int,System.ValueTuple`2[System.__Canon,int]]:get_Current():System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x13, x0, #24 mov x14, x8 ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 1617: JIT compiled System.Collections.Generic.Dictionary`2+Enumerator[int,System.ValueTuple`2[System.__Canon,int]]:get_Current() [Tier1, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Key():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1618: JIT compiled System.Collections.Generic.KeyValuePair`2[int,System.ValueTuple`2[System.__Canon,int]]:get_Key() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Int32:CompareTo(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65547 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0] cmp w2, w1 bge G_M000_IG05 G_M000_IG03: movn w0, #0 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr w0, [x0] cmp w0, w1 cset x0, gt G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 1619: JIT compiled System.Int32:CompareTo(int) [Tier1 with Static PGO, IL size=16, code size=52] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ExceedsMaxDepthAllowedDepth|67_0(System.Text.RegularExpressions.RegexNode,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] 1620: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] stp x21, x22, [sp, #0x20] mov fp, sp mov x20, x0 mov w19, w1 G_M000_IG02: cmp w19, #0 bgt G_M000_IG05 G_M000_IG03: mov w0, #1 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w21, w0 mov w22, wzr cmp w21, #0 ble G_M000_IG13 G_M000_IG06: ldr x1, [x20, #0x08] mov x0, x1 cbz x0, G_M000_IG08 G_M000_IG07: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG12 G_M000_IG08: mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG11: ldr w1, [x2, #0x10] cmp w22, w1 bhs G_M000_IG17 ldr x1, [x2, #0x08] ldr w0, [x1, #0x08] cmp w22, w0 bhs G_M000_IG18 add x1, x1, #16 ldr x0, [x1, w22, UXTW #3] b G_M000_IG12 G_M000_IG12: sub w1, w19, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG15 add w22, w22, #1 cmp w22, w21 blt G_M000_IG06 G_M000_IG13: mov w0, wzr G_M000_IG14: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: mov w0, #1 G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG18: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 344 1621: JIT compiled System.Text.RegularExpressions.RegexNode:g__ExceedsMaxDepthAllowedDepth|67_0(System.Text.RegularExpressions.RegexNode,int) [Tier1, IL size=46, code size=344] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddOneArgTypeHelper(System.Type,System.Type[],System.Type[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 9582 ; 3 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x21, x0 mov x22, x1 mov x19, x2 mov x20, x3 G_M000_IG02: cbnz x20, G_M000_IG08 G_M000_IG03: cbnz x19, G_M000_IG06 G_M000_IG04: mov x0, x21 mov x1, x22 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 br x3 G_M000_IG06: mov w24, wzr ldr w0, [x19, #0x08] cmp w0, #0 bgt G_M000_IG16 G_M000_IG07: b G_M000_IG04 G_M000_IG08: mov w23, wzr ldr w0, [x20, #0x08] cmp w0, #0 ble G_M000_IG03 G_M000_IG09: add x0, x20, #16 ldr x24, [x0, w23, UXTW #3] cbnz x24, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x1, x0 mov x0, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x24 bl CORINFO_HELP_THROW G_M000_IG10: mov x0, x24 ldr x1, [x24] ldr x1, [x1, #0x68] ldr x1, [x1] blr x1 cbz w0, G_M000_IG11 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x21, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x21 mov ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data x0, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x24 bl CORINFO_HELP_THROW G_M000_IG11: mov x0, x24 ldr x1, [x24] ldr x1, [x1, #0xB0] ldr x1, [x1] blr x1 cbz w0, G_M000_IG12 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x24, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x24 G_M000_IG01: mov stp x0, x21 fp, lr, [sp, #-0x70] movz x3, !# 0xD1FFAB1E stp movk x19, x20, [sp x3, #0xD1FFAB1E LSL #16 , #0x58] movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr str x3 mov x0, x21 x21, [sp, #0x68] bl mov CORINFO_HELP_THROW fp, sp G_M000_IG12: add mov x0, x21 x9, fp, #24 mov w1, # movi 32v16.16b, #0 stp q16, q16, [x9] movz stp x2 , q16, q16, [x9, #0x20] #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 mov movk x2, #0xD1FFAB1Ex19, LSL #32 x0 ldr x2 G_M000_IG02: , [x2] ldr blr x2 w20, [x19 ldr , #0x4C] x0, [x21, #0x10] cmp w20, w2 mov x1, x24 bhi G_M000_IG19 ldr ubfiz x0, x20, #1 , #32 x2, [x0] add x0, x1, x0 mov x1, x0 ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blr x2 sub w3, w2, sxtw w1, w0 w20 mov x0, x21 movz cmp w3, #7 x2, #0xD1FFAB1E bls movk x2, G_M000_IG08 # 0xD1FFAB1E LSL #16 G_M000_IG03: movk x2, #0xD1FFAB1E LSL #32 str ldr x2, [x2] x1, [fp, #0x28] blr x2 add w23, w23, #1 str w3, [fp, #0x30] ldr add x4, fpw0, #40 , [x20, #0x08] ldr cmp x5, [x4] w0, w23 ldr bgt G_M000_IG09 w4, [x4, b G_M000_IG03 #0x08] G_M000_IG13: cmp mov x0, x20 w4 ldr x1, [x20] , #3 ldr x1, [x1, #0x68] ldr x1, blt G_M000_IG08 [x1] G_M000_IG04: blr x1 ldr w4, [x5] cbz w0, G_M000_IG14 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, # 0xD1FFAB1E LSL #32 movz w6, #97 bl CORINFO_HELP_NEWSFAST mov x20, x0 movk w6, movz#103 LSL #16 x0, #0xD1FFAB1E eor w4, w4, w6 movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL w5, [x5, #0x02] #32 add w6, w6, #6 ldr eor w5, w5, w6 x0, [x0] orr w4, w4, w5 blr cbnz w4, G_M000_IG08 x0 mov x21, x0 G_M000_IG05: movz ldrh w0, #0xD1FFAB1E w4, [x1, #0x06] movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E orr movk x1, #0xD1FFAB1E LSL #16 w5, w4, # movk 2 x1 mov w6, #116 cmp w5, #99 , ccmp w4, w6, z, ne #0xD1FFAB1E bne G_M000_IG08 LSL #32 bl CORINFO_HELP_STRCNS cmp w3, mov x2, x0 #4 mov x1, x21 blo G_M000_IG19 add x1, x1, #8 mov x0, x20 movz sub w3, w3, #4 str x1, [fp, #0x18] x3, str #0xD1FFAB1E w3, movk x3, #0xD1FFAB1E LSL #16 [fp movk x3, #0xD1FFAB1E LSL #32 , ldr x3, [x3] #0x20] blr x3 mov x0, x20 add x4, fp, #24 bl CORINFO_HELP_THROW ldr x1, [x4] ldr w3, [x4 G_M000_IG14: , #0x08] mov x0, x20 cmp w3, #4 ldr x1, [x20] blt G_M000_IG08 G_M000_IG06: ldr ldr x1, [x1, #0xB0] x1, [x1] ldr x1, [x1 movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 ] bne G_M000_IG08 G_M000_IG07: blr x1 add w0, w20, #8 cbz w0, G_M000_IG15 cmp w0, w2 movz x0, #40 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp movk x0, #0xD1FFAB1E LSL #16w3, #7 bls movk x0, #0xD1FFAB1E LSL #32 G_M000_IG17 bl CORINFO_HELP_NEWSFAST str mov x21, x0 x1, [fp, movz x0, #0xD1FFAB1E # movk x0, #0xD1FFAB1E LSL #16 0x48] movk x0, #0xD1FFAB1E LSL #32 ldr str w3, [fp, #0x50] x0, [x0] add x0, fp, #72 blr x0 mov x20, x0 ldr x4, [x0] movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ldr movk x1, #0xD1FFAB1E LSL #32 w0, bl CORINFO_HELP_STRCNS [x0, #0x08] mov x2, x0 cmp w0, #4 mov x1, x20 mov x0, x21 blt G_M000_IG17 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 G_M000_IG09: movk x3, #0xD1FFAB1E LSL #32 ldr x0, [x4] ldr x3, [x3] movz x4, #116 blr x3 movk x4, #116 LSL #16 mov x0, x21 bl CORINFO_HELP_THROW movk x4, #116 LSL #32 G_M000_IG15: movk x4, #97 LSL #48 mov x0, x21 cmp x0, x4 mov w1, #31 bne G_M000_IG17 movz G_M000_IG10: x2, #0xD1FFAB1E ldrh w4, [x1, #0x08] movk x2, #0xD1FFAB1E LSL #16 mov w0, #103 movk x2, #0xD1FFAB1E LSL #32 mov w5, #116 ldr x2, [x2] blr x2 cmp w4, #97 ccmp w4, w0, z, ne ldr ccmp w4, w5, z, ne x0, bne [x21, #0x10] G_M000_IG17 mov x1, x20 cmp ldr x2, [x0] w3, #5 ldr x2, [x2, #0x68] ldr x2, [x2, #0x20] blo G_M000_IG19 blr x2 sxtw w1, w0 add mov x0, x21 x0, x1, #10 movz x2, #0xD1FFAB1E sub w1, w3, #5 movk x2, #0xD1FFAB1E LSL #16 str movk x2, #0xD1FFAB1E LSL #32 x0, [fp, #0x38] ldr x2, [x2] str w1, [fp, #0x40] blr x2 add x0, fp, #56 add w24, w24, #1 ldr x1, [x0] ldr ldr w0, [x0, #0x08] w0, [x19, #0x08] cmp w0, cmp w0, w24 #3 ble G_M000_IG04 blt G_M000_IG17 G_M000_IG16: add G_M000_IG11: x0, x19, # ldr w0, [x1] 16 movz w3, #99 movk w3, #99 LSL #16 ldr x20, [x0, w24, UXTW #3] eor cbnz x20, G_M000_IG13 w0, w0, w3 movz w0, #0xD1FFAB1E ldr w1, [x1, #0x02] movz w3, #99 movk w0, #1 LSL #16 movk w3, #116 LSL #16 movz x1, #0xD1FFAB1E eor w1, w1, w3 movk orr w0, w0, w1 x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cbnz w0, bl G_M000_IG17 CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E G_M000_IG12: movk x1, #0xD1FFAB1E LSL #16 add movk x1, #0xD1FFAB1E LSL #32 w0, w20, #8 ldr x1, [x1] cmp w0, w2 blr x1 bhi brk_windows #0 G_M000_IG19 ; Total bytes of code 1004 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 1622: JIT compiled System.Reflection.Emit.SignatureHelper:AddOneArgTypeHelper(System.Type,System.Type[],System.Type[]) [Tier1 with Static PGO, IL size=240, code size=1004] ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1623: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex81_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,byte):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x18] mov x19, x0 mov w20, w2 G_M000_IG02: ldr w1, [x19, #0x58] add w1, w1, #4 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG04 G_M000_IG03: ldr w0, [x21, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] add w2, w1, #1 str w2, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, #16 strb w20, [x0, w1, UXTW #2] G_M000_IG05: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 224 1624: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,byte) [Tier1, IL size=41, code size=224] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Add():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #88 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1625: JIT compiled System.Text.RegularExpressions.RegexCompiler:Add() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex82_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1626: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex82_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexTreeAnalyzer:g__TryAnalyze|0_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.AnalysisResults,bool,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 26 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x48] stp x21, x22, [sp, #0x58] stp x23, x24, [sp, #0x68] stp x25, x26, [sp, #0x78] str x27, [sp, #0x88] mov fp, sp mov x19, x0 mov x20, x1 mov w22, w2 mov w21, w3 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbnz w0, G_M000_IG05 G_M000_IG03: mov w0, wzr G_M000_IG04: ldr x27, [sp, #0x88] ldp x25, x26, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG05: ldrb w0, [x20, #0x31] ldr w1, [x19, #0x28] and w2, w1, #1 orr w0, w0, w2 strb w0, [x20, #0x31] ldrb w0, [x20, #0x32] tst w1, #64 cset x1, ne orr w0, w0, w1 strb w0, [x20, #0x32] tst w21, #255 beq G_M000_IG07 mov x1, x20 ldr x0, [x1, #0x20] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x0, #24 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldrsb wzr, [x0] add x2, fp, #64 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: uxtb w22, w22 cbz w22, G_M000_IG08 ldr x0, [x20, #0x08] ldrsb wzr, [x0] add x2, fp, #56 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG12 G_M000_IG08: ldrb w0, [x19, #0x2E] sub w1, w0, #3 cmp w1, #5 bls G_M000_IG09 cmp w0, #24 beq G_M000_IG10 sub w0, w0, #26 cmp w0, #1 bhi G_M000_IG12 ldp w0, w1, [x19, #0x20] cmp w0, w1 bne G_M000_IG10 b G_M000_IG12 G_M000_IG09: ldp w0, w1, [x19, #0x20] cmp w0, w1 beq G_M000_IG12 G_M000_IG10: mov x1, x20 ldr x0, [x1, #0x18] cbnz x0, G_M000_IG11 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x0, #24 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG11: ldrsb wzr, [x0] add x2, fp, #48 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG12: mov w23, wzr ldrb w2, [x19, #0x2E] sub w2, w2, #26 cmp w2, #6 bhi G_M000_IG16 mov w2, w2 adr x0, [@RWD00] ldr w0, [x0, x2, LSL #2] adr x1, [G_M000_IG02] add x0, x0, x1 br x0 G_M000_IG13: mov w23, #1 b G_M000_IG16 G_M000_IG14: ldr x0, [x20, #0x10] ldrsb wzr, [x0] add x2, fp, #40 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG16 G_M000_IG15: mov w21, #1 G_M000_IG16: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w24, w0 mov w25, wzr cmp w24, #0 ble G_M000_IG36 G_M000_IG17: ldr x26, [x19, #0x08] cbz x26, G_M000_IG19 G_M000_IG18: ldr x0, [x26] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG23 G_M000_IG19: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG22 G_M000_IG20: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG22 G_M000_IG21: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG22: ldr w3, [x2, #0x10] cmp w25, w3 bhs G_M000_IG40 ldr x3, [x2, #0x08] ldr w0, [x3, #0x08] cmp w25, w0 bhs G_M000_IG41 add x3, x3, #16 ldr x27, [x3, w25, UXTW #3] b G_M000_IG24 G_M000_IG23: mov x27, x26 G_M000_IG24: orr w3, w22, w23 uxtb w2, w3 cbz w2, G_M000_IG30 G_M000_IG25: ldrb w2, [x19, #0x2E] sub w26, w2, #24 cmp w26, #10 bhi G_M000_IG29 mov w0, w26 adr x1, [@RWD28] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG26: mov w2, #1 b G_M000_IG30 G_M000_IG27: sub w2, w24, #1 cmp w25, w2 cset x2, eq b G_M000_IG30 G_M000_IG28: ldr w0, [x19, #0x24] cmp w0, #1 beq G_M000_IG26 G_M000_IG29: mov w2, wzr G_M000_IG30: uxtb w3, w21 mov x0, x27 mov x1, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG38 ldr x0, [x20, #0x10] ldrsb wzr, [x0] mov x1, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbnz w0, #31, G_M000_IG32 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows G_M000_IG31: ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ldr x0, [x20, #0x10] ldrsb wzr, [x0] add x2, fp, #32 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG32: cbnz w23, G_M000_IG35 G_M000_IG33: ldr x0, [x20, #0x18] cbz x0, G_M000_IG35 mov x1, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbnz w0, #31, G_M000_IG35 mov x1, x20 ldr x0, [x1, #0x18] cbnz x0, G_M000_IG34 movz x0, #0xD1FFAB1E G_M000_IG01: movk x0, #0xD1FFAB1E LSL #16 stp fp, lr, [sp, #-0x50]! movk x0, #0xD1FFAB1E LSL #32 stp bl x19, x20, [sp, #0x18] CORINFO_HELP_NEWSFAST stp x21, x22, [sp, #0x28] movz x14, #0xD1FFAB1E stp x23, x24, [sp, #0x38] movk x14, #0xD1FFAB1E LSL #16 str movk x14, #0xD1FFAB1E LSL #32 x25, [sp, #0x48] ldr x15, [x14] mov fp, sp add x14, x0, #24 mov x19, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #24 G_M000_IG02: mov x15, x0 ldr bl CORINFO_HELP_ASSIGN_REF w20, [x19, #0x4C] G_M000_IG34: sxtw w21, w2 ldrsb wzr, [x0] sub add x2, fp, #24 w0, w21, #8 mov x1, x19 cmp movz x3, #0xD1FFAB1E w20, w0 movk x3, #0xD1FFAB1E LSL #16 ble G_M000_IG05 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG03: blr x3 str w21, [x19, #0x4C] G_M000_IG35: mov w0, wzr add w25, w25, #1 cmp w25, w24 G_M000_IG04: blt G_M000_IG17 ldr x25, [sp, #0x48] G_M000_IG36: mov w0, #1 ldp G_M000_IG37: x23, x24, [sp ldr x27, [sp, #0x88] , # ldp 0x38]x25, x26, [sp, #0x78] ldp x23, x24, [sp, #0x68] ldp ldp x21, x22, [sp, #0x58] ldp x19, x20, [sp, #0x48] ldp fp, lr, [sp], #x21, x22, [sp, #0x28] 0x90 ldp x19, x20, [sp, #0x18] ret lr ldp fp, lr, [sp], #0x50 G_M000_IG38: ret mov w0, wzr lr G_M000_IG39: ldr x27, [sp, #0x88] G_M000_IG05: ldp x25, x26, [sp, #0x78] cmp w20, w21 ldp x23, x24, [sp, #0x68] bhi ldp x21, x22, [sp, #0x58] G_M000_IG12 ldp x19, x20, [sp, #0x48] ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 ldp mov w24, wzr fp, lr, [sp], # sub w25, w23, #7 0x90 cmp w25, #0 ret lr ble G_M000_IG03 G_M000_IG40: G_M000_IG06: movz x0, #0xD1FFAB1E add w0, w24, #1 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp w0, w23 ldr bhi G_M000_IG12 x0, [x0] ubfiz x1, x0, #1, #32 blr add x1, x22, x1 x0 sub w3, w23, w0 brk_windows mov x0, x1 mov w1, #103 #0 G_M000_IG41: mov w2, #116 movz x4, #0xD1FFAB1E bl movk x4, #0xD1FFAB1E LSL #16 CORINFO_HELP_RNGCHKFAIL movk x4, #0xD1FFAB1E LSL #32 brk_windows ldr #0 x4, [x4] blr x4 add w24, w24, w0 RWD00 tbnz dd G_M000_IG15 - G_M000_IG02 w0, #31, G_M000_IG03 dd G_M000_IG15 - G_M000_IG02 add w1, w24, #5 dd G_M000_IG14 - G_M000_IG02 cmp w1, w23 dd G_M000_IG16 - G_M000_IG02 bhs G_M000_IG03 dd G_M000_IG13 - G_M000_IG02 add w0, w24, #2 dd G_M000_IG13 - G_M000_IG02 cmp w0, w23 dd G_M000_IG13 - G_M000_IG02 bhs G_M000_IG13 RWD28 ldrh dd G_M000_IG26 - G_M000_IG02 w0, [x22 dd G_M000_IG27 - G_M000_IG02 , w0, UXTW #2] dd G_M000_IG28 - G_M000_IG02 mov w2, #116 dd G_M000_IG28 - G_M000_IG02 cmp w0, #103 dd G_M000_IG26 - G_M000_IG02 ccmp w0, w2, z, ne dd G_M000_IG29 - G_M000_IG02 bne G_M000_IG08 dd G_M000_IG26 - G_M000_IG02 G_M000_IG07: dd G_M000_IG26 - G_M000_IG02 ldrh w0, [x22, w1, UXTW #2] dd G_M000_IG26 - G_M000_IG02 orr w0, w0, dd G_M000_IG26 - G_M000_IG02 #2 cmp w0, #99 dd G_M000_IG26 - G_M000_IG02 beq G_M000_IG10 ; Total bytes of code 1156 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] 1627: JIT compiled System.Text.RegularExpressions.RegexTreeAnalyzer:g__TryAnalyze|0_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.AnalysisResults,bool,bool) [Tier1, IL size=546, code size=1156] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1628: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:Contains(System.__Canon):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, ge G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 1629: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:Contains(System.__Canon) [Tier1, IL size=14, code size=44] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:FindItemIndex(System.__Canon):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 381590 ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp str x0, [fp, #0x10] mov x19, x0 mov x20, x1 G_M000_IG02: ldr x0, [x19, #0x08] cbz x0, G_M000_IG13 G_M000_IG03: ldr x21, [x19, #0x10] mov w22, wzr ldr x23, [x19, #0x18] cbz x20, G_M000_IG17 G_M000_IG04: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x11, [x1, #0x58] cbz x11, G_M000_IG06 G_M000_IG05: b G_M000_IG07 G_M000_IG06: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x11, x0 G_M000_IG07: mov x0, x23 mov x1, x20 ldr x2, [x11] blr x2 sxtw w24, w0 G_M000_IG08: ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] sxtw w2, w1 ldr x3, [x19, #0x20] mov w4, w24 mul x3, x3, x4 lsr x3, x3, #32 add x3, x3, #1 mov w2, w2 mul x2, x3, x2 lsr x2, x2, #32 cmp w2, w1 bhs G_M000_IG22 add x0, x0, #16 ubfiz x1, x2, #2, #32 add x0, x0, x1 ldr w0, [x0] sub w25, w0, #1 tbnz w25, #31, G_M000_IG13 G_M000_IG09: ldr w26, [x21, #0x08] G_M000_IG10: cmp w25, w26 bhs G_M000_IG22 ubfiz x0, x25, #4, #32 add x0, x0, #16 add x27, x21, x0 ldr w0, [x27, #0x08] cmp w0, w24 beq G_M000_IG15 G_M000_IG11: ldr w25, [x27, #0x0C] add w22, w22, #1 cmp w26, w22 blo G_M000_IG21 G_M000_IG12: tbz w25, #31, G_M000_IG10 G_M000_IG13: movn w0, #0 G_M000_IG14: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG15: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x11, [x1, #0x60] cbz x11, G_M000_IG18 G_M000_IG16: b G_M000_IG19 G_M000_IG17: mov w24, wzr b G_M000_IG08 G_M000_IG18: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x11, x0 G_M000_IG19: ldr x1, [x27] mov x0, x23 mov x2, x20 ldr x3, [x11] blr x3 cbz w0, G_M000_IG11 mov w0, w25 G_M000_IG20: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG21: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG22: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 432 1630: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:FindItemIndex(System.__Canon) [Tier1 with Static PGO, IL size=260, code size=432] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:Add(System.__Canon):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; fp based frame ; partially interruptible ; No PGO data ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: add x2, fp, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 1631: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:Add(System.__Canon) [Tier1, IL size=10, code size=40] G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1632: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex82_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:AddIfNotPresent(System.__Canon,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 149386 ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp str x0, [fp, #0x18] mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: ldr x0, [x19, #0x08] cbz x0, G_M000_IG06 G_M000_IG03: ldp x22, x23, [x19, #0x10] mov w24, wzr cbz x20, G_M000_IG27 G_M000_IG04: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x11, [x1, #0x58] cbz x11, G_M000_IG08 G_M000_IG05: b G_M000_IG09 G_M000_IG06: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG03 G_M000_IG07: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x11, x0 b G_M000_IG24 G_M000_IG08: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x11, x0 G_M000_IG09: mov x0, x23 mov x1, x20 ldr x2, [x11] blr x2 sxtw w25, w0 G_M000_IG10: ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] sxtw w2, w1 ldr x3, [x19, #0x20] mov w4, w25 mul x3, x3, x4 lsr x3, x3, #32 add x3, x3, #1 mov w2, w2 mul x2, x3, x2 lsr x2, x2, #32 cmp w2, w1 bhs G_M000_IG31 add x0, x0, #16 ubfiz x1, x2, #2, #32 add x26, x0, x1 ldr w0, [x26] sub w27, w0, #1 tbnz w27, #31, G_M000_IG15 G_M000_IG11: ldr wzr, [x22, #0x08] G_M000_IG12: ldr w0, [x22, #0x08] cmp w27, w0 bhs G_M000_IG31 ubfiz x0, x27, #4, #32 add x0, x0, #16 add x28, x22, x0 ldr w0, [x28, #0x08] cmp w0, w25 beq G_M000_IG21 G_M000_IG13: ldr w27, [x28, #0x0C] add w24, w24, #1 ldr w0, [x22, #0x08] cmp w0, w24 blo G_M000_IG29 G_M000_IG14: tbz w27, #31, G_M000_IG12 G_M000_IG15: ldr w0, [x19, #0x30] cmp w0, #0 bgt G_M000_IG26 G_M000_IG16: ldr w28, [x19, #0x28] ldr w0, [x22, #0x08] cmp w0, w28 beq G_M000_IG23 G_M000_IG17: add w14, w28, #1 str w14, [x19, #0x28] ldr x22, [x19, #0x10] G_M000_IG18: ldr w14, [x22, #0x08] cmp w28, w14 bhs G_M000_IG31 ubfiz x14, x28, #4, #32 add x14, x14, #16 add x14, x22, x14 str w25, [x14, #0x08] ldr w15, [x26] sub w15, w15, #1 str w15, [x14, #0x0C] mov x15, x20 bl CORINFO_HELP_CHECKED_ASSIGN_REF add w0, w28, #1 str w0, [x26] ldr w0, [x19, #0x34] add w0, w0, #1 str w0, [x19, #0x34] str w28, [x21] cmp w24, #100 bhi G_M000_IG30 G_M000_IG19: mov w0, #1 G_M000_IG20: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG21: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x11, [x1, #0x60] cbz x11, G_M000_IG07 G_M000_IG22: b G_M000_IG24 G_M000_IG23: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] sxtw w12, w15 ldr xip0, [x19, #0x20] mov w0, w25 mul xip0, xip0, x0 lsr xip0, xip0, #32 add xip0, xip0, #1 mov w12, w12 mul x12, xip0, x12 lsr x12, x12, #32 cmp w12, w15 bhs G_M000_IG31 add x14, x14, #16 ubfiz x15, x12, #2, #32 add x26, x14, x15 b G_M000_IG17 G_M000_IG24: ldr x1, [x28] mov x0, x23 mov x2, x20 ldr x3, [x11] blr x3 cbz w0, G_M000_IG28 str w27, [x21] mov w0, wzr G_M000_IG25: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG26: ldr w14, [x19, #0x2C] sxtw w28, w14 ldr w15, [x19, #0x30] sub w15, w15, #1 str w15, [x19, #0x30] ldr w15, [x22, #0x08] cmp w14, w15 bhs G_M000_IG31 ubfiz x14, x14, #4, #32 add x14, x14, #16 add x14, x22, x14 ldr w14, [x14, #0x0C] neg w14, w14 sub w14, w14, #3 str w14, [x19, #0x2C] b G_M000_IG18 G_M000_IG27: mov w25, wzr b G_M000_IG10 G_M000_IG28: ldr w27, [x28, #0x0C] add w24, w24, #1 ldr w0, [x22, #0x08] cmp w0, w24 bhs G_M000_IG14 G_M000_IG29: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG30: mov x1, x23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG19 ldr w1, [x22, #0x08] mov x0, x19 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [x21] b G_M000_IG19 G_M000_IG31: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 884 1633: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:AddIfNotPresent(System.__Canon,byref) [Tier1 with Static PGO, IL size=500, code size=884] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DeclareInt32():System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1634: JIT compiled System.Text.RegularExpressions.RegexCompiler:DeclareInt32() [Tier1, IL size=22, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex83_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1635: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex83_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitNode|12(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x58] stp x21, x22, [sp, #0x68] str x23, [sp, #0x78] mov fp, sp add x9, fp, #16 movi G_M000_IG01: v16.16b, #0 stp q16, q16, [x9] stp stp fp, lr, [sp, q16, q16, [x9, #0x20] #-0x50]! str xzr, [x9, #0x40] mov x19, x0 stp mov x20, x1 x19 mov x21, x2 , x20, [sp, #0x18] mov stp x21, x22, [sp, #0x28] stp x23 w22, w3 , x24, [sp, #0x38] str G_M000_IG02: x25, [sp, #0x48] ldr mov x23, [x19, #0x08] fp, sp ldr x0, [x23, #0x10] ldr x0, [x0, #0x10] mov ldr w1, [x0, #0x20] cmp w1, #18 bne G_M000_IG08 G_M000_IG03: x19 add x1, x0, #24 , ldp x0 q16, q17, [x1, #0x30] stp G_M000_IG02: q16, q17, [fp, #0x30] ldr ldr x2, [x1, #0x50] w20, [x19, #0x4C] str sxtw w21, w2 x2, [fp, #0x50] sub w0, w21, #8 G_M000_IG04: add cmp w20, w0 x0, fp, #48 ble G_M000_IG05 ldrb G_M000_IG03: w1, str w21, [x19, #0x4C] [ mov w0, wzr fp, #0x30] G_M000_IG04: ldr x25, [sp, #0x48] cbnz w1, G_M000_IG05 ldp mov x1, xzr x23, x24, [sp, #0x38] b G_M000_IG07 G_M000_IG05: ldp x21, x22, [sp, #0x28] sub x1, x0, #8 ldp x19, x20, [sp, #0x18] ldp ldp fp, lr, [sp], #0x50 q16, q17, [x1, #0x10] ret lr stp G_M000_IG05: q16, q17, [fp, #0x10] cmp w20, w21 G_M000_IG06: bhi G_M000_IG12 ldr ubfiz x0, x20, #1, #32 x1, [fp, #0x10] add x22, x1, x0 G_M000_IG07: sub w23, w21, w20 cmp mov w24, wzr x1, x20 sub w25, w23, #7 cmp w25, #0 bne G_M000_IG08 movz x0, #0xD1FFAB1E ble G_M000_IG03 movk x0, #0xD1FFAB1E LSL #16 G_M000_IG06: movk x0, #0xD1FFAB1E LSL #32 add w0, ldr x1, [x0w24, #3 ] cmp ldr x22, [x19, #0x18]w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 mov sub w3, w23, w0 x0, x23 mov x0, x1 movz x2, #0xD1FFAB1E mov w1, #97 movk x2, #0xD1FFAB1E LSL #16 mov w2, #103 movk x2, #0xD1FFAB1E LSL #32 ldr movz x4, #0xD1FFAB1E x2, [x2] movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 blr x2 ldr x4, [x4] blr x4 mov x0, x23 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 mov x1, x22 add w1, w24, #6 movz x2, #0xD1FFAB1E cmp w1, w23 movk x2, #0xD1FFAB1E LSL #16 bhs G_M000_IG03 movk x2, #0xD1FFAB1E LSL #32 add w2, w24, #1 ldr x2, [x2] cmp w2, w23 blr x2 bhs G_M000_IG13 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL ldrh #16 w0, [x22, w2, UXTW #2] movk x1, #0xD1FFAB1E LSL #32 mov w3, #116 ldr x1 , [x1] cmp w0, #103 blr x1 b G_M000_IG31 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG08: bl G_M000_IG07: ldrh w0, [x22, w1, UXTW #2]System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbnz w0, G_M000_IG09 orr w0, w0, movz x0, #0xD1FFAB1E #2 movk x0, #0xD1FFAB1E LSL #16 cmp w0, #99 movk x0, #0xD1FFAB1E LSL #32 beq G_M000_IG10 bl CORINFO_HELP_NEWSFAST G_M000_IG08: add sxtw w24, w2 x14, x0, #8 cmp w24, w25 mov x15, x19 blt G_M000_IG06 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: movz x4, #0xD1FFAB1E b G_M000_IG03 movk x4, #0xD1FFAB1E LSL #16 G_M000_IG10: movk x4, #0xD1FFAB1E LSL #32 add w0, w20, w24 str str x4, [x0, #0x18] w0, [x19, #0x4C] uxtb mov w0, #1 w4, w22 G_M000_IG11: mov x1, x0 mov x2, x20 ldr x25, [sp, #0x48] mov x3, x21 ldp movz x0, #0xD1FFAB1E x23, movk x0, #0xD1FFAB1E LSL #16 x24, [sp, #0x38] movk x0, #0xD1FFAB1E LSL #32 ldp x21, x22, [sp, #0x28] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldp x19, x20, [sp, #0x18] ldr ldp fp, lr, [sp]x5, [x5] , #0x50 blr ret lr x5 G_M000_IG12: b G_M000_IG31 G_M000_IG09: movz x0, #0xD1FFAB1E ldr movk x0, #0xD1FFAB1E LSL #16 w0, movk x0, #0xD1FFAB1E LSL #32 [x20, #0x28] tbz w0, #6, G_M000_IG10 ldr ldr x0, [x0] w0 blr x0 , [x19, #0x38] brk_windows #0 cmp w0, #0 G_M000_IG13: ble G_M000_IG10 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E bl movk x2, #0xD1FFAB1E LSL #16 CORINFO_HELP_RNGCHKFAIL movk x2, #0xD1FFAB1E LSL #32 brk_windows #0 ldr ; Total bytes of code 324 x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] 1636: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG10: ldrb w0, [x20, #0x2E] sub w0, w0, #3 cmp w0, #43 bhi G_M000_IG31 mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG11: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG12: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG13: ldr w3, [x20, #0x28] tst w3, #64 cset x3, ne ldr x1, [x20, #0x10] uxtb w2, w22 mov x0, x19 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG14: uxtb w2, w22 mov x0, x19 mov x1, x20 mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG15: uxtb w3, w22 mov x0, x19 mov x1, x20 mov x2, x21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG16: uxtb w3, w22 mov x0, x19 mov x1, x20 mov x2, x21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG17: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG18: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG19: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG20: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG21: uxtb w3, w22 mov x0, x19 mov x1, x20 mov x2, x21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG31 G_M000_IG22: mov x0, x19 mov x1, x20 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG23: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG24: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG25: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG26: mov x0, x19 mov x1, x20 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG31 G_M000_IG27: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG28: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG29: ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG31 G_M000_IG30: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG31: ldr x23, [sp, #0x78] ldp x21, x22, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x80 ret lr RWD00 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 ; Total bytes of code 1256 1637: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitNode|12(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool) [Tier1, IL size=524, code size=1256] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1638: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex83_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex84_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1639: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex84_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1640: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1641: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex84_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex85_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1642: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex85_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1643: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1644: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex85_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex86_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1645: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex86_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1646: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1647: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex86_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex87_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1648: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex87_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1649: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1650: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex87_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex88_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1651: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex88_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1652: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1653: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex88_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex89_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1654: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex89_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1655: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1656: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex89_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex90_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1657: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex90_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1658: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1659: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex90_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadPilotStop(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1660: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadPilotStop(long) [Tier0, IL size=9, code size=56] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:AddWithResize(BenchmarkDotNet.Reports.Measurement):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] str w1, [fp, #0x1C] ldr w1, [fp, #0x1C] add w1, w1, #1 ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x10] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x20] ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 136 1661: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:AddWithResize(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=39, code size=136] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cbz w0, G_M000_IG03 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 str w0, [fp, #0x1C] b G_M000_IG04 G_M000_IG03: mov w0, #4 str w0, [fp, #0x1C] G_M000_IG04: ldr w0, [fp, #0x1C] str w0, [fp, #0x20] ldr w0, [fp, #0x20] movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bls G_M000_IG05 movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 str w0, [fp, #0x20] G_M000_IG05: ldr w0, [fp, #0x20] ldr w1, [fp, #0x24] cmp w0, w1 bge G_M000_IG06 ldr w0, [fp, #0x24] str w0, [fp, #0x20] G_M000_IG06: ldr x0, [fp, #0x28] ldr w1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 164 1662: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Grow(int) [Tier0, IL size=53, code size=164] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:set_Capacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr w0, [fp, #0x24] ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] cmp w0, w1 bge G_M000_IG03 mov w0, #7 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldr w1, [fp, #0x24] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w0, [x0, #0x08] cmp w1, w0 beq G_M000_IG07 ldr w1, [fp, #0x24] cmp w1, #0 ble G_M000_IG06 ldr w1, [fp, #0x24] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x18] ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x2, [fp, #0x28] ldr w2, [x2, #0x10] ldr x1, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] ldr x14, [fp, #0x28] add x14, x14, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 248 1663: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:set_Capacity(int) [Tier0, IL size=86, code size=248] ; Assembly listing for method BenchmarkDotNet.Engines.EngineStage:WriteLine():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 1664: JIT compiled BenchmarkDotNet.Engines.EngineStage:WriteLine() [Tier0, IL size=12, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:.ctor(long,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x28] ldr x15, [fp, #0x20] str x15, [x14, #0x08] ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 52 1665: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:.ctor(long,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=15, code size=52] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:get_PerfectInvocationCount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1666: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:get_PerfectInvocationCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:get_Measurements():System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1667: JIT compiled BenchmarkDotNet.Engines.EnginePilotStage+PilotStageResult:get_Measurements() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:CopyTo(BenchmarkDotNet.Reports.Measurement[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr x4, [fp, #0x28] ldr w4, [x4, #0x10] ldr x2, [fp, #0x20] ldr w3, [fp, #0x1C] mov w1, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 76 1668: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:CopyTo(BenchmarkDotNet.Reports.Measurement[],int) [Tier0, IL size=21, code size=76] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_EvaluateOverhead():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0, #0xB9] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1669: JIT compiled BenchmarkDotNet.Engines.Engine:get_EvaluateOverhead() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_UnrollFactor():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0xB0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1670: JIT compiled BenchmarkDotNet.Engines.Engine:get_UnrollFactor() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.EngineWarmupStage:RunWorkload(long,int,int):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w4, [fp, #0x18] ldr w3, [fp, #0x1C] mov w2, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 72 1671: JIT compiled BenchmarkDotNet.Engines.EngineWarmupStage:RunWorkload(long,int,int) [Tier0, IL size=11, code size=72] ; Assembly listing for method BenchmarkDotNet.Engines.EngineWarmupStage:Run(long,int,int,int):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] str w3, [fp, #0x38] str w4, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x20] ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x48] ldr x0, [x0, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] ldr w3, [fp, #0x3C] ldr w4, [fp, #0x34] ldr x5, [fp, #0x20] ldr x5, [x5] ldr x5, [x5, #0x40] ldr x5, [x5, #0x30] blr x5 str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x28] ldr x2, [fp, #0x40] ldr w3, [fp, #0x3C] ldr w5, [fp, #0x38] mov w4, #2 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 244 1672: JIT compiled BenchmarkDotNet.Engines.EngineWarmupStage:Run(long,int,int,int) [Tier0, IL size=48, code size=244] ; Assembly listing for method BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 1673: JIT compiled BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 1674: JIT compiled BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:CreateWarmup(BenchmarkDotNet.Jobs.Job,BenchmarkDotNet.Characteristics.IResolver,int,int):BenchmarkDotNet.Engines.IStoppingCriteria:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str w3, [fp, #0x34] str w4, [fp, #0x30] G_M000_IG02: ldr w0, [fp, #0x34] cbz w0, G_M000_IG04 ldr w0, [fp, #0x34] cmp w0, #1 beq G_M000_IG06 G_M000_IG03: b G_M000_IG08 G_M000_IG04: ldr x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] ldr w3, [fp, #0x30] ldr x4, [fp, #0x48] ldr x4, [x4] ldr x4, [x4, #0x40] ldr x4, [x4, #0x20] blr x4 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x34] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x2, [fp, #0x28] ldr x0, [fp, #0x20] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 264 1675: JIT compiled BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:CreateWarmup(BenchmarkDotNet.Jobs.Job,BenchmarkDotNet.Characteristics.IResolver,int,int) [Tier0, IL size=45, code size=264] ; Assembly listing for method BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:CreateWarmupWorkload(BenchmarkDotNet.Jobs.Job,BenchmarkDotNet.Characteristics.IResolver,int):BenchmarkDotNet.Engines.IStoppingCriteria:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str wzr, [fp, #0x34] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] str w3, [fp, #0x44] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG03 add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmn w0, #1 bne G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x44] cmp w0, #2 bne G_M000_IG06 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x1C] ldr w1, [fp, #0x1C] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x50] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x50] ldr x2, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 str w0, [fp, #0x34] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x30] ldr w2, [fp, #0x34] mov w3, #4 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x28] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 420 1676: JIT compiled BenchmarkDotNet.Engines.DefaultStoppingCriteriaFactory:CreateWarmupWorkload(BenchmarkDotNet.Jobs.Job,BenchmarkDotNet.Characteristics.IResolver,int) [Tier0, IL size=81, code size=420] ; Assembly listing for method BenchmarkDotNet.Engines.FixedStoppingCriteria:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x48] str w1, [fp, #0x44] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x48] ldr w1, [fp, #0x44] str w1, [x0, #0x28] add x0, fp, #24 mov w1, #47 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #24 ldr w1, [fp, #0x44] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x48] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 248 1677: JIT compiled BenchmarkDotNet.Engines.FixedStoppingCriteria:.ctor(int) [Tier0, IL size=69, code size=248] ; Assembly listing for method BenchmarkDotNet.Engines.StoppingCriteriaBase:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x20] ldr x2, [fp, #0x20] ldr x1, [fp, #0x58] ldr x0, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x58] add x14, x14, #8 ldr x15, [fp, #0x48] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x58] ldr x0, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x58] add x14, x14, #16 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x58] add x14, x14, #24 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 488 1678: JIT compiled BenchmarkDotNet.Engines.StoppingCriteriaBase:.ctor() [Tier0, IL size=78, code size=488] ; Assembly listing for method BenchmarkDotNet.Engines.EngineStage:Run(BenchmarkDotNet.Engines.IStoppingCriteria,long,int,int,int):System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xD0]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str x0, [fp, #0xC8] str x1, [fp, #0xC0] str x2, [fp, #0xB8] str w3, [fp, #0xB4] str w4, [fp, #0xB0] str w5, [fp, #0xAC] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] ldr x0, [fp, #0xC0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x44] ldr w1, [fp, #0x44] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x90] str x0, [fp, #0xA0] ldr x0, [fp, #0xC0] ldr x1, [fp, #0xA0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str x0, [fp, #0x80] str x1, [fp, #0x88] mov w0, #0xD1FFAB1E str w0, [fp, #0x48] ldrb w0, [fp, #0x88] cbz w0, G_M000_IG04 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] G_M000_IG03: ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG04: str wzr, [fp, #0x9C] G_M000_IG05: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #72 mov w1, #36 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w8, [fp, #0x9C] add w8, w8, #1 str w8, [fp, #0x9C] add x8, fp, #96 ldr x0, [fp, #0xC8] ldr w1, [fp, #0xB4] ldr w2, [fp, #0xB0] ldr w3, [fp, #0x9C] ldr x4, [fp, #0xB8] ldr w5, [fp, #0xAC] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xA0] str x0, [fp, #0x18] ldp q16, q17, [fp, #0x60] stp q16, q17, [fp, #0x20] ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xC0] ldr x1, [fp, #0xA0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str x0, [fp, #0x50] str x1, [fp, #0x58] ldrb w0, [fp, #0x58] cbz w0, G_M000_IG05 ldr x0, [fp, #0xC8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xA0] G_M000_IG08: ldp fp, lr, [sp], #0xD0 ret lr ; Total bytes of code 460 1679: JIT compiled BenchmarkDotNet.Engines.EngineStage:Run(BenchmarkDotNet.Engines.IStoppingCriteria,long,int,int,int) [Tier0, IL size=81, code size=460] ; Assembly listing for method BenchmarkDotNet.Engines.StoppingCriteriaBase:get_MaxIterationCount():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 1680: JIT compiled BenchmarkDotNet.Engines.StoppingCriteriaBase:get_MaxIterationCount() [Tier0, IL size=12, code size=52] ; Assembly listing for method System.Lazy`1[int]:get_Value():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] dmb ishld cbz x0, G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] ldr w0, [x0, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 1681: JIT compiled System.Lazy`1[int]:get_Value() [Tier0, IL size=24, code size=76] ; Assembly listing for method System.Lazy`1[int]:CreateValue():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] dmb ishld str x0, [fp, #0x20] ldr x0, [fp, #0x20] cbz x0, G_M000_IG12 ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmp w0, #8 bhi G_M000_IG03 ldr w0, [fp, #0x1C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG11 G_M000_IG04: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG12 G_M000_IG05: ldr x0, [fp, #0x28] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG06: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG07: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG08: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG12 G_M000_IG09: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG12 G_M000_IG10: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG12 G_M000_IG11: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG12: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG13: ldp fp, lr, [sp], #0x30 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 400 1682: JIT compiled System.Lazy`1[int]:CreateValue() [Tier0, IL size=139, code size=400] ; Assembly listing for method System.Lazy`1[int]:ExecutionAndPublication(System.LazyHelper,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x18] add x3, sp, #64 str x3, [fp, #0x38] str x0, [fp, #0x30] str x1, [fp, #0x28] str w2, [fp, #0x24] G_M000_IG02: ldr x1, [fp, #0x28] str x1, [fp, #0x18] str wzr, [fp, #0x10] G_M000_IG03: add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] ldr x0, [x0, #0x08] dmb ishld ldr x1, [fp, #0x28] cmp x0, x1 bne G_M000_IG05 ldr w0, [fp, #0x24] uxtb w0, w0 cbz w0, G_M000_IG04 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG06 G_M000_IG04: ldr x0, [fp, #0x30] mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: b G_M000_IG08 G_M000_IG06: ldr x0, [fp, #0x38] bl G_M000_IG11 G_M000_IG07: b G_M000_IG10 G_M000_IG08: ldr x0, [fp, #0x38] bl G_M000_IG11 G_M000_IG09: nop G_M000_IG10: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: stp fp, lr, [sp, #-0x20]! add x3, fp, #64 str x3, [sp, #0x18] G_M000_IG12: ldr w0, [fp, #0x10] uxtb w0, w0 cbz w0, G_M000_IG13 ldr x0, [fp, #0x18] bl System.Threading.Monitor:Exit(System.Object) G_M000_IG13: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 240 1683: JIT compiled System.Lazy`1[int]:ExecutionAndPublication(System.LazyHelper,bool) [Tier0, IL size=54, code size=240] ; Assembly listing for method System.Lazy`1[int]:ViaFactory(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] add x2, sp, #96 str x2, [fp, #0x58] str x0, [fp, #0x50] str w1, [fp, #0x4C] G_M000_IG02: ldr x0, [fp, #0x50] ldr x0, [x0, #0x10] str x0, [fp, #0x40] ldr x0, [fp, #0x40] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x50] str xzr, [x0, #0x10] ldr x0, [fp, #0x40] ldr x0, [x0, #0x08] ldr x1, [fp, #0x40] ldr x1, [x1, #0x18] blr x1 ldr x1, [fp, #0x50] str w0, [x1, #0x18] ldr x0, [fp, #0x50] dmb ish str xzr, [x0, #0x08] b G_M000_IG05 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG07: str x0, [fp, #0x28] ldr x0, [fp, #0x28] str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w1, [fp, #0x4C] ldr x2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x50] add x14, x14, #8 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF bl CORINFO_HELP_RETHROW brk_windows #0 ; Total bytes of code 300 1684: JIT compiled System.Lazy`1[int]:ViaFactory(int) [Tier0, IL size=70, code size=300] ; Assembly listing for method BenchmarkDotNet.Engines.FixedStoppingCriteria:GetMaxIterationCount():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 1685: JIT compiled BenchmarkDotNet.Engines.FixedStoppingCriteria:GetMaxIterationCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.FixedStoppingCriteria:Evaluate(System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]):BenchmarkDotNet.Engines.StoppingResult:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x3C] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x3C] cmp w0, w1 ble G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp x1, x2, [x0, #0x08] stp x1, x2, [fp, #0x18] G_M000_IG04: ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: ldr x0, [fp, #0x48] ldr x0, [x0, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x0, [fp, #0x28] ldr x1, [fp, #0x30] G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 200 1686: JIT compiled BenchmarkDotNet.Engines.FixedStoppingCriteria:Evaluate(System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=32, code size=200] ; Assembly listing for method BenchmarkDotNet.Engines.StoppingResult:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: stp xzr, xzr, [fp, #0x10] add x0, fp, #16 mov w1, wzr mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x14, [x14] add x14, x14, #8 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 92 1687: JIT compiled BenchmarkDotNet.Engines.StoppingResult:.cctor() [Tier0, IL size=13, code size=92] ; Assembly listing for method BenchmarkDotNet.Engines.StoppingResult:.ctor(bool,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [fp, #0x28] ldr w15, [fp, #0x24] strb w15, [x14, #0x08] ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 52 1688: JIT compiled BenchmarkDotNet.Engines.StoppingResult:.ctor(bool,System.String) [Tier0, IL size=15, code size=52] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadWarmupStart(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #13 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1689: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadWarmupStart(long) [Tier0, IL size=10, code size=56] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex91_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1690: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex91_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1691: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1692: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex91_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex92_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1693: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex92_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1694: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1695: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex92_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex93_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1696: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex93_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1697: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1698: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex93_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex94_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1699: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex94_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1700: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1701: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex94_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex95_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1702: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex95_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1703: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1704: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex95_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex96_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1705: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex96_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1706: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1707: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex96_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex97_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1708: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex97_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1709: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1710: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex97_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex98_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1711: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex98_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1712: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1713: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex98_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex99_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1714: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex99_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1715: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1716: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex99_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex100_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1717: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex100_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1718: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1719: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex101_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1720: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex101_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1721: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1722: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex102_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1723: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex102_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1724: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1725: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex103_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1726: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex103_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1727: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1728: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex104_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1729: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex104_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1730: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1731: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex105_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1732: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex105_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1733: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1734: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex106_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1735: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex106_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1736: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1737: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex107_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1738: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex107_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1739: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1740: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex108_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1741: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex108_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1742: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1743: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex109_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1744: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex109_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1745: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1746: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex110_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1747: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex110_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1748: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1749: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex111_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1750: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex111_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1751: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1752: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex111_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex112_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1753: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex112_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1754: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1755: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex112_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex113_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1756: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex113_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1757: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1758: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex113_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex114_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1759: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex114_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1760: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1761: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex114_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex115_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1762: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex115_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1763: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1764: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex115_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex116_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1765: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex116_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1766: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1767: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex116_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex117_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1768: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex117_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1769: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1770: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex117_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex118_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1771: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex118_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1772: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1773: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex118_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex119_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1774: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex119_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1775: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1776: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex119_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex120_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1777: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex120_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1778: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1779: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex120_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex121_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1780: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex121_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1781: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1782: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex121_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex122_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1783: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex122_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1784: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1785: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex122_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex123_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1786: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex123_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1787: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1788: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex123_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex124_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1789: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex124_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1790: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1791: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex124_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex125_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1792: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex125_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1793: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1794: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex125_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex126_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1795: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex126_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1796: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1797: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex126_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex127_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1798: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex127_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1799: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1800: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex127_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex128_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1801: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex128_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1802: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1803: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex128_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ceq():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1804: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ceq() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex129_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1805: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex129_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1806: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr ; Assembly listing for method System.Diagnostics.Tracing.EventSource:WriteEventWithRelatedActivityIdCore(int,ulong,int,ulong):this x0, [x0] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 20 single block inlinees; 6 inlinees without PGO data blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1807: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex129_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x98] stp x21, x22, [sp, #0xA8] stp x23, x24, [sp, #0xB8] str x25, [sp, #0xC8] mov fp, sp add x5, sp, #208 str x5, [fp, #0x90] str x0, [fp, #0x10] str w1, [fp, #0x8C] mov x19, x2 mov w21, w3 mov x20, x4 G_M000_IG02: ldrb w3, [x0, #0x9D] cbz w3, G_M000_IG19 G_M000_IG03: ldr x3, [x0, #0x10] dmb ishld ldr w2, [x3, #0x08] cmp w1, w2 bhs G_M000_IG04 mov w2, #96 umull x2, w1, w2 add x2, x2, #16 add x22, x3, x2 ldrb w23, [x22, #0x55] mov x24, xzr movi v16.4s, #0 str q16, [fp, #0x78] movi v16.4s, #0 str q16, [fp, #0x68] cbz w23, G_M000_IG07 cbnz x19, G_M000_IG07 ldr w6, [x22, #0x40] tbnz w6, #1, G_M000_IG07 cmp w23, #1 bne G_M000_IG05 ldrh w3, [x22, #0x56] ldr x1, [x0, #0x08] ldr x2, [x22] ldr x0, [x0, #0x68] add x5, fp, #104 add x4, fp, #120 mov w7, #1 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] ldr wzr, [x0] blr x8 b G_M000_IG06 G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG05: cmp w23, #2 bne G_M000_IG06 ldrh w3, [x22, #0x56] ldr x1, [x0, #0x08] ldr x2, [x22] ldr x0, [x0, #0x68] add x4, fp, #120 mov w5, #1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 G_M000_IG06: ldr q16, [fp, #0x78] str q16, [fp, #0x28] ldr q16, [fp, #0x28] movi v17.4s, #0 cmeq v16.16b, v16.16b, v17.16b uminp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] add x1, fp, #120 cmn x0, #1 csel x24, x24, x1, eq ldr q16, [fp, #0x68] str q16, [fp, #0x18] ldr q16, [fp, #0x18] cmeq v16.16b, v16.16b, v17.16b uminp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] add x1, fp, #104 cmn x0, #1 csel x19, x19, x1, eq ldr x0, [fp, #0x10] G_M000_IG07: ldr w2, [x0, #0x94] tbnz w2, #3, G_M000_IG16 ldrb w2, [x22, #0x45] cbz w2, G_M000_IG09 ldr x2, [x0, #0x30] dmb ishld add x3, x22, #80 ldr x4, [x22, #0x30] ldr x7, [x2, #0x08] mov x0, x7 mov x1, x3 mov x2, x4 mov x3, x24 mov x4, x19 mov w5, w21 mov x6, x20 ldr x7, [x7] ldr x7, [x7, #0x48] ldr x7, [x7] blr x7 sxtw w23, w0 cbz w23, G_M000_IG09 ldr x1, [xpr, #0x58] ldr x1, [x1, #0x20] ldr w0, [x1, #0xD1FFAB1E] cmp w0, #2 blt G_M000_IG15 ldr x1, [x1, #0xD1FFAB1E] ldr x3, [x1, #0x10] cbz x3, G_M000_IG15 G_M000_IG08: str w23, [x3, #0xD1FFAB1E] ldr x1, [x22] ldr x0, [fp, #0x10] mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldr x0, [fp, #0x10] ldrb w2, [x22, #0x46] cbz w2, G_M000_IG11 ldr x2, [x0, #0x40] dmb ishld add x3, x22, #80 ldr x4, [x22, #0x30] ldr x7, [x2, #0x08] mov x0, x7 mov x1, x3 mov x2, x4 mov x3, x24 mov x4, x19 mov w5, w21 mov x6, x20 ldr x7, [x7] ldr x7, [x7, #0x48] ldr x7, [x7] blr x7 sxtw w25, w0 cbz w25, G_M000_IG11 ldr x1, [xpr, #0x58] ldr x1, [x1, #0x20] ldr w0, [x1, #0xD1FFAB1E] cmp w0, #2 blt G_M000_IG14 ldr x1, [x1, #0xD1FFAB1E] ldr x3, [x1, #0x10] cbz x3, G_M000_IG14 G_M000_IG10: str w25, [x3, #0xD1FFAB1E] ldr x1, [x22] ldr x0, [fp, #0x10] mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG11: ldr x0, [fp, #0x10] ldr x2, [x0, #0x28] dmb ishld cbz x2, G_M000_IG19 ldrb w2, [x22, #0x44] cbz w2, G_M000_IG19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 add x14, x22, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr w1, [fp, #0x8C] str w1, [x22, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [x22, #0x38] cbz x24, G_M000_IG12 ldr q16, [x24] str q16, [x22, #0x24] G_M000_IG12: cbz x19, G_M000_IG13 mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, x0, #52 ldr q16, [x19] str q16, [x0] G_M000_IG13: ldr x0, [fp, #0x10] mov x1, x22 mov w2, w21 mov x3, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG19 G_M000_IG14: mov w0, #2 bl CORINFO_HELP_GETSHARED_NONGCTHREADSTATIC_BASE_NOCTOR_OPTIMIZED mov x3, x0 b G_M000_IG10 G_M000_IG15: mov w0, #2 bl CORINFO_HELP_GETSHARED_NONGCTHREADSTATIC_BASE_NOCTOR_OPTIMIZED mov x3, x0 b G_M000_IG08 G_M000_IG16: ldrb w2, [x22, #0x45] cbnz w2, G_M000_IG17 ldrb w2, [x22, #0x46] cbz w2, G_M000_IG11 G_M000_IG17: stp xzr, xzr, [fp, #0x38] str xzr, [fp, #0x48] ldr x2, [x22, #0x58] str x2, [fp, #0x38] mov w2, #1 strb w2, [fp, #0x4A] ldrb w2, [x22, #0x54] strb w2, [fp, #0x48] mov w2, #5 strb w2, [fp, #0x4A] ldrb w2, [x22, #0x55] strb w2, [fp, #0x49] mov w2, #13 strb w2, [fp, #0x4A] ldp x2, x3, [fp, #0x38] stp x2, x3, [fp, #0x50] ldr x2, [fp, #0x48] str x2, [fp, #0x60] ldr x23, [x22] ldr x2, [x22, #0x18] cbnz x2, G_M000_IG18 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x25, x0 ldr x3, [x22, #0x10] ldr x1, [x22] ldr w2, [x22, #0x38] mov x0, x25 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add x0, x22, #24 mov x1, x25 mov x2, xzr bl System.Threading.Interlocked:CompareExchange(byref,System.Object,System.Object):System.Object ldr x0, [fp, #0x10] G_M000_IG18: ldr x3, [x22, #0x18] add x2, fp, #80 mov x1, x23 mov x4, x24 mov x5, x19 mov x6, x20 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 b G_M000_IG11 G_M000_IG19: ldr x25, [sp, #0xC8] ldp x23, x24, [sp, #0xB8] ldp x21, x22, [sp, #0xA8] ldp x19, x20, [sp, #0x98] ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG20: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] add x3, fp, #208 str x3, [sp, #0x10] G_M000_IG21: mov x19, x0 mov x1, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG22 bl CORINFO_HELP_RETHROW G_M000_IG22: ldr x0, [fp, #0x10] mov x1, x0 ldr x1, [x1, #0x10] dmb ishld ldr w2, [x1, #0x08] ldr w3, [fp, #0x8C] cmp w3, w2 bhs G_M000_IG24 mov w2, #96 umull x2, w3, w2 add x2, x2, #16 ldr x1, [x1, x2] mov x2, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 adr x0, [G_M000_IG19] G_M000_IG23: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG24: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1292 1808: JIT compiled System.Diagnostics.Tracing.EventSource:WriteEventWithRelatedActivityIdCore(int,ulong,int,ulong) [Tier1, IL size=519, code size=1292] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.FieldInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 15 single block inlinees; 5 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex130_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x18] mov x19, x0 mov x20, x2 G_M000_IG01: G_M000_IG02: cbz x20, G_M000_IG15 stp mov x1, fp, lr, [sp, #-0x30]!x20 movz x0, #0xD1FFAB1E stp x19, x20, [sp, #0x18] movk x0, #0xD1FFAB1E LSL #16 str movk x0, #0xD1FFAB1E LSL #32 x21, [sp, #0x28] movz x2, #0xD1FFAB1E mov movk x2, #0xD1FFAB1E LSL #16 fp, sp movk mov x2, #0xD1FFAB1E LSL #32 ldr x2x19, x0 , [x2] mov blr x2 x21, x1 mov x21, x0 mov w20, w2 cbz x21, G_M000_IG16 mov x0, x20 G_M000_IG02: ldr x1, [x20] mov x1, x21 ldr x1, [x1 mov w2, w20 , mov x0, x19 #0x40] bl ldr x1, [x1, #0x38] blr System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool x1 cbz w0, G_M000_IG04 cbnz x0, G_M000_IG04 G_M000_IG03: G_M000_IG03: mov x1, x21 ldr x20, [x19, #0x80] mov w2, w20 mov x0, x21 mov ldr x1, [x21] x0, x19 ldr bl x1, [x1, #0x50] ldr x1, [x1, #0x38] blr x1 System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 mov add x1, x0 w0, w0, #1 mov x0, x20 str w0, [x19, #0x4C] movz b x2, #0xD1FFAB1E G_M000_IG02 movk x2, #0xD1FFAB1E LSL #16 movk G_M000_IG04: x2, #0xD1FFAB1E LSL #32 ldr ldr x2, [x2] x21, [sp, #0x28] ldr ldp wzr, [x0] x19, x20, [sp, #0x18] blr x2 ldp fp, lr, [sp], #0x30 ret lr sxtw ; Total bytes of code 108 w20, w0 b G_M000_IG08 G_M000_IG04: ldr x20, [x21, #0x10] ldr x22, [x19, #0x80] 1809: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex130_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] mov x0, x21 ldr x1, [x21] ldr x1, [x1, #0x50] ldr x1, [x1, #0x38] blr x1 mov x21, x0 ldrsb wzr, [x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x22, #0x08] add x14, x2, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG06 G_M000_IG05: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG07 G_M000_IG06: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldr x1, [x22, #0x08] ldr w1, [x1, #0x10] sub w1, w1, #1 orr w20, w1, #0xD1FFAB1E G_M000_IG08: ldr w1, [x19, #0x58] add w1, w1, #7 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG10 G_M000_IG09: ldr w0, [x21, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG10: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] cbnz x0, G_M000_IG12 G_M000_IG11: cbnz w1, G_M000_IG17 mov x2, xzr mov w3, wzr b G_M000_IG13 G_M000_IG12: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG17 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG13: cmp w3, #4 blo G_M000_IG18 str w20, [x2] ldr w0, [x19, #0x58] add w0, w0, #4 str w0, [x19, #0x58] G_M000_IG14: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG15: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG16: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG18: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 788 1810: JIT compiled System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.Reflection.FieldInfo) [Tier1, IL size=103, code size=788] ; Assembly listing for method System.Reflection.RuntimeFieldInfo:get_DeclaringType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x08] ldrb w1, [x1, #0x94] cbnz w1, G_M000_IG05 G_M000_IG03: ldr x0, [x0, #0x10] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov x0, xzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 1811: JIT compiled System.Reflection.RuntimeFieldInfo:get_DeclaringType() [Tier1, IL size=22, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:GetTokenFor(System.Reflection.RuntimeFieldInfo,System.RuntimeType):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1812: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x2 G_M000_IG02: ldr x20, [x0, #0x80] mov x0, x1 ldr x1, [x1] ldr x1, [x1, #0x50] ldr x1, [x1, #0x38] blr x1 mov x21, x0 ldrsb wzr, [x19] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x20, #0x08] add x14, x2, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG04 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x20, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w0, w0, #0xD1FFAB1E G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 212 1813: JIT compiled System.Reflection.Emit.DynamicILGenerator:GetTokenFor(System.Reflection.RuntimeFieldInfo,System.RuntimeType) [Tier1, IL size=24, code size=212] ; Assembly listing for method System.Reflection.RtFieldInfo:get_FieldHandle():System.RuntimeFieldHandle:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 1814: JIT compiled System.Reflection.RtFieldInfo:get_FieldHandle() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeFieldHandle,System.RuntimeTypeHandle):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x19, #0x08] add x14, x2, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x2, #16 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG04 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x19, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w0, w0, #0xD1FFAB1E G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 1815: JIT compiled System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeFieldHandle,System.RuntimeTypeHandle) [Tier1, IL size=38, code size=188] ; Assembly listing for method System.Reflection.RtFieldInfo:System.IRuntimeFieldInfo.get_Value():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1816: JIT compiled System.Reflection.RtFieldInfo:System.IRuntimeFieldInfo.get_Value() [Tier1, IL size=12, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1817: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex130_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.Match:AddMatch(int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] stp x27, x28, [sp, #0x50] mov fp, sp mov x20, x0 mov w19, w1 mov w21, w2 mov w22, w3 G_M000_IG02: ldr x23, [x20, #0x48] sxtw w0, w19 ldr w1, [x23, #0x08] cmp w0, w1 bhs G_M000_IG10 add x1, x23, #16 mov w24, w0 lsl x25, x24, #3 ldr x0, [x1, x25] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_VC mov x2, x0 sxtw x1, w19 mov x0, x23 bl CORINFO_HELP_ARRADDR_ST G_M000_IG04: ldp x23, x20, [x20, #0x48] ldr w1, [x20, #0x08] cmp w19, w1 bhs G_M000_IG10 add x1, x20, #16 lsl x24, x24, #2 ldr w26, [x1, x24] ldr w1, [x23, #0x08] cmp w19, w1 bhs G_M000_IG10 add x1, x23, #16 ldr x27, [x1, x25] ldr w1, [x27, #0x08] lsl w28, w26, #1 add w0, w28, #2 cmp w1, w0 bge G_M000_IG08 G_M000_IG05: lsl w1, w26, #3 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x2, x0 mov w1, wzr cmp w28, #0 ble G_M000_IG07 ldr w0, [x27, #0x08] add x3, x27, #16 add x4, x2, #16 align [0 bytes for IG06] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: cmp w1, w0 bhs G_M000_IG10 ubfiz x5, x1, #2, #32 ldr w6, [x3, x5] ldr w7, [x2, #0x08] cmp w1, w7 bhs G_M000_IG10 str w6, [x4, x5] add w1, w1, #1 cmp w1, w28 blt G_M000_IG06 G_M000_IG07: sxtw x1, w19 mov x0, x23 bl CORINFO_HELP_ARRADDR_ST G_M000_IG08: add x0, x23, #16 ldr x0, [x0, x25] ldr w1, [x0, #0x08] cmp w28, w1 bhs G_M000_IG10 add x0, x0, #16 str w21, [x0, w28, UXTW #2] add w2, w28, #1 cmp w2, w1 bhs G_M000_IG10 str w22, [x0, w2, UXTW #2] add x0, x20, #16 add w1, w26, #1 str w1, [x0, x24] G_M000_IG09: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 388 1818: JIT compiled System.Text.RegularExpressions.Match:AddMatch(int,int,int) [Tier1, IL size=129, code size=388] ; Assembly listing for method System.Text.RegularExpressions.Match:Tidy(int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov w19, w2 G_M000_IG02: ldr x20, [x0, #0x50] ldr w2, [x20, #0x08] cmp w2, #0 bls G_M000_IG17 ldr w2, [x20, #0x10] stp w2, w19, [x0, #0x30] add w1, w19, w1 str w1, [x0, #0x58] ldr w1, [x0, #0x5C] add w1, w1, w19 str w1, [x0, #0x5C] ldr x21, [x0, #0x48] ldr w22, [x21, #0x08] cmp w22, #0 bls G_M000_IG17 ldr x1, [x21, #0x10] ldr w2, [x1, #0x08] cmp w2, #1 bls G_M000_IG17 ldr w2, [x1, #0x14] str w2, [x0, #0x14] ldr w1, [x1, #0x10] add w1, w1, w19 str w1, [x0, #0x10] cmp w3, #2 bne G_M000_IG16 G_M000_IG03: ldrb w1, [x0, #0x60] cbz w1, G_M000_IG04 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: cbz w19, G_M000_IG16 mov w0, wzr cmp w22, #0 ble G_M000_IG16 ldr w1, [x20, #0x08] cmp w1, w22 blt G_M000_IG12 add x1, x21, #16 G_M000_IG05: ldr x2, [x1, w0, UXTW #3] cbz x2, G_M000_IG10 G_M000_IG06: add x3, x20, #16 ldr w3, [x3, w0, UXTW #2] lsl w3, w3, #1 mov w4, wzr cmp w3, #0 ble G_M000_IG10 ldr w5, [x2, #0x08] cmp w5, w3 blt G_M000_IG09 add x5, x2, #16 align [0 bytes for IG07] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG07: ubfiz x2, x4, #2, #32 add x2, x5, x2 ldr w6, [x2] add w6, w6, w19 str w6, [x2] add w4, w4, #2 cmp w4, w3 blt G_M000_IG07 G_M000_IG08: b G_M000_IG10 G_M000_IG09: ldr w5, [x2, #0x08] cmp w4, w5 bhs G_M000_IG17 add x5, x2, #16 ubfiz x6, x4, #2, #32 add x5, x5, x6 ldr w6, [x5] add w6, w6, w19 str w6, [x5] add w4, w4, #2 cmp w4, w3 blt G_M000_IG09 G_M000_IG10: add w0, w0, #1 cmp w22, w0 bgt G_M000_IG05 G_M000_IG11: b G_M000_IG16 G_M000_IG12: add x1, x21, #16 ldr x2, [x1, w0, UXTW #3] cbz x2, G_M000_IG15 G_M000_IG13: ldr w3, [x20, #0x08] cmp w0, w3 bhs G_M000_IG17 add x4, x20, #16 ldr w5, [x4, w0, UXTW #2] lsl w3, w5, #1 mov w4, wzr cmp w3, #0 ble G_M000_IG15 G_M000_IG14: ldr w1, [x2, #0x08] cmp w4, w1 bhs G_M000_IG17 add x1, x2, #16 ubfiz x5, x4, #2, #32 add x5, x1, x5 ldr w1, [x5] add w1, w1, w19 str w1, [x5] add w4, w4, #2 cmp w4, w3 blt G_M000_IG14 G_M000_IG15: add w0, w0, #1 cmp w22, w0 bgt G_M000_IG12 G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG17: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 464 1819: JIT compiled System.Text.RegularExpressions.Match:Tidy(int,int,int) [Tier1, IL size=160, code size=464] ; Assembly listing for method System.Text.RegularExpressions.Match:NextMatch():System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x40] cbnz x1, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: ldr w5, [x0, #0x5C] ldr w4, [x0, #0x34] sub w5, w5, w4 ldr w6, [x0, #0x58] ldr w2, [x0, #0x14] ldr x3, [x0, #0x08] mov x0, x1 mov w1, #2 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] G_M000_IG05: ldp fp, lr, [sp], #0x10 br x7 ; Total bytes of code 80 1820: JIT compiled System.Text.RegularExpressions.Match:NextMatch() [Tier1, IL size=57, code size=80] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Length():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1821: JIT compiled System.Text.RegularExpressions.Capture:get_Length() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Text():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1822: JIT compiled System.Text.RegularExpressions.Capture:get_Text() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:RightChar(int):ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x0, #0x28] ldr w0, [x0, #0x58] add w0, w0, w1 ldr w1, [x2, #0x08] cmp w0, w1 bhs G_M000_IG04 add x1, x2, #12 ldrh w0, [x1, w0, UXTW #2] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 56 1823: JIT compiled System.Text.RegularExpressions.RegexParser:RightChar(int) [Tier1, IL size=20, code size=56] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:Add(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 83679 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG05 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 100 1824: JIT compiled System.Collections.Generic.List`1[System.__Canon]:Add(System.__Canon) [Tier1 with Static PGO, IL size=60, code size=100] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex131_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:set_Item(int,System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: G_M000_IG06: mov x1, x21 stpmov w2, w20 mov x0, x19 bl fp, lr, [sp, #-0x20]! str x19, [sp, #0x18]System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 mov ldr fp, sp w0, [x19, #0x4C] mov x19, x0 cmp w0, w20 beq G_M000_IG04 G_M000_IG02: add w0, w0, #1 ldr str w0, [x19, #0x4C] w0, [x19, #0x10] b G_M000_IG02 cmp G_M000_IG04: w1, w0 bhs G_M000_IG04 ldr x21, [sp, #0x28] ldr x0, [x19, #0x08] ldp sxtw x1, w1 x19, x20, [sp, #0x18] bl ldp fp, lr, [sp], CORINFO_HELP_ARRADDR_ST #0x30 ldr w0, [x19, #0x14] ret lr add ; Total bytes of code 108 w0, w0, #1 str w0, [x19, #0x14] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret 1825: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex131_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 88 1826: JIT compiled System.Collections.Generic.List`1[System.__Canon]:set_Item(int,System.__Canon) [Tier1, IL size=42, code size=88] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReplaceNodeIfUnnecessary():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG01: G_M000_IG02: mov x0, x19 stp movz x1, #0xD1FFAB1Efp, lr, [sp, #-0x30]! movk x1, #0xD1FFAB1E LSL #16 stp movk x1, #0xD1FFAB1E LSL #32 x19, x20, [sp, #0x18] ldr str x1, [x1] x21, [sp, #0x28] blr x1 mov fp, cbz w0, G_M000_IG04 sp mov G_M000_IG03: x19, x0 cmp w0, #1 beq G_M000_IG05 G_M000_IG02: b G_M000_IG12 ldr w20, [x19, #0x4C] G_M000_IG04: sxtw w21, w2 ldrb sub w0, [x19, #0x2E] w0, w21, #4 mov w1, #22 cmp w20, w0 cmp w0, #24 ble G_M000_IG05 cinc G_M000_IG03:w20, w1, ne movz x0, #0xD1FFAB1E str movk x0, #w21, [x19, #0x4C] 0xD1FFAB1E LSL #16 mov w0, wzr movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST G_M000_IG04: ldr ldr x21, [sp, #0x28] w1, [x19, #0x28] ldp strb w20, [x0, #0x2E] x19, x20, [sp, #0x18] str w1, [x0, #0x28] ldp fp, lr, [sp], #0x30 b G_M000_IG13 ret lr G_M000_IG05: ldr G_M000_IG05: x1, cmp w20, w21 [ bhi G_M000_IG07 x19 ubfiz x0, x20, #1, #32 , #0x08] add x0, x1, x0 mov sub w1, w21, w20 x0, x1 movz x2, #0xD1FFAB1E cbz x0, G_M000_IG07 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG06: movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr movz x3, #0xD1FFAB1E x2, [x2] movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 add x2, x2, #12 cmp x2, x3 mov beq G_M000_IG11 w3, #3 movz x4, #0xD1FFAB1E G_M000_IG07: movk x4, #0xD1FFAB1E LSL #16 mov x2, x1 cbz x2, G_M000_IG10 G_M000_IG08: movk x4, #0xD1FFAB1E LSL #32 ldr ldr x4, [x4] x0, blr x4 [x2] tbnz w0, #31, G_M000_IG03 movz x3, #0xD1FFAB1E add w0, w20, w0 str movk x3, #0xD1FFAB1E LSL #16 w0, [x19, #0x4C] movk x3, #0xD1FFAB1E LSL #32 mov w0, #1 cmp x0, x3 G_M000_IG06: beq G_M000_IG10 ldr x21, [sp, #0x28] G_M000_IG09: ldp mov x0, x3 x19, x20, [sp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x30 movk x2, #0xD1FFAB1E LSL #32 ret ldr x2 , [x2] lr blr x2 G_M000_IG07: mov x2, x0 movz x0, #0xD1FFAB1E G_M000_IG10: movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 w0, [x2, #0x10] ldr cmp w0, #0 x0, [x0] bls G_M000_IG14 blr x0 brk_windows ldr x0#0 , [x2, #0x08] ldr w1, [x0, #0x08] ; Total bytes of code 184 cmp w1, #0 bls G_M000_IG15 ldr x0, [x0, #0x10] b G_M000_IG11 G_M000_IG11: b G_M000_IG13 G_M000_IG12: mov x0, x19 G_M000_IG13: ldp 1827: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 288 1828: JIT compiled System.Text.RegularExpressions.RegexNode:ReplaceNodeIfUnnecessary() [Tier1, IL size=60, code size=288] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1829: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex131_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex132_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1830: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex132_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1831: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:g__Process|0_0(System.Text.RegularExpressions.RegexNode,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 29 single block inlinees; 12 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] stp x27, x28, [sp, #0x70] mov fp, sp str xzr, [fp, #0x10] str xzr, [fp, #0x20] mov x19, x0 mov x20, x1 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG37 G_M000_IG03: ldr w0, [x19, #0x28] tst w0, #64 cset x21, ne ldrb w0, [x19, #0x2E] sub w1, w0, #3 cmp w1, #43 bhi G_M000_IG37 mov w1, w1 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG04: ldr x22, [x19, #0x08] cbnz x22, G_M000_IG05 mov w23, wzr b G_M000_IG07 G_M000_IG05: mov x1, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG06 ldr w23, [x0, #0x10] b G_M000_IG07 G_M000_IG06: mov w23, #1 G_M000_IG07: mov w22, wzr cmp w23, #0 ble G_M000_IG15 G_M000_IG08: ldr x0, [x19, #0x08] cbz x0, G_M000_IG10 G_M000_IG09: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG14 G_M000_IG10: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG13 G_M000_IG11: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG13 G_M000_IG12: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG13: ldr w0, [x2, #0x10] cmp w22, w0 bhs G_M000_IG66 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG67 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] b G_M000_IG14 G_M000_IG14: mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG37 add w22, w22, #1 cmp w22, w23 blt G_M000_IG08 G_M000_IG15: cmp w21, #0 cset x22, eq b G_M000_IG60 G_M000_IG16: ldr x22, [x19, #0x08] cbnz x22, G_M000_IG17 mov w23, wzr b G_M000_IG19 G_M000_IG17: mov x1, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG18 ldr w23, [x0, #0x10] b G_M000_IG19 G_M000_IG18: mov w23, #1 G_M000_IG19: ldr w24, [x20, #0x08] mov x0, x22 cbz x0, G_M000_IG21 G_M000_IG20: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG25 G_M000_IG21: mov x1, x22 mov x2, x1 cbz x2, G_M000_IG24 G_M000_IG22: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG24 G_M000_IG23: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG24: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG66 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG67 ldr x0, [x0, #0x10] b G_M000_IG25 G_M000_IG25: mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x20, #0x08] sub w25, w0, w24 cbz w25, G_M000_IG37 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x26, [x0] mov x0, x26 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbz x0, G_M000_IG64 add x27, x0, #16 ldr w28, [x0, #0x08] G_M000_IG26: str x27, [fp, #0x20] str w28, [fp, #0x28] str wzr, [fp, #0x18] mov w21, #1 b G_M000_IG34 G_M000_IG27: str wzr, [fp, #0x18] ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG29 G_M000_IG28: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG33 G_M000_IG29: mov x2, x1 cbz x2, G_M000_IG32 G_M000_IG30: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG32 G_M000_IG31: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG32: ldr w1, [x2, #0x10] cmp w21, w1 bhs G_M000_IG66 ldr x1, [x2, #0x08] ldr w0, [x1, #0x08] cmp w21, w0 bhs G_M000_IG67 add x1, x1, #16 ldr x0, [x1, w21, UXTW #3] b G_M000_IG33 G_M000_IG33: add x1, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, x20, #16 mov w1, w24 add x1, x1, w25, UXTW ldr w2, [x0, #0x08] cmp x1, x2 bhi G_M000_IG65 ldr x0, [x0] ubfiz x1, x24, #1, #32 add x0, x0, x1 sxtw w1, w25 ldr w3, [fp, #0x18] ldr w2, [fp, #0x28] cmp w3, w2 bhi G_M000_IG65 ldr x2, [fp, #0x20] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 sxtw w25, w0 add w21, w21, #1 G_M000_IG34: cmp w21, w23 bge G_M000_IG35 cbnz w25, G_M000_IG27 G_M000_IG35: ldr x1, [fp, #0x10] stp xzr, xzr, [fp, #0x10] stp xzr, xzr, [fp, #0x20] cbz x1, G_M000_IG36 mov x0, x26 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG36: add w0, w24, w25 str w0, [x20, #0x08] G_M000_IG37: mov w0, wzr G_M000_IG38: ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG39: ldrh w1, [x19, #0x2C] ldr w0, [x20, #0x08] add x2, x20, #16 ldr x3, [x2] ldr w2, [x2, #0x08] cmp w0, w2 bhs G_M000_IG40 strh w1, [x3, w0, UXTW #2] add w0, w0, #1 str w0, [x20, #0x08] b G_M000_IG15 G_M000_IG40: mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG41: ldr x1, [x19, #0x10] cbz x1, G_M000_IG15 ldr w0, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, #1 bne G_M000_IG42 ldr w2, [x20, #0x18] cmp w0, w2 bhs G_M000_IG42 add x2, x20, #16 ldr w3, [x2, #0x08] cmp w0, w3 bhs G_M000_IG67 ldr x2, [x2] ubfiz x3, x0, #1, #32 add x2, x2, x3 ldrh w1, [x1, #0x0C] strh w1, [x2] add w0, w0, #1 str w0, [x20, #0x08] b G_M000_IG15 G_M000_IG42: mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG43: ldr w22, [x19, #0x20] cmp w22, #0 ble G_M000_IG37 mov w1, #32 cmp w22, #32 csel w27, w22, w1, le ldrh w1, [x19, #0x2C] mov x0, x20 mov w2, w27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x24] cmp w27, w0 bne G_M000_IG37 b G_M000_IG15 G_M000_IG44: ldr w22, [x19, #0x20] cmp w22, #0 ble G_M000_IG37 sxtw w0, w22 mov w1, #4 cmp w0, #4 csel w28, w0, w1, le mov w23, wzr cmp w28, #0 ble G_M000_IG52 G_M000_IG45: ldr x0, [x19, #0x08] cbz x0, G_M000_IG47 G_M000_IG46: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG51 G_M000_IG47: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG50 G_M000_IG48: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG50 G_M000_IG49: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG50: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG66 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG67 ldr x0, [x0, #0x10] b G_M000_IG51 G_M000_IG51: mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG37 add w23, w23, #1 cmp w23, w28 blt G_M000_IG45 G_M000_IG52: ldr w0, [x19, #0x24] cmp w28, w0 bne G_M000_IG37 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool b G_M000_IG15 ; Emitting G_M000_IG53: BLENDED_CODE for generic ARM64 CPU - Windows ldr ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data x22, [x19, #0x08] mov x0, x22 cbz x0, G_M000_IG55 G_M000_IG54: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG59 G_M000_IG55: mov x1, x22 mov x2, x1 cbz x2, G_M000_IG58 G_M000_IG56: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG58 G_M000_IG57: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG58: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG66 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG67 ldr G_M000_IG01: x0, [x0, #0x10] stp fp, lr, [sp, # -b G_M000_IG59 G_M000_IG59: mov x1, x20 movz x2, #0xD1FFAB1E 0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] movk x2, #0xD1FFAB1E LSL #16 stp x23, x24, [sp, #0x70] movk x2, #0xD1FFAB1E LSL #32 mov ldr fp, sp x2, [x2] add x9, fp, #16 blr x2 sxtw w22, w0 movi v16.16b, #0 G_M000_IG60: stp uxtb q16, q16, [x9] w0, w22 stp G_M000_IG61:q16, q16, [x9, #0x20] mov x19, ldp x0 x27, x28, [sp, #0x70] ldp G_M000_IG02: x25, x26, [sp, #0x60] ldr ldp x23, x24, [sp, #0x50] w20, [x19, #0x4C] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] cmp w20, w2 ldp bhi G_M000_IG22 fp, lr, [sp], #0x80 ubfiz x0, x20, #1, #32 ret lr add x21, x1, x0 G_M000_IG62: mov x0, x21 mov w0, #1 G_M000_IG63: sub ldp x27, x28, [sp, #0x70] ldp x25, x26, [w22, w2, w20 sp, sxtw w1, w22 #0x60] str ldp x23, x24, [sp, #0x50] x0, [fp, #0x40] ldp x21, x22, [sp, #0x40] str w1, [fp, #0x48] ldp x19, x20, [sp, #0x30] ldp add x0, fp, #64 fp, lr, [sp], # ldr 0x80 x1, [x0] ret lr G_M000_IG64: ldr w0, [x0, #0x08] mov x27, xzr cmp w0, #3 mov w28, wzr b G_M000_IG26 bge G_M000_IG05 G_M000_IG65: movz x0, #0xD1FFAB1E G_M000_IG03: movk x0, #0xD1FFAB1E LSL #16 mov x0, x21 movk x0, #0xD1FFAB1E LSL #32 sxtw w1, w22 str x0 ldr x0, [, [fp, x0] #0x30] str w1, [fp, #0x38] blr x0 add x0, fp, brk_windows #48 # ldr x23, [x0] 0 ldr w0, [x0, #0x08] cmp w0, #3 G_M000_IG66: movz x0, #0xD1FFAB1E blt G_M000_IG07 G_M000_IG04: movk x0, #0xD1FFAB1E LSL #16 b G_M000_IG09 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG05: ldr ldr w0, [x1] x0, [x0] movz w3, #97 movk blr x0 w3, #78 LSL #16 brk_windows # eor w0, w0, w3 0 ldr w1, [x1, #0x02] movz w3, #78 G_M000_IG67: movk w3, #68 LSL # bl 16CORINFO_HELP_RNGCHKFAIL brk_windows #0 eor w1, w1, w3 RWD00 orr dd G_M000_IG43 - G_M000_IG02 w0, w0, w1 dd G_M000_IG37 - G_M000_IG02 cbnz w0, G_M000_IG03 dd G_M000_IG37 - G_M000_IG02 G_M000_IG06: dd G_M000_IG43 - G_M000_IG02 add w0, w20, #3 dd G_M000_IG37 - G_M000_IG02 cmp w0, w2 dd G_M000_IG37 - G_M000_IG02 bhi G_M000_IG22 dd G_M000_IG39 - G_M000_IG02 b G_M000_IG16 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG37 - G_M000_IG07 G_M000_IG37: dd G_M000_IG41 - G_M000_IG02 mov x1, x21 dd G_M000_IG37 - G_M000_IG02 sxtw w0, w22 dd G_M000_IG62 - G_M000_IG02 cmp w0, #2 dd G_M000_IG62 - G_M000_IG02 bls G_M000_IG13 dd G_M000_IG62 - G_M000_IG02 str dd G_M000_IG62 - G_M000_IG02 dd G_M000_IG62 - G_M000_IG02 dd G_M000_IG62 - G_M000_IG02 dd G_M000_IG62 - G_M000_IG02 dd G_M000_IG62 - G_M000_IG02 x1, [fp, #0x10] dd G_M000_IG37 - G_M000_IG02 str dd G_M000_IG62 - G_M000_IG02 w0, [fp, #0x18] dd G_M000_IG16 - G_M000_IG02 add x0, fp, #16 dd G_M000_IG04 - G_M000_IG02 ldr x24, [x0] dd G_M000_IG44 - G_M000_IG02 ldr w0, [x0, #0x08] dd G_M000_IG44 - G_M000_IG02 cmp w0, #2 dd G_M000_IG53 - G_M000_IG02 blt G_M000_IG13 dd G_M000_IG37 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 G_M000_IG37: dd G_M000_IG62 - G_M000_IG02 b G_M000_IG11 dd G_M000_IG53 - G_M000_IG02 G_M000_IG09: dd G_M000_IG37 - G_M000_IG02 ldr w0, [x23] dd G_M000_IG37 - G_M000_IG02 movz w1, #99 dd G_M000_IG37 - G_M000_IG02 movk w1, #97 LSL #16 dd G_M000_IG37 - G_M000_IG02 eor w0, w0, w1 dd G_M000_IG37 - G_M000_IG02 ldr w1, [x23, #0x02] dd G_M000_IG37 - G_M000_IG02 movz dd G_M000_IG37 - G_M000_IG02 w3 dd G_M000_IG37 - G_M000_IG02 , #97 dd G_M000_IG62 - G_M000_IG02 movk w3, #78 LSL #16 dd G_M000_IG62 - G_M000_IG02 eor w1, w1, w3 dd G_M000_IG43 - G_M000_IG02 orr w0, w0, w1 dd G_M000_IG37 - G_M000_IG02 cbnz w0, G_M000_IG07 dd G_M000_IG37 - G_M000_IG02 G_M000_IG10: add w0, w20, #3 dd G_M000_IG62 - G_M000_IG02 cmp w0, w2 bhi G_M000_IG22 ; Total bytes of code 1824 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] 1832: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:g__Process|0_0(System.Text.RegularExpressions.RegexNode,byref) [Tier1, IL size=588, code size=1824] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1833: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex132_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations+<>c:b__33_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x2, #0x18] ldr w2, [x1, #0x18] cmp w2, w0 bge G_M000_IG05 G_M000_IG03: movn w0, #0 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr w1, [x1, #0x18] cmp w1, w0 cset x0, gt b G_M000_IG04 ; Total bytes of code 52 1834: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations+<>c:b__33_0(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet,System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier1, IL size=19, code size=52] ; Assembly listing for method System.RuntimeType:GetGenericTypeDefinition():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; PGO data available, profile data was all zero ; 2 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG10 ldr x0, [x19, #0x10] cbz x0, G_M000_IG07 G_M000_IG03: ldr x0, [x0] cbz x0, G_M000_IG07 G_M000_IG04: ldr x1, [x0, #0x88] cbz x1, G_M000_IG08 G_M000_IG05: mov x0, x1 G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG04 G_M000_IG08: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 224 1835: JIT compiled System.RuntimeType:GetGenericTypeDefinition() [Tier1 with Static PGO, IL size=31, code size=224] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex133_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1836: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex133_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.RuntimeType:GetGenericArguments():System.Type[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x0] ldr x1, [x1, #0x98] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x18] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 1837: JIT compiled System.RuntimeType:GetGenericArguments() [Tier1, IL size=31, code size=104] ; Assembly listing for method System.RuntimeType:get_TypeHandle():System.RuntimeTypeHandle:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 1838: JIT compiled System.RuntimeType:get_TypeHandle() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.RuntimeTypeHandle:GetInstantiationPublic():System.Type[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x70] stp x21, x22, [sp, #0x80] stp x23, x24, [sp, #0x90] stp x25, x26, [sp, #0xA0] stp x27, x28, [sp, #0xB0] mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x60] mov x19, x0 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x20, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] mov G_M000_IG01: stp x0fp, lr, [sp, #-0x50]!, x19 stp movz x1, #0xD1FFAB1Ex19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] movk stp x23, x24, [sp, #0x38] str x1, x25, [sp, #0x48] #0xD1FFAB1E LSL #16 mov movk x1, #0xD1FFAB1E LSL #32 fp, sp ldr x1, [x1] mov blr x19, x0 x1 str G_M000_IG02: x0, [fp, #0x60] ldr w20, [x19, #0x4C] add x0, fp, #96 sxtw w21, w2 ldr x1, [fp, #0x60] sub cbz x1, G_M000_IG10 w0, w21, #2 cmp w20, w0 G_M000_IG03: ble G_M000_IG05 ldr x2, [x1, #0x18] G_M000_IG03: str w21, [x19, #0x4C] G_M000_IG04: mov w0, wzr mov x1, x2 G_M000_IG04: ldr x25, [sp, #0x48] add x2, fp, #104 ldp mov w3, wzr x23, x24, [sp, #0x38] movz x4, ldp x21, x22, [sp, #0x28] #0xD1FFAB1E ldp x19, x20, [sp, #0x18] movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldp fp, lr, [sp], #0x50 str ret lr x4, [fp, #0x30] G_M000_IG05: cmp w20, w21 adr x4, [ bhi G_M000_IG10 G_M000_IG07] ubfiz x0, x20, #1, #32 str x4, [fp, #0x48] add x22, x1, x0 add x4, fp, #32 str x4, [x20, #0x10] sub strb w23, w21, w20 wzr, [x20, #0x0C] mov w24, wzr sub w25, w23, #1 G_M000_IG05: cmp w25, #0 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 ble G_M000_IG03 movk x4, #0xD1FFAB1E LSL #32 G_M000_IG06: blr x4 G_M000_IG04: G_M000_IG07: cmp w24, w23 mov w0, #1 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 strb w0, [x20, #0x0C] add x0, x22, x0 movz x0, #0xD1FFAB1E sub w3 movk x0, #0xD1FFAB1E LSL #16 , w23, movk x0, #0xD1FFAB1E LSL #32 w24 ldr w0, [x0] cmp w0, #0 mov w1, #66 beq G_M000_IG08 mov w2, #97 bl movz x4, #0xD1FFAB1E CORINFO_HELP_STOP_FOR_GC movk x4, #0xD1FFAB1E LSL #16 G_M000_IG08: movk x4, #0xD1FFAB1E LSL #32 ldr ldr x0, [fp, #0x28] x4, [x4] blr x4 add w24, w24, w0 str x0, [x20, #0x10] tbnz w0, #31, G_M000_IG03 ldr x0, [fp, #0x68] add w1, w24, #1 G_M000_IG09: ldp cmp w1, x27, x28, [sp, #0xB0] w23 ldp x25, x26, [sp, #0xA0] bhs G_M000_IG03 ldp x23, x24, [sp, #0x90] ldrh ldp x21, x22, [sp, #0x80] w0 ldp x19, x20, [sp, #0x70] , [x22, w1, UXTW #2] ldp fp, lr, [sp], #0xC0 sub w0, w0, #78 ret mov w0, w0 lr movz x2, #0xD1FFAB1E LSL #16 movk x2, G_M000_IG10: #0xD1FFAB1E LSL #48 mov x2, xzr lsl b G_M000_IG04 x2, x2, x0 ; Total bytes of code 264 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 1839: JIT compiled System.RuntimeTypeHandle:GetInstantiationPublic() [Tier1, IL size=31, code size=264] blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1840: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.RuntimeTypeHandle:GetNativeHandle():System.RuntimeTypeHandle:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x0, [x0] cbz x0, G_M000_IG04 G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 116 1841: JIT compiled System.RuntimeTypeHandle:GetNativeHandle() [Tier1, IL size=35, code size=116] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:TryPop(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x10] sub w2, w0, #1 ldr x3, [x19, #0x08] ldr w4, [x3, #0x08] cmp w4, w2 bhi G_M000_IG05 G_M000_IG03: str xzr, [x1] mov w0, wzr G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr w14, [x19, #0x14] add w14, w14, #1 stp w2, w14, [x19, #0x10] add x14, x3, #16 ldr x15, [x14, w2, UXTW #3] mov x14, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF sxtw x0, w2 mov w1, w4 cmp x0, x1 bhs G_M000_IG07 add x0, x3, #16 str xzr, [x0, w2, SXTW #3] mov w0, #1 G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 136 1842: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:TryPop(byref) [Tier1, IL size=90, code size=136] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:.ctor(System.Collections.Generic.Stack`1[System.Reflection.Emit.LocalBuilder],System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x14, x0 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 40 1843: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:.ctor(System.Collections.Generic.Stack`1[System.Reflection.Emit.LocalBuilder],System.Reflection.Emit.LocalBuilder) [Tier1, IL size=15, code size=40] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrfalseFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #57 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] G_M000_IG01: ldr x3, [x3, #0x50] stp ldr x3, [x3, #0x20] fp, G_M000_IG03: lr, [sp, #-0x40]! ldp fp, lr, [sp], #0x10 stp x19, x20br x3 , [sp, #0x28] ; Total bytes of code 48 str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str 1844: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrfalseFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Push(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data 1845: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex133_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x2, x1 G_M000_IG02: ldr w20, [x19, #0x10] ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG05 G_M000_IG03: sxtw x1, w20 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] add w0, w20, #1 str w0, [x19, #0x10] G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 116 1846: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Push(System.__Canon) [Tier1, IL size=60, code size=116] ; Assembly listing for method System.Collections.HashHelpers:GetPrime(int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 306750 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov w19, w0 G_M000_IG02: tbnz w19, #31, G_M000_IG10 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, wzr G_M000_IG03: ldr w0, [x1, w2, UXTW #2] cmp w0, w19 bge G_M000_IG04 add w2, w2, #1 cmp w2, #72 bge G_M000_IG11 b G_M000_IG03 G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, w20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 sub w0, w20, #1 movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 smull x1, w1, w0 asr x1, x1, #32 asr w2, w1, #4 add w1, w2, w1, LSR #31 mov w2, #101 msub w0, w1, w2, w0 cbz w0, G_M000_IG07 mov w0, w20 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: add w20, w20, #2 G_M000_IG08: movn w0, #0xD1FFAB1E LSL #16 cmp w20, w0 blt G_M000_IG05 mov w0, w19 G_M000_IG09: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG10: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG11: orr w20, w19, #1 b G_M000_IG08 ; Total bytes of code 276 1847: JIT compiled System.Collections.HashHelpers:GetPrime(int) [Tier1 with Static PGO, IL size=93, code size=276] ; Assembly listing for method System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeMethodHandle):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x21, x20 cbz x21, G_M000_IG04 G_M000_IG03: mov x0, x20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 mov x22, x0 bl System.RuntimeMethodHandle:IsDynamicMethod(long):bool cbnz w0, G_M000_IG04 mov x0, x22 bl System.RuntimeMethodHandle:GetDeclaringType(long):System.RuntimeType movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG09 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x2, x0 ldr x0, [x19, #0x08] add x14, x2, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG06 G_M000_IG05: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG07 G_M000_IG06: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldr x0, [x19, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w0, w0, #0xD1FFAB1E G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: mov x1, x21 mov x0, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x19, x0 ldr x1, [x19] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 ldr x1, [x0] ldr x1, [x1, #0x68] ldr x1, [x1, #0x18] blr x1 mov x20, x0 movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x19 mov x2, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x21 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 428 1848: JIT compiled System.Reflection.Emit.DynamicScope:GetTokenFor(System.RuntimeMethodHandle) [Tier1, IL size=117, code size=428] ; Assembly listing for method System.Reflection.RuntimeMethodInfo:System.IRuntimeMethodInfo.get_Value():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1849: JIT compiled System.Reflection.RuntimeMethodInfo:System.IRuntimeMethodInfo.get_Value() [Tier1, IL size=12, code size=20] ; Assembly listing for method System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendLiteral(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: add x2, x19, #24 ldr w0, [x19, #0x10] ldr w3, [x2, #0x08] cmp w0, w3 bhi G_M000_IG07 ldr x2, [x2] ubfiz x4, x0, #1, #32 add x2, x2, x4 sub w0, w3, w0 str x2, [fp, #0x18] ldr w20, [x1, #0x08] cmp w20, w0 bhi G_M000_IG05 G_M000_IG03: add x1, x1, #12 mov w0, w20 lsl x2, x0, #1 ldr x0, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x10] add w0, w0, w20 str w0, [x19, #0x10] G_M000_IG04: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 188 1850: JIT compiled System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendLiteral(System.String) [Tier1, IL size=53, code size=188] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddArgument(System.Type,System.Type[],System.Type[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldrb w4, [x0, #0x24] cbnz w4, G_M000_IG06 cbz x1, G_M000_IG07 ldr w4, [x0, #0x1C] cmn w4, #1 beq G_M000_IG04 G_M000_IG03: ldr w4, [x0, #0x20] add w4, w4, #1 str w4, [x0, #0x20] G_M000_IG04: movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x4 G_M000_IG06: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG07: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 200 1851: JIT compiled System.Reflection.Emit.SignatureHelper:AddArgument(System.Type,System.Type[],System.Type[]) [Tier1, IL size=46, code size=200] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:Init(System.Reflection.Module,ubyte,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov w21, w2 mov w20, w3 G_M000_IG02: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 uxtb w21, w21 mov w1, w21 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w21, #6 ccmp w21, #10, z, ne bne G_M000_IG05 G_M000_IG03: movn w0, #0 str w0, [x19, #0x1C] G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, #0 ble G_M000_IG06 mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldr w0, [x19, #0x18] add w1, w0, #1 stp w1, w0, [x19, #0x18] G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 184 1852: JIT compiled System.Reflection.Emit.SignatureHelper:Init(System.Reflection.Module,ubyte,int) [Tier1, IL size=66, code size=184] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:Init(System.Reflection.Module):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str wzr, [x19, #0x18] mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str wzr, [x19, #0x20] strb wzr, [x19, #0x24] movn w0, #0 str w0, [x19, #0x1C] ldr x0, [x19, #0x10] cbnz x0, G_M000_IG04 G_M000_IG03: cbnz x20, G_M000_IG05 G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 224 1853: JIT compiled System.Reflection.Emit.SignatureHelper:Init(System.Reflection.Module) [Tier1, IL size=93, code size=224] ; Assembly listing for method System.Buffer:BlockCopy(System.Array,int,System.Array,int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 15 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov fp, sp mov x19, x0 mov w21, w1 mov x20, x2 mov w22, w3 mov w23, w4 G_M000_IG02: cbz x19, G_M000_IG08 cbz x20, G_M000_IG09 ldr w24, [x19, #0x08] ldr x0, [x19] movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 cmp x0, x25 beq G_M000_IG04 G_M000_IG03: mov x0, x19 bl System.Array:GetCorElementTypeOfElementType():ubyte:this mov w1, #1 lsl w0, w1, w0 movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 tst w0, w1 beq G_M000_IG10 ldr x0, [x19] ldrh w0, [x0] mul x24, x24, x0 G_M000_IG04: mov x26, x24 cmp x19, x20 beq G_M000_IG06 G_M000_IG05: ldr w26, [x20, #0x08] ldr x0, [x20] cmp x0, x25 beq G_M000_IG06 mov x0, x20 bl System.Array:GetCorElementTypeOfElementType():ubyte:this mov w1, #1 lsl w1, w1, w0 movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 tst w1, w0 beq G_M000_IG11 ldr x1, [x20] ldrh w1, [x1] mul x26, x26, x1 G_M000_IG06: tbnz w21, #31, G_M000_IG12 tbnz w22, #31, G_M000_IG13 tbnz w23, #31, G_M000_IG14 sxtw x2, w23 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex134_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data sxtw x1, w21 sxtw x0, w22 add x3, x1, x2 add x4, x0, x2 cmp x3, x24 ccmp x4, x26, c, ls bhi G_M000_IG15 add x3, x20, #8 ldr x4, [x20] ldr w4, [x4, #0x04] sub x4, x4, #16 add x3, x3, x4 add x0, x3, x0 add x3, x19, #8 ldr x4, [x19] ldr w4, [x4, #0x04] sub x4, x4, #16 add x3, x3, x4 add x1, x3, x1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] G_M000_IG01: ldp stp fp, lr, fp, lr, [[sp]sp, #-0x30]!, # 0x50 stp ret x19, x20, [sp, #lr 0x18] G_M000_IG08: str x21, [sp, #0x28] mov w0, #0xD1FFAB1E mov movz x1, #0xD1FFAB1E fp, sp movk mov x1, #0xD1FFAB1E LSL #16 x19, x0 movk x1, #0xD1FFAB1E LSL #32 mov x21, x1 bl mov w20, w2 CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG02: blr x1 mov x1, x21 mov w2, w20 brk_windows mov x0, x19 #0 bl G_M000_IG09: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E G_M000_IG03: movk movx1, #0xD1FFAB1E LSL #16 x1, x21 movk mov w2, w20 x1, #0xD1FFAB1E LSL #32 mov x0, x19 ldr x1, [x1] bl blr x1 brk_windows #0 G_M000_IG10: movz x0, #40 System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x0, cbnz w0, G_M000_IG04 #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 w0, [x19, #0x4C] bl CORINFO_HELP_NEWSFAST cmp mov x21, x0 movz x0, #0xD1FFAB1E w0, movk x0w20 , #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 beq G_M000_IG04 ldr add x0, [x0w0] , w0, #1 blr x0 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: mov ldr x21, [sp, #0x28] x22, x0 ldp x19, x20, [sp, #0x18] mov ldp fp, lr, [sp], #0x30 w0, #0xD1FFAB1E ret lr ; Total bytes of code 108 movz x1, #0xD1FFAB1E1854: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex134_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x22 mov x0, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x21 bl CORINFO_HELP_THROW G_M000_IG11: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x19, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x19 mov x0, x23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x23 bl CORINFO_HELP_THROW G_M000_IG12: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG13: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG14: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG15: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 852 1855: JIT compiled System.Buffer:BlockCopy(System.Array,int,System.Array,int,int) [Tier1, IL size=267, code size=852] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:AddRange(ushort,ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code G_M000_IG01: ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr G_M000_IG01: x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] stp ldp fp, lr, [sp], #0x30 fp, lr, [sp, #-0x30]! ret lr G_M000_IG05: stp cmp w20, w21 x19, x20, [sp, #0x20] bhi G_M000_IG07 mov ubfiz x0, x20, #1, #32 fp, sp add x0, x1, x0 mov sub w2, w21, w20 w19, w1 mov w20 mov w1, #60, w2 movz x3, #0xD1FFAB1E G_M000_IG02: movk x3, #0xD1FFAB1E LSL #16 movz x1, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [x0, #0x14] add w1, w1, #1 tbnz str w1, [x0, #0x14] w0 ldr x1, [x0, #0x08] , #31, G_M000_IG03 ldr w2, [x0, #0x10] add ldr w3, [x1, #0x08] w0, w20, cmp w0 w3, w2 str bls G_M000_IG04 w0, [x19, #0x4C] G_M000_IG03: mov w0, #1 add w3, w2, #1 str w3 G_M000_IG06: , [x0, #0x10] ldr x21, [sp, #0x28] ubfiz x0, x2, # ldp 2, #32 x19, x20, [sp, #0x18] add x0, x0, #16 ldp fp, lr, [sp], #0x30 add x0, x1, x0 ret lr strh w19, [x0] G_M000_IG07: strh movz x0, #0xD1FFAB1E w20, movk x0, #0xD1FFAB1E LSL #16 [x0, #0x02] movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] b G_M000_IG05 blr x0 G_M000_IG04: brk_windows strh w19, [fp, #0x18] # strh w20, [fp, #0x1A] 0 ldr w1, [fp, #0x18] ; Total bytes of code 164 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #1856: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] 0x30 ret lr ; Total bytes of code 148 1857: JIT compiled System.Text.RegularExpressions.RegexCharClass:AddRange(ushort,ushort) [Tier1, IL size=19, code size=148] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FindBranchOneOrMultiStart():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w1, [x0, #0x2E] cmp w1, #25 beq G_M000_IG04 G_M000_IG03: b G_M000_IG10 G_M000_IG04: ldr x1, [x0, #0x08] mov x0, x1 cbz x0, G_M000_IG06 G_M000_IG05: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG10 G_M000_IG06: mov x2, x1 cbz x2, G_M000_IG09 G_M000_IG07: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG09 G_M000_IG08: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG09: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG14 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG15 ldr x0, [x0, #0x10] b G_M000_IG10 G_M000_IG10: ldrb w1, [x0, #0x2E] cmp w1, #9 ccmp w1, #12, z, ne bne G_M000_IG12 G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: mov x0, xzr G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 224 1858: JIT compiled System.Text.RegularExpressions.RegexNode:FindBranchOneOrMultiStart() [Tier1, IL size=51, code size=224] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 112663 G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 G_M000_IG01: sub w22, w2, w20 cmp w22, #0stp fp, lr, [sp, #-0x20]! bls G_M000_IG07 mov G_M000_IG03: fp, sp ldrh str w0, [x21x1, [fp, #0x18] ] cmp w0, #60 G_M000_IG02: ldr bne G_M000_IG07 x14, [x0] cmp w22, #1 str x14, [fp, #0x10] blo G_M000_IG09 ldr w15, [x0, #0x14] add x0, x21, #2 ldr w12, [x14, #0x14] sub w2, w22, #1 cmp mov w1, #62 w15, w12 bne G_M000_IG06 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E G_M000_IG03: LSL #16 ldr movk w15, x3, #0xD1FFAB1E LSL #32 [x0, #0x10] ldr x3, [x3] ldr w12, [x14, #0x10] blr x3 cmp w15, w12 sub w1, w22, #1 bhs G_M000_IG06 cmp w0, #0 csel w0, w0, w1, ge G_M000_IG04: add cmp w0, w22 x14, x0, #8 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 ldr x12, [fp, #0x10] add x21, x21, x1 ldr x12, [x12, #0x08] sub w22, w22, w0 ldr wip0, [x12, #0x08] add w0, w20, w0 cmp w15, wip0 cmp w22, #1 bhs G_M000_IG08 bls G_M000_IG07 ldrh add x12, x12, #16 w1, [x21, #0x02] ldr x15, [x12, w15, UXTW #3] cmp w1 bl , #62 CORINFO_HELP_CHECKED_ASSIGN_REF bne G_M000_IG07 ldr add w0, w0, #2 w1, [x0, #0x10] str add w1, w1, #1 w0, [x19, #0x4C] str w1, [x0, #0x10] sxtw w21, w0 mov w0, #1 cmp w21, w20 bge G_M000_IG04 G_M000_IG05: mov ldp fp, lr, [sp], #0x20 w0, w20 mov w20, w21 ret lr mov w21, w0 G_M000_IG06: movz x2, #0xD1FFAB1E G_M000_IG04: movk x2, #0xD1FFAB1E LSL #16 ldr movk x2, #0xD1FFAB1E LSL #32 w0, [x19, #0x58] ldr x2, [x2] cbnz w0, G_M000_IG05 G_M000_IG07: mov x0, x19 ldp fp, lr, [sp], #0x20 movz x1, #0xD1FFAB1E br x2 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG08: movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RNGCHKFAIL ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG05: ; Total bytes of code 144 ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 1859: JIT compiled System.Collections.Generic.List`1+Enumerator[System.__Canon]:MoveNext() [Tier1 with Static PGO, IL size=81, code size=144] str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1860: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex134_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RentInt32Local():System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x18] mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x20] cbnz x20, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x20, #8 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #32 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x0, [x19, #0x20] add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG06 G_M000_IG05: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x1, x0 b G_M000_IG07 G_M000_IG06: ldr x1, [fp, #0x18] G_M000_IG07: mov x0, x20 G_M000_IG08: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 180 1861: JIT compiled System.Text.RegularExpressions.RegexCompiler:RentInt32Local() [Tier1, IL size=54, code size=180] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetSingleRange(System.String,byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp w3, #2 bls G_M000_IG09 ldrh w4, [x0, #0x10] cbnz w4, G_M000_IG07 G_M000_IG03: ldrh w4, [x0, #0x0E] add w5, w4, #3 cmp w3, w5 bne G_M000_IG07 cmp w4, #1 beq G_M000_IG05 cmp w4, #2 bne G_M000_IG07 cmp w3, #3 bls G_M000_IG09 ldrh w4, [x0, #0x12] strh w4, [x1] cmp w3, #4 bls G_M000_IG09 ldrh w0, [x0, #0x14] sub w0, w0, #1 strh w0, [x2] mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: cmp w3, #3 bls G_M000_IG09 ldrh w0, [x0, #0x12] strh w0, [x1] mov w0, #0xD1FFAB1E strh w0, [x2] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: strh wzr, [x2] strh wzr, [x1] mov w0, wzr G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 172 1862: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetSingleRange(System.String,byref,byref) [Tier1, IL size=95, code size=172] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Or():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #96 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1863: JIT compiled System.Text.RegularExpressions.RegexCompiler:Or() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #56 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1864: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ret():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #42 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1865: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ret() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionI():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x70] and w0, w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 1866: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionI() [Tier1, IL size=12, code size=24] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb w1, [x0, #0x2E] str w2, [x0, #0x28] add x14, x0, #16 mov x15, x3 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 1867: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,System.String) [Tier1, IL size=28, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Str(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #16 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 1868: JIT compiled System.Text.RegularExpressions.RegexNode:set_Str(System.String) [Tier1, IL size=8, code size=28] ; Assembly listing for method System.Text.Ascii:IsValidCore[ushort](byref,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 7 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w1, #8 bge G_M000_IG08 G_M000_IG03: sxtw x2, w1 cmp x2, #4 bge G_M000_IG07 mov x2, xzr mov w1, w1 cmp x1, #0 bls G_M000_IG05 align [0 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: lsl x3, x2, #1 ldrh w3, [x0, x3] cmp w3, #127 bgt G_M000_IG15 add x2, x2, #1 cmp x2, x1 blo G_M000_IG04 G_M000_IG05: mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: ldr x2, [x0] sbfiz x1, x1, #1, #32 add x0, x0, x1 ldr x0, [x0, #-0x08] orr x0, x2, x0 tst x0, #0xD1FFAB1E cset x0, eq b G_M000_IG13 G_M000_IG08: sbfiz x2, x1, #1, #32 add x2, x0, x2 cmp w1, #16 bgt G_M000_IG09 ldr q16, [x0] ldr q17, [x2, #-0x10] orr v16.8h, v16.8h, v17.8h umaxp v16.8h, v16.8h, v16.8h umov x1, v16.d[0] tst x1, #0xD1FFAB1E cset x0, eq b G_M000_IG13 G_M000_IG09: cmp w1, #32 ble G_M000_IG12 ldp q16, q17, [x0] orr v16.8h, v16.8h, v17.8h ldr q17, [x0, #0x20] orr v16.8h, v16.8h, v17.8h ldr q17, [x0, #0x30] orr v16.8h, v16.8h, v17.8h umaxp v16.8h, v16.8h, v16.8h umov x3, v16.d[0] tst x3, #0xD1FFAB1E bne G_M000_IG15 mov x3, x0 and x3, x3, #15 neg x3, x3, LSR #1 add x3, x3, #32 sxtw x1, w1 sub x1, x1, #32 cmp x3, x1 bhs G_M000_IG11 align [0 bytes for IG10] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG10: lsl x4, x3, #1 add x4, x0, x4 ldp q16, q17, [x4] orr v16.8h, v16.8h, v17.8h ldr q17, [x4, #0x20] orr v16.8h, v16.8h, v17.8h ldr q17, [x4, #0x30] orr v16.8h, v16.8h, v17.8h umaxp v16.8h, v16.8h, v16.8h umov x4, v16.d[0] tst x4, #0xD1FFAB1E bne G_M000_IG15 add x3, x3, #32 cmp x3, x1 blo G_M000_IG10 G_M000_IG11: lsl x1, x1, #1 add x0, x0, x1 G_M000_IG12: ldp q16, q17, [x0] orr v16.8h, v16.8h, v17.8h ldr q17, [x2, #-0x20] orr v16.8h, v16.8h, v17.8h ldr q17, [x2, #-0x10] orr v16.8h, v16.8h, v17.8h umaxp v16.8h, v16.8h, v16.8h umov x0, v16.d[0] tst x0, #0xD1FFAB1E cset x0, eq G_M000_IG13: uxtb w0, w0 G_M000_IG14: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG15: mov w0, wzr G_M000_IG16: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 376 1869: JIT compiled System.Text.Ascii:IsValidCore[ushort](byref,int) [Tier1, IL size=723, code size=376] ; Assembly listing for method System.Reflection.Emit.ILGenerator:IncreaseCapacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x08] ldr w0, [x20, #0x08] lsl w0, w0, #1 ldr w2, [x19, #0x58] add w1, w2, w1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr w2, [x20, #0x08] mov x0, x20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 1870: JIT compiled System.Reflection.Emit.ILGenerator:IncreaseCapacity(int) [Tier1, IL size=57, code size=132] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.__Canon]():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1871: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.__Canon]() [Tier1, IL size=2, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex135_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1872: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex135_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__CanJoinLengthCheck|60_0(System.Text.RegularExpressions.RegexNode):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w1, [x0, #0x2E] sub w2, w1, #3 cmp w2, #9 bhi G_M000_IG03 mov w1, w2 adr x2, [@RWD00] ldr w2, [x2, x1, LSL #2] adr x3, [G_M000_IG02] add x2, x2, x3 br x2 G_M000_IG03: sub w2, w1, #43 cmp w2, #2 bls G_M000_IG05 b G_M000_IG06 G_M000_IG04: mov w0, #1 b G_M000_IG07 G_M000_IG05: ldp w1, w0, [x0, #0x20] cmp w1, w0 beq G_M000_IG04 G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr RWD00 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 ; Total bytes of code 96 1873: JIT compiled System.Text.RegularExpressions.RegexNode:g__CanJoinLengthCheck|60_0(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=94, code size=96] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__GetSubsequent|155_41(int,System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data 1874: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov w20, w0 mov x19, x1 mov x21, x2 G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w22, w0 add w20, w20, #1 cmp w20, w22 bge G_M000_IG10 G_M000_IG03: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG05 G_M000_IG04: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG09 G_M000_IG05: mov x2, x1 cbz x2, G_M000_IG08 G_M000_IG06: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG08 G_M000_IG07: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG08: ldr w0, [x2, #0x10] cmp w20, w0 bhs G_M000_IG13 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w20, w1 bhs G_M000_IG14 add x0, x0, #16 ldr x0, [x0, w20, UXTW #3] b G_M000_IG09 G_M000_IG09: ldrb w1, [x0, #0x2E] cmp w1, #46 bne G_M000_IG12 add w20, w20, #1 cmp w20, w22 blt G_M000_IG03 G_M000_IG10: mov x0, x21 G_M000_IG11: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG12: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 300 1875: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__GetSubsequent|155_41(int,System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier1, IL size=43, code size=300] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb w1, [x0, #0x2E] str w2, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 1876: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int) [Tier1, IL size=21, code size=24] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.__Canon]:get_Current():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 1877: JIT compiled System.Collections.Generic.List`1+Enumerator[System.__Canon]:get_Current() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1878: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex135_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:EliminateEndingBacktracking():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 5 inlinees with PGO data; 14 single block inlinees; 8 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG04 G_M000_IG03: ldr w0, [x19, #0x28] mov w1, #0xD1FFAB1E tst w0, w1 beq G_M000_IG05 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: ldrb w0, [x19, #0x2E] sub w1, w0, #3 cmp w1, #5 bls G_M000_IG57 sub w20, w0, #24 cmp w20, #10 bhi G_M000_IG56 mov w0, w20 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG06: ldr x20, [x19, #0x08] mov x19, x20 cbz x19, G_M000_IG08 G_M000_IG07: ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG12 G_M000_IG08: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG11: ldr w1, [x2, #0x10] cmp w1, #0 bls G_M000_IG60 ldr x1, [x2, #0x08] ldr w0, [x1, #0x08] cmp w0, #0 bls G_M000_IG61 ldr x19, [x1, #0x10] b G_M000_IG12 G_M000_IG12: b G_M000_IG05 G_M000_IG13: ldr x20, [x19, #0x08] cbnz x20, G_M000_IG14 mov w21, wzr b G_M000_IG16 G_M000_IG14: mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG15 ldr w21, [x0, #0x10] b G_M000_IG16 G_M000_IG15: mov w21, #1 G_M000_IG16: sub w21, w21, #1 mov x22, x20 cbz x22, G_M000_IG18 G_M000_IG17: ldr x0, [x22] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG22 G_M000_IG18: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG21 G_M000_IG19: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG21 G_M000_IG20: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG21: ldr w0, [x2, #0x10] cmp w21, w0 bhs G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w21, w1 bhs G_M000_IG61 add x0, x0, #16 ldr x20, [x0, w21, UXTW #3] b G_M000_IG23 G_M000_IG22: mov x20, x22 G_M000_IG23: ldrb w0, [x20, #0x2E] sub w1, w0, #26 sub w2, w0, #33 cmp w0, #24 ccmp w1, #1, z, ne ccmp w2, #1, z, hi bhi G_M000_IG28 ldr x0, [x19, #0x18] cbz x0, G_M000_IG24 ldrb w0, [x0, #0x2E] cmp w0, #32 beq G_M000_IG28 G_M000_IG24: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 ldr w0, [x20, #0x28] mov w1, #32 strb w1, [x21, #0x2E] str w0, [x21, #0x28] mov x0, x21 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x19, #0x08] cbnz x1, G_M000_IG25 mov w22, wzr b G_M000_IG27 G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG26 ldr w22, [x0, #0x10] b G_M000_IG27 G_M000_IG26: mov w22, #1 G_M000_IG27: sub w1, w22, #1 mov x0, x19 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG28: mov x19, x20 b G_M000_IG05 G_M000_IG29: ldr x20, [x19, #0x08] cbnz x20, G_M000_IG30 mov w21, wzr b G_M000_IG32 G_M000_IG30: mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG31 ldr w21, [x0, #0x10] b G_M000_IG32 G_M000_IG31: mov w21, #1 G_M000_IG32: mov w20, #1 cmp w21, #1 ble G_M000_IG40 G_M000_IG33: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG35 G_M000_IG34: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG39 G_M000_IG35: mov x2, x1 cbz x2, G_M000_IG38 G_M000_IG36: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG38 G_M000_IG37: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG38: ldr w0, [x2, #0x10] cmp w20, w0 bhs G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w20, w1 bhs G_M000_IG61 add x0, x0, #16 ldr x0, [x0, w20, UXTW #3] b G_M000_IG39 G_M000_IG39: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add w20, w20, #1 cmp w20, w21 blt G_M000_IG33 G_M000_IG40: ldrb w0, [x19, #0x2E] cmp w0, #34 beq G_M000_IG59 ldr x1, [x19, #0x08] mov x19, x1 cbz x19, G_M000_IG42 G_M000_IG41: ldr x0, [x19] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG46 G_M000_IG42: mov x2, x1 cbz x2, G_M000_IG45 G_M000_IG43: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG45 G_M000_IG44: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG45: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG61 ldr x19, [x0, #0x10] b G_M000_IG46 G_M000_IG46: b G_M000_IG05 G_M000_IG47: ldr w0, [x19, #0x20] str w0, [x19, #0x24] G_M000_IG48: ldr w0, [x19, #0x24] cmp w0, #1 bne G_M000_IG55 ldr x20, [x19, #0x08] mov x19, x20 cbz x19, G_M000_IG50 G_M000_IG49: ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG54 G_M000_IG50: mov x1, x20 mov x2, x1 cbz x2, G_M000_IG53 G_M000_IG51: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG53 G_M000_IG52: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG53: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG60 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG61 ldr x19, [x0, #0x10] b G_M000_IG54 G_M000_IG54: b G_M000_IG05 G_M000_IG55: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 cbz x19, G_M000_IG59 b G_M000_IG05 G_M000_IG56: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG57: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG58: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x1 G_M000_IG59: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG60: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG61: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG48 - G_M000_IG02 dd G_M000_IG47 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG59 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 ; Total bytes of code 1376 1879: JIT compiled System.Text.RegularExpressions.RegexNode:EliminateEndingBacktracking() [Tier1, IL size=346, code size=1376] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex136_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1880: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex136_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1881: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingOrTrailingAnchor(System.Text.RegularExpressions.RegexNode,bool):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 7 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG60 G_M000_IG03: ldrb w0, [x19, #0x2E] G_M000_IG01: sub stp w1, w0, #14 cmp w1, #18 bhi G_M000_IG48 mov w0, w1 fp, lr, [sp, #-0x40]! adr x1, [@RWD00] stp ldr w1, [x1, x0, LSL #2] x19, x20, [sp, adr x2, [#G_M000_IG02]0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 add x1, x1, x2 G_M000_IG02: br x1 sxtw w20, w2 ldr G_M000_IG04: w21 ldr , [x19, #0x4C] x21, [x19, cmp #0x08]w21, w20 bhi G_M000_IG11 mov x19, x21 cbz x19, G_M000_IG06 ubfiz G_M000_IG05: x0 ldr x0, [x19] , x21, #1, #32 movz x1, #0xD1FFAB1E add x22, x1, x0 mov x23, x22 movk x1, #0xD1FFAB1E LSL # sub w24, w20, w21 16 cmp w24, #0 movk x1, #0xD1FFAB1E LSL #32 bls G_M000_IG04 cmp G_M000_IG03: x0, x1 ldrh beq G_M000_IG10 w0, [x23] G_M000_IG06: cmp w0, #62 mov x1, x21 bne G_M000_IG04 mov x2, x1 cmp cbz x2, G_M000_IG09 w24, #1 G_M000_IG07: ldr x0, [x2] blo G_M000_IG11 movz x3, #0xD1FFAB1E add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movk x3, #0xD1FFAB1E LSL #16 movz x3, # movk x3, #0xD1FFAB1E LSL #32 0xD1FFAB1E cmp x0, x3 movk x3, #0xD1FFAB1E LSL #16 beq G_M000_IG09 G_M000_IG08: movk x3, #0xD1FFAB1E LSL #32 mov x0, x3 ldr x3, [x3] movz x2, #0xD1FFAB1E blr x3 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 sub w1, w24, #1 ldr x2, [x2] cmp w0, #0 csel w0, w0, w1, ge blr x2 cmp w0, w24 mov bhi G_M000_IG11 x2, x0 ubfiz x1, x0, #1, #32 G_M000_IG09: add x23, x23, x1 ldr w1, [x2, # sub w24, w24, w0 0x10] add w0, w21, w0 cmp w1, #0 cmp w24 , #1 bls G_M000_IG62 bls G_M000_IG04 ldr x1, [x2, #0x08] ldrh ldr w0, [x1, #0x08] cmp w0, #0 w1, [x23, #0x02] cmp w1, #10 bls G_M000_IG63 ldr x19, [x1, #0x10] bne G_M000_IG04 b G_M000_IG10 add w0, w0, #2 G_M000_IG10: cmp w0, w20 b G_M000_IG03 G_M000_IG11: bhi G_M000_IG11 ldr x21, [x19, #0x08] cbnz x21, G_M000_IG12 b G_M000_IG05 mov w19, wzr b G_M000_IG14 G_M000_IG04: G_M000_IG12: sub w24, w20, w21 mov x1, x21 mov x23, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 cmp w24, #0 movk x0, #0xD1FFAB1E LSL #32 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 movz x2, #0xD1FFAB1E bne G_M000_IG09 add w0, w21, #1 movk x2, #0xD1FFAB1E LSL cmp w0, w20 #16 bhi G_M000_IG11 G_M000_IG05: movk x2, #0xD1FFAB1E LSL str #32 w0, ldr [x19, #0x4C] x2, [x2] blr x2 sxtw w20, w0 cbz x0, G_M000_IG13 cmp w20, w21 ldr bge G_M000_IG06 w19, [x0, #0x10] mov w0, w20 b G_M000_IG14 mov w20, w21 mov G_M000_IG13: w21, w0 G_M000_IG06: mov w19, #1 ldr w0, [x19, #0x58] G_M000_IG14: cbnz w0, G_M000_IG07 mov x22, xzr mov x0, x19 uxtb w23, w20 movz x1, #0xD1FFAB1E cbz w23, G_M000_IG31 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w23, wzr ldr x1, [x1] cmp w19, #0 blr x1 G_M000_IG07: ble G_M000_IG47 ldr x3, [x19, #0x20] G_M000_IG15: ldr w0, [x19 mov x24, x21 , #0x58] cbz x24, G_M000_IG17 G_M000_IG16: ldr x0, [x24] movz x1, #0xD1FFAB1E sub movk x1, #0xD1FFAB1E LSL #16 w0, w0, #1 movk x1, #0xD1FFAB1E LSL #32 str cmp x0, x1 w0, [x19, beq G_M000_IG21 #0x58] G_M000_IG17: ldr w2, [x3, #0x08] mov x1, x21 cmp w0, w2 mov x2, x1 bhs cbz x2, G_M000_IG20 G_M000_IG12 G_M000_IG18: ldr x0, [x2] add x3, x3, #16 movz x3, #0xD1FFAB1E str wzr, [x3, w0, UXTW #2] movk x3, #0xD1FFAB1E LSL #16 sub w3, w20, w21 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 ldr x0, [x19, #0x28] beq G_M000_IG20 mov w2, w21 G_M000_IG19: mov w1, wzr mov x0, x3 movz x2, #0xD1FFAB1E movz x4, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movk x4, #0xD1FFAB1E LSL #16 ldr movk x4, #0xD1FFAB1E LSL #32 x2, [x2] ldr x4, [x4] blr x2 mov x2, x0 ldr wzr, [x0] G_M000_IG20: blr x4 ldr mov w0, #1 w0, [x2, #0x10] cmp G_M000_IG08: w23, w0 ldp bhs G_M000_IG62 x23, ldr x0, [x2, #0x08] x24, [sp ldr w1, [x0, #0x08] , #0x30] cmp w23, w1 ldp bhs G_M000_IG63 x21, x22, [sp, #0x20] add x0, x0, #16 ldr x0, [x0, w23, UXTW #3 ldp x19, x20, [sp, #0x10] ] ldp fp, lr, [sp], #0x40 ret lr b G_M000_IG22 G_M000_IG09: mov w0, wzr G_M000_IG21: G_M000_IG10: mov x0, x24 ldp x23, x24, [sp, #0x30] G_M000_IG22: ldp x21, x22, [sp, #0x20] ldrb w24, [x0, #0x2E] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], # sub w0, w24, #30 0x40 cmp w24, #23 ret lr G_M000_IG11: ccmp movz x0, #0xD1FFAB1E w0, #1, z, ne movk x0, #0xD1FFAB1E LSL #16 bhi G_M000_IG24 add w23, w23, #1 movk x0, #0xD1FFAB1E LSL #32 cmp w23, w19 ldr x0, [x0] blt G_M000_IG15 G_M000_IG23: blr x0 b G_M000_IG47 brk_windows G_M000_IG24: #0 mov x22, x21 G_M000_IG12: cbz x22, G_M000_IG26 G_M000_IG25: ldr x0, [x22] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl cmp x0, x1 CORINFO_HELP_RNGCHKFAIL brk_windows beq G_M000_IG30 #0 ; Total bytes of code 444 G_M000_IG26: mov x1, x21 mov x2, x1 cbz x2, G_M000_IG29 G_M000_IG27: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG29 G_M000_IG28: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 1882: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex136_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG29: ldr w0, [x2, #0x10] cmp w23, w0 bhs G_M000_IG62 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG63 add x0, x0, #16 ldr x22, [x0, w23, UXTW #3] b G_M000_IG30 G_M000_IG30: b G_M000_IG47 G_M000_IG31: sub w19, w19, #1 tbnz w19, #31, G_M000_IG47 G_M000_IG32: mov x24, x21 cbz x24, G_M000_IG34 G_M000_IG33: ldr x0, [x24] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG38 G_M000_IG34: mov x1, x21 mov x2, x1 cbz x2, G_M000_IG37 G_M000_IG35: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG37 G_M000_IG36: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG37: ldr w0, [x2, #0x10] cmp w19, w0 bhs G_M000_IG62 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w19, w1 bhs G_M000_IG63 add x0, x0, #16 ldr x0, [x0, w19, UXTW #3] b G_M000_IG39 G_M000_IG38: mov x0, x24 G_M000_IG39: ldrb w24, [x0, #0x2E] sub w0, w24, #30 cmp w24, #23 ccmp w0, #1, z, ne bhi G_M000_IG41 sub w19, w19, #1 tbz w19, #31, G_M000_IG32 G_M000_IG40: b G_M000_IG47 G_M000_IG41: mov x22, x21 cbz x22, G_M000_IG43 G_M000_IG42: ldr x0, [x22] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG47 G_M000_IG43: mov x1, x21 mov x2, x1 cbz x2, G_M000_IG46 G_M000_IG44: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG46 G_M000_IG45: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG46: ldr w0, [x2, #0x10] cmp w19, w0 bhs G_M000_IG62 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w19, w1 bhs G_M000_IG63 add x0, x0, #16 ldr x22, [x0, w19, UXTW #3] b G_M000_IG47 G_M000_IG47: cbz x22, G_M000_IG60 mov x19, x22 b G_M000_IG03 G_M000_IG48: cmp w0, #41 bne G_M000_IG60 G_M000_IG49: ldrb w21, [x19, #0x2E] b G_M000_IG58 G_M000_IG50: ldr x21, [x19, #0x08] mov x0, x21 cbz x0, G_M000_IG52 G_M000_IG51: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG56 G_M000_IG52: mov x1, x21 mov x2, x1 cbz x2, G_M000_IG55 G_M000_IG53: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG55 G_M000_IG54: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG55: ldr w1, [x2, #0x10] cmp w1, #0 bls G_M000_IG62 ldr x1, [x2, #0x08] ldr w0, [x1, #0x08] cmp w0, #0 bls G_M000_IG63 ldr x0, [x1, #0x10] b G_M000_IG56 G_M000_IG56: uxtb w23, w20 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w21, w0 cbz w21, G_M000_IG60 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 mov w22, #1 cmp w20, #1 ble G_M000_IG58 G_M000_IG57: mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, w21 bne G_M000_IG60 add w22, w22, #1 cmp w22, w20 blt G_M000_IG57 G_M000_IG58: uxtb w0, w21 G_M000_IG59: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG60: mov w0, wzr G_M000_IG61: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG62: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG63: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG49 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG50 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 ; Total bytes of code 1332 1883: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingOrTrailingAnchor(System.Text.RegularExpressions.RegexNode,bool) [Tier1, IL size=355, code size=1332] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:AddWithResize(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w21, [x19, #0x10] add w22, w21, #1 sxtw w0, w22 ldr x1, [x19, #0x08] ldr w2, [x1, #0x08] cbz w2, G_M000_IG04 G_M000_IG03: ldr w1, [x1, #0x08] lsl w1, w1, #1 b G_M000_IG05 G_M000_IG04: mov w1, #4 G_M000_IG05: movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 cmp w1, w2 csel w1, w1, w2, ls cmp w1, w0 csel w1, w1, w0, ge mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w22, [x19, #0x10] ldr x13, [x19, #0x08] ldr w14, [x13, #0x08] cmp w21, w14 bhs G_M000_IG07 mov w14, #40 umull x14, w21, w14 add x14, x14, #16 add x14, x13, x14 mov x13, x20 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 196 1884: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:AddWithResize(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet) [Tier1, IL size=39, code size=196] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex137_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 G_M000_IG07: mov w2, w20 stp mov x0, x19 bl fp, lr, [sp, #-0x10]! System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool mov cbnz w0, G_M000_IG04 fp, sp ldr w0, [x19, #0x4C] cmp G_M000_IG02: ldr w0, w20 x2, [x0, #0x08] ldr w3, [x2, #0x08] beq G_M000_IG04 add w0, w0, #1 cbz w3, G_M000_IG04 str w0, [x19, #0x4C] G_M000_IG03: ldr b G_M000_IG02 w2, [x2, #0x08] G_M000_IG04: lsl ldr x21, [sp, #0x28]w2, w2, #1 ldp b G_M000_IG05 x19, G_M000_IG04: x20, [sp, mov w2, #4#0x18] G_M000_IG05: ldp movz w3, #0xD1FFAB1E fp, lr, [sp], #0x30 movk w3, #0xD1FFAB1E LSL #16 cmp w2, w3 csel w2, w2, w3, ls cmp w2, w1 csel w2, w2, w1, ge ret mov w1, w2 lr movz x2, ; Total bytes of code 108 #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 88 1885: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex137_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] 1886: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Grow(int) [Tier1, IL size=53, code size=88] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:set_Capacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x10] cmp w1, w20 blt G_M000_IG08 ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] cmp w0, w1 beq G_M000_IG07 G_M000_IG03: cmp w1, #0 ble G_M000_IG06 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 cmp w20, #0 ble G_M000_IG04 ldr x0, [x19, #0x08] mov w2, w20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x19, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: mov w0, #7 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 220 1887: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:set_Capacity(int) [Tier1, IL size=86, code size=220] ; Assembly listing for method System.SpanHelpers:ClearWithReferences(byref,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 147358 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x1, #8 blo G_M000_IG04 align [0 bytes for IG03] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: lsl x2, x1, #3 add x3, x0, x2 str xzr, [x3, #-0x08] add x3, x0, x2 G_M000_IG01: str xzr, [x3, #-0x10] stp add x3, x0, x2 fp, lr, [sp, #-0x50]! str xzr, [x3, #-0x18] add x3, x0, x2 stp x19, x20, [sp, #0x18] str xzr, [x3, #-0x20] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] add x3, x0, x2 str str xzr, [x3, #-0x28] x25, [sp, #0x48] add x3, x0, x2 mov str xzr, [x3, #-0x30] fp, sp add x3, x0, x2 mov x19, x0 str xzr, [x3, #-0x38] add x2, x0, x2 G_M000_IG02: str xzr, [x2, #-0x40] ldr sub x1, x1, #8 w20, [x19, #0x4C] cmp x1, #8 sxtw w21, w2 sub bhs G_M000_IG03 w0, w21, #8 G_M000_IG04: cmp w20, w0 cmp x1, #4 ble G_M000_IG05 G_M000_IG03: bhs G_M000_IG08 str w21, [x19, #0x4C] G_M000_IG05: mov w0, wzr cmp x1, #2 G_M000_IG04: bhs G_M000_IG09 ldr x25, [sp, #0x48] G_M000_IG06: ldp cbnz x1, G_M000_IG10 x23, x24, [sp, #0x38] G_M000_IG07: ldp x21, x22, [sp, #0x28] ldp x19 ldp , x20, fp, lr, [sp], #0x10 [ ret lrsp, #0x18] ldp fp, lr, [sp], # G_M000_IG08: 0x50 stp xzr, xzr, [x0, #0x10] ret lsl x2, x1, #3 lr add x2, x0, x2 G_M000_IG05: str xzr, [x2, #-0x18] cmp w20, w21 lsl x2, x1, #3 add x2, x0, x2 bhi G_M000_IG12 str xzr, [x2, #-0x10] G_M000_IG09: ubfiz x0, x20, #1, #32 str add x22, x1, x0 xzr, sub w23, w21, w20 [x0, #0x08] mov w24, wzr lsl x1, x1, #3 sub w25, w23, #7 add x1, x0, x1 cmp w25, #0 str xzr, [x1, #-0x08] ble G_M000_IG03 G_M000_IG10: G_M000_IG06: str xzr, [x0] add w0, w24, #3 G_M000_IG11: cmp w0, w23 ldp fp, lr, [sp], #0x10 bhi G_M000_IG12 ret lr ubfiz x1, x0, #1, #32 ; Total bytes of code 180 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 1888: JIT compiled System.SpanHelpers:ClearWithReferences(byref,ulong) [Tier1 with Static PGO, IL size=255, code size=180] movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1889: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Array:Clear(System.Array,int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 37904 ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp G_M000_IG02: cbz x0, G_M000_IG09 add x19, x0, #16 mov w3, wzr ldr x20, [x0] ldr w4, [x20, #0x04] cmp w4, #24 bhi G_M000_IG10 G_M000_IG03: sub w4, w1, w3 cmp w1, w3 ccmp w4, #0, nc, ge ccmp w2, #0, nc, ge blt G_M000_IG11 G_M000_IG04: add w1, w4, w2 ldr w0, [x0, #0x08] cmp w1, w0 bhi G_M000_IG11 G_M000_IG05: ldrh w1, [x20] mov w0, w4 mul x0, x0, x1 add x0, x0, x19 mov w2, w2 mul x1, x2, x1 ldr w2, [x20] tbz w2, #24, G_M000_IG07 lsr x1, x1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG07: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG09: mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG10: ldr w3, [x20, #0x04] sub w3, w3, #24 lsr w3, w3, #3 ldr w4, [x19, w3, SXTW #2] lsl w3, w3, #3 sxtw x3, w3 add x19, x19, x3 mov w3, w4 b G_M000_IG03 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 256 1890: JIT compiled System.Array:Clear(System.Array,int,int) [Tier1 with Static PGO, IL size=174, code size=256] ; Assembly listing for method System.Diagnostics.Tracing.EventSource:WriteEvent(int,int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 11 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG01: ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data sub sp, sp, #48 stp fp, lr, [sp, #0x20] add fp, sp, #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #-0x18] str w2, [fp, #-0x04] str w3, [fp, #-0x08] str w4, [fp, #-0x0C] G_M000_IG02: ldrb w4, [x0, #0x9D] cbz w4, G_M000_IG04 G_M000_IG03: ldr wzr, [sp], #-0x30 mov x4, sp sub x2, fp, #4 str x2, [x4] mov w2, #4 stp w2, wzr, [x4, #0x08] sub x2, fp, #8 str x2, [x4, #0x10] mov w2, #4 stp w2, wzr, [x4, #0x18] sub x2, fp, #12 str x2, [x4, #0x20] G_M000_IG01: mov w2, #4 stp stp w2, wzr, [x4, #0x28] mov x2, xzr fp, lr, [sp, #-0x50]! mov w3, #3 movz x5, #0xD1FFAB1E stp movk x5, #0xD1FFAB1E LSL #16 x19, movk x5, #0xD1FFAB1E LSL #32 x20 ldr x5, [x5] , [sp, #0x38] str x21, [sp, #0x48] blr x5 mov fp, sp G_M000_IG04: str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] movz mov xip0, #0xD1FFAB1Ex19, x0 movk xip0, #0xD1FFAB1E LSL #16 G_M000_IG02: ldr movk xip0, #0xD1FFAB1E LSL #32 w20, [x19, #0x4C] ldr cmp w20, w2 xip1, bhi G_M000_IG11 [fp ubfiz , #-0x18]x0, x20, #1, #32 add cmp x0, x1, x0 xip0, xip1 mov x1, x0 beq G_M000_IG05 sub w3, w2, w20 bl str x1, [fp, #0x28] CORINFO_HELP_FAIL_FAST str w3, [fp, #0x30] add G_M000_IG05: x1, fp, #40 sub ldr sp, fp, #32 x3, ldp [fp, lr, [sp, #0x20] x1] add sp, sp, #48 ldr w1, [x1 ret lr , #0x08] ; Total bytes of code 176 cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr 1891: JIT compiled System.Diagnostics.Tracing.EventSource:WriteEvent(int,int,int,int) [Tier1, IL size=153, code size=176] q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:DeclareReadOnlySpanChar():System.Reflection.Emit.LocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov G_M000_IG01: w1, stp wzr fp, lr, [sp, #-0x10]! movz x4, #0xD1FFAB1E mov movk x4, #0xD1FFAB1E LSL #16 fp, sp movk x4, #0xD1FFAB1E LSL #32 G_M000_IG02: ldr x4, [x4] ldr ldr wzr, [x0] x0, [x0, #0x08] blr x4 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w0, #1 ldr x2, [x0] G_M000_IG08: ldr x2, [x2, #0x60] ldr x21, [sp, #0x48] ldr x2, [x2, #0x28] ldp G_M000_IG03: x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x10 ldp fp, lr, [sp], # br x2 0x50 ; Total bytes of code 44 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] 1892: JIT compiled System.Text.RegularExpressions.RegexCompiler:DeclareReadOnlySpanChar() [Tier1, IL size=22, code size=44] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1893: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex137_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:LdindU2():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #73 movk x1, #0xD1FFAB1E LSL #32 movk x1, #106 LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 1894: JIT compiled System.Text.RegularExpressions.RegexCompiler:LdindU2() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Stfld(System.Reflection.FieldInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #125 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 1895: JIT compiled System.Text.RegularExpressions.RegexCompiler:Stfld(System.Reflection.FieldInfo) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Rent(int):ushort[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 55288 ; 4 inlinees with PGO data; 18 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex138_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting x21, x22, [sp, #0x28] BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov w19, w1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x21, [x0] sub w0, w19, #1 G_M000_IG01: orr w0, w0, stp #15 fp, lr, [sp, #-0x30]! clz w0, w0 stp eor w0, w0, #31 x19, x20, [sp, #0x18] sub w22, w0, #3 str movz x0, #0xD1FFAB1Ex21, [sp, #0x28] movk x0, #0xD1FFAB1E LSL #16 mov movk x0, #0xD1FFAB1E LSL #32 fp, sp mov w1, #34 mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 bl CORINFO_HELP_GETSHARED_GCTHREADSTATIC_BASE_DYNAMICCLASS ldr str x0, [x0] w0, [x19, # cbz x0, G_M000_IG070x4C] b G_M000_IG02 G_M000_IG04: G_M000_IG01: ldr ldr x21, [sp, #0x28] w1, [x0, #0x08] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 cmp w1, w22 bls G_M000_IG07 ubfiz x1, x22, #4, #32 add x1, x1, #16 ldr x23, [x0, x1]1896: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex138_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] cbz x23, G_M000_IG07 G_M000_IG04: str xzr, [x0, x1] ldrb w0, [x21, #0x9D] cbnz w0, G_M000_IG31 G_M000_IG05: mov x0, x23 G_M000_IG06: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG07: ldr x0, [x20, #0x10] ldr w1, [x0, #0x08] cmp w1, w22 bls G_M000_IG20 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] cbz x0, G_M000_IG19 ldr x19, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw w23, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #35 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG30 udiv w1, w23, w0 msub w23, w1, w0, w23 mov w24, wzr ldr w25, [x19, #0x08] cmp w25, #0 ble G_M000_IG12 G_M000_IG08: cmp w23, w25 bhs G_M000_IG33 add x0, x19, #16 ldr x26, [x0, w23, UXTW #3] ldrsb wzr, [x26] mov x27, xzr mov x0, x26 bl System.Threading.Monitor:Enter(System.Object) ldr x0, [x26, #0x08] ldr w1, [x26, #0x10] sub w1, w1, #1 ldr w2, [x0, #0x08] cmp w2, w1 bhi G_M000_IG14 G_M000_IG09: mov x0, x26 bl System.Threading.Monitor:Exit(System.Object) cbnz x27, G_M000_IG15 G_M000_IG10: add w23, w23, #1 cmp w25, w23 beq G_M000_IG13 G_M000_IG11: add w24, w24, #1 cmp w25, w24 bgt G_M000_IG08 G_M000_IG12: mov x23, xzr b G_M000_IG16 G_M000_IG13: mov w23, wzr b G_M000_IG11 G_M000_IG14: add x0, x0, #16 ubfiz x2, x1, #3, #32 ldr x27, [x0, x2] str xzr, [x0, x2] str w1, [x26, #0x10] b G_M000_IG09 G_M000_IG15: mov x23, x27 G_M000_IG16: cbz x23, G_M000_IG19 ldrb w0, [x21, #0x9D] cbnz w0, G_M000_IG32 G_M000_IG17: mov x0, x23 G_M000_IG18: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG19: mov w0, #16 lsl w19, w0, w22 b G_M000_IG24 G_M000_IG20: cbnz w19, G_M000_IG22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #54 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG21: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG22: mov w0, w19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG24 G_M000_IG23: sxtw x1, w19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x23, x0 b G_M000_IG25 G_M000_IG24: cmp w19, #0xD1FFAB1E blt G_M000_IG23 mov w0, w19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 G_M000_IG25: ldrb w0, [x21, #0x9D] cbz w0, G_M000_IG28 ldrsb wzr, [x23] mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w19, w0 ldr w24, [x23, #0x08] mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w19 mov w2, w24 mov x0, x21 movn w4, #0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w24, [x23, #0x08] mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w1, w19 sxtw w2, w24 sxtw w3, w0 ldr x0, [x20, #0x10] ldr w0, [x0, #0x08] cmp w0, w22 ble G_M000_IG26 mov x0, x21 mov w5, #2 b G_M000_IG27 G_M000_IG26: mov x0, x21 mov w5, #1 G_M000_IG27: movn w4, #0 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG28: mov x0, x23 G_M000_IG29: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG30: bl CORINFO_HELP_THROWDIVZERO G_M000_IG31: mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w19, w0 ldr w24, [x23, #0x08] ldrsb wzr, [x20] mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w19 mov w2, w24 mov x0, x21 mov w4, w22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG05 G_M000_IG32: mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w19, w0 ldr w24, [x23, #0x08] mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w19 mov w2, w24 mov x0, x21 mov w4, w22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG17 G_M000_IG33: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1008 1897: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Rent(int) [Tier1 with Static PGO, IL size=264, code size=1008] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1898: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1899: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex138_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex139_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1900: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex139_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1901: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1902: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex139_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex140_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1903: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex140_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1904: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1905: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex140_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex141_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1906: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex141_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1907: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1908: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex141_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex142_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1909: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex142_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1910: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1911: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex142_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex143_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1912: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex143_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1913: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1914: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex143_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex144_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1915: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex144_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1916: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1917: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex144_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex145_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1918: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex145_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1919: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1920: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex145_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex146_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1921: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex146_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1922: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1923: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex146_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex147_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1924: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex147_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1925: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1926: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex147_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex148_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1927: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex148_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1928: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1929: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex148_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex149_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1930: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex149_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1931: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1932: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex149_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex150_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1933: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex150_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1934: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1935: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex150_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadWarmupStop(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #14 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1936: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadWarmupStop(long) [Tier0, IL size=10, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.StoppingResult:CreateFinished(System.String):BenchmarkDotNet.Engines.StoppingResult ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: stp xzr, xzr, [fp, #0x18] add x0, fp, #24 ldr x2, [fp, #0x28] mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 1937: JIT compiled BenchmarkDotNet.Engines.StoppingResult:CreateFinished(System.String) [Tier0, IL size=8, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.HostExtensions:BeforeMainRun(BenchmarkDotNet.Engines.IHost) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov w1, #2 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 1938: JIT compiled BenchmarkDotNet.Engines.HostExtensions:BeforeMainRun(BenchmarkDotNet.Engines.IHost) [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.EngineActualStage:RunWorkload(long,int,bool):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] str w3, [fp, #0x18] G_M000_IG02: ldr w5, [fp, #0x18] uxtb w5, w5 ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w4, [fp, #0x1C] mov w2, #1 mov w3, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 80 1939: JIT compiled BenchmarkDotNet.Engines.EngineActualStage:RunWorkload(long,int,bool) [Tier0, IL size=12, code size=80] ; Assembly listing for method BenchmarkDotNet.Engines.EngineActualStage:Run(long,int,bool,int,bool):System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str x1, [fp, #0x60] str w2, [fp, #0x5C] str w3, [fp, #0x58] str w4, [fp, #0x54] str w5, [fp, #0x50] G_M000_IG02: ldr w0, [fp, #0x58] uxtb w0, w0 cbnz w0, G_M000_IG03 ldr x0, [fp, #0x68] ldrsb wzr, [x0] ldr x0, [fp, #0x68] add x0, x0, #36 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x50] uxtb w0, w0 cbz w0, G_M000_IG08 G_M000_IG04: ldr x0, [fp, #0x68] ldr x1, [x0, #0x24] str x1, [fp, #0x48] ldr x0, [fp, #0x68] str x0, [fp, #0x40] ldr x0, [fp, #0x60] str x0, [fp, #0x38] ldr w0, [fp, #0x5C] str w0, [fp, #0x34] add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG05 ldr x0, [fp, #0x40] str x0, [fp, #0x28] ldr x0, [fp, #0x38] str x0, [fp, #0x20] ldr w0, [fp, #0x34] str w0, [fp, #0x1C] mov w0, #10 str w0, [fp, #0x18] b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x40] str x0, [fp, #0x28] ldr x0, [fp, #0x38] str x0, [fp, #0x20] ldr w0, [fp, #0x34] str w0, [fp, #0x1C] add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x18] G_M000_IG06: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] ldr w3, [fp, #0x18] ldr w4, [fp, #0x54] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG07: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: ldr x0, [fp, #0x68] ldr x1, [fp, #0x60] ldr w2, [fp, #0x5C] ldr w3, [fp, #0x54] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG09: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 360 1940: JIT compiled BenchmarkDotNet.Engines.EngineActualStage:Run(long,int,bool,int,bool) [Tier0, IL size=69, code size=360] ; Assembly listing for method BenchmarkDotNet.Engines.EngineActualStage:RunAuto(long,int,int):System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str w2, [fp, #0xD1FFAB1E] str w3, [fp, #0xD1FFAB1E] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB0] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xB0] str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA8] str x0, [fp, #0xD1FFAB1E] str wzr, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cmp w0, #0 cset x0, eq str w0, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x68] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG03 ldr x0, [fp, #0xD1FFAB1E] ldr d16, [x0, #0x10] str d16, [fp, #0xA0] b G_M000_IG04 G_M000_IG03: ldr d16, [@RWD00] str d16, [fp, #0xA0] G_M000_IG04: ldr d16, [fp, #0xA0] str d16, [fp, #0xD1FFAB1E] G_M000_IG05: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #104 mov w1, #53 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w8, [fp, #0xD1FFAB1E] add w8, w8, #1 str w8, [fp, #0xD1FFAB1E] add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr w5, [fp, #0xD1FFAB1E] ldr w3, [fp, #0xD1FFAB1E] ldr x4, [fp, #0xD1FFAB1E] mov w2, #3 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x40] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x48] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x58] ldr x0, [fp, #0x40] add x1, fp, #72 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x18] G_M000_IG08: add x0, fp, #0xD1FFAB1E ldp q16, q17, [x0, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG09: ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x18] add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E add x8, fp, #192 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #192 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0xD1FFAB1E] fmul d16, d0, d16 str d16, [fp, #0x90] ldr x0, [fp, #0xD1FFAB1E] ldrsb wzr, [x0] ldr x0, [fp, #0xD1FFAB1E] add x0, x0, #48 str x0, [fp, #0x98] ldr d16, [fp, #0x90] str d16, [fp, #0x88] ldr x0, [fp, #0x98] str x0, [fp, #0x80] ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG10 ldr d16, [fp, #0x88] str d16, [fp, #0x78] ldr d16, [@RWD08] str d16, [fp, #0x70] b G_M000_IG11 G_M000_IG10: ldr x0, [fp, #0x80] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xB8] ldr d16, [fp, #0x88] str d16, [fp, #0x78] add x0, fp, #184 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x70] G_M000_IG11: ldr d0, [fp, #0x70] str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0x78] ldr d1, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0xF8] ldr w0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x1C] cmp w0, w1 blt G_M000_IG12 ldr d16, [fp, #0xD1FFAB1E] ldr d17, [fp, #0xF8] fcmp d16, d17 blo G_M000_IG13 G_M000_IG12: ldr w0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w1, [x1, #0x20] cmp w0, w1 bge G_M000_IG13 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG05 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #20 blt G_M000_IG05 G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG14: ldp fp, lr, [sp], #0xD1FFAB1E ret lr RWD00 dq 3FA999999999999Ah ; 0.05 RWD08 dq 7FEFFFFFFFFFFFFFh ; 1.79769313e+308 ; Total bytes of code 892 1941: JIT compiled BenchmarkDotNet.Engines.EngineActualStage:RunAuto(long,int,int) [Tier0, IL size=225, code size=892] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadActualStart(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #15 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 1942: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadActualStart(long) [Tier0, IL size=10, code size=56] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex151_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1943: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex151_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1944: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1945: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex151_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex152_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1946: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex152_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1947: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1948: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex152_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex153_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1949: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex153_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1950: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1951: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex153_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex154_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1952: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex154_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1953: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1954: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex154_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex155_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1955: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex155_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1956: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 1957: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex155_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex156_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1958: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex156_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1959: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1960: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex156_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex157_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1961: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex157_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1962: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 1963: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex157_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex158_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1964: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex158_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1965: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 1966: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex158_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex159_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1967: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex159_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1968: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 1969: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex159_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex160_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1970: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex160_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1971: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1972: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex160_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex161_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1973: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex161_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 1974: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 1975: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex161_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex162_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1976: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex162_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 1977: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 1978: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex162_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex163_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1979: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex163_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 1980: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 1981: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex163_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex164_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1982: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex164_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1983: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 1984: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex164_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex165_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1985: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex165_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 1986: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 1987: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex165_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex166_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1988: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex166_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 1989: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 1990: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex166_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex167_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1991: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex167_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1992: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 1993: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex167_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex168_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1994: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex168_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 1995: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 1996: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex168_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex169_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 1997: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex169_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 1998: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 1999: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex169_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex170_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2000: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex170_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2001: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2002: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex170_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex171_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2003: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex171_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2004: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2005: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex171_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex172_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2006: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex172_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2007: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2008: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex172_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex173_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2009: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex173_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2010: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2011: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex173_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex174_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2012: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex174_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2013: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2014: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex174_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex175_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2015: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex175_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2016: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2017: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex175_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex176_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2018: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex176_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2019: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2020: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex176_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex177_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2021: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex177_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2022: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2023: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex177_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex178_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2024: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex178_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2025: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2026: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex178_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex179_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2027: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex179_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2028: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2029: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex179_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex180_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2030: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex180_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2031: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2032: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex180_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex181_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2033: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex181_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2034: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2035: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex181_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex182_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2036: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex182_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2037: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2038: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex182_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex183_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2039: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex183_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2040: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2041: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex183_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex184_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2042: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex184_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2043: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2044: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex184_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex185_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2045: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex185_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2046: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2047: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex185_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex186_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2048: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex186_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 ; Assembly listing for method System.Buffers.ArrayPoolEventSource:BufferRented(int,int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 13 single block inlinees; 0 inlinees without PGO data mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh G_M000_IG01: w0, [x22, w0, UXTW #2] sub mov w2, #116 sp, sp, #48 cmp w0, #103 ccmp w0, w2, z, ne stp bne G_M000_IG08 fp, G_M000_IG07: lr, [sp, #0x20] ldrh w0, [x22, w1, UXTW #2] add fp, sp, #32 orr w0, w0, movz #2 x5, #0xD1FFAB1E cmp w0, #99 beq movk x5, #0xD1FFAB1E LSL #16 G_M000_IG10 movk x5, #0xD1FFAB1E LSL #32 G_M000_IG08: add w24, w24, #1 str cmp w24, w25 x5, [fp, #-0x18] blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [ str x19, #w1, [fp, #-0x04] 0x4C] str w2, [fp, #-0x08] mov w0, #1 str w3, [fp, #-0x0C] G_M000_IG11: str w4, [fp, #-0x10] ldr x25 , [sp, #0x48] G_M000_IG02: ldp x23, x24, [sp, #0x38] ldr wzr, [sp], #-0x40 ldp x21, x22, [sp, #0x28] mov ldp x19, x20, [sp, #0x18] x4, sp ldp mov w1, #4fp, lr, [sp] , #0x50 str ret lr w1, [x4, #0x08] sub G_M000_IG12: x1, fp, #4 movz str x0x1, [x4] , str #wzr, [0xD1FFAB1Ex4, #0x0C] mov w1, #4 movk x0, #0xD1FFAB1E LSL #16 str w1, [x4, #0x18] movk x0, #0xD1FFAB1E LSL #32 ldr sub x1, fp, #8 x0, [x0] str x1, [x4, #0x10] blr x0 brk_windows str wzr, [x4, #0x1C] #0 mov w1, #4 G_M000_IG13: str w1, [x4, #0x28] sub x1, fp, #12 str x1, [x4, #0x20] str wzr, [x4, #0x2C] mov w1, #4 bl CORINFO_HELP_RNGCHKFAIL str w1, [x4, #0x38] brk_windows sub x1, fp, #16 #0 str x1, [ x4, #0x30] ; Total bytes of code 324 str wzr, [x4, #0x3C] mov w1, #1 mov x2, xzr mov w3, #4 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 movz 2049: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x18] cmp xip0, xip1 beq G_M000_IG03 bl CORINFO_HELP_FAIL_FAST G_M000_IG03: sub sp, fp, #32 ldp fp, lr, [sp, #0x20] add sp, sp, #48 ret lr ; Total bytes of code 208 2050: JIT compiled System.Buffers.ArrayPoolEventSource:BufferRented(int,int,int,int) [Tier1, IL size=195, code size=208] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2051: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex186_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Return(ushort[],bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 55528 ; 2 inlinees with PGO data; 11 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x21, x0 mov x19, x1 mov w20, w2 G_M000_IG02: cbz x19, G_M000_IG17 G_M000_IG03: ldr w22, [x19, #0x08] sub w0, w22, #1 orr w0, w0, #15 clz w0, w0 eor w0, w0, #31 sub w23, w0, #3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #34 bl CORINFO_HELP_GETSHARED_GCTHREADSTATIC_BASE_DYNAMICCLASS ldr x24, [x0] cbz x24, G_M000_IG18 G_M000_IG04: mov w25, wzr mov w26, #1 ldr w14, [x24, #0x08] cmp w14, w23 bls G_M000_IG06 mov w25, #1 tst w20, #255 bne G_M000_IG19 mov w14, #16 lsl w14, w14, w23 cmp w22, w14 bne G_M000_IG20 G_M000_IG05: ubfiz x14, x23, #4, #32 add x14, x14, #16 add x0, x24, x14 ldr x27, [x0] mov x14, x0 mov x15, x19 bl CORINFO_HELP_CHECKED_ASSIGN_REF str wzr, [x0, #0x08] cbnz x27, G_M000_IG15 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x28, [x0] ldrb w0, [x28, #0x9D] cbnz w0, G_M000_IG25 G_M000_IG07: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG08: ldr x26, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw w20, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #35 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG16 udiv w1, w20, w0 msub w28, w1, w0, w20 mov w20, wzr ldr w24, [x26, #0x08] cmp w24, #0 ble G_M000_IG24 add x26, x26, #16 G_M000_IG09: cmp w28, w24 bhs G_M000_IG30 ldr x1, [x26, w28, UXTW #3] str x1, [fp, #0x10] ldrsb wzr, [x1] str wzr, [fp, #0x1C] mov x0, x1 bl System.Threading.Monitor:Enter(System.Object) ldr x3, [fp, #0x10] ldr x0, [x3, #0x08] ldr w4, [x3, #0x10] str w4, [fp, #0x18] ldr w1, [x0, #0x08] cmp w1, w4 bls G_M000_IG12 G_M000_IG10: cbnz w4, G_M000_IG14 str wzr, [x3, #0x14] G_M000_IG11: sxtw x1, w4 mov x2, x27 bl CORINFO_HELP_ARRADDR_ST ldr w0, [fp, #0x18] add w0, w0, #1 ldr x3, [fp, #0x10] str w0, [x3, #0x10] mov w2, #1 str w2, [fp, #0x1C] G_M000_IG12: mov x0, x3 bl System.Threading.Monitor:Exit(System.Object) ldr w0, [fp, #0x1C] cbz w0, G_M000_IG22 mov w26, #1 G_M000_IG13: b G_M000_IG06 G_M000_IG14: b G_M000_IG11 G_M000_IG15: ldr x0, [x21, #0x10] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG30 add x0, x0, #16 ldr x0, [x0, w23, UXTW #3] cbz x0, G_M000_IG21 b G_M000_IG08 G_M000_IG16: bl CORINFO_HELP_THROWDIVZERO G_M000_IG17: mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG18: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x24, x0 b G_M000_IG04 G_M000_IG19: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, #16 lsl w0, w0, w23 cmp w22, w0 beq G_M000_IG05 G_M000_IG20: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x23, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x23 mov x0, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x21 bl CORINFO_HELP_THROW G_M000_IG21: mov x0, x21 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG08 G_M000_IG22: add w28, w28, #1 cmp w24, w28 bne G_M000_IG23 mov w28, wzr G_M000_IG23: add w20, w20, #1 cmp w24, w20 bgt G_M000_IG09 G_M000_IG24: mov w26, wzr b G_M000_IG13 G_M000_IG25: cbz w22, G_M000_IG07 mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w20, w0 sxtw w24, w22 ldrsb wzr, [x21] mov x0, x21 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w4, w0 mov x0, x28 mov w2, w20 mov w3, w24 mov w1, #3 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 tst w25, w26 bne G_M000_IG07 mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w19, w0 mov x0, x21 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int cbnz w25, G_M000_IG26 movn w4, #0 b G_M000_IG27 G_M000_IG26: sxtw w4, w23 G_M000_IG27: sxtw w1, w19 sxtw w2, w22 sxtw w3, w0 cbnz w25, G_M000_IG28 mov x0, x28 mov w5, #1 b G_M000_IG29 G_M000_IG28: mov x0, x28 mov w5, wzr G_M000_IG29: movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 b G_M000_IG07 G_M000_IG30: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 956 2052: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Return(ushort[],bool) [Tier1 with Static PGO, IL size=232, code size=956] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldarg_1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #3 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 2053: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldarg_1() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldthisfld(System.Reflection.FieldInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] movz x1, #123 movk x1, #0xD1FFAB1E LSL #32 movk x1, #102 LSL #48 mov x2, x20 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x30] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x3 ; Total bytes of code 88 2054: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldthisfld(System.Reflection.FieldInfo) [Tier1, IL size=24, code size=88] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__SliceInputSpan|0():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 144 2055: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__SliceInputSpan|0() [Tier1, IL size=68, code size=144] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSum|1(int,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: cbnz x2, G_M000_IG05 G_M000_IG03: ldr x0, [x19, #0x08] mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG05: cbnz w20, G_M000_IG07 ldr x0, [x19, #0x08] mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG07: ldr x0, [x19, #0x08] mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x1 ; Total bytes of code 188 2056: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSum|1(int,System.Reflection.Emit.LocalBuilder) [Tier1, IL size=68, code size=188] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex187_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2057: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex187_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetOnlyCategories(System.String,System.Span`1[int],byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x23, x0 mov x21, x1 mov w20, w2 mov x19, x3 mov x22, x4 G_M000_IG02: strb wzr, [x22] str wzr, [x19] mov w24, wzr ldr w25, [x23, #0x08] cmp w25, #2 bls G_M000_IG19 ldrh w0, [x23, #0x10] cbz w0, G_M000_IG17 G_M000_IG03: ldrh w0, [x23, #0x0E] cbnz w0, G_M000_IG17 mov x0, x23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG17 ldrh w0, [x23, #0x10] add w0, w0, #3 mov w1, #3 cmp w0, #3 ble G_M000_IG15 add x2, x23, #12 G_M000_IG04: cmp w1, w25 bhs G_M000_IG19 ldrh w3, [x2, w1, UXTW #2] sxth w3, w3 cmp w3, #0 ble G_M000_IG06 G_M000_IG05: ldrb w4, [x22] tst w24, w4 bne G_M000_IG17 cmp w3, #100 beq G_M000_IG17 ldr w4, [x19] cmp w4, w20 beq G_M000_IG17 mov w24, #1 add w5, w4, #1 str w5, [x19] cmp w4, w20 bhs G_M000_IG19 sub w3, w3, #1 str w3, [x21, w4, UXTW #2] b G_M000_IG14 align [0 bytes for IG09] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: tbz w3, #31, G_M000_IG08 cbz w24, G_M000_IG07 ldrb w4, [x22] cbz w4, G_M000_IG17 G_M000_IG07: cmn w3, #100 beq G_M000_IG17 ldr w4, [x19] cmp w4, w20 beq G_M000_IG17 mov w24, #1 mov w4, #1 strb w4, [x22] ldr w4, [x19] add w5, w4, #1 str w5, [x19] cmp w4, w20 bhs G_M000_IG19 neg w3, w3 sub w3, w3, #1 str w3, [x21, w4, UXTW #2] b G_M000_IG14 G_M000_IG08: add w1, w1, #1 cmp w1, w25 bhs G_M000_IG19 ldrh w4, [x2, w1, UXTW #2] sxth w3, w4 cmp w3, #0 ble G_M000_IG11 ldrb w4, [x22] tst w24, w4 bne G_M000_IG17 mov w24, #1 G_M000_IG09: ldr w4, [x19] cmp w4, w20 beq G_M000_IG17 add w5, w4, #1 str w5, [x19] cmp w4, w20 bhs G_M000_IG19 sub w3, w3, #1 str w3, [x21, w4, UXTW #2] add w1, w1, #1 cmp w1, w25 bhs G_M000_IG19 ldrh w4, [x2, w1, UXTW #2] sxth w3, w4 cbnz w3, G_M000_IG09 G_M000_IG10: b G_M000_IG14 G_M000_IG11: cbz w24, G_M000_IG12 ldrb w4, [x22] cbz w4, G_M000_IG17 G_M000_IG12: mov w4, #1 strb w4, [x22] sxtw w24, w4 align [4 bytes for IG13] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG13: ldr w4, [x19] cmp w4, w20 beq G_M000_IG17 add w5, w4, #1 str w5, [x19] cmp w4, w20 bhs G_M000_IG19 neg w3, w3 sub w3, w3, #1 str w3, [x21, w4, UXTW #2] add w1, w1, #1 cmp w1, w25 bhs G_M000_IG19 ldrh w3, [x2, w1, UXTW #2] sxth w3, w3 cbnz w3, G_M000_IG13 G_M000_IG14: add w1, w1, #1 cmp w1, w0 blt G_M000_IG04 G_M000_IG15: ldrb w0, [x22] ldrh w1, [x23, #0x0C] cmp w1, #1 cset x1, eq eor w0, w0, w1 strb w0, [x22] mov w0, #1 G_M000_IG16: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 612 2058: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetOnlyCategories(System.String,System.Span`1[int],byref,byref) [Tier1, IL size=370, code size=612] ; Assembly listing for method System.Reflection.RuntimeParameterInfo:.ctor(System.Reflection.MethodInfo,System.String,System.Type,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #24 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #32 mov x15, x2 G_M000_IG01:bl CORINFO_HELP_ASSIGN_REF stp mov w14, #1 dmb ish strb fpw14, , lr, [sp, #-0x50]![ x0, # stp 0x44] x19, x20, [sp strb w14, [x0, #0x18] , #0x45] stp x21, x22, [sp, #0x28] add x14, x0, #8 stp x23, x24, [sp, #0x38] mov x15, x3 str bl CORINFO_HELP_ASSIGN_REF x25, [sp, #0x48] stp mov wzr, w4, [x0, #0x28] mov w13, #0xD1FFAB1E str w13, [x0, #0x40] movz x13, #0xD1FFAB1E fp movk x13, #0xD1FFAB1E LSL #16 , sp movk x13, #0xD1FFAB1E LSL #32 mov ldr x19, x0 x13, [x13] add x13, x13, #8 G_M000_IG02: add x14, x0, #72 ldr bl CORINFO_HELP_ASSIGN_BYREF w20 ldr x12, [x13], #0x08 , [x19, #0x4C] str x12, [x14], # sxtw w21, w2 0x08 sub G_M000_IG03: w0, w21, #8 ldp cmp fp, lr, [sp], #0x10 w20 ret lr , w0 ; Total bytes of code 116 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr 2059: JIT compiled System.Reflection.RuntimeParameterInfo:.ctor(System.Reflection.MethodInfo,System.String,System.Type,int) [Tier1, IL size=81, code size=116] G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2060: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:ChkCastAny(ulong,System.Object):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 308578 ; 1 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x1, G_M000_IG04 G_M000_IG03: ldr x2, [x1] cmp x2, x0 bne G_M000_IG06 G_M000_IG04: mov x0, x1 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] add x3, x3, #16 ror x4, x2, #32 eor x4, x4, x0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 movk x5, #0xD1FFAB1E LSL #48 mul x4, x4, x5 ldr w5, [x3] lsr x4, x4, x5 mov w5, wzr G_M000_IG07: add w6, w4, #1 mov w7, #24 smull x6, w6, w7 add x6, x3, x6 ldar w7, [x6] ldr x8, [x6, #0x08] and w7, w7, #0xD1FFAB1E cmp x8, x2 bne G_M000_IG09 G_M000_IG08: ldr x8, [x6, #0x10] eor x8, x8, x0 cmp x8, #1 bls G_M000_IG12 G_M000_IG09: cbz w7, G_M000_IG14 G_M000_IG10: add w5, w5, #1 add w4, w4, w5 ldr w8, [x3, #0x04] and w4, w4, w8 cmp w5, #8 blt G_M000_IG07 G_M000_IG11: b G_M000_IG14 G_M000_IG12: dmb ishld ldr w2, [x6] cmp w7, w2 bne G_M000_IG14 G_M000_IG13: cmp w8, #1 beq G_M000_IG04 G_M000_IG14: bl System.Runtime.CompilerServices.CastHelpers:ChkCastAny_NoCacheLookup(ulong,System.Object):System.Object G_M000_IG15: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 216 2061: JIT compiled System.Runtime.CompilerServices.CastHelpers:ChkCastAny(ulong,System.Object) [Tier1 with Static PGO, IL size=38, code size=216] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2062: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex187_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex188_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2063: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex188_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2064: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanCharClass(bool,bool):System.Text.RegularExpressions.RegexCharClass:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 54 single block inlinees; 17 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: mov w21, wzr mov w22, wzr mov w23, #1 uxtb w24, w2 cbnz w24, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x25, x0 b G_M000_IG05 G_M000_IG04: mov x25, xzr G_M000_IG05: ldr x1, [x19, #0x28] ldr w1, [x1, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG37 G_M000_IG06: ldr x1, [x19, #0x28] sxtw w0, w2 ldr w3, [x1, #0x08] cmp w0, w3 bhs G_M000_IG60 add x1, x1, #12 ldrh w1, [x1, w0, UXTW #2] cmp w1, #94 bne G_M000_IG37 add w1, w2, #1 str w1, [x19, #0x58] cbnz w24, G_M000_IG07 mov w1, #1 strb w1, [x25, #0x24] G_M000_IG07: ldr w1, [x19, #0x70] tbz w1, #8, G_M000_IG37 ldr w1, [x19, #0x58] ldr x2, [x19, #0x28] ldr w0, [x2, #0x08] cmp w1, w0 bhs G_M000_IG60 add x2, x2, #12 ldrh w1, [x2, w1, UXTW #2] cmp w1, #93 bne G_M000_IG37 b G_M000_IG36 G_M000_IG08: mov w26, wzr ldr x1, [x19, #0x28] ldr w2, [x19, #0x58] add w0, w2, #1 str w0, [x19, #0x58] ldr w0, [x1, #0x08] cmp w2, w0 bhs G_M000_IG60 add x1, x1, #12 ldrh w27, [x1, w2, UXTW #2] cmp w27, #93 bne G_M000_IG10 cbnz w23, G_M000_IG32 G_M000_IG09: b G_M000_IG47 G_M000_IG10: cmp w27, #92 bne G_M000_IG30 ldr x28, [x19, #0x28] ldr w1, [x28, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG30 add w1, w2, #1 str w1, [x19, #0x58] ldr w1, [x28, #0x08] cmp w2, w1 bhs G_M000_IG60 add x1, x28, #12 ldrh w27, [x1, w2, UXTW #2] cmp w27, #83 bhi G_M000_IG12 cmp w27, #68 bhi G_M000_IG11 cmp w27, #45 beq G_M000_IG22 cmp w27, #68 beq G_M000_IG14 b G_M000_IG29 G_M000_IG11: cmp w27, #80 beq G_M000_IG20 cmp w27, #83 beq G_M000_IG18 b G_M000_IG29 G_M000_IG12: cmp w27, #100 bhi G_M000_IG13 cmp w27, #87 beq G_M000_IG19 cmp w27, #100 beq G_M000_IG14 b G_M000_IG29 G_M000_IG13: cmp w27, #112 beq G_M000_IG20 cmp w27, #115 beq G_M000_IG18 cmp w27, #119 beq G_M000_IG19 b G_M000_IG29 G_M000_IG14: cbnz w24, G_M000_IG36 cbnz w22, G_M000_IG51 ldr w1, [x19, #0x70] tst w1, #0xD1FFAB1E cset x1, ne cmp w27, #68 cset x2, eq ldr x4, [x19, #0x28] ldr w5, [x19, #0x58] ldrsb wzr, [x25] cbz w1, G_M000_IG17 cbnz w2, G_M000_IG15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 b G_M000_IG16 G_M000_IG15: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG16: add x2, x1, #12 ldr w1, [x1, #0x08] str w1, [fp, #0x1C] mov x1, x2 ldr w2, [fp, #0x1C] mov x0, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG36 G_M000_IG17: mov x0, x25 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w3, wzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 b G_M000_IG36 G_M000_IG18: cbnz w24, G_M000_IG36 cbnz w22, G_M000_IG52 ldr w1, [x19, #0x70] tst w1, #0xD1FFAB1E cset x1, ne cmp w27, #83 cset x2, eq mov x0, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG36 G_M000_IG19: cbnz w24, G_M000_IG36 cbnz w22, G_M000_IG53 ldr w1, [x19, #0x70] tst w1, #0xD1FFAB1E cset x1, ne cmp w27, #87 cset x2, eq mov x0, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 b G_M000_IG36 G_M000_IG20: cbnz w24, G_M000_IG21 cbnz w22, G_M000_IG54 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 cmp w27, #112 cset x2, ne ldr w5, [x19, #0x58] ldr x4, [x19, #0x28] uxtb w3, w20 mov x0, x25 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 b G_M000_IG36 G_M000_IG21: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG36 G_M000_IG22: cbnz w24, G_M000_IG36 cbz w22, G_M000_IG26 cmp w21, w27 bgt G_M000_IG55 ldr x0, [x25, #0x08] cbnz x0, G_M000_IG23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC add x14, x22, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x25, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF mov x0, x22 G_M000_IG23: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x1, [x0, #0x08] ldr w2, [x0, #0x10] ldr w3, [x1, #0x08] cmp w3, w2 bls G_M000_IG24 add w3, w2, #1 str w3, [x0, #0x10] ubfiz x0, x2, #2, #32 add x0, x0, #16 add x0, x1, x0 strh w21, [x0] strh w27, [x0, #0x02] b G_M000_IG25 G_M000_IG24: strh w21, [fp, #0x10] strh w27, [fp, #0x12] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG25: mov w22, wzr mov w21, wzr b G_M000_IG36 G_M000_IG26: ldr x0, [x25, #0x08] cbnz x0, G_M000_IG27 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x26, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC add x14, x26, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x25, #8 mov x15, x26 bl CORINFO_HELP_ASSIGN_REF mov x0, x26 G_M000_IG27: uxth w1, w27 ldr w2, [x0, #0x14] add w2, w2, #1 str w2, [x0, #0x14] ldr x2, [x0, #0x08] ldr w3, [x0, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG28 add w4, w3, #1 str w4, [x0, #0x10] ubfiz x0, x3, #2, #32 add x0, x0, #16 add x0, x2, x0 strh w1, [x0] strh w1, [x0, #0x02] b G_M000_IG36 G_M000_IG28: strh w1, [fp, #0x10] strh w1, [fp, #0x12] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG36 G_M000_IG29: ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w27, w0 mov w26, #1 b G_M000_IG32 G_M000_IG30: cmp w27, #91 bne G_M000_IG32 ldr x28, [x19, #0x28] ldr w0, [x28, #0x08] ldr w2, [x19, #0x58] sub w0, w0, w2 cmp w0, #0 ble G_M000_IG32 mov x0, x28 sxtw w1, w2 ldr w3, [x0, #0x08] cmp w1, w3 bhs G_M000_IG60 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #58 bne G_M000_IG32 cbnz w22, G_M000_IG32 sxtw w0, w2 add w1, w2, #1 str w1, [x19, #0x58] ldr x1, [x19, #0x28] ldr w2, [x1, #0x08] ldr w3, [x19, #0x58] sub w2, w2, w3 cmp w2, #2 blt G_M000_IG31 add w2, w3, #1 str w2, [x19, #0x58] ldr w2, [x1, #0x08] cmp w3, w2 bhs G_M000_IG60 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #58 bne G_M000_IG31 ldr x1, [x19, #0x28] ldr w2, [x19, #0x58] add w3, w2, #1 str w3, [x19, #0x58] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG60 add x1, x1, #12 ldrh w1, [x1, w2, UXTW #2] cmp w1, #93 beq G_M000_IG32 G_M000_IG31: str w0, [x19, #0x58] G_M000_IG32: cbz w22, G_M000_IG42 mov w22, wzr cbnz w24, G_M000_IG36 cmp w27, #91 bne G_M000_IG39 orr w0, w26, w23 cbnz w0, G_M000_IG39 ldr x0, [x25, #0x08] cbnz x0, G_M000_IG33 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x27, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC add x14, x27, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x25, #8 mov x15, x27 bl CORINFO_HELP_ASSIGN_REF mov x0, x27 G_M000_IG33: uxth w1, w21 ldr w2, [x0, #0x14] add w2, w2, #1 str w2, [x0, #0x14] ldr x2, [x0, #0x08] ldr w3, [x0, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG34 add w4, w3, #1 str w4, [x0, #0x10] ubfiz x0, x3, #2, #32 add x0, x0, #16 add x0, x2, x0 strh w1, [x0] strh w1, [x0, #0x02] b G_M000_IG35 G_M000_IG34: strh w1, [fp, #0x10] strh w1, [fp, #0x12] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG35: mov w2, w24 uxtb w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x15, x0 add x14, x25, #24 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG36 ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG60 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, #93 bne G_M000_IG56 G_M000_IG36: mov w23, wzr G_M000_IG37: ldr x1, [x19, #0x28] ldr w1, [x1, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG59 G_M000_IG38: b G_M000_IG08 G_M000_IG39: cmp w21, w27 bgt G_M000_IG57 ldr x0, [x25, #0x08] cbnz x0, G_M000_IG40 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x26, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC add x14, x26, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x25, #8 mov x15, x26 bl CORINFO_HELP_ASSIGN_REF mov x0, x26 G_M000_IG40: uxth w1, w21 uxth w2, w27 ldr w3, [x0, #0x14] add w3, w3, #1 str w3, [x0, #0x14] ldr x3, [x0, #0x08] ldr w4, [x0, #0x10] ldr w5, [x3, #0x08] cmp w5, w4 bls G_M000_IG41 add w5, w4, #1 str w5, [x0, #0x10] ubfiz x0, x4, #2, #32 add x0, x0, #16 add x0, x3, x0 strh w1, [x0] strh w2, [x0, #0x02] b G_M000_IG36 G_M000_IG41: strh w1, [fp, #0x10] strh w2, [fp, #0x12] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG36 G_M000_IG42: ldr x2, [x19, #0x28] ldr w1, [x2, #0x08] ldr w0, [x19, #0x58] sub w1, w1, w0 cmp w1, #2 blt G_M000_IG43 mov x1, x2 sxtw w3, w0 ldr w4, [x1, #0x08] cmp w3, w4 bhs G_M000_IG60 add x1, x1, #12 ldrh w1, [x1, w3, UXTW #2] cmp w1, #45 bne G_M000_IG43 mov x1, x2 add w3, w0, #1 sxtw w4, w3 ldr w5, [x1, #0x08] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data cmp w4, w5 bhs G_M000_IG60 add x1, x1, #12 ldrh w1, [x1, w4, UXTW #2] cmp w1, #93 beq G_M000_IG43 sxtw w21, w27 mov w22, #1 str w3, [x19, #0x58] b G_M000_IG36 G_M000_IG43: ldr w3, [x2, #0x08] sub w1, w3, w0 cmp w1, #0 ble G_M000_IG44 cmp w27, #45 bne G_M000_IG44 cbnz w26, G_M000_IG44 sxtw w1, w0 ldr w3, [x2, #0x08] cmp w1, w3 bhs G_M000_IG60 add x2, x2, #12 ldrh w2, [x2, w1, UXTW #2] cmp w2, #91 bne G_M000_IG44 cbnz w23, G_M000_IG44 add w3, w0, #1 str w3, [x19, #0x58] mov w2, w24 uxtb w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr x3, [x3] blr x3 stp cbnz w24, G_M000_IG36 fp add x14, x25, #24 , lr, [sp, #-0x70]! mov x15, x0 stp bl x19, x20, [sp, #0x58] CORINFO_HELP_ASSIGN_REF str ldr x21, [sp, #0x68] x0, [x19, #0x28] mov fp, sp ldr w1, [x0, #0x08] add ldr w2, [x19, #0x58] x9, fp, #24 sub w1, w1, w2 movi cmp w1, #0 v16.16b ble G_M000_IG36 , #0 ldr w1, [x0, #0x08] cmp w2, w1 stp bhs G_M000_IG60 q16, q16, [x9] add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] stp cmp w0, #93 q16, q16, [x9, #0x20] bne G_M000_IG58 mov b G_M000_IG36 x19, x0 G_M000_IG44: cbnz w24, G_M000_IG36 G_M000_IG02: ldr x0, [x25, #0x08] ldr cbnz x0, G_M000_IG45 w20, [x19, #0x4C] movz x0, #0xD1FFAB1E cmp movk x0, #0xD1FFAB1E LSL #w20, w2 16 bhi G_M000_IG19 movk x0, #0xD1FFAB1E LSL #32 ubfiz x0, x20, #1, #32 bl CORINFO_HELP_NEWSFAST add x0, x1, x0 mov x23, x0 mov x1, x0 movz x0, #0xD1FFAB1E sub w3, w2, w20 movk x0, #0xD1FFAB1E LSL #16 cmp w3, #7 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC bls G_M000_IG08 add x14, x23, #8 G_M000_IG03: mov x15, x0 str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] bl CORINFO_HELP_ASSIGN_REF cmp w4, #5 add x14, x25, #8 mov x15, x23 blt G_M000_IG08 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov x0, x23 ldr x4, [x5] G_M000_IG45: uxth w1, w27 movz x6, #97 ldr w2, [x0, #0x14] movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 add eor x4, x4, x6 w2, w2, #1 ldr w5, [ str x5, #0x06] w2, [x0, #0x14] movz w6, #103 ldr movk w6, #116 LSL x2, [x0, #0x08] #16 ldr w3 eor w6, w5, w6 , [x0, #0x10] mov w5, w6 ldr w4, [x2, #0x08] orr x4, x4, x5 cmp w4, w3 bls G_M000_IG46 cbnz x4, G_M000_IG08 G_M000_IG05: add w4, w3, #1 ldrh str w4, [x0, #0x10] w4, ubfiz x0, x3, #2, #32 [x1, #0x0A] add x0, x0, #16 orr w5, w4, add x0, x2, x0 # strh 4 w1, [x0] mov w6, #116 strh w1, [x0, #0x02] b G_M000_IG36 cmp w5, #103 ccmp w4, w6, z, ne G_M000_IG46: bne G_M000_IG08 cmp w3, #6 strh w1, [fp, #0x10] blo G_M000_IG19 strh w1, [fp, #0x12] add ldr w1, [fp, #0x10] x1, x1, #12 movz x2, #0xD1FFAB1E sub w3, w3, #6 movk x2, #0xD1FFAB1E LSL #16 str movk x2, #0xD1FFAB1E LSL #32 x1, [fp, #0x18] ldr x2, [x2] str w3, [fp, #0x20] blr x2 add x4, fp, #24 b G_M000_IG36 ldr G_M000_IG47: x1, [x4] cmp ldr w24, #0 w3, [x4, #0x08] cset x1, eq cmp w3, #2 uxtb w0, w20 tst w1, w0 blt G_M000_IG08 beq G_M000_IG49 G_M000_IG48: G_M000_IG05: ldr x1, [x19, #0x30] ldr w1, [x1] mov x0, x25 movz x2, #0xD1FFAB1E movz w3, #97 movk x2, #0xD1FFAB1E LSL #16 movk w3, #97 LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp w1, w3 ldr x2, [x2] bne G_M000_IG08 ldr wzr, [x0] G_M000_IG07: blr x2 add w0, w20, #8 G_M000_IG49: mov x0, x25 cmp w0, w2 G_M000_IG50: bhi G_M000_IG19 b G_M000_IG13 ldp G_M000_IG08: x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp sub w3, w2, w20 x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] mov x1, x0 cmp w3, #7 ldp x19, x20, [sp, #0x20] ldp bls G_M000_IG17 fp, lr, [sp], #0x70 str x1, [fp, #0x48] ret lr str w3, [fp, #0x50] add x0, fp, G_M000_IG51: #72 movz x0, #0xD1FFAB1E ldr x4, [x0] movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0, #0x08] cmp w0, #2 bl blt G_M000_IG17 CORINFO_HELP_NEWSFAST G_M000_IG09: mov x20, x0 ldr w0, [x4] movz w6, movz x0, #0xD1FFAB1E #103 movk w6, #116 LSL #16 movk x0, add w4, w6, #13 #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp w0, w4 ldr bne G_M000_IG17 x0, [x0] G_M000_IG10: blr x0 ldrh strh w4, [x1, #0x04] w27, [x20, #0x08] orr w0, w4, #2 mov w5, #103 mov x1, x20 movz x2, #0xD1FFAB1E cmp w0, #99 ccmp w4, w5, z, ne movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bne G_M000_IG17 ldr x2, [x2] cmp w3, #3 blr x2 mov x2, x0 blo G_M000_IG19 mov x0, x19 add x0, x1, #6 mov w1, #25 movz x3, #0xD1FFAB1E sub w1, w3, #3 movk x3, #0xD1FFAB1E LSL #16 str movk x3, #0xD1FFAB1E LSL #32 x0, ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG52: movz x0, #0xD1FFAB1E [fp, #0x38] movk x0, #0xD1FFAB1E LSL #16 str movk x0, #0xD1FFAB1E LSL #32 w1, [fp, #0x40] bl CORINFO_HELP_NEWSFAST add x0, fp, #56 mov x20, x0 ldr x1, [x0] movz x0, #0xD1FFAB1E ldr w0, [x0, #0x08] movk x0, #0xD1FFAB1E LSL #16 cmp w0, #5 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blt G_M000_IG17 blr x0 strh w27, G_M000_IG11: [x20, #0x08] mov x1, x20 ldr x0, [x1] movz x3, #97 movz x2, #0xD1FFAB1E movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x2, #0xD1FFAB1E LSL #16 movk x3, #99 LSL #48 movk x2, #0xD1FFAB1E LSL #32 eor x0, x0, x3 ldr x2, [x2] ldr blr x2 w1, [x1, #0x06] mov x2, x0 sub w3, w6, #4 eor w1, w1, w3 mov x0, x19 mov w1, w1 mov w1, #25 orr x0, x0, x1 movz x3, #0xD1FFAB1E cbnz x0, G_M000_IG17 movk x3, #0xD1FFAB1E LSL #16 G_M000_IG12: movk x3, #0xD1FFAB1E LSL #32 add w0, w20, #8 ldr x3, [x3] cmp w0, w2 blr x3 bhi G_M000_IG19 G_M000_IG13: bl CORINFO_HELP_THROW str w0, [x19, #0x4C] sxtw w21, w0 G_M000_IG53: movz x0, #0xD1FFAB1E cmp w21, w20 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bge bl CORINFO_HELP_NEWSFAST G_M000_IG14 mov x20, x0 mov w0, w20 movz x0, # mov w20, w21 0xD1FFAB1E mov w21, w0 movk x0, #0xD1FFAB1E LSL #16 G_M000_IG14: movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x19, #0x58] ldr x0, [x0] cbnz w0, G_M000_IG15 blr x0 mov x0, x19 strh movz x1, #0xD1FFAB1E w27, [x20, #0x08] movk x1, #0xD1FFAB1E LSL #16 mov x1, x20 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E ldr x1, [x1] movk x2, #0xD1FFAB1E LSL #16 blr x1 G_M000_IG15: movk x2, #0xD1FFAB1E LSL #32 ldr x3, [x19, #0x20] ldr x2, [x2] ldr w0, [x19, #0x58] blr x2 sub w0, w0, #1 mov x2, x0 str w0, [x19, #0x58] mov x0, x19 ldr w2, [x3, #0x08] mov w1, #25 cmp w0, w2 movz x3, #0xD1FFAB1E bhs G_M000_IG20 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 add ldr x3, [x3] x3, x3, blr x3 #16 bl CORINFO_HELP_THROW G_M000_IG54: str movz x0, #0xD1FFAB1E wzr, [x3, w0, UXTW #2] movk x0, #0xD1FFAB1E LSL #16 sub w3, w21, w20 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr mov x20, x0 x0, [x19, #0x28] movz x0, #0xD1FFAB1E mov w2, w20 movk x0, #0xD1FFAB1E LSL #16 mov w1, wzr movk x0, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E ldr x0, [x0] movk x4, #0xD1FFAB1E LSL #16 blr x0 movk x4, #0xD1FFAB1E LSL #32 strh ldr x4, [x4] w27, [x20, #0x08] ldr mov x1, x20 wzr, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 blr x4 ldr x2, [x2] mov w0, #1 blr x2 mov x2, x0 G_M000_IG16: mov x0, x19 ldr mov w1, x21, [sp, #0x68] #25 ldp x19, x20, [sp, #0x58] movz ldp fp, lr, [sp], #0x70 x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 ret lr movk x3, #0xD1FFAB1E LSL #32 G_M000_IG17: ldr movx3, [x3] blr x3 w0, wzr G_M000_IG18: bl ldr x21, [sp, #0x68] CORINFO_HELP_THROW ldp x19, x20, [sp, #0x58] G_M000_IG55: movz x0, ldp fp, lr, [sp], #0x70 #0xD1FFAB1E ret lr movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG19: ldr x0, [x0] movz x0, #0xD1FFAB1E blr x0 mov x2, x0 movk x0, #0xD1FFAB1E LSL #16 mov x0, x19 movk x0, #0xD1FFAB1E LSL #32 mov w1, #24 ldr x0, [x0 movz x3, #0xD1FFAB1E ] movk x3, #0xD1FFAB1E LSL #16 blr x0 movk x3, #0xD1FFAB1E LSL #32 brk_windows ldr x3, [x3] #0 blr x3 bl CORINFO_HELP_THROW G_M000_IG56: G_M000_IG18: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 bl mov x2, x0 CORINFO_HELP_RNGCHKFAIL mov x0, x19 brk_windows mov w1, #23 #0 movz x3, #0xD1FFAB1E ; Total bytes of code 660 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG57: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 2065: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex188_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] mov x2, x0 mov x0, x19 mov w1, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG58: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG59: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG60: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 3252 2066: JIT compiled System.Text.RegularExpressions.RegexParser:ScanCharClass(bool,bool) [Tier1, IL size=1015, code size=3252] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate(int,int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 9 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov w21, w1 mov w20, w2 G_M000_IG02: sxtw w2, w20 cmp w2, #1 bgt G_M000_IG08 G_M000_IG03: cbz w20, G_M000_IG04 cmp w20, #1 bne G_M000_IG12 ldr x20, [x19, #0x18] ldr x2, [x19, #0x28] ldr w0, [x2, #0x08] cmp w21, w0 bhs G_M000_IG19 add x2, x2, #12 ldrh w0, [x2, w21, UXTW #2] tst w3, #255 bne G_M000_IG05 ldr w1, [x19, #0x70] b G_M000_IG06 G_M000_IG04: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: ldr w1, [x19, #0x70] and w1, w1, #0xD1FFAB1E G_M000_IG06: add x22, x19, #92 mov x3, x22 ldr x2, [x19, #0x30] uxth w0, w0 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG07: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr w0, [x19, #0x70] mvn w0, w0 and w0, w0, #1 uxtb w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG10 ldr x0, [x19, #0x28] cbz x0, G_M000_IG16 mov w1, w21 add x1, x1, w20, UXTW ldr w2, [x0, #0x08] cmp x1, x2 bhi G_M000_IG18 add x0, x0, #12 ubfiz x1, x21, #1, #32 add x0, x0, x1 sxtw w1, w20 G_M000_IG09: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG12 G_M000_IG10: ldr x22, [x19, #0x18] ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 ldr x0, [x19, #0x28] mov w1, w21 mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 mov x15, x0 mov w14, #12 strb w14, [x24, #0x2E] str w23, [x24, #0x28] add x14, x24, #16 bl CORINFO_HELP_ASSIGN_REF mov x0, x22 mov x1, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG11: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: ldr x3, [x19, #0x28] cbz x3, G_M000_IG17 mov w1, w21 add x1, x1, w20, UXTW ldr w2, [x3, #0x08] cmp x1, x2 bhi G_M000_IG18 add x3, x3, #12 ubfiz x1, x21, #1, #32 add x21, x3, x1 G_M000_IG13: mov w22, wzr cmp w20, #0 ble G_M000_IG15 add x3, x19, #92 mov x23, x3 G_M000_IG14: ldrh w0, [x21, w22, UXTW #2] ldr x24, [x19, #0x18] mov x3, x23 ldr w1, [x19, #0x70] ldr x2, [x19, #0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x1, x0 mov x0, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add w22, w22, #1 cmp w22, w20 blt G_M000_IG14 G_M000_IG15: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG16: orr w0, w21, w20 cbnz w0, G_M000_IG18 mov x0, xzr mov w1, wzr b G_M000_IG09 G_M000_IG17: orr w0, w21, w20 cbnz w0, G_M000_IG18 mov x21, xzr mov w20, wzr b G_M000_IG13 G_M000_IG18: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG19: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 692 2067: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate(int,int,bool) [Tier1, IL size=232, code size=692] ; Assembly listing for method System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: str xzr, [x19] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w3, #11 madd w1, w2, w3, w1 mov w2, #0xD1FFAB1E cmp w1, #0xD1FFAB1E csel w1, w2, w1, le movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF cbz x0, G_M000_IG06 G_M000_IG03: add x1, x0, #16 ldr w0, [x0, #0x08] G_M000_IG04: add x2, x19, #24 str x1, [x2] str w0, [x2, #0x08] str wzr, [x19, #0x10] strb wzr, [x19, #0x14] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov x1, xzr mov w0, wzr b G_M000_IG04 ; Total bytes of code 144 2068: JIT compiled System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int) [Tier1, IL size=59, code size=144] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex189_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2069: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex189_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2070: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ; Assembly listing for method System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[uint](uint):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 78 ; 2 inlinees with PGO data; 11 single block inlinees; 5 inlinees without PGO data ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2071: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex189_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x10] mov x20, x0 mov w19, w1 G_M000_IG02: ldrb w0, [x20, #0x14] cbnz w0, G_M000_IG14 G_M000_IG03: add x0, x20, #24 ldr w1, [x20, #0x10] ldr w2, [x0, #0x08] cmp w1, w2 bhi G_M000_IG17 ldr x0, [x0] ubfiz x3, x1, #1, #32 add x0, x0, x3 sub w1, w2, w1 orr w2, w19, #1 clz w2, w2 eor w2, w2, #31 ubfiz x2, x2, #3, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x2, [x2, x3] add x2, x2, w19, UXTW asr x2, x2, #32 cmp w2, w1 bgt G_M000_IG11 str w2, [fp, #0x18] str x0, [fp, #0x10] sbfiz x1, x2, #1, #32 add x0, x0, x1 sxtw w1, w19 cmp w19, #10 blo G_M000_IG09 G_M000_IG04: cmp w19, #100 blo G_M000_IG07 G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: sub x0, x0, #4 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 umull x3, w1, w3 lsr x3, x3, #37 mov w4, #100 msub w4, w3, w4, w1 sxtw w1, w3 mov x3, x2 add x3, x3, #16 lsl w4, w4, #2 mov w4, w4 add x3, x3, x4 ldr w3, [x3] str w3, [x0] cmp w1, #100 bhs G_M000_IG06 G_M000_IG07: cmp w1, #10 blo G_M000_IG09 G_M000_IG08: sub x0, x0, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #16 lsl w1, w1, #2 mov w1, w1 add x1, x2, x1 ldr w1, [x1] str w1, [x0] b G_M000_IG10 G_M000_IG09: add w1, w1, #48 strh w1, [x0, #-0x02] G_M000_IG10: str xzr, [fp, #0x10] mov w0, #1 b G_M000_IG12 G_M000_IG11: str wzr, [fp, #0x18] mov w0, wzr G_M000_IG12: str xzr, [fp, #0x10] cbz w0, G_M000_IG16 ldr w0, [x20, #0x10] ldr w1, [fp, #0x18] add w0, w0, w1 str w0, [x20, #0x10] G_M000_IG13: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG14: mov x0, x20 mov w1, w19 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG15: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG16: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG03 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 452 2072: JIT compiled System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[uint](uint) [Tier1 with Static PGO, IL size=287, code size=452] ; Assembly listing for method System.Number:TryUInt32ToDecStr[ushort](uint,System.Span`1[ushort],byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: orr w4, w0, #1 clz w4, w4 eor w4, w4, #31 ubfiz x4, x4, #3, #32 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x4, [x4, x5] add x4, x4, w0, UXTW asr x4, x4, #32 cmp w4, w2 bgt G_M000_IG11 G_M000_IG03: str w4, [x3] str x1, [fp, #0x18] sbfiz x3, x4, #1, #32 add x1, x1, x3 cmp w0, #10 blo G_M000_IG08 G_M000_IG04: cmp w0, #100 blo G_M000_IG06 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] align [0 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG05: sub x1, x1, #4 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 umull x3, w0, w3 lsr x3, x3, #37 mov w4, #100 msub w4, w3, w4, w0 sxtw w0, w3 mov x3, x2 add x3, x3, #16 lsl w4, w4, #2 mov w4, w4 add x3, x3, x4 ldr w3, [x3] str w3, [x1] cmp w0, #100 bhs G_M000_IG05 G_M000_IG06: cmp w0, #10 blo G_M000_IG08 G_M000_IG07: sub x1, x1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #16 lsl w0, w0, #2 mov w0, w0 add x0, x2, x0 ldr w0, [x0] str w0, [x1] b G_M000_IG09 G_M000_IG08: add w0, w0, #48 strh w0, [x1, #-0x02] G_M000_IG09: str xzr, [fp, #0x18] mov w0, #1 G_M000_IG10: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: str wzr, [x3] mov w0, wzr G_M000_IG12: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 272 2073: JIT compiled System.Number:TryUInt32ToDecStr[ushort](uint,System.Span`1[ushort],byref) [Tier1, IL size=58, code size=272] ; Assembly listing for method System.Number:UInt32ToDecChars[ushort](ulong,uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 27236 ; 0 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w1, #10 blo G_M000_IG07 G_M000_IG03: cmp w1, #100 blo G_M000_IG06 G_M000_IG04: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG05: sub x0, x0, #4 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 umull x3, w1, w3 lsr x3, x3, #37 mov w4, #100 msub w4, w3, w4, w1 sxtw w1, w3 mov x3, x2 add x3, x3, #16 lsl w4, w4, #2 mov w4, w4 add x3, x3, x4 ldr w3, [x3] str w3, [x0] cmp w1, #100 bhs G_M000_IG05 G_M000_IG06: cmp w1, #10 bhs G_M000_IG09 G_M000_IG07: sub x0, x0, #2 add w1, w1, #48 strh w1, [x0] G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: sub x0, x0, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #16 lsl w1, w1, #2 mov w1, w1 add x1, x2, x1 ldr w1, [x1] str w1, [x0] G_M000_IG10: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 188 2074: JIT compiled System.Number:UInt32ToDecChars[ushort](ulong,uint) [Tier1 with Static PGO, IL size=114, code size=188] ; Assembly listing for method System.Number:WriteTwoDigits[ushort](uint,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #16 lsl w0, w0, #2 mov w0, w0 add x0, x2, x0 ldr w0, [x0] str w0, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 2075: JIT compiled System.Number:WriteTwoDigits[ushort](uint,ulong) [Tier1, IL size=75, code size=56] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex190_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Assembly listing for method System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation cbz w0, G_M000_IG04 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] G_M000_IG01: ldp fp, lr, [sp], #0x30 stp ret lr fp, lr, [sp, #-0x30]! ; Total bytes of code 108 stp x19, x20, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldrb w2, [x19, #0x14] cbnz w2, G_M000_IG05 G_M000_IG03: cbz x1, G_M000_IG05 2076: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex190_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] add x2, x19, #24 ldr w0, [x19, #0x10] ldr w3, [x2, #0x08] cmp w0, w3 bhi G_M000_IG07 ldr x2, [x2] ubfiz x4, x0, #1, #32 add x2, x2, x4 sub w0, w3, w0 str x2, [fp, #0x18] ldr w20, [x1, #0x08] cmp w20, w0 bhi G_M000_IG05 add x1, x1, #12 mov w0, w20 lsl x2, x0, #1 ldr x0, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x10] add w0, w0, w20 str w0, [x19, #0x10] G_M000_IG04: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 200 2077: JIT compiled System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted(System.String) [Tier1, IL size=64, code size=200] ; Assembly listing for method System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: add x0, x19, #24 ldr w1, [x19, #0x10] ldr w2, [x0, #0x08] cmp w1, w2 bhi G_M000_IG06 ldr x0, [x0] bl System.String:.ctor(System.ReadOnlySpan`1[ushort]):this mov x20, x0 ldr x1, [x19, #0x08] stp xzr, xzr, [x19] stp xzr, xzr, [x19, #0x10] str xzr, [x19, #0x20] cbz x1, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: mov x0, x20 G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 148 2078: JIT compiled System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear() [Tier1, IL size=20, code size=148] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2079: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:DefineDynamicMethod(System.String,System.Type,System.Type,System.Type[]):System.Reflection.Emit.DynamicMethod:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #80 stp fp, lr, [sp, #0x10] stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] add fp, sp, #16 mov x20, x0 mov x21, x1 mov x22, x2 mov x19, x3 mov x23, x4 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 cbz x19, G_M000_IG05 mov w0, wzr str w0, [sp] G_M000_IG03: str w0, [sp, #0x08] mov x0, x24 mov x1, x21 mov x5, x23 mov x6, x19 mov x4, x22 mov w2, #22 mov w3, #1 mov x7, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 mov x0, x24 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x24 G_M000_IG04: ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp, #0x10] add sp, sp, #80 ret lr G_M000_IG05: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 248 2080: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:DefineDynamicMethod(System.String,System.Type,System.Type,System.Type[]) [Tier1, IL size=29, code size=248] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:.ctor(System.String,int,int,System.Type,System.Type[],System.Type,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #32 stp fp, lr, [sp, #0x10] add fp, sp, #16 G_M000_IG02: cbz x6, G_M000_IG05 uxtb w7, w7 str w7, [sp] mov w7, wzr str w7, [sp, #0x08] G_M000_IG03: movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 G_M000_IG04: ldp fp, lr, [sp, #0x10] add sp, sp, #32 ret lr G_M000_IG05: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 112 2081: JIT compiled System.Reflection.Emit.DynamicMethod:.ctor(System.String,int,int,System.Type,System.Type[],System.Type,bool) [Tier1, IL size=38, code size=112] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2082: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex190_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:Init(System.String,int,int,System.Type,System.Type[],System.Type,System.Reflection.Module,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 2560 ; 3 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x19, x0 mov x22, x1 mov x21, x4 mov x20, x5 mov x24, x6 mov x23, x7 G_M000_IG02: cbz x22, G_M000_IG35 cmp w2, #22 ccmp w3, #1, 0, eq bne G_M000_IG36 cbz x20, G_M000_IG40 ldr w25, [x20, #0x08] mov w1, w25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov w26, wzr cmp w25, #0 ble G_M000_IG08 G_M000_IG03: add x14, x20, #16 ubfiz x27, x26, #3, #32 ldr x0, [x14, x27] cbz x0, G_M000_IG38 ldr x28, [x19, #0x08] ldr x14, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x14, x1 bne G_M000_IG37 mov x15, x0 G_M000_IG04: cbz x15, G_M000_IG07 G_M000_IG05: ldr x14, [x15] cmp x14, x1 beq G_M000_IG07 G_M000_IG06: mov x15, xzr G_M000_IG07: ldr w14, [x28, #0x08] cmp w26, w14 bhs G_M000_IG44 add x14, x28, #16 add x14, x14, x27 bl CORINFO_HELP_ASSIGN_REF ldr x1, [x19, #0x08] ldr w0, [x1, #0x08] cmp w26, w0 bhs G_M000_IG44 add x0, x1, #16 ldr x0, [x0, x27] cbz x0, G_M000_IG39 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG39 add w26, w26, #1 cmp w25, w26 bgt G_M000_IG03 G_M000_IG08: cbz x21, G_M000_IG23 G_M000_IG09: ldr x0, [x21] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x20, x1 cmp x0, x20 bne G_M000_IG18 G_M000_IG10: mov x15, x21 cbz x15, G_M000_IG12 G_M000_IG11: ldr x14, [x15] cmp x14, x20 csel x15, x15, xzr, eq G_M000_IG12: cbz x15, G_M000_IG41 G_M000_IG13: add x14, x19, #24 bl CORINFO_HELP_ASSIGN_REF ldr w21, [fp, #0x78] tst w21, #255 bne G_M000_IG17 G_M000_IG14: cbz x23, G_M000_IG26 G_M000_IG15: mov x14, x23 ldr x15, [x14] movz x12, #0xD1FFAB1E movk x12, #0xD1FFAB1E LSL #16 movk x12, #0xD1FFAB1E LSL #32 cmp x15, x12 beq G_M000_IG22 G_M000_IG16: b G_M000_IG24 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 add x14, x19, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w21, [fp, #0x70] strb w21, [x19, #0x72] b G_M000_IG20 G_M000_IG18: mov x0, x21 ldr x1, [x21] ldr x1, [x1, #0x58] ldr x1, [x1] blr x1 mov x21, x0 b G_M000_IG10 G_M000_IG19: ldr w21, [fp, #0x70] strb w21, [x19, #0x71] G_M000_IG20: str xzr, [x19, #0x20] mov w14, #1 strb w14, [x19, #0x70] str xzr, [x19, #0x10] add x14, x19, #80 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF mov w0, #22 str w0, [x19, #0x68] mov w0, #1 str w0, [x19, #0x6C] G_M000_IG21: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG22: ldr x15, [x14, #0x18] b G_M000_IG25 G_M000_IG23: movz x15, #0xD1FFAB1E movk x15, #0xD1FFAB1E LSL #16 movk x15, #0xD1FFAB1E LSL #32 b G_M000_IG13 G_M000_IG24: mov x15, x23 ldr x14, [x15] movz x12, #0xD1FFAB1E movk x12, #0xD1FFAB1E LSL #16 movk x12, #0xD1FFAB1E LSL #32 cmp x14, x12 csel x15, x15, xzr, eq G_M000_IG25: add x14, x19, #48 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG19 G_M000_IG26: cbz x24, G_M000_IG42 ldr x0, [x24] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 cmp x0, x20 bne G_M000_IG31 G_M000_IG27: cbz x24, G_M000_IG34 G_M000_IG28: ldr x0, [x24] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 cmp x0, x20 bne G_M000_IG34 G_M000_IG29: ldrsb wzr, [x24] mov x0, x24 bl System.RuntimeTypeHandle:GetCorElementType(System.RuntimeType):ubyte cmp w0, #20 ccmp w0, #29, z, ne ccmp w0, #15, z, ne beq G_M000_IG43 G_M000_IG30: b G_M000_IG32 G_M000_IG31: mov x0, x24 ldr x1, [x24] ldr x1, [x1, #0x58] ldr x1, [x1] blr x1 mov x24, x0 b G_M000_IG27 G_M000_IG32: cmp w0, #16 beq G_M000_IG43 G_M000_IG33: mov x0, x24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG43 mov x0, x24 bl System.RuntimeTypeHandle:IsGenericVariable(System.RuntimeType):bool cbnz w0, G_M000_IG43 mov x0, x24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG43 add x14, x19, #56 mov x15, x24 bl CORINFO_HELP_ASSIGN_REF mov x0, x24 bl System.RuntimeTypeHandle:GetModule(System.RuntimeType):System.Reflection.RuntimeModule add x14, x19, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG19 G_M000_IG34: str xzr, [x19, #0x30] b G_M000_IG19 G_M000_IG35: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG37: str x1, [fp, #0x18] ldr x2, [x0] ldr x2, [x2, #0x58] ldr x2, [x2] blr x2 mov x15, x0 ldr x1, [fp, #0x18] b G_M000_IG04 G_M000_IG38: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG39: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x21 bl CORINFO_HELP_THROW G_M000_IG40: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x19, #8 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG08 G_M000_IG41: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG42: mov x24, xzr b G_M000_IG27 G_M000_IG43: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG44: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1336 2083: JIT compiled System.Reflection.Emit.DynamicMethod:Init(System.String,int,int,System.Type,System.Type[],System.Type,System.Reflection.Module,bool,bool) [Tier1 with Static PGO, IL size=430, code size=1336] ; Assembly listing for method System.RuntimeType:get_ContainsGenericParameters():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG05 cbz x0, G_M000_IG06 G_M000_IG03: bl System.RuntimeTypeHandle:ContainsGenericVariables(System.RuntimeType):bool G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr x1, [x0] ldr x1, [x1, #0x98] ldr x1, [x1, #0x08] blr x1 cbnz x0, G_M000_IG03 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 180 2084: JIT compiled System.RuntimeType:get_ContainsGenericParameters() [Tier1 with Static PGO, IL size=20, code size=180] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex191_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2085: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex191_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.RuntimeTypeHandle:GetTypeChecked():System.RuntimeType:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x0, [x0] cbz x0, G_M000_IG04 G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 116 2086: JIT compiled System.RuntimeTypeHandle:GetTypeChecked() [Tier1, IL size=30, code size=116] ; Assembly listing for method System.Type:get_IsInterface():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 64467 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: mov x1, x0 cbz x1, G_M000_IG06 G_M000_IG03: ldr x2, [x1] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG06 G_M000_IG04: mov x0, x1 G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 b System.RuntimeTypeHandle:IsInterface(System.RuntimeType):bool G_M000_IG06: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG09 ldr w19, [x0, #0x7C] G_M000_IG07: tst w19, #32 cset x0, ne G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: ldr x1, [x0] ldr x1, [x1, #0x70] ldr x1, [x1, #0x18] blr x1 sxtw w19, w0 b G_M000_IG07 ; Total bytes of code 132 2087: JIT compiled System.Type:get_IsInterface() [Tier1 with Static PGO, IL size=31, code size=132] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 ; Assembly listing for method System.Reflection.Emit.DynamicMethod:GetILGenerator():System.Reflection.Emit.ILGenerator:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] G_M000_IG01: ldp fp, lr, [sp], #0x30 ret lr stp G_M000_IG05: fp, cmp w20, w21 lr, [sp, #-0x10]! bhi G_M000_IG07 ubfiz x0, x20, #1, #32 mov add x0, x1, x0 fp sub w1, w21, w20 , sp movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL # G_M000_IG02: 16 mov w1, #64 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] movz x2, #0xD1FFAB1E add x2, x2, #12 movk x2, #0xD1FFAB1E LSL #16 mov w3, #3 movk x2, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E ldr movk x4, #0xD1FFAB1E LSL #16 x2, [x2] movk x4, #0xD1FFAB1E LSL #32 G_M000_IG03: ldr x4, [x4] blr x4 ldp tbnz w0, #31, G_M000_IG03 fp, lr, [sp], # add w0, w20, w0 0x10 str br w0, [x19, #0x4C] x2 mov w0, #1 G_M000_IG06: ; Total bytes of code 36 ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, 2088: JIT compiled System.Reflection.Emit.DynamicMethod:GetILGenerator() [Tier1, IL size=9, code size=36] lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2089: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:GetILGenerator(int):System.Reflection.Emit.ILGenerator:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #64 stp fp, lr, [sp, #0x08] stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] add fp, sp, #8 mov x19, x0 mov w20, w1 G_M000_IG02: ldr x3, [x19, #0x20] cbnz x3, G_M000_IG07 G_M000_IG03: mov x3, xzr str x3, [sp] ldr x3, [x19, #0x18] ldr w1, [x19, #0x6C] ldr x6, [x19, #0x08] mov x0, xzr mov w2, wzr mov x4, xzr mov x5, xzr mov x7, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x1, x19 mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG01: bl CORINFO_HELP_NEWSFAST mov x20, x0 stp movz x1, #0xD1FFAB1E fp, lr, [sp, #-0x40]! movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 stp ldr x1, [x1] x19, x20, [sp, #0x28] blr str x1 x21, [sp, #0x38] add x14, x22, # mov 128 fp, sp mov x15, x20 str bl CORINFO_HELP_ASSIGN_REF xzr, [fp, #0x18] ldr str xzr, [fp, #0x20] x20, [x22, #0x80] mov x19, x0 ldr x0, [x20, #0x08] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x2 G_M000_IG02: , [ ldr x0, #0x08] w20, [x19, #0x4C] ldr w1, [x0, #0x10] ldr w3, [x2, #0x08] cmp cmp w20, w2 w3, w1 bhi G_M000_IG11 bls G_M000_IG05 ubfiz x0, x20, #1, #32 G_M000_IG04: add x0, x1, x0 add w3, w1, #1 sub w1 str w3, [x0, #0x10] , w2, w20 sxtw x1, w1 mov x0, x2 cmp w1, #3 mov x2, x21 bl CORINFO_HELP_ARRADDR_ST bls G_M000_IG09 b G_M000_IG06 G_M000_IG03: G_M000_IG01: mov x1, x21 str movz x2, #0xD1FFAB1E x0, movk x2, #0xD1FFAB1E LSL #16 [fp, #0x18] movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] str w1, [fp, #0x20] add blr x2 x1, fp, #24 G_M000_IG06: ldr x14, [x20, #0x08] ldr ldr w14, [x14, #0x10] x2, [x1] ldr sub w14, w14, #1 w1, [x1, #0x08] mov cmp w1, #3 w15, #0xD1FFAB1E blt G_M000_IG09 orr w14, w14, w15 G_M000_IG04: str ldr w1, [x2] w14, [x22, #0x88] movz w3, #116 add x14, x19, #32 movk w3, #72 LSL #16 mov x15, x22 eor w1, w1, w3 bl CORINFO_HELP_ASSIGN_REF ldr w2, [x2, #0x02] movz w3, #72 G_M000_IG07: movk w3, #97 LSL #16 ldr x0, [x19, #0x20] eor w2, w2, w3 G_M000_IG08: orr w1, w1, w2 ldp cbnz w1, G_M000_IG09 x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] G_M000_IG05: ldp fp, lr, [sp, #0x08] ldrh add sp, sp, #64 w0, [x0, #0x06] ret lr mov w1, #116 ; Total bytes of code 380 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 2090: JIT compiled System.Reflection.Emit.DynamicMethod:GetILGenerator(int) [Tier1, IL size=66, code size=380] mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2091: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex191_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:GetMethodSigHelper(System.Reflection.Module,int,int,System.Type,System.Type[],System.Type[],System.Type[],System.Type[][],System.Type[][]):System.Reflection.Emit.SignatureHelper ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x21, x0 mov w20, w2 mov x19, x3 mov x22, x4 mov x23, x5 mov x24, x6 mov x25, x7 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x19, #0 csel x19, x19, x0, ne mov w26, wzr mov w0, #5 tst w1, #2 csel w26, w26, w0, eq orr w0, w26, #16 uxtb w0, w0 cmp w20, #0 csel w26, w26, w0, le orr w0, w26, #32 uxtb w0, w0 tst w1, #32 csel w26, w26, w0, eq movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x27, x0 mov x1, x21 mov w2, w26 mov w3, w20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cmp w26, #6 beq G_M000_IG04 mov x0, x27 mov x1, x19 mov x2, x22 mov x3, x23 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x0, x27 mov x1, x24 mov x2, x25 ldr x3, [fp, #0x60] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x0, x27 G_M000_IG03: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 368 2092: JIT compiled System.Reflection.Emit.SignatureHelper:GetMethodSigHelper(System.Reflection.Module,int,int,System.Type,System.Type[],System.Type[],System.Type[],System.Type[][],System.Type[][]) [Tier1, IL size=75, code size=368] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex192_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2093: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex192_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:AddArguments(System.Type[],System.Type[][],System.Type[][]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 2951 ; 1 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov x22, x1 mov x20, x2 mov x21, x3 G_M000_IG02: cbnz x20, G_M000_IG13 G_M000_IG03: cbnz x21, G_M000_IG12 G_M000_IG04: cbz x22, G_M000_IG21 G_M000_IG05: mov w24, wzr ldr w23, [x22, #0x08] cmp w23, #0 ble G_M000_IG21 G_M000_IG06: cbz x20, G_M000_IG14 G_M000_IG07: cbz x21, G_M000_IG14 ldr w0, [x20, #0x08] cmp w0, w23 blt G_M000_IG14 ldr w0, [x21, #0x08] cmp w0, w23 blt G_M000_IG14 G_M000_IG08: add x0, x22, #16 ldr x1, [x0, w24, UXTW #3] add x0, x20, #16 ldr x2, [x0, w24, UXTW #3] add x0, x21, #16 ldr x3, [x0, w24, UXTW #3] ldrb w0, [x19, #0x24] cbnz w0, G_M000_IG24 cbz x1, G_M000_IG25 ldr w0, [x19, #0x1C] cmn w0, #1 beq G_M000_IG10 G_M000_IG09: ldr w0, [x19, #0x20] add w0, w0, #1 str w0, [x19, #0x20] G_M000_IG10: mov x0, x19 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, #1 cmp w23, w24 bgt G_M000_IG08 G_M000_IG11: b G_M000_IG21 G_M000_IG12: cbz x22, G_M000_IG26 ldr w0, [x21, #0x08] ldr w23, [x22, #0x08] cmp w0, w23 bne G_M000_IG26 b G_M000_IG04 G_M000_IG13: cbz x22, G_M000_IG27 ldr w0, [x20, #0x08] ldr w23, [x22, #0x08] cmp w0, w23 bne G_M000_IG27 b G_M000_IG03 G_M000_IG14: add x0, x22, #16 ubfiz x1, x24, #3, #32 ldr x0, [x0, x1] cbnz x20, G_M000_IG22 G_M000_IG15: mov x2, xzr G_M000_IG16: cbnz x21, G_M000_IG23 G_M000_IG17: mov x1, x0 mov x3, xzr G_M000_IG18: ldrb w0, [x19, #0x24] cbnz w0, G_M000_IG24 cbz x1, G_M000_IG25 ldr w0, [x19, #0x1C] cmn w0, #1 beq G_M000_IG20 G_M000_IG19: ldr w0, [x19, #0x20] add w0, w0, #1 str w0, [x19, #0x20] G_M000_IG20: mov x0, x19 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, #1 cmp w23, w24 bgt G_M000_IG14 G_M000_IG21: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG22: ldr w2, [x20, #0x08] cmp w24, w2 bhs G_M000_IG28 add x2, x20, #16 ldr x2, [x2, x1] b G_M000_IG16 G_M000_IG23: ldr w3, [x21, #0x08] cmp w24, w3 bhs G_M000_IG28 add x3, x21, #16 ldr x3, [x3, x1] mov x1, x0 b G_M000_IG18 G_M000_IG24: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG25: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG26: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x21, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x0, x20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG27: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x21, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x0, x20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 880 2094: JIT compiled System.Reflection.Emit.SignatureHelper:AddArguments(System.Type[],System.Type[][],System.Type[][]) [Tier1 with Static PGO, IL size=125, code size=880] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2095: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:GetSignature(bool):ubyte[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldrb w0, [x19, #0x24] cbnz w0, G_M000_IG06 G_M000_IG03: tst w1, #255 beq G_M000_IG05 ldr w1, [x19, #0x18] add w1, w1, #1 ldr x0, [x19, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 ble G_M000_IG04 ldr w1, [x0, #0x08] lsl w1, w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x0, [x19, #0x08] ldr w1, [x19, #0x18] add w2, w1, #1 str w2, [x19, #0x18] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG10 add x0, x0, #16 strb wzr, [x0, w1, UXTW #2] G_M000_IG05: mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w1, #1 strb w1, [x19, #0x24] G_M000_IG06: ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] ldr w20, [x19, #0x18] cmp w1, w20 ble G_M000_IG08 G_M000_IG07: sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr x0, [x19, #0x08] mov w2, w20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG08: ldr x0, [x19, #0x08] G_M000_IG09: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 288 2096: JIT compiled System.Reflection.Emit.SignatureHelper:GetSignature(bool) [Tier1, IL size=92, code size=288] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:SetNumberOfSignatureElements(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: ldp w20, w21, [x19, #0x18] cmn w21, #1 bne G_M000_IG04 G_M000_IG03: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr w0, [x19, #0x20] cmp w0, #128 bge G_M000_IG07 tst w1, #255 bne G_M000_IG06 ldr x0, [x19, #0x08] ldrb w1, [x19, #0x20] ldr w2, [x0, #0x08] cmp w21, w2 bhs G_M000_IG10 add x0, x0, #16 strb w1, [x0, w21, UXTW #2] G_M000_IG05: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: mov w22, #1 b G_M000_IG08 G_M000_IG07: mov w1, #4 mov w2, #2 cmp w0, #4, LSL #12 csel w22, w1, w2, ge G_M000_IG08: ldr w1, [x19, #0x18] add w1, w1, w22 sub w23, w1, #1 sxtw x1, w23 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x24, x0 ldr x4, [x19, #0x08] ldr w3, [x4, #0x08] cmp w3, #0 bls G_M000_IG10 ldrb w4, [x4, #0x10] ldr w3, [x24, #0x08] cmp w3, #0 bls G_M000_IG10 strb w4, [x24, #0x10] add w1, w21, #1 sub w4, w20, w1 add w3, w21, w22 ldr x0, [x19, #0x08] mov x2, x24 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add x14, x19, #8 mov x15, x24 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x19, #0x1C] str w1, [x19, #0x18] ldr w1, [x19, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w23, [x19, #0x18] G_M000_IG09: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 340 2097: JIT compiled System.Reflection.Emit.SignatureHelper:SetNumberOfSignatureElements(bool) [Tier1, IL size=198, code size=340] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:.ctor(System.Reflection.Emit.DynamicMethod,ubyte[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x2 G_M000_IG02: mov x0, x19 mov w2, w3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #128 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr x21, [x19, #0x80] ldr x0, [x21, #0x08] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x2, [x0, #0x08] ldr w1, [x0, #0x10] ldr w3, [x2, #0x08] cmp w3, w1 bls G_M000_IG04 G_M000_IG03: add w3, w1, #1 str w3, [x0, #0x10] sxtw x1, w1 mov x0, x2 mov x2, x20 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x21, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 mov w1, #0xD1FFAB1E orr w0, w0, w1 str w0, [x19, #0x88] G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 236 2098: JIT compiled System.Reflection.Emit.DynamicILGenerator:.ctor(System.Reflection.Emit.DynamicMethod,ubyte[],int) [Tier1, IL size=38, code size=236] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ; Assembly listing for method System.Reflection.Emit.ILGenerator:.ctor(System.Reflection.MethodInfo,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 10 single block inlinees; 1 inlinees without PGO data ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG01: brk_windows #0 stp fp, lr, [sp, #-0x30]! ; Total bytes of code 652 stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov w1, #16 cmp w2, #16 csel w1, w2, w1, ge sxtw x1, w1 2099: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex192_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str xzr, [x0, #0x20] add x14, x19, #56 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #64 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x40] cbz x0, G_M000_IG04 G_M000_IG03: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 csel x0, x0, xzr, eq G_M000_IG04: cbnz x0, G_M000_IG06 G_M000_IG05: mov x20, xzr b G_M000_IG07 G_M000_IG06: ldr x0, [x0, #0x18] ldr x20, [x0, #0x10] G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x21 mov w1, #7 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w14, [x21, #0x18] add w15, w14, #1 stp w15, w14, [x21, #0x18] add x14, x19, #72 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG08: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 276 2100: JIT compiled System.Reflection.Emit.ILGenerator:.ctor(System.Reflection.MethodInfo,int) [Tier1, IL size=84, code size=276] ; Assembly listing for method System.Reflection.Emit.DynamicScope:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x0, [x14] add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x20, #0x14] add w1, w1, #1 str w1, [x20, #0x14] ldr w1, [x20, #0x10] ldr w2, [x0, #0x08] cmp w2, w1 bls G_M000_IG04 G_M000_IG03: add w2, w1, #1 str w2, [x20, #0x10] add x0, x0, #16 str xzr, [x0, w1, UXTW #3] b G_M000_IG05 G_M000_IG04: mov x0, x20 mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: add x14, x19, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 164 2101: JIT compiled System.Reflection.Emit.DynamicScope:.ctor() [Tier1, IL size=25, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex193_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str ; Assembly listing for method System.Reflection.Emit.DynamicScope:GetTokenFor(ubyte[]):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl G_M000_IG01: System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 stp G_M000_IG03:fp, lr, [sp, #-0x20]! mov x1, x21 str mov w2, w20 mov x0, x19x19, [sp, #0x18] mov bl fp, sp mov x19, x0 System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool mov x2, x1 cbnz w0, G_M000_IG04 ldr G_M000_IG02: w0, [x19, #0x4C] ldr x0, [x19, #0x08] cmp ldr w1, [x0, #0x14] w0, w20 add w1, w1, #1 beq G_M000_IG04 str w1, [x0, #0x14] add ldrw0, w0, #1 x3, [x0, #0x08] ldr w1, [x0, #0x10] str w0, [x19, #0x4C] ldr w4, [x3, #0x08] b G_M000_IG02 cmp G_M000_IG04: w4, w1 bls G_M000_IG04 ldr x21, [sp, #0x28] G_M000_IG03: ldp add w4, w1, #1 x19, x20, [sp, #0x18] str w4, [x0, #0x10] sxtw ldp fp, lr, [sp], #0x30 x1, w1 ret lr mov x0, x3 ; Total bytes of code 108 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 2102: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex193_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x19, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 mov w1, #0xD1FFAB1E orr w0, w0, w1 G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 136 2103: JIT compiled System.Reflection.Emit.DynamicScope:GetTokenFor(ubyte[]) [Tier1, IL size=32, code size=136] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:GetMethodDescriptor():System.RuntimeMethodHandle:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x30] mov fp, sp add x1, sp, #64 str x1, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG02: ldr x1, [x0, #0x10] cbnz x1, G_M000_IG15 G_M000_IG03: str wzr, [fp, #0x20] G_M000_IG04: ldrb w1, [fp, #0x20] cbnz w1, G_M000_IG10 add x1, fp, #32 G_M000_IG01: bl stp fp, lr, [sp, #-0x50]! System.Threading.Monitor:ReliableEnter(System.Object,byref) stp ldr x19, x20, [sp, #0x18] x0, [fp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] ldr x1, [x0, #0x10] str cbnz x1, G_M000_IG14 x25, [sp, #0x48] ldr x1, [x0, #0x28] mov fp, sp cbz x1, G_M000_IG11 mov x19, x0 ldr x3, [x0, #0x30] mov x2, x3 G_M000_IG02: cbz ldr x2, G_M000_IG06 w20, [x19, #0x4C] sxtw G_M000_IG05: w21, w2 ldr x4, [x2] sub movz x5, #0xD1FFAB1Ew0, w21, #2 cmp w20, w0 movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ble G_M000_IG05 cmp G_M000_IG03: x4, x5 str w21, [x19, #0x4C] bne G_M000_IG09 mov w0, wzr G_M000_IG06: G_M000_IG04: mov x0, x1 ldr x25, [sp, #0x48] mov x1, x2 ldp ldr x2, [fp, #0x18] x23, movz x3, #0xD1FFAB1E x24, movk x3, #0xD1FFAB1E LSL #16 [sp, #0x38] movk x3, #0xD1FFAB1E LSL #32 ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldr ldp fp, lr, [sp], #0x50 x3, [x3] ret lr ldr wzr, [x0] G_M000_IG05: blr x3 cmp w20, w21 ldr x0, [fp, #0x18] b G_M000_IG14 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 G_M000_IG07: add x22, x1, x0 mov sub w23, w21, w20 x0, x5 mov w24, wzr mov x1, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 sub movk x2, #0xD1FFAB1E LSL #32 w25, w23, #1 ldr cmp w25, #0x2, [x2] ble G_M000_IG03 blr x2 brk_windows G_M000_IG06: #0 cmp w24, w23 bhi G_M000_IG10 G_M000_IG08: ubfiz x0, x24, #1, #32 movz x1, #0xD1FFAB1E add x0, x22, x0 movk x1, #0xD1FFAB1E LSL #16 sub w3, w23, w24 movk x1, #0xD1FFAB1E LSL #32 mov w1, #66 ldr x1, [x1] mov w2, #97 blr x1 movz x4, #0xD1FFAB1E mov movk x4, #0xD1FFAB1E LSL #16 x19, x0 movk x4, #0xD1FFAB1E LSL #32 movz x0, #0xD1FFAB1E ldr movk x0, #0xD1FFAB1E LSL #16 x4, movk x0, #0xD1FFAB1E LSL #32 [x4] bl blr x4 CORINFO_HELP_NEWSFAST add w24, mov x20, x0 w24, w0 ldr tbnz w0, #31, G_M000_IG03 x0, [fp, #0x18] add w1, w24, #1 ldr x1, [x0, #0x50] cmp w1, w23 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 bhs G_M000_IG03 movk ldrh x2, #0xD1FFAB1E LSL #32 w0, [x22, w1, UXTW #2] ldr x2, [x2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 blr x2 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 mov x1, x0 sxtw w24, w1 cmp w24, w25 mov x0, x20 blt G_M000_IG06 movz x2, #0xD1FFAB1E G_M000_IG07: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 b G_M000_IG03 ldr G_M000_IG08: x2, [x2] add w0, w20, w24 blr x2 str mov x0, x20 w0, [x19, #0x4C] bl mov w0, #1 CORINFO_HELP_THROW G_M000_IG09: ldr x25, [sp, #0x48] G_M000_IG09: ldp mov x0, x5 x23, x24, [sp, #0x38] mov x1, x3 movz x2, #0xD1FFAB1E ldp x21, x22, [sp, #0x28] movk x2, #0xD1FFAB1E LSL #16 ldp x19, x20, movk x2, #0xD1FFAB1E LSL #32 [sp, #0x18] ldr x2, [x2] blr x2 ldp brk_windows #fp, lr, [sp], #0x50 0 G_M000_IG10: ret lr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 G_M000_IG10: movk x1, #0xD1FFAB1E LSL #32 movz x0, #0xD1FFAB1E ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG11: movk x0 ldr , #0xD1FFAB1E LSL #16x1, [x0, #0x20] cbz x1, G_M000_IG08 movk x0, #0xD1FFAB1E LSL #32 ldr w2, [x1, #0x58] ldr cbz w2, G_M000_IG08x0, [x0] blr x0 ldr brk_windows x3, [x0, #0x30] #0 mov x2, x3 cbz x2, G_M000_IG13 ; Total bytes of code 296 G_M000_IG12: ldr x4, [x2] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 cmp 2104: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] x4, x5 bne G_M000_IG07 G_M000_IG13: mov x0, x1 mov x1, x2 ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x0, [fp, #0x18] G_M000_IG14: ldrb w1, [fp, #0x20] cbz w1, G_M000_IG15 bl System.Threading.Monitor:Exit(System.Object) ldr x0, [fp, #0x18] G_M000_IG15: ldr x0, [x0, #0x10] G_M000_IG16: ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG17: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] add x3, fp, #64 str x3, [sp, #0x18] G_M000_IG18: ldrb w0, [fp, #0x20] cbz w0, G_M000_IG19 ldr x0, [fp, #0x18] bl System.Threading.Monitor:Exit(System.Object) G_M000_IG19: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 520 2105: JIT compiled System.Reflection.Emit.DynamicMethod:GetMethodDescriptor() [Tier1, IL size=154, code size=520] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:GetCallableMethod(System.Reflection.RuntimeModule,System.Reflection.Emit.DynamicMethod):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov x21, x1 mov x20, x2 G_M000_IG02: ldr x0, [x19, #0x40] ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 mov x22, x0 ldr x0, [x19, #0x80] ldr w1, [x19, #0x88] ldrsb wzr, [x0] and w1, w1, #0xD1FFAB1E tbnz w1, #31, G_M000_IG04 G_M000_IG03: ldr x0, [x0, #0x08] ldr w2, [x0, #0x10] cmp w1, w2 ble G_M000_IG05 G_M000_IG04: mov x1, xzr b G_M000_IG06 G_M000_IG05: cmp w1, w2 bhs G_M000_IG11 ldr x0, [x0, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG12 add x0, x0, #16 ldr x1, [x0, w1, UXTW #3] G_M000_IG06: mov x23, x1 cbz x23, G_M000_IG09 G_M000_IG07: ldr x0, [x23] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG09 G_M000_IG08: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST mov x24, x0 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 mov x1, x21 mov x2, x22 mov x3, x23 mov x4, x24 bl System.ModuleHandle:GetDynamicMethod(System.Reflection.Emit.DynamicMethod,System.Reflection.RuntimeModule,System.String,ubyte[],System.Resolver):System.IRuntimeMethodInfo add x14, x20, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2106: JIT compiled System.Reflection.Emit.DynamicILGenerator:GetCallableMethod(System.Reflection.RuntimeModule,System.Reflection.Emit.DynamicMethod) [Tier1, IL size=53, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Reflection.Emit.DynamicMethod:get_Name():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, G_M000_IG01: #-0x40]! stp stp fp, lr, [sp, #-0x10]!x19, x20, [sp, #0x28] str mov x21, [sp, #0x38] fp, sp mov fp, sp G_M000_IG02: str xzr, [fp, #0x18] ldr str x0, [x0, #0x50] xzr, [fp, #0x20] mov G_M000_IG03: x19, x0 ldp fp, lr, [sp], #0x10 G_M000_IG02: ret ldr lr w20, [x19, #0x4C] ; Total bytes of code 20 cmp w20, w2 bhi G_M000_IG13 2107: JIT compiled System.Reflection.Emit.DynamicMethod:get_Name() [Tier1, IL size=7, code size=20] ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2108: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex193_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:.ctor(System.Reflection.Emit.DynamicILGenerator):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [x19, #0x38] mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x20, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x14, x19, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x20, #0x80] add x14, x19, #48 bl CORINFO_HELP_ASSIGN_REF ldr x1, [x20, #0x40] mov x15, x1 cbz x15, G_M000_IG04 G_M000_IG03: ldr x14, [x15] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x14, x0 bne G_M000_IG06 G_M000_IG04: add x14, x19, #24 bl CORINFO_HELP_ASSIGN_REF ldr x14, [x19, #0x18] add x14, x14, #96 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 272 2109: JIT compiled System.Reflection.Emit.DynamicResolver:.ctor(System.Reflection.Emit.DynamicILGenerator) [Tier1, IL size=101, code size=272] ; Assembly listing for method System.Reflection.Emit.ILGenerator:GetMaxStackSize():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrsw x1, [x0, #0x7C] ldr x0, [x0, #0x50] add x0, x1, x0 mov x1, #0xD1FFAB1E mov x2, #0xD1FFAB1E cmp x0, x1 csel x0, x2, x0, ge mov w0, w0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 48 2110: JIT compiled System.Reflection.Emit.ILGenerator:GetMaxStackSize() [Tier1, IL size=27, code size=48] ; Assembly listing for method System.Reflection.Emit.ILGenerator:GetExceptions():System.Reflection.Emit.__ExceptionInfo[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x6C] cbnz w0, G_M000_IG07 ldr w20, [x19, #0x68] cbnz w20, G_M000_IG05 G_M000_IG03: mov x0, xzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ mov x21, x0 ldr x0, [x19, #0x28] mov w2, w20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x21 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 236 2111: JIT compiled System.Reflection.Emit.ILGenerator:GetExceptions() [Tier1, IL size=67, code size=236] ; Assembly listing for method System.Reflection.Emit.ILGenerator:BakeByteArray():ubyte[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 2716 ; 0 inlinees with PGO data; 5 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w1, [x19, #0x6C] cbnz w1, G_M000_IG17 ldr w20, [x19, #0x58] cbz w20, G_M000_IG18 sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr x0, [x19, #0x08] mov w2, w20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w0, wzr ldr w1, [x19, #0x60] cmp w1, #0 ble G_M000_IG09 G_M000_IG03: ldr x1, [x19, #0x18] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG20 mov w2, #12 umull x2, w0, w2 add x2, x2, #16 add x1, x1, x2 ldp w2, w20, [x1] ldr w1, [x1, #0x08] tbnz w2, #31, G_M000_IG12 G_M000_IG04: ldr w3, [x19, #0x5C] cmp w2, w3 bge G_M000_IG12 ldr x3, [x19, #0x10] cbz x3, G_M000_IG12 ldr w4, [x3, #0x08] cmp w2, w4 bhs G_M000_IG20 ubfiz x2, x2, #3, #32 add x2, x2, #16 ldr w2, [x3, x2] tbnz w2, #31, G_M000_IG13 G_M000_IG05: add w3, w20, w1 sub w22, w2, w3 cmp w1, #1 beq G_M000_IG11 G_M000_IG06: ldr w1, [x21, #0x08] cmp w1, w20 blo G_M000_IG15 add x2, x21, #16 mov w3, w20 add x2, x2, x3 sub w1, w1, w20 cmp w1, #4 blo G_M000_IG16 G_M000_IG07: str w22, [x2] G_M000_IG08: add w0, w0, #1 ldr w1, [x19, #0x60] cmp w0, w1 blt G_M000_IG03 G_M000_IG09: mov x0, x21 G_M000_IG10: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: mov w1, #127 cmn w22, #128 ccmp w22, w1, 0, ge bgt G_M000_IG14 ldr w1, [x21, #0x08] cmp w20, w1 bhs G_M000_IG20 add x1, x21, #16 strb w22, [x1, w20, UXTW #2] b G_M000_IG08 G_M000_IG12: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG13: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x21, x0 str w20, [x19, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 str w22, [x20, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x2, x20 mov x1, x19 mov x0, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x22 bl CORINFO_HELP_THROW G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG17: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG18: mov x0, xzr G_M000_IG19: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 800 2112: JIT compiled System.Reflection.Emit.ILGenerator:BakeByteArray() [Tier1 with Static PGO, IL size=203, code size=800] ; Assembly listing for method System.Reflection.Emit.SignatureHelper:InternalGetSignatureArray():ubyte[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x20] ldr w21, [x19, #0x18] cmp w20, #127 bge G_M000_IG04 G_M000_IG03: add w22, w21, #1 b G_M000_IG05 G_M000_IG04: mov w1, #0xD1FFAB1E add w0, w21, #4 add w2, w21, #2 cmp w20, w1 csel w22, w0, w2, ge G_M000_IG05: sxtw x1, w22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x23, x0 ldr x0, [x19, #0x08] mov x4, x0 ldr w2, [x4, #0x08] cmp w2, #0 bls G_M000_IG12 ldrb w4, [x4, #0x10] ldr w19, [x23, #0x08] cmp w19, #0 bls G_M000_IG12 strb w4, [x23, #0x10] cmp w20, #127 bgt G_M000_IG07 G_M000_IG06: mov w3, #2 cmp w19, #1 bls G_M000_IG12 add x24, x23, #16 strb w20, [x24, #0x01] b G_M000_IG09 G_M000_IG07: mov w3, #0xD1FFAB1E cmp w20, w3 bgt G_M000_IG08 cmp w19, #1 bls G_M000_IG12 add x24, x23, #16 asr w4, w20, #8 orr w4, w4, #128 strb w4, [x24, #0x01] mov w3, #3 cmp w19, #2 bls G_M000_IG12 strb w20, [x24, #0x02] b G_M000_IG09 G_M000_IG08: movn w3, #0xD1FFAB1E LSL #16 cmp w20, w3 bgt G_M000_IG11 cmp w19, #1 bls G_M000_IG12 add x24, x23, #16 asr w4, w20, #24 orr w4, w4, #192 strb w4, [x24, #0x01] cmp w19, #2 bls G_M000_IG12 asr w4, w20, #16 strb w4, [x24, #0x02] cmp w19, #3 bls G_M000_IG12 asr w4, w20, #8 strb w4, [x24, #0x03] mov w3, #5 cmp w19, #4 bls G_M000_IG12 strb w20, [x24, #0x04] G_M000_IG09: sub w4, w21, #2 mov x2, x23 mov w1, #2 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 sub w0, w22, #1 cmp w0, w19 bhs G_M000_IG12 strb wzr, [x24, w0, UXTW #2] mov x0, x23 G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 460 2113: JIT compiled System.Reflection.Emit.SignatureHelper:InternalGetSignatureArray() [Tier1, IL size=268, code size=460] ; Assembly listing for method System.RuntimeMethodInfoStub:System.IRuntimeMethodInfo.get_Value():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2114: JIT compiled System.RuntimeMethodInfoStub:System.IRuntimeMethodInfo.get_Value() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:GetCodeInfo(byref,byref,byref):ubyte[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x2 mov x20, x3 G_M000_IG02: ldr w0, [x19, #0x38] str w0, [x1] ldr x0, [x19, #0x10] cbz x0, G_M000_IG05 G_M000_IG03: ldr w1, [x0, #0x08] cbz w1, G_M000_IG05 ldr w1, [x0, #0x08] cmp w1, #4 blt G_M000_IG11 mov x1, x0 ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG12 ldrb w1, [x1, #0x10] tbz w1, #6, G_M000_IG04 mov x1, x0 cmp w2, #3 bls G_M000_IG12 ldrb w2, [x1, #0x13] lsl w1, w2, #16 mov x2, x0 ldrb w2, [x2, #0x12] orr w1, w1, w2, LSL #8 ldrb w0, [x0, #0x11] orr w0, w1, w0 sub w0, w0, #4 movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 smull x0, w1, w0 asr x0, x0, #32 asr w1, w0, #2 add w0, w1, w0, LSR #31 str w0, [x20] b G_M000_IG06 G_M000_IG04: cmp w2, #1 bls G_M000_IG12 ldrb w0, [x0, #0x11] sub w0, w0, #2 movz w1, #0xD1FFAB1E movk w1, #0xD1FFAB1E LSL #16 smull x0, w1, w0 asr x0, x0, #32 asr w1, w0, #1 add w0, w1, w0, LSR #31 str w0, [x20] b G_M000_IG06 G_M000_IG05: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [x20] G_M000_IG06: ldr x0, [x19, #0x18] ldrb w0, [x0, #0x70] cbnz w0, G_M000_IG08 G_M000_IG07: mov w0, wzr b G_M000_IG09 G_M000_IG08: mov w0, #1 G_M000_IG09: str w0, [x21] ldr x0, [x19, #0x20] G_M000_IG10: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 344 2115: JIT compiled System.Reflection.Emit.DynamicResolver:GetCodeInfo(byref,byref,byref) [Tier1, IL size=159, code size=344] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:CalculateNumberOfExceptions(System.Reflection.Emit.__ExceptionInfo[]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 2339 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr cbnz x0, G_M000_IG05 G_M000_IG03: mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w2, wzr ldr w3, [x0, #0x08] cmp w3, #0 ble G_M000_IG08 G_M000_IG06: add x3, x0, #16 G_M000_IG07: ldr x4, [x3, w2, UXTW #3] ldr w4, [x4, #0x3C] add w1, w4, w1 add w2, w2, #1 ldr w4, [x0, #0x08] cmp w4, w2 bgt G_M000_IG07 G_M000_IG08: mov w0, w1 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 2116: JIT compiled System.Reflection.Emit.DynamicResolver:CalculateNumberOfExceptions(System.Reflection.Emit.__ExceptionInfo[]) [Tier1 with Static PGO, IL size=34, code size=88] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:GetLocalsSignature():ubyte[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2117: JIT compiled System.Reflection.Emit.DynamicResolver:GetLocalsSignature() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex194_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2118: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex194_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.SpanHelpers:SequenceEqual(byref,byref,ulong):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 20 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x2, #8 bhs G_M000_IG07 G_M000_IG03: cmp x2, #4 bhs G_M000_IG06 mov w3, wzr and x4, x2, #2 cbz x4, G_M000_IG04 ldrh w3, [x0] ldrh w5, [x1] sub w3, w3, w5 G_M000_IG04: tbz w2, #0, G_M000_IG05 ldrb w2, [x0, x4] ldrb w0, [x1, x4] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data sub w1, w2, w0 orr w3, w1, w3 G_M000_IG05: cmp w3, #0 cset x0, eq b G_M000_IG08 align [0 bytes for IG12] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: sub x2, x2, #4 ldr w3, [x0] ldr w4, [x1] sub w3, w3, w4 ldr w0, [x0, x2] ldr w1, [x1, x2] sub w0, w0, w1 orr w0, w3, w0 G_M000_IG01: cmp w0, #0 cset x0 , stp eq fp, lr, [sp, #-0x30]! b G_M000_IG08 stp x19, x20, [sp, #0x18] G_M000_IG07: str cmp x0, x1 x21, [sp, #0x28] beq G_M000_IG09 b G_M000_IG11 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr mov G_M000_IG09: fp, sp mov w0, #1 mov x19, x0 G_M000_IG10: ldp fp, lr, [sp], #0x10 G_M000_IG07: ret lr ldr G_M000_IG11: w20, [x19, #0x4C] cmp x2, #16 sxtw w21, w2 blo G_M000_IG14 sub mov x3, xzr w0, w21, #2 sub x2, x2, #16 cbz x2, G_M000_IG13 cmp w20, w0 G_M000_IG12: ble G_M000_IG05 ldr G_M000_IG03: q16, [ str w21, [x19, #0x4C] x0, x3] mov w0, wzr ldr q17, [x1, x3] G_M000_IG04: cmeq ldr x21, [sp, #0x28] v16.16b, v16.16b, v17.16b ldp x19, x20, [sp, #0x18] uminp v16.4s, v16.4s, v16.4s umov x4, v16.d[0] ldp fp, lr, [sp], #0x30 cmn x4, #1 ret bne G_M000_IG15 lr add x3, x3, #16 cmp x2, x3 G_M000_IG05: bhi G_M000_IG12 G_M000_IG13: cmp w20, w21 ldr q16, [x0, x2] bhi G_M000_IG07 ldr q17, [x1, x2] ubfiz x0, x20, #1 cmeq v16.16b, v16.16b, v17.16b , #32 uminp v16.4s, v16.4s, v16.4s add x0, x1, x0 umov x0, v16.d[0] sub w2, w21, w20 cmn x0 mov w1, #60, #1 bne G_M000_IG15 movz x3, # b G_M000_IG09 0xD1FFAB1E G_M000_IG14: movk x3, #0xD1FFAB1E LSL #16 sub x2, x2, #8 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x0] ldr x3, [x3] ldr x4, [x1] blr x3 sub tbnz w0, #31, G_M000_IG03 x3, x3, x4 add w0, w20, w0 ldr x0, str [x0, x2] w0, [x19, #0x4C] mov w0, #1 ldr x1, [x1, x2] sub x0, x0, x1 orr x0, x3, x0 G_M000_IG06: cmp x0, #0 ldr x21, [sp, #0x28] ldp cset x0, eq x19, x20, [sp, #0x18] b G_M000_IG08 ldp fp, lr, [sp], #0x30 G_M000_IG15: ret mov w0, wzr G_M000_IG16: lr ldp G_M000_IG07: fp, lr, [sp], #0x10 movz x0, #0xD1FFAB1E ret lr movk x0, ; Total bytes of code 304 #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2119: JIT compiled System.SpanHelpers:SequenceEqual(byref,byref,ulong) [Tier1, IL size=510, code size=304] 2120: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.SpanHelpers:IndexOf(byref,int,byref,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 192349 ; 0 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 G_M000_IG01: ubfiz x0, x20, #1, #32 stp fp, add lr, [sp, #-0x80]! x21, x1, x0 stp d8, d9, [sp, #0x10] sub w22, w2, w20 stp cmp w22, #0 d10, d11, bls G_M000_IG07 [sp, G_M000_IG03: #0x20] ldrh stp w0, [x21] x19, x20, [sp, #0x30] cmp stp x21, x22, [sp, #0x40] w0, #60 stp bne G_M000_IG07 cmp w22, #1 x23, x24, [sp, #0x50] blo G_M000_IG09 stp x25, x26, [sp, #0x60] add x0, x21, #2 stp x27, sub x28, [sp, #0x70] w2, w22, #1 mov mov w1, #62 movz x3, #0xD1FFAB1E fp, sp movk x3, #0xD1FFAB1E LSL #16 mov x19, x0 movk x3, #0xD1FFAB1E LSL # mov x21, x2 32 mov w20, w3 ldr mov x3, [x3] w2, w1 blr x3 G_M000_IG02: sub cbz w20, G_M000_IG32 w1, w22, #1 cmp w0, #0 sub w22, w20, #1csel cbz w22, G_M000_IG26 G_M000_IG03: mov x23, xzr ldrh w24, [x21] sub w0, w0, w1, ge w25, w2, cmp w22 w0, w22 cmp w25, #8 bhi G_M000_IG09 blt G_M000_IG13 ubfiz x1, x0, #1, #32 G_M000_IG04: add x21, x21, x1 ldrh w0, [x21, w22, SXTW #2] sub w22, w22 sxtw, w0 x22, w22 G_M000_IG05: add cmp w0, w20w0, w0 , w24 cmp w22, #1 ccmp x22, bls G_M000_IG07 #1 ldrh , nzc, eq w1, [x21, bgt G_M000_IG15 #0x02] G_M000_IG06: cmp dup w1, #62 v8.8h bne , w24 G_M000_IG07 dup v9.8h, w0 add w0, sxtw w0, #2 str x24, w0, [x19, #0x4C] w25 sxtw w21, sub x26, x24, #8 w0 G_M000_IG07: cmp add x0, x23, x22 w21, w20 bge lsl G_M000_IG04 x0, x0, #1 ldr q16, [x19, x0] mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr cmeq w0, [x19, #0x58] cbnz w0, G_M000_IG05 v16.8h, v9.8h, v16.8h mov x0, x19 lsl movz x1, #0xD1FFAB1E x0, x23, movk x1, #0xD1FFAB1E LSL #16 # movk x1, #0xD1FFAB1E LSL #32 1 ldr x1, [x1 ldr ] q17, [x19, x0 blr x1 ] G_M000_IG05: cmeq ldr v17.8h, v8.8h, x3, [x19, #0x20] v17.8h and ldr w0, [x19, #0x58] v16.8h, sub v17.8h, v16 w0, w0, #1 .8h str w0, [x19, #0x58] ldr w2, [x3, #0x08] umaxp cmp w0, w2 bhs G_M000_IG10 v17.4s, v16.4s, v16.4s add umov x3, x0, v17.d[0] x3, #16 cmp x0, #0 str wzr bne , [x3, w0, UXTW #2] sub w3, w21, w20 G_M000_IG18 ldr x0, [x19, #0x28] mov w2, w20 G_M000_IG08: mov w1, wzr add x23, x23, #8 movz x4, #0xD1FFAB1E movk cmp x23, x24 x4, #0xD1FFAB1E LSL #16 beq G_M000_IG11 G_M000_IG09: movk x4, #0xD1FFAB1E LSL #32 cmp x23, x26 ldr ble G_M000_IG07 x4, [x4] G_M000_IG10: ldr wzr, [x0] mov x23, x26 blr x4 b mov w0 G_M000_IG07 , #1 G_M000_IG11: movn G_M000_IG06: ldpw0, #0 x21, G_M000_IG12: x22, [sp, #0x20] ldp x19, x20ldp , [sp, #0x10] x27, x28, ldp fp, lr, [sp], #0x30 [sp, #0x70] ldp ret x25, x26, [ lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], sp, #0x30 #0x60] ret lr G_M000_IG09: ldp movz x0, #0xD1FFAB1E x23, x24, [sp, #0x50] ldp x21 movk , x22, [sp, #0x40] x0, #0xD1FFAB1E LSL ldp x19, x20, #16 [sp movk x0, , #0x30] # ldp d10, d11, [sp, #0x20] 0xD1FFAB1E LSL #32 ldp d8, d9, [sp, #0x10] ldr ldp fp, lr, [sp], #0x80 x0, [x0] blr x0 ret brk_windows lr #0 G_M000_IG10: G_M000_IG07: add x26, x21, #2 cmp w25, #0 ble G_M000_IG11 G_M000_IG14: b G_M000_IG16 bl CORINFO_HELP_RNGCHKFAIL G_M000_IG15: brk_windows sub x22, x22, #0 #1 lsl x0, x22, #1 ; Total bytes of code 372 ldrh w0, [x21, x0] b G_M000_IG05 G_M000_IG16: lsl x0, x23, #1 add x0, x19, x0 sxth w1, w24 mov w2, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] 2121: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex194_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] blr x3 tbnz w0, #31, G_M000_IG11 G_M000_IG17: b G_M000_IG23 G_M000_IG18: ldr q17, [@RWD00] and v16.16b, v16.16b, v17.16b ldr q17, [@RWD16] ushl v16.16b, v16.16b, v17.16b mov v17.16b, v16.16b addv b17, v17.8b umov w0, v17.b[0] ext v16.16b, v16.16b, v16.16b, #8 addv b16, v16.8b umov w2, v16.b[0] orr w25, w0, w2, LSL #8 G_M000_IG19: rbit w0, w25 clz w27, w0 lsr w28, w27, #1 cmp w20, #2 bne G_M000_IG28 G_M000_IG20: add w23, w23, w28 G_M000_IG21: mov w0, w23 G_M000_IG22: ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp d10, d11, [sp, #0x20] ldp d8, d9, [sp, #0x10] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG23: sub w25, w25, w0 add x23, x23, w0, SXTW cmp w25, #0 ble G_M000_IG11 lsl x0, x23, #1 add x0, x0, #2 add x0, x19, x0 ubfiz x2, x22, #1, #32 mov x1, x26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG31 G_M000_IG24: sub w25, w25, #1 add x23, x23, #1 cmp w25, #0 bgt G_M000_IG16 G_M000_IG25: b G_M000_IG11 G_M000_IG26: ldrsh w1, [x21] mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG27: ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp d10, d11, [sp, #0x20] ldp d8, d9, [sp, #0x10] ldp fp, lr, [sp], #0x80 br x3 G_M000_IG28: add x0, x23, w28, SXTW lsl x0, x0, #1 add x0, x0, x19 ubfiz x2, x20, #1, #32 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] mov v10.d[0], v8.d[1] mov v11.d[0], v9.d[1] blr x3 mov v8.d[1], v10.d[0] mov v9.d[1], v11.d[0] cbnz w0, G_M000_IG20 G_M000_IG29: mov w0, #3 lsl w0, w0, w27 bic w25, w25, w0 cbnz w25, G_M000_IG19 G_M000_IG30: b G_M000_IG08 G_M000_IG31: b G_M000_IG21 G_M000_IG32: mov w0, wzr G_M000_IG33: ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp d10, d11, [sp, #0x20] ldp d8, d9, [sp, #0x10] ldp fp, lr, [sp], #0x80 ret lr RWD00 dq 8080808080808080h, 8080808080808080h RWD16 dq 00FFFEFDFCFBFAF9h, 00FFFEFDFCFBFAF9h ; Total bytes of code 684 2122: JIT compiled System.SpanHelpers:IndexOf(byref,int,byref,int) [Tier1 with Static PGO, IL size=417, code size=684] ; Assembly listing for method System.Text.RegularExpressions.Capture:get_Index():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2123: JIT compiled System.Text.RegularExpressions.Capture:get_Index() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.SegmentStringBuilder:Add(System.ReadOnlyMemory`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x1, [fp, #0x10] str x2, [fp, #0x18] G_M000_IG02: ldr x14, [x0] ldr w1, [x0, #0x08] ldr w13, [x14, #0x08] cmp w13, w1 bls G_M000_IG05 G_M000_IG03: ubfiz x13, x1, #4, #32 add x13, x13, #16 add x14, x14, x13 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 add w1, w1, #1 str w1, [x0, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldp x1, x2, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG06: ldp fp, lr, [sp], #0x20 br x3 ; Total bytes of code 108 2124: JIT compiled System.Text.SegmentStringBuilder:Add(System.ReadOnlyMemory`1[ushort]) [Tier1, IL size=46, code size=108] ; Assembly listing for method System.ReadOnlyMemory`1[ushort]:get_Length():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2125: JIT compiled System.ReadOnlyMemory`1[ushort]:get_Length() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.String:Substring(int,int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 64918 ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x20, x0 mov w21, w1 mov w19, w2 G_M000_IG02: mov w0, w21 add x0, x0, w19, UXTW ldr w1, [x20, #0x08] mov w2, w1 cmp x0, x2 bhi G_M000_IG10 cbz w19, G_M000_IG08 G_M000_IG03: cmp w1, w19 beq G_M000_IG06 G_M000_IG04: mov w0, w19 bl System.String:FastAllocateString(int):System.String mov x22, x0 mov w2, w19 ldrsb wzr, [x22] add x0, x22, #12 add x1, x20, #12 ubfiz x3, x21, #1, #32 add x1, x1, x3 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 G_M000_IG05: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: mov x0, x20 G_M000_IG07: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG09: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG10: mov x0, x20 mov w1, w21 mov w2, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 brk_windows #0 ; Total bytes of code 228 2126: JIT compiled System.String:Substring(int,int) [Tier1 with Static PGO, IL size=51, code size=228] ; Assembly listing for method System.String:InternalSubString(int,int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov w21, w1 mov w20, w2 G_M000_IG02: mov w0, w20 bl System.String:FastAllocateString(int):System.String mov x22, x0 mov w2, w20 ldrsb wzr, [x22] add x0, x22, #12 ldrsb wzr, [x19] add x1, x19, #12 ubfiz x3, x21, #1, #32 add x1, x1, x3 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 2127: JIT compiled System.String:InternalSubString(int,int) [Tier1, IL size=37, code size=112] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsQuantifier(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxth w0, w0 cmp w0, #123 bgt G_M000_IG05 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] cmp w0, #5 cset x0, ge G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 64 2128: JIT compiled System.Text.RegularExpressions.RegexParser:IsQuantifier(ushort) [Tier1, IL size=29, code size=64] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ProcessNode|51_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 8 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbz w0, G_M000_IG31 G_M000_IG03: ldrb w1, [x19, #0x2E] cmp w1, #25 ccmp w1, #28, z, ne bne G_M000_IG16 G_M000_IG04: ldr x19, [x19, #0x08] cbnz x19, G_M000_IG06 G_M000_IG05: mov w21, wzr b G_M000_IG08 G_M000_IG06: mov x1, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG07 ldr w21, [x0, #0x10] b G_M000_IG08 G_M000_IG07: mov w21, #1 G_M000_IG08: sub w21, w21, #1 mov x22, x19 cbz x22, G_M000_IG10 G_M000_IG09: ldr x0, [x22] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG14 G_M000_IG10: mov x1, x19 mov x2, x1 cbz x2, G_M000_IG13 G_M000_IG11: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG13 G_M000_IG12: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG13: ldr w0, [x2, #0x10] cmp w21, w0 bhs G_M000_IG32 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w21, w1 bhs G_M000_IG33 add x0, x0, #16 ldr x19, [x0, w21, UXTW #3] b G_M000_IG15 G_M000_IG14: mov x19, x22 G_M000_IG15: b G_M000_IG03 G_M000_IG16: ldrb w0, [x19, #0x2E] cmp w0, #26 bne G_M000_IG17 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x0, G_M000_IG17 mov x19, x0 b G_M000_IG03 G_M000_IG17: ldrb w21, [x19, #0x2E] cmp w21, #8 bhi G_M000_IG18 sub w0, w21, #3 cmp w0, #2 bls G_M000_IG19 sub w0, w21, #6 cmp w0, #2 bhi G_M000_IG31 mov x0, x19 mov x1, x20 mov w2, wzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG31 b G_M000_IG21 G_M000_IG18: sub w0, w21, #33 cmp w21, #24 ccmp w0, #1, z, ne bhi G_M000_IG31 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w21, w0 ldrb w0, [x19, #0x2E] cmp w0, #34 cset x22, eq b G_M000_IG23 G_M000_IG19: mov x0, x19 mov x1, x20 mov w2, #1 mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG31 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG20: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x1 G_M000_IG21: ldrb w0, [x19, #0x2E] sub w0, w0, #3 uxtb w0, w0 strb w0, [x19, #0x2E] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG22: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x1 G_M000_IG23: cmp w22, w21 bge G_M000_IG31 G_M000_IG24: ldr x0, [x19, #0x08] cbz x0, G_M000_IG26 G_M000_IG25: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG30 G_M000_IG26: ldr x1, [x19, #0x08] mov x2, x1 cbz x2, G_M000_IG29 G_M000_IG27: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG29 G_M000_IG28: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG29: ldr w0, [x2, #0x10] cmp w22, w0 bhs G_M000_IG32 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG33 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] b G_M000_IG30 G_M000_IG30: mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w22, w22, #1 cmp w22, w21 blt G_M000_IG24 G_M000_IG31: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG32: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG33: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 808 2129: JIT compiled System.Text.RegularExpressions.RegexNode:g__ProcessNode|51_0(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier1, IL size=218, code size=808] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2130: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:IsReferenceOrContainsReferences[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]() [Tier1, IL size=2, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldp x20, x2, [x19] ldr w21, [x20, #0x10] ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w1, w21 bls G_M000_IG04 G_M000_IG03: sxtw x1, w21 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] add w0, w21, #1 str w0, [x20, #0x10] b G_M000_IG05 G_M000_IG04: mov x0, x20 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: stp xzr, xzr, [x19] G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 124 2131: JIT compiled System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:Dispose() [Tier1, IL size=25, code size=124] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldstr(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex195_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) mov fp, sp ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #114 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 G_M000_IG01: stp fp, lr, [sp, #-0x30]! 2132: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldstr(System.String) [Tier1, IL size=18, code size=48] stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2133: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex195_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2134: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 9 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x18] mov x19, x0 G_M000_IG02: cbz x2, G_M000_IG12 ldr x20, [x19, #0x80] ldr x0, [x20, #0x08] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG04 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x1, [x20, #0x08] ldr w1, [x1, #0x10] sub w1, w1, #1 orr w20, w1, #0xD1FFAB1E ldr w1, [x19, #0x58] add w1, w1, #7 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG07 G_M000_IG06: ldr w0, [x21, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] cbnz x0, G_M000_IG09 G_M000_IG08: cbnz w1, G_M000_IG13 mov x2, xzr mov w3, wzr b G_M000_IG10 G_M000_IG09: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG13 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG10: cmp w3, #4 blo G_M000_IG14 str w20, [x2] ldr w0, [x19, #0x58] add w0, w0, #4 str w0, [x19, #0x58] G_M000_IG11: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 464 2135: JIT compiled System.Reflection.Emit.DynamicILGenerator:Emit(System.Reflection.Emit.OpCode,System.String) [Tier1, IL size=41, code size=464] ; Assembly listing for method System.Reflection.Emit.DynamicScope:GetTokenFor(System.String):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 mov x2, x1 G_M000_IG02: ldr x0, [x19, #0x08] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG04 G_M000_IG03: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG05 G_M000_IG04: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x19, #0x08] ldr w0, [x0, #0x10] sub w0, w0, #1 orr w0, w0, #0xD1FFAB1E G_M000_IG06: ldr x19, [sp, #0x18] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldp ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 2136: JIT compiled System.Reflection.Emit.DynamicScope:GetTokenFor(System.String) [Tier1, IL size=32, code size=132] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2137: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex195_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: uxth w0, w0 cmp w0, #0xD1FFAB1E bhs G_M000_IG04 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] and w19, w0, #31 b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w19, w0 G_M000_IG05: sub w0, w19, #8 cmp w0, #16 bhi G_M000_IG08 mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG06: mov w0, wzr G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: mov w0, #1 G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr RWD00 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 ; Total bytes of code 140 2138: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(int) [Tier1, IL size=90, code size=140] ; Assembly listing for method System.Char:GetUnicodeCategory(ushort):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxth w0, w0 cmp w0, #0xD1FFAB1E bhs G_M000_IG05 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, UXTW #2] and w0, w0, #31 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 76 2139: JIT compiled System.Char:GetUnicodeCategory(ushort) [Tier1, IL size=22, code size=76] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiChar|19(System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x1, #0x28] tst w3, #64 cset x3, ne ldr x1, [x1, #0x10] uxtb w2, w2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x4 ; Total bytes of code 52 2140: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiChar|19(System.Text.RegularExpressions.RegexNode,bool) [Tier1, IL size=26, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiCharString|20(System.String,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: tst w3, #255 beq G_M000_IG09 G_M000_IG03: ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG04 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x20, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 ldr x1, [x21] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x20, #0x08] sub w22, w0, #1 tbnz w22, #31, G_M000_IG08 ldr w0, [x20, #0x08] cmp w0, w22 ble G_M000_IG07 ldr x23, [x21, #-0x08] add x24, x20, #12 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex196_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG05: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x2, #0xD1FFAB1E LSL #32 stp ldr x2, [x2] fp, lr, [sp, #-0x30]! blr x2 ldr x0, [x19, #0x08] stp movz x1, #0xD1FFAB1E x19, x20, movk x1, #0xD1FFAB1E LSL #16 [sp, #0x18] movk x1, #0xD1FFAB1E LSL #32 str ldr x1, [x1] x21, [sp, #0x28] blr x1 ldr x0, [x19, #0x08] mov ldr x1, [x19, #0x18] fp, sp movz x2, #0xD1FFAB1E mov movk x2, #0xD1FFAB1E LSL #16 x19, x0 movk x2, #0xD1FFAB1E LSL #32 mov x21, x1 ldr x2, [x2] mov w20, w2 blr x2 G_M000_IG02: ldp mov x1, x21 x0 mov w2, w20 , mov x0, x19 x1, [x19, # bl 0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 blr bl x2 ldr x0, [x19, #0x08] System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldr x1, [x19, #0x18] cbnz w0, G_M000_IG04 movz x2, #0xD1FFAB1E ldr movk x2, #0xD1FFAB1E LSL #16 w0, [x19, #0x4C] movk x2, #0xD1FFAB1E LSL #32 cmp w0, w20 ldr x2, [x2] beq G_M000_IG04 blr x2 add ldr x0, [x19, #0x08] w0, w0, # mov x1, x231 str w0, [x19, #0x4C] movz x2, #0xD1FFAB1E b G_M000_IG02 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG04: movk x2, #0xD1FFAB1E LSL #32 ldr ldr x2, [x2] blr x2 x21, [sp, #0x28] ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ldp movk x1, #0xD1FFAB1E LSL #32 x19, x20, [sp, #0x18] ldr x1, [x1] ldp fp, lr, [sp], #0x30 blr x1 ret lr ldr x0, [x19, #0x08] ldrh ; Total bytes of code 108 w1, [x24, w22, UXTW #2] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] 2141: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex196_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub w22, w22, #1 tbz w22, #31, G_M000_IG05 G_M000_IG06: b G_M000_IG08 G_M000_IG07: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x23, [x21, #-0x08] mov x1, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr w1, [x20, #0x08] cmp w22, w1 bhs G_M000_IG11 add x24, x20, #12 ldrh w1, [x24, w22, UXTW #2] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sub w22, w22, #1 tbz w22, #31, G_M000_IG07 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 ldr x1, [x21, #0xD8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x21, #0xF8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x21, #0xE8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x19, #0x38] ldr w1, [x20, #0x08] add w0, w0, w1 str w0, [x19, #0x38] G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1236 2142: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitMultiCharString|20(System.String,bool,bool) [Tier1, IL size=418, code size=1236] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ; Assembly listing for method System.MemoryExtensions:AsMemory(System.String):System.ReadOnlyMemory`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add G_M000_IG01: x0, x1, x0 sub w3stp, w21, w20 mov w1, #10fp, lr, [sp, #-0x30]! mov w2, #62 mov movz x4, #0xD1FFAB1E fp, sp movk x4, #0xD1FFAB1E LSL #16 str movk x4, #0xD1FFAB1E LSL #32 xzr, ldr [fp, #0x20] x4 str xzr, [fp, #0x10] , [x4] G_M000_IG02: blr x4 tbnz w0, # 31, G_M000_IG03 cbnz x0, G_M000_IG05 add G_M000_IG03: w0, w20, w0 str xzr, [fp, #0x20] str str xzr, [fp, #0x28] w0, [x19, #0x4C] ldp x0, x1, [fp, #0x20] G_M000_IG04: mov w0, #1 ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: G_M000_IG05: ldr x21, [sp, #0x28] ldr ldp w1, [x0, #0x08] x19, x20, [sp, #0x18] str x0, [fp, #0x10] ldp fp, lr, [sp], #0x30 stp wzr, w1, [fp, #0x18] ret lr ldp x0, x1, [fp, #0x10] G_M000_IG07: G_M000_IG06: ldp fp, lr, [sp], #0x30 movz x0, # ret lr 0xD1FFAB1E ; Total bytes of code 64 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 2143: JIT compiled System.MemoryExtensions:AsMemory(System.String) [Tier1, IL size=27, code size=64] ; Total bytes of code 168 2144: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:GetStringLiteral(int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x30] ldrsb wzr, [x0] and w1, w1, #0xD1FFAB1E tbnz w1, #31, G_M000_IG04 G_M000_IG03: ldr x0, [x0, #0x08] ldr w2, [x0, #0x10] cmp w1, w2 ble G_M000_IG05 G_M000_IG04: mov x3, xzr b G_M000_IG06 G_M000_IG05: cmp w1, w2 bhs G_M000_IG10 ldr x3, [x0, #0x08] ldr w0, [x3, #0x08] cmp w1, w0 bhs G_M000_IG11 add x0, x3, #16 ldr x3, [x0, w1, UXTW #3] G_M000_IG06: cbz x3, G_M000_IG08 G_M000_IG07: ldr x0, [x3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 csel x3, x3, xzr, eq G_M000_IG08: mov x0, x3 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 152 2145: JIT compiled System.Reflection.Emit.DynamicResolver:GetStringLiteral(int) [Tier1, IL size=13, code size=152] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement+<>c:b__16_0(byref,System.Text.RegularExpressions.Match):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] mov x19, x1 mov x20, x2 G_M000_IG02: add x21, x19, #16 mov x0, x21 add x14, x19, #32 ldr w15, [x19, #0x08] sxtw w12, w15 ldr wip0, [x20, #0x10] sub w15, wip0, w15 mov wip0, w12 add xip0, xip0, w15, UXTW ldr w1, [x14, #0x0C] cmp xip0, x1 bhi G_M000_IG07 ldr xip0, [x14] ldr w14, [x14, #0x08] add w14, w14, w12 str xip0, [fp, #0x18] stp w14, w15, [fp, #0x20] ldr x14, [x0] ldr w1, [x0, #0x08] ldr w15, [x14, #0x08] cmp w15, w1 bls G_M000_IG04 G_M000_IG03: ubfiz x15, x1, #4, #32 add x15, x15, #16 add x2, x14, x15 ldr x15, [fp, #0x18] mov x14, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w3, [fp, #0x20] str w3, [x2, #0x08] ldr w3, [fp, #0x24] str w3, [x2, #0x0C] add w1, w1, #1 str w1, [x0, #0x08] b G_M000_IG05 G_M000_IG04: ldp x1, x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data blr x3 G_M000_IG05: ldp w1, w0, [x20, #0x10] add w1, w1, w0 str w1, [x19, #0x08] mov x1, x21 ldr x0, [x19] mov x2, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 add x0, x19, #12 ldr w1, [x0] sub w1, w1, #1 str w1, [x0] cmp w1, #0 cset x0, ne G_M000_IG06: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG01: G_M000_IG04: mov stp w0, #33 fp, lr, [sp, #-0x40]! movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 stp movk x1, #0xD1FFAB1E LSL #32 x19, x20, [sp, #0x10] ldr stp x21x1, [x1] , x22, [sp, #0x20] blr x1 brk_windows #0 ; Total bytes of code 308 stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 2146: JIT compiled System.Text.RegularExpressions.RegexReplacement+<>c:b__16_0(byref,System.Text.RegularExpressions.Match) [Tier1, IL size=96, code size=308] G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ; Assembly listing for method System.ReadOnlyMemory`1[ushort]:Slice(int,int):System.ReadOnlyMemory`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG01: G_M000_IG09: stp fp, lr, [sp, #-0x20]! mov fp, sp str bl xzr, [fp, #0x10]CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG02: ; Total bytes of code 444 mov w3, w1 add x3, x3, w2, UXTW ldr w4, [x0, #0x0C] cmp x3, x4 bhi G_M000_IG04 ldr x3, [x0] ldr w0, [x0, #0x08] add w0, w0, w1 str x3, [fp, #0x10] stp w0, w2, [fp, #0x18] ldp 2147: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex196_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] x0, x1, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 92 2148: JIT compiled System.ReadOnlyMemory`1[ushort]:Slice(int,int) [Tier1, IL size=42, code size=92] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex197_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2149: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex197_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:ReplacementImpl(byref,System.Text.RegularExpressions.Match):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp x25, x26, [sp, #0x70] stp x27, x28, [sp, #0x80] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] mov x21, x0 mov x20, x1 mov x19, x2 G_M000_IG02: ldr x22, [x21, #0x10] mov w23, wzr ldr w24, [x22, #0x08] cmp w24, #0 ble G_M000_IG24 G_M000_IG03: add x1, x22, #16 ldr w25, [x1, w23, UXTW #2] tbnz w25, #31, G_M000_IG07 G_M000_IG04: ldr x1, [x21, #0x08] ldr w0, [x1, #0x08] cmp w25, w0 bhs G_M000_IG26 add x1, x1, #16 ldr x1, [x1, w25, UXTW #3] cbnz x1, G_M000_IG05 mov x26, xzr mov w27, wzr b G_M000_IG06 G_M000_IG05: ldr w27, [x1, #0x08] mov x26, x1 G_M000_IG06: mov w28, wzr b G_M000_IG20 G_M000_IG07: cmn w25, #4 bge G_M000_IG08 neg w1, w25 sub w1, w1, #5 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x30] str x1, [fp, #0x38] b G_M000_IG19 G_M000_IG08: neg w14, w25 sub w25, w14, #1 cmp w25, #3 bhi G_M000_IG17 mov w0, w25 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG09: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG10 mov x1, xzr mov w2, wzr b G_M000_IG11 G_M000_IG10: ldr w2, [x19, #0x10] ldr w1, [x0, #0x08] cmp w1, w2 blo G_M000_IG25 mov x1, x0 G_M000_IG11: str x1, [fp, #0x20] stp wzr, w2, [fp, #0x28] b G_M000_IG18 G_M000_IG12: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] str x1, [fp, #0x28] b G_M000_IG18 G_M000_IG13: ldr x1, [x19, #0x50] ldr w1, [x1, #0x08] sub w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] str x1, [fp, #0x28] b G_M000_IG18 G_M000_IG14: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG15 mov x1, xzr mov w2, wzr b G_M000_IG16 G_M000_IG15: ldr w2, [x0, #0x08] mov x1, x0 G_M000_IG16: str x1, [fp, #0x20] stp wzr, w2, [fp, #0x28] b G_M000_IG18 G_M000_IG17: str xzr, [fp, #0x20] str xzr, [fp, #0x28] G_M000_IG18: ldr x14, [fp, #0x20] str x14, [fp, #0x30] ldr w14, [fp, #0x28] str w14, [fp, #0x38] ldr w14, [fp, #0x2C] str w14, [fp, #0x3C] G_M000_IG19: ldr x26, [fp, #0x30] ldp w28, w27, [fp, #0x38] G_M000_IG20: cbz w27, G_M000_IG23 G_M000_IG21: str x26, [fp, #0x10] stp w28, w27, [fp, #0x18] ldr x14, [x20] ldr w1, [x20, #0x08] ldr w15, [x14, #0x08] cmp w15, w1 bls G_M000_IG22 ubfiz x15, x1, #4, #32 add x15, x15, #16 add x2, x14, x15 ldr x15, [fp, #0x10] mov x14, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w0, [fp, #0x18] str w0, [x2, #0x08] ldr w0, [fp, #0x1C] str w0, [x2, #0x0C] add w1, w1, #1 str w1, [x20, #0x08] b G_M000_IG23 G_M000_IG22: ldp x1, x2, [fp, #0x10] mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG23: add w23, w23, #1 cmp w24, w23 bgt G_M000_IG03 G_M000_IG24: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG25: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG26: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 648 2150: JIT compiled System.Text.RegularExpressions.RegexReplacement:ReplacementImpl(byref,System.Text.RegularExpressions.Match) [Tier1, IL size=190, code size=648] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ; Assembly listing for method System.Text.RegularExpressions.Match:Reset(System.String,int):this blr x4 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [ G_M000_IG01: x22, w0, UXTW #2] stp mov w2, #116 fp, lr, [sp, #-0x10]! cmp w0, #103 mov fp, sp ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG02: G_M000_IG08: add sxtw w24, w1 x14, x0, # cmp w24, w25 8 blt G_M000_IG06 mov G_M000_IG09: x15, x1 bl b G_M000_IG03 CORINFO_HELP_ASSIGN_REF G_M000_IG10: str add w0, w20, w24 wzr, [x0, #0x34] str str w0w2, [x0, #0x5C] , [x19, #0x4C] ldr x1, [x0, mov w0, #1 #0x50] mov w2, wzr G_M000_IG11: ldr w3, [x1, #0x08] ldr cmp w3, #0x25, [sp, #0x48] ldp ble G_M000_IG04 x23, x24, [sp, #0x38] add x1, x1, #16 ldp x21, x22, [sp, #0x28] align ldp x19, x20, [sp, #0x18] [4 bytes for IG03] ldp fp, lr, [sp], #0x50 align [4 bytes] ret lr align [4 bytes] G_M000_IG12: align [0 bytes] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x0, #0xD1FFAB1E LSL #32 str ldr x0, [x0] wzr, [x1, w2, UXTW #2] blr x0 brk_windows add w2, w2, #1 # cmp w3, w2 0 bgt G_M000_IG03 G_M000_IG04: strb wzr, [x0, #0x60] ldr G_M000_IG13: x0, [x0, #0x38] cbnz x0, G_M000_IG06 G_M000_IG05: ldp fp, lr, [sp], #0x10 bl CORINFO_HELP_RNGCHKFAIL ret lr brk_windows #0 ; Total bytes of code 328 G_M000_IG06: str xzr, [x0, #0x18] G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 112 2151: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] 2152: JIT compiled System.Text.RegularExpressions.Match:Reset(System.String,int) [Tier1, IL size=70, code size=112] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x1, [x1, #0x30] cbz x1, G_M000_IG04 G_M000_IG03: b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x1, x0 G_M000_IG05: mov x0, x1 bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x15, [x0] add x14, x19, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 2153: JIT compiled System.Collections.Generic.List`1[System.__Canon]:.ctor() [Tier1, IL size=18, code size=96] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:CharInClassInternal(ushort,System.String,int,int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add w5, w2, #3 add w6, w5, w3 cmp w5, w6 beq G_M000_IG07 ldr w7, [x1, #0x08] add x8, x1, #12 uxth w9, w0 align [0 bytes for IG03] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: add w10, w5, w6 asr w10, w10, #1 cmp w10, w7 bhs G_M000_IG15 ldrh w11, [x8, w10, UXTW #2] cmp w11, w9 ble G_M000_IG05 G_M000_IG04: sxtw w6, w10 b G_M000_IG06 G_M000_IG05: add w5, w10, #1 G_M000_IG06: cmp w5, w6 bne G_M000_IG03 G_M000_IG07: and w7, w5, #1 and w8, w2, #1 cmp w7, w8 bne G_M000_IG10 G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG10: cbnz w4, G_M000_IG12 mov w0, wzr G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: add w2, w2, w3 add w2, w2, #3 cbz x1, G_M000_IG14 mov w9, w2 add x3, x9, w4, UXTW ldr w7, [x1, #0x08] mov w5, w7 cmp x3, x5 bhi G_M000_IG14 add x8, x1, #12 ubfiz x1, x2, #1, #32 add x1, x8, x1 sxtw w2, w4 uxth w9, w0 mov w0, w9 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG14: mov ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool w0, #33 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movz x1, #0xD1FFAB1E ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 252 2154: JIT compiled System.Text.RegularExpressions.RegexCharClass:CharInClassInternal(ushort,System.String,int,int,int) [Tier1, IL size=74, code size=252] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] ; Assembly listing for method System.Collections.HashHelpers:ExpandPrime(int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 13340 sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz G_M000_IG01: x1, #0xD1FFAB1E stp movkfp, lr, [sp, #-0x10]! x1, mov #0xD1FFAB1E LSL #16 fp, sp movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG02: blr x1 G_M000_IG07: lsl w1, w0, #1 ldr movz w2, #x3, [x190xD1FFAB1E, #0x20] movk w2, # ldr w0, [x19, #0x58] 0xD1FFAB1E LSL #16 sub w0, w0, #1 str w0, [x19, #0x58] movz ldr w2, [x3, #0x08] w3, cmp w0, w2 # bhs G_M000_IG12 0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 add x3, x3, #16 cmp w1, w2 str wzr, [ ccmp w0, w3, z, hi x3 blt G_M000_IG04 , w0, UXTW #2] mov w0, w1 sub w3, w21, w20 movz ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E x1 movk x4, #0xD1FFAB1E LSL #16 , #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr wzr, [x0] ldr blr x4 x1, [x1] mov w0, #1 G_M000_IG08: ldr G_M000_IG01: x21, [sp, #0x48] ldp fp, lr, [sp], #0x10 br x1 G_M000_IG04: movz w0, #0xD1FFAB1E ldp movk w0, #0xD1FFAB1E LSL #16 x19, x20, [sp, #0x38] G_M000_IG05: ldp fp, lr, [sp], #0x50 ldp fp, lr ret lr , [sp], #0x10 ret lr G_M000_IG09: ; Total bytes of code 84 mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] 2155: JIT compiled System.Collections.HashHelpers:ExpandPrime(int) [Tier1 with Static PGO, IL size=33, code size=84] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2156: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex197_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Buffers.ArrayPool`1[System.ReadOnlyMemory`1[ushort]]:get_Shared():System.Buffers.ArrayPool`1[System.ReadOnlyMemory`1[ushort]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 2157: JIT compiled System.Buffers.ArrayPool`1[System.ReadOnlyMemory`1[ushort]]:get_Shared() [Tier1, IL size=6, code size=32] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Sub():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #89 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 2158: JIT compiled System.Text.RegularExpressions.RegexCompiler:Sub() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsSetFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x2E] cmp w0, #8 bhi G_M000_IG04 G_M000_IG03: cmp w0, #5 ccmp w0, #8, z, ne beq G_M000_IG05 b G_M000_IG06 G_M000_IG04: mov w1, #45 cmp w0, #11 ccmp w0, w1, z, ne bne G_M000_IG06 G_M000_IG05: mov w0, #1 b G_M000_IG07 G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 72 2159: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsSetFamily() [Tier1, IL size=39, code size=72] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Return(System.ReadOnlyMemory`1[ushort][],bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 11 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x20, x0 mov x19, x1 mov w21, w2 G_M000_IG02: cbz x19, G_M000_IG24 ldr w22, [x19, #0x08] sub w0, w22, #1 orr w0, w0, #15 clz w0, w0 eor w0, w0, #31 sub w23, w0, #3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #66 bl CORINFO_HELP_GETSHARED_GCTHREADSTATIC_BASE_DYNAMICCLASS ldr x24, [x0] cbnz x24, G_M000_IG04 G_M000_IG03: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x24, x0 G_M000_IG04: mov w25, wzr mov w26, #1 ldr w0, [x24, #0x08] cmp w0, w23 bls G_M000_IG16; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex198_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG05: mov w25, #1 tst w21, #255 beq G_M000_IG06 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: mov w14, #16 lsl w14, w14, w23 G_M000_IG01: cmp w22, w14 bne G_M000_IG25 stp ubfiz fp, x14, x23, #4lr, [sp, #-0x30]!, #32 add x14, x14, #16 stp add x0, x24, x14 x19, x20, [sp, #0x18] ldr x21, [x0] str x21, [sp, #0x28] mov x14, x0 mov mov x15, x19 fp, sp bl CORINFO_HELP_CHECKED_ASSIGN_REF mov str x19, x0 wzr, [x0, # mov x21, x1 0x08] mov w20, w2 cbz x21, G_M000_IG16 G_M000_IG02: ldr x0, [x20, #0x10] mov x1, x21 ldr w1, [x0, #0x08] mov w2, w20 cmp w23, w1 mov x0, x19 bhs G_M000_IG26 bl add x0, x0, #16 ldr x2, [x0, w23, UXTW #3] System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz x2, G_M000_IG07 cbz w0, G_M000_IG04 mov x0, x20 G_M000_IG03: mov w1, w23 mov x1, x21 movz x2, #0xD1FFAB1E mov w2, w20 movk x2, #0xD1FFAB1E LSL #16 mov movk x2, #0xD1FFAB1E LSL #32 x0, x19 ldr x2, [x2] blr x2 bl mov x2, x0 G_M000_IG07: System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldr x26, [x2, #0x08] cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 w0, [x19, #0x4C] ldr x0, [x0] cmp blr x0 w0, w20 sxtw w24, w0 beq G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E add LSL #16w0, w0, #1 movk str w0, [x19, #0x4C] x0, #0xD1FFAB1E LSL #32 b G_M000_IG02 G_M000_IG04: mov w1, ldr x21, [sp, #0x28] #67 bl ldp CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS x19, x20, [sp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 ldp movk x0, #0xD1FFAB1E LSL #32 fp, lr, [sp], #0x30 ldr ret lr w0, [x0] cmp w0, #0 beq G_M000_IG23 udiv w1, w24, w0 ; Total bytes of code 108 msub w24, w1, w0, w24 mov w27, wzr ldr w28, [x26, #0x08] cmp w28, #0 ble G_M000_IG14 G_M000_IG08: cmp w24, w28 bhs G_M000_IG26 2160: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex198_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] add x0, x26, #16 ldr x1, [x0, w24, UXTW #3] str x1, [fp, #0x10] ldrsb wzr, [x1] str wzr, [fp, #0x1C] mov x0, x1 bl System.Threading.Monitor:Enter(System.Object) ldr x1, [fp, #0x10] ldr x14, [x1, #0x08] ldr w0, [x1, #0x10] ldr w15, [x14, #0x08] cmp w15, w0 bls G_M000_IG11 G_M000_IG09: cbnz w0, G_M000_IG10 str wzr, [x1, #0x14] G_M000_IG10: add x14, x14, #16 add x14, x14, x0, LSL #3 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add w0, w0, #1 str w0, [x1, #0x10] mov w2, #1 str w2, [fp, #0x1C] G_M000_IG11: mov x0, x1 bl System.Threading.Monitor:Exit(System.Object) ldr w0, [fp, #0x1C] cbnz w0, G_M000_IG15 add w24, w24, #1 cmp w28, w24 bne G_M000_IG13 G_M000_IG12: mov w24, wzr G_M000_IG13: add w27, w27, #1 cmp w28, w27 bgt G_M000_IG08 G_M000_IG14: mov w26, wzr b G_M000_IG16 G_M000_IG15: mov w26, #1 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x21, [x0] ldrb w0, [x21, #0x9D] cbz w0, G_M000_IG22 G_M000_IG17: cbz w22, G_M000_IG22 mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w24, w0 sxtw w27, w22 ldrsb wzr, [x20] mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w4, w0 mov x0, x21 mov w2, w24 mov w3, w27 mov w1, #3 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 tst w25, w26 bne G_M000_IG22 mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w19, w0 mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int cbnz w25, G_M000_IG18 movn w4, #0 b G_M000_IG19 G_M000_IG18: sxtw w4, w23 G_M000_IG19: sxtw w1, w19 sxtw w2, w22 sxtw w3, w0 cbnz w25, G_M000_IG20 mov x0, x21 mov w5, #1 b G_M000_IG21 G_M000_IG20: mov x0, x21 mov w5, wzr G_M000_IG21: movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG22: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG23: bl CORINFO_HELP_THROWDIVZERO G_M000_IG24: mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG25: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG26: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 912 2161: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Return(System.ReadOnlyMemory`1[ushort][],bool) [Tier1, IL size=232, code size=912] ; Assembly listing for method System.Collections.Hashtable:InitHash(System.Object,int,byref,byref):uint:this ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: G_M000_IG24: stp fp, stp lr, [sp, #fp, -0x50]!lr, [sp, #-0x30]! stp stp x19, x19, x20, [sp, #0x18] x20, [sp, #0x18] str stp x21, x22, [sp, #0x28] x21, [sp, #0x28] stp x23, x24, [sp, #0x38] mov str fp, sp x25, [sp, #0x48] mov mov w21, w2 fp, sp mov x19, x3 mov x20, x4 mov x19, G_M000_IG02: x0 ldr x11, [x0] G_M000_IG02: movz x2, #0xD1FFAB1E ldr movkw20, [x19, #0x4C] x2, #0xD1FFAB1E LSL #16 sxtw w21, w2 movk x2, #0xD1FFAB1E LSL #32 sub cmp w0, w21, #x11, x2 8 bne G_M000_IG08 cmp w20, w0 G_M000_IG03: ble G_M000_IG05 mov x11, x0 G_M000_IG03: ldr x11, [x11, #0x20] str w21, [x19, #0x4C] cbnz x11, G_M000_IG11 mov w0, wzr G_M000_IG04: G_M000_IG04: ldr x0, [x1] ldr x25, [sp, #0x48] movz x2, #0xD1FFAB1E ldp movk x2, #0xD1FFAB1E LSL #16 x23, x24, [sp, #0x38] movk x2, #0xD1FFAB1E LSL #32 ldp x21, x22, [sp, #0x28] cmp x0, x2 ldp x19, x20, [sp, #0x18] bne G_M000_IG07 ldp fp, lr, [sp], #0x50 G_M000_IG05: ret lr mov x0, x1 bl G_M000_IG05: cmp w20, w21 System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int bhi G_M000_IG12 G_M000_IG06: ubfiz x0, x20, #1, #32 b G_M000_IG09 add x22, x1, x0 G_M000_IG07: sub w23, w21, w20 mov w24, wzr mov x0, x1 sub w25, w23, #7 ldr cmp w25, #0x1, [x1] ldr x1 ble G_M000_IG03 , [ G_M000_IG06: x1, add w0, w24, #3 #0x40] cmp w0, w23 ldr x1, [x1, #0x18] bhi G_M000_IG12 blr x1 ubfiz x1, x0, #1, #32 add x1, x22, x1 b G_M000_IG06 sub w3, w23, w0 mov x0, x1 G_M000_IG08: mov w1, #97 mov w2, #103 ldr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 x2, [x0] movk x4, #0xD1FFAB1E LSL #32 ldr ldr x2, [x2, #0x50] x4, [x4] blr x4 ldr add w24, w24, w0 x2, [x2] tbnz blr x2 w0, # 31, G_M000_IG03 G_M000_IG09: add w1, w24, #1 and cmp w0, w0, w1, w23 #0xD1FFAB1E bhs G_M000_IG13 str w0 ldrh , [x19] w0, [x22, w1, UXTW #2] ldr w1, [x19] mov w2, #116 mov w2, #101 cmp w0, #103 ccmp w0, w2, z, ne mul w1, w1, w2 bne G_M000_IG08 sub w2, w21, #1 G_M000_IG07: cmp w2, #0 add w0, w24, #2 beq G_M000_IG12 cmp udiv w3, w1, w2 w0, w23 msub w1, w3, w2, w1 bhs G_M000_IG13 add w1, w1, #1 ldrh w0, [x22, w0, UXTW #2] str w1, [x20] mov w2, #116 G_M000_IG10: ldr cmp w0, #103 x21, [sp, #0x28] ccmp w0, w2, z, ne ldp beq G_M000_IG10 x19, x20, [sp, #0x18] ldp G_M000_IG08: fp, lr, [sp], #0x30 sxtw w24, w1 ret lr cmp w24, w25 G_M000_IG11: blt G_M000_IG06 G_M000_IG09: ldr x0, [x0, #0x20] b G_M000_IG03 movz x11, # G_M000_IG10: 0xD1FFAB1E add w0, w20, w24 movk x11, # str 0xD1FFAB1E LSL #16 w0, [x19, # movk x11, #0xD1FFAB1E LSL #32 0x4C] ldr x2, [x11] mov w0, #1 blr x2 b G_M000_IG09 G_M000_IG11: G_M000_IG12: ldr x25, [sp, #0x48] bl CORINFO_HELP_THROWDIVZERO ldp x23, x24, [sp, #0x38] brk_windows # ldp x21, x22, [sp, #0x28] 0 ldp x19, x20, [sp, #0x18] ; Total bytes of code 240 ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] 2162: JIT compiled System.Collections.Hashtable:InitHash(System.Object,int,byref,byref) [Tier1 with Static PGO, IL size=33, code size=240] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2163: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Int32:GetHashCode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2164: JIT compiled System.Int32:GetHashCode() [Tier1, IL size=3, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_Ch():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrh w0, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2165: JIT compiled System.Text.RegularExpressions.RegexNode:get_Ch() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingAnchor():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x29] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2166: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingAnchor() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_TrailingAnchor():ubyte:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x2A] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2167: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_TrailingAnchor() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr x20, [x19] mov x0, x20 ldr x1, [x0, #0x30] ldr x1, [x1] ldr x1, [x1, #0x68] cbz x1, G_M000_IG05 G_M000_IG03: mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 add x14, x19, #24 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x20, #0x30] ldr x0, [x0] ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG08 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x1, x0 b G_M000_IG03 G_M000_IG06: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS G_M000_IG07: mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG04 G_M000_IG08: ldr x0, [x19, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 cbz x21, G_M000_IG04 ldr x0, [x20, #0x30] ldr x0, [x0] ldr x0, [x0, #0x70] cbz x0, G_M000_IG06 G_M000_IG09: b G_M000_IG07 ; Total bytes of code 268 2168: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:.ctor() [Tier1, IL size=8, code size=268] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:.ctor(System.Collections.Generic.IEqualityComparer`1[System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 66740 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 G_M000_IG01: add w0, w20, #8 stp cmp w0, w2 fp, lr, [sp, #-0x30]! bhi G_M000_IG15 stp G_M000_IG09: x19, x20, [sp, #0x20] str mov w0, fp, sp [ str x19, #0x4C] x0, [fp, #0x18] sxtw w21, w0 mov cmp w21, w20 x19, x0 bge G_M000_IG10 mov w0, w20 G_M000_IG02: mov w20, w21 mov x0, x19 mov w21, w0 mov x15, x1 G_M000_IG10: cbnz x15, G_M000_IG07 ldr w0, [x19, #0x58] G_M000_IG03: cbnz w0, G_M000_IG11 ldr x0, [x0] mov x0, x19 movz x1, #0xD1FFAB1E ldr movk x1, #0xD1FFAB1E LSL #16 x1, [x0, #0x30] movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x1, [x1, #0x68] ldr x1, [x1] cbz x1, G_M000_IG05 blr x1 G_M000_IG04: G_M000_IG11: b G_M000_IG06 G_M000_IG05: ldr movz x1, #0xD1FFAB1Ex3, [x19, #0x20] movk x1, #0xD1FFAB1E LSL #16 ldr w0, [x19, #0x58] movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x1, x0 G_M000_IG06: mov x0, x1 movz x1, #0xD1FFAB1E sub movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 w0, ldr x1, [x1] w0, #1 blr x1 str mov x15, x0 w0, [x19, #0x58] G_M000_IG07: ldr w2, [x3, #0x08] add x14, x19, #24 cmp w0, w2 bl CORINFO_HELP_ASSIGN_REF bhs G_M000_IG16 ldr add x3, x3, #16 x0, [x19] str wzr, [x3, w0, UXTW #2] ldr sub w3, w21, w20 x0, [x0, #0x30] ldr x0, [x0] ldr x0, [x19, #0x28] mov w2, w20 ldr x0, [x0] mov w1, wzr movz x1, #0xD1FFAB1E movz x4, #0xD1FFAB1E movk movk x4, #0xD1FFAB1E LSL #16 x1, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 ldr x4, [x4] cmp ldr wzr, [x0] x0, x1 blr x4 mov w0, #1 beq G_M000_IG09 G_M000_IG08: G_M000_IG05: ldr x21, [sp, #0x48] ldp ldp x19, x19, x20, [sp, #0x38] x20, [sp, #0x20] ldp fp, lr, [sp], #0x50 ldp fp, lr, [sp], #0x30 ret lr ret lr G_M000_IG13: G_M000_IG09: ldr mov w0, wzr x0, [x19, #0x18] G_M000_IG14: movz x1, #0xD1FFAB1E ldr x21, [sp, #0x48] movk x1, #0xD1FFAB1E LSL #16 ldp x19, x20, [sp, #0x38] movk x1, #0xD1FFAB1E LSL #32 ldp fp, lr, [sp], #0x50 ldr x1, [x1] ret lr blr x1 G_M000_IG15: mov x20, x0 movz x0, #0xD1FFAB1E cbz x20, G_M000_IG08 movk x0, #0xD1FFAB1E LSL #16 ldr x0, [x19] movk x0, #0xD1FFAB1E LSL #32 ldr x1, [x0, #0x30] ldr x0, [x0] ldr x1, [x1] ldr x1, [x1, #0x70] blr x0 brk_windows # cbz x1, G_M000_IG11 0 G_M000_IG10: G_M000_IG16: b G_M000_IG12 G_M000_IG11: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 bl CORINFO_HELP_RNGCHKFAIL movk x1, # brk_windows 0xD1FFAB1E LSL #32 #0 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS ; Total bytes of code 556 mov x1, x0 G_M000_IG12: mov x0, x1 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG13: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 288 2169: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex198_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] 2170: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:.ctor(System.Collections.Generic.IEqualityComparer`1[System.__Canon]) [Tier1 with Static PGO, IL size=113, code size=288] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[System.__Canon]:get_Default():System.Collections.Generic.EqualityComparer`1[System.__Canon] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 2171: JIT compiled System.Collections.Generic.EqualityComparer`1[System.__Canon]:get_Default() [Tier1, IL size=6, code size=28] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:Initialize(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: mov w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x2, [x1, #0x78] cbz x2, G_M000_IG04 G_M000_IG03: mov x0, x2 b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS G_M000_IG05: sxtw x1, w20 bl CORINFO_HELP_NEWARR_1_VC movn w14, #0 str w14, [x19, #0x2C] add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movn x0, #0 mov w1, w20 cmp x1, #0 beq G_M000_IG07 udiv x0, x0, x1 add x0, x0, #1 str x0, [x19, #0x20] mov w0, w20 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 216 2172: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:Initialize(int) [Tier1, IL size=56, code size=216] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleChar|16(System.Text.RegularExpressions.RegexNode,bool,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x3 G_M000_IG02: ldr w1, [x20, #0x28] tst w1, #64 cset x22, ne tst w2, #255 beq G_M000_IG06 G_M000_IG03: cbnz w22, G_M000_IG04 ldr w1, [x19, #0x38] mov x0, x19 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG05 G_M000_IG04: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: cbnz w22, G_M000_IG08 G_M000_IG07: ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x19, #0x38] mov x0, x19 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG10 G_M000_IG08: ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x19, #0x18] cbnz x1, G_M000_IG09 ldr x0, [x19, #0x08] movn w1, #0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG10 G_M000_IG09: ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movn w1, #0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG10: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG12 G_M000_IG11: ldr x0, [x19, #0x08] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG14 G_M000_IG12: ldrh w1, [x20, #0x2C] ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG13 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG14 G_M000_IG13: ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: cbnz w22, G_M000_IG17 G_M000_IG15: ldr w0, [x19, #0x38] add w0, w0, #1 str w0, [x19, #0x38] G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG17: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG18: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x2 ; Total bytes of code 916 2173: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleChar|16(System.Text.RegularExpressions.RegexNode,bool,System.Reflection.Emit.LocalBuilder) [Tier1, IL size=394, code size=916] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex199_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2174: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex199_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:StelemRef_Helper(byref,ulong,System.Object) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 65259 ; 1 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x3, [x2] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] add x4, x4, #16 ror x5, x3, #32 eor x5, x5, x1 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 movk x6, #0xD1FFAB1E LSL #48 mul x5, x5, x6 ldr w6, [x4] lsr x5, x5, x6 mov w6, wzr G_M000_IG03: add w7, w5, #1 mov w8, #24 smull x7, w7, w8 add x7, x4, x7 ldar w8, [x7] ldr x9, [x7, #0x08] and w8, w8, #0xD1FFAB1E cmp x9, x3 bne G_M000_IG05 G_M000_IG04: ldr x9, [x7, #0x10] eor x9, x9, x1 cmp x9, #1 bls G_M000_IG08 G_M000_IG05: cbz w8, G_M000_IG12 G_M000_IG06: add w6, w6, #1 add w5, w5, w6 ldr w9, [x4, #0x04] and w5, w5, w9 cmp w6, #8 blt G_M000_IG03 G_M000_IG07: b G_M000_IG12 G_M000_IG08: dmb ishld ldr w3, [x7] cmp w8, w3 bne G_M000_IG12 G_M000_IG09: cmp w9, #1 bne G_M000_IG12 G_M000_IG10: mov x1, x2 bl System.Runtime.CompilerServices.CastHelpers:WriteBarrier(byref,System.Object) G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 224 2175: JIT compiled System.Runtime.CompilerServices.CastHelpers:StelemRef_Helper(byref,ulong,System.Object) [Tier1 with Static PGO, IL size=34, code size=224] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:get_ReturnType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2176: JIT compiled System.Reflection.Emit.DynamicMethod:get_ReturnType() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:GetParametersNoCopy():System.Reflection.ParameterInfo[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 2177: JIT compiled System.Reflection.Emit.DynamicMethod:GetParametersNoCopy() [Tier1, IL size=9, code size=36] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0; Assembly listing for method System.Reflection.Emit.DynamicMethod:LoadParameters():System.Reflection.RuntimeParameterInfo[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 522 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 G_M000_IG01: bhs G_M000_IG03 stp add w0, w24, #2 fp, lr, [sp, #-0x50]! cmp w0, w23 bhs G_M000_IG13 stp x19, x20, [sp, #0x10] ldrh w0, stp x21, x22, [sp, #0x20] [x22, w0, UXTW #2] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov w2, #116 mov cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp fp, sp w0, #99 mov beq G_M000_IG10 x19, x0 G_M000_IG08: add w24, w24, #1 G_M000_IG02: cmp w24, w25 ldr blt G_M000_IG06 x1, [x19, #0x58] G_M000_IG09: b cbnz x1, G_M000_IG09 G_M000_IG03 G_M000_IG03: G_M000_IG10: ldr x20, [x19, #0x08] add w0, w20, w24 ldr w21, [x20, #0x08] str mov w1, w21 w0, [x19, #0x4C] movz x0, #0xD1FFAB1E mov w0, #1 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG11: bl ldr CORINFO_HELP_NEWARR_1_OBJ x25, [sp, #0x48] ldp mov x22, x0 x23, x24, [sp, #0x38] mov w23, wzr ldp x21, x22, [sp, #0x28] cmp w21, #0 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz ble G_M000_IG08 x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG04: movk x0, #0xD1FFAB1E LSL #32 ldr ldr w0, [x22, #0x08] x0, [x0] cmp blr x0 w0, w21 brk_windows #0 blt G_M000_IG07 movz x24, #0xD1FFAB1E G_M000_IG13: movk x24, #0xD1FFAB1E LSL #16 movk x24, #0xD1FFAB1E LSL #32 G_M000_IG05: mov x0, x24 bl bl CORINFO_HELP_NEWSFAST CORINFO_HELP_RNGCHKFAIL mov x25, x0 brk_windows add #0 x3, x20, #16 ; Total bytes of code 324 ubfiz x26, x23, #3, #32 ldr x3, [x3, x26] mov x0, x25 mov x1, x19 mov w4, w23 mov x2, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] 2178: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] blr x5 add x14, x22, #16 add x14, x14, x26 mov x15, x25 bl CORINFO_HELP_ASSIGN_REF add w23, w23, #1 cmp w21, w23 bgt G_M000_IG05 G_M000_IG06: b G_M000_IG08 G_M000_IG07: movz x24, #0xD1FFAB1E movk x24, #0xD1FFAB1E LSL #16 movk x24, #0xD1FFAB1E LSL #32 mov x0, x24 bl CORINFO_HELP_NEWSFAST mov x25, x0 add x3, x20, #16 ldr x3, [x3, w23, UXTW #3] mov x0, x25 mov x1, x19 mov w4, w23 mov x2, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w14, [x22, #0x08] cmp w23, w14 bhs G_M000_IG11 add x14, x22, #16 add x14, x14, x23, LSL #3 mov x15, x25 bl CORINFO_HELP_ASSIGN_REF add w23, w23, #1 cmp w21, w23 bgt G_M000_IG07 G_M000_IG08: ldr x14, [x19, #0x58] cbnz x14, G_M000_IG09 add x14, x19, #88 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldr x0, [x19, #0x58] G_M000_IG10: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2179: JIT compiled System.Reflection.Emit.DynamicMethod:LoadParameters() [Tier1 with Static PGO, IL size=76, code size=360] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:get_Attributes():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x68] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2180: JIT compiled System.Reflection.Emit.DynamicMethod:get_Attributes() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BrtrueFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #58 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2181: JIT compiled System.Text.RegularExpressions.RegexCompiler:BrtrueFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.SegmentStringBuilder:GrowAndAdd(System.ReadOnlyMemory`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x10] str x2, [fp, #0x18] mov x19, x0 G_M000_IG02: ldr x20, [x19] ldr w0, [x20, #0x08] cbz w0, G_M000_IG04 G_M000_IG03: ldr w0, [x20, #0x08] lsl w1, w0, #1 b G_M000_IG05 G_M000_IG04: mov w1, #0xD1FFAB1E G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x21, [x0] mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x22, x0 mov x14, x19 mov x15, x22 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w2, [x19, #0x08] mov x0, x20 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x21 mov x1, x20 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w14, [x19, #0x08] add w13, w14, #1 str w13, [x19, #0x08] ldr w13, [x22, #0x08] cmp w14, w13 bhs G_M000_IG07 ubfiz x14, x14, #4, #32 add x14, x14, #16 add x14, x22, x14 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG06: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 252 2182: JIT compiled System.Text.SegmentStringBuilder:GrowAndAdd(System.ReadOnlyMemory`1[ushort]) [Tier1, IL size=98, code size=252] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2183: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex199_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Rent(int):System.ReadOnlyMemory`1[ushort][]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 3 inlinees with PGO data; 21 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x21, [x0] sub w0, w20, #1 orr w0, w0, #15 clz w0, w0 eor w0, w0, #31 sub w22, w0, #3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #66 bl CORINFO_HELP_GETSHARED_GCTHREADSTATIC_BASE_DYNAMICCLASS ldr x0, [x0] cbz x0, G_M000_IG06 G_M000_IG03: ldr w1, [x0, #0x08] cmp w1, w22 bls G_M000_IG06 ubfiz x1, x22, #4, #32 add x1, x1, #16 ldr x23, [x0, x1] cbz x23, G_M000_IG06 str xzr, [x0, x1] ldrb w0, [x21, #0x9D] cbz w0, G_M000_IG04 mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w20, w0 ldr w24, [x23, #0x08] ldrsb wzr, [x19] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w20 mov w2, w24 mov x0, x21 mov w4, w22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG04: mov x0, x23 G_M000_IG05: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: ldr x0, [x19, #0x10] ldr w1, [x0, #0x08] cmp w1, w22 bls G_M000_IG18 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] cbz x0, G_M000_IG17 ldr x20, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw w23, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #67 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG26 udiv w1, w23, w0 msub w23, w1, w0, w23 mov w24, wzr ldr w25, [x20, #0x08] cmp w25, #0 ble G_M000_IG12 G_M000_IG07: cmp w23, w25 bhs G_M000_IG28 add x0, x20, #16 ldr x26, [x0, w23, UXTW #3] ldrsb wzr, [x26] mov x27, xzr mov x0, x26 bl System.Threading.Monitor:Enter(System.Object) ldr x0, [x26, #0x08] ldr w1, [x26, #0x10] sub w1, w1, #1 ldr w2, [x0, #0x08] cmp w2, w1 bls G_M000_IG09 G_M000_IG08: add x0, x0, #16 ubfiz x2, x1, #3, #32 ldr x27, [x0, x2] str xzr, [x0, x2] str w1, [x26, #0x10] G_M000_IG09: mov x0, x26 bl System.Threading.Monitor:Exit(System.Object) cbnz x27, G_M000_IG13 add w23, w23, #1 cmp w25, w23 bne G_M000_IG11 G_M000_IG10: mov w23, wzr G_M000_IG11: add w24, w24, #1 cmp w25, w24 bgt G_M000_IG07 G_M000_IG12: mov x23, xzr b G_M000_IG14 G_M000_IG13: mov x23, x27 G_M000_IG14: cbz x23, G_M000_IG17 ldrb w0, [x21, #0x9D] cbz w0, G_M000_IG15 mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w20, w0 ldr w24, [x23, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w20 mov w2, w24 mov x0, x21 mov w4, w22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG15: mov x0, x23 G_M000_IG16: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG17: mov w0, #16 lsl w20, w0, w22 b G_M000_IG21 G_M000_IG18: cbnz w20, G_M000_IG20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG19: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG20: tbnz w20, #31, G_M000_IG27 G_M000_IG21: sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x23, x0 ldrb w0, [x21, #0x9D] cbz w0, G_M000_IG24 mov x0, x23 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w20, w0 ldr w24, [x23, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w3, w0 mov w1, w20 mov w2, w24 mov x0, x21 movn w4, #0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w24, [x23, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w1, w20 sxtw w2, w24 sxtw w3, w0 ldr x0, [x19, #0x10] ldr w0, [x0, #0x08] cmp w0, w22 ble G_M000_IG22 mov x0, x21 mov w5, #2 b G_M000_IG23 G_M000_IG22: mov x0, x21 mov w5, #1 G_M000_IG23: movn w4, #0 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG24: mov x0, x23 G_M000_IG25: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG26: bl CORINFO_HELP_THROWDIVZERO G_M000_IG27: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 940 2184: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Rent(int) [Tier1, IL size=264, code size=940] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReverseConcatenationIfRightToLeft():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG07 G_M000_IG03: ldrb w0, [x19, #0x2E] cmp w0, #25 bne G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #1 ble G_M000_IG07 ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG06 G_M000_IG04: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG06 G_M000_IG05: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldr w2, [x0, #0x10] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: mov x0, x19 G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 172 2185: JIT compiled System.Text.RegularExpressions.RegexNode:ReverseConcatenationIfRightToLeft() [Tier1, IL size=48, code size=172] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex200_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2186: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex200_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenation():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: cmp w0, #1 beq G_M000_IG06 b G_M000_IG13 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x28] mov w2, #23 strb w2, [x0, #0x2E] str w1, [x0, #0x28] G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG08 G_M000_IG07: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG12 G_M000_IG08: mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible 0xD1FFAB1E; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG11: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG24 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG25 ldr x0, [x0, #0x10] b G_M000_IG12 G_M000_IG12: ldr x21, [sp, #0x28] ldp G_M000_IG01: x19, x20, [sp, #0x18] stp ldp fp, lr, [sp], #0x30 fp, lr, ret lr [sp, G_M000_IG13: #-0x50 mov x0, x19 ]! movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 stp movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] x19, x20, [sp, #0x18] blr x1 stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] sxtw w20, w0 str mov w21, wzr x25, [sp, #0x48] cmp w20, #0 mov ble G_M000_IG21 fp, sp G_M000_IG14: mov x19, x0 ldr x1, [x19, #0x08] G_M000_IG02: mov x0, x1 ldr cbz x0, G_M000_IG16 w20, [x19, #0x4C] G_M000_IG15: sxtw w21, w2 ldr x2, [x0] sub movz x3, #0xD1FFAB1E w0, w21, #8 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp w20, w0 ble G_M000_IG05 cmp x2 G_M000_IG03: , x3 str w21, [x19, #0x4C] beq G_M000_IG20 G_M000_IG16: mov w0, wzr mov x2, x1 G_M000_IG04: cbz x2, G_M000_IG19 G_M000_IG17: ldr x25, [sp, #0x48] ldr x0, [x2] ldp movz x3, #0xD1FFAB1E x23, movk x3, #0xD1FFAB1E LSL #16 x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] movk x3, #0xD1FFAB1E LSL #32 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 cmp x0, x3 ret beq G_M000_IG19 lr G_M000_IG18: G_M000_IG05: mov x0, x3 cmp w20, w21 movz x2, #0xD1FFAB1E bhi G_M000_IG12 movk x2, #0xD1FFAB1E LSL #16 ubfiz x0, x20, #1, #32 movk x2, #0xD1FFAB1E LSL #32 add x22, x1, x0 ldr x2, [x2] sub w23, w21, w20 blr x2 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 mov ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 x2 mov x0, x1 , x0 mov w1, #97 mov G_M000_IG19: w2, ldr #w0, [x2, #0x10] 103 cmp w21, w0 movz x4, #0xD1FFAB1E bhs G_M000_IG24 movk x4, #0xD1FFAB1E LSL ldr x0, [x2, #0x08] #16 ldr w1, [x0, #0x08] movk x4, #0xD1FFAB1E LSL #32 cmp w21, w1 ldr x4, [x4] blr x4 bhs G_M000_IG25 add w24, w24, add x0, x0, #16 w0 ldr tbnz w0, #31, G_M000_IG03 x0, [x0, w21, UXTW #3] add w1, w24, #6 b G_M000_IG20 cmp G_M000_IG20: ldrb w1, [x0, #0x2E] cmp w1, #22 beq G_M000_IG23 w1 add w21, w21, #1 , cmp w21, w20 w23 blt G_M000_IG14 bhs G_M000_IG03 G_M000_IG21: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] add blr x1 w2, w24, #1 cmp w2, w23 mov x0, x19 bhs G_M000_IG13 movz x1, #0xD1FFAB1E ldrh movk x1, #0xD1FFAB1E LSL #16 w0, [ movk x1, #0xD1FFAB1E LSL #32 x22, w2, UXTW #2] ldr x1, [x1] mov w3, #116 blr x1 mov x0, x19 cmp w0, #103 ccmp w0, w3, z, ne movz x1, #0xD1FFAB1E bne G_M000_IG08 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG07: ldr x1, [x1] ldrh w0, G_M000_IG22: [ ldr x22, w1, UXTW #2] x21, [sp, #0x28] orr w0, w0, ldp #2 x19, cmp w0, #99 x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 beq G_M000_IG10 br x1 G_M000_IG08: G_M000_IG23: sxtw w24, w2 ldr x21, [sp, #0x28] cmp w24, w25 blt G_M000_IG06 ldp x19, x20, [sp, #0x18] G_M000_IG09: ldp fp, lr, [sp], #0x30 b G_M000_IG03 ret lr G_M000_IG10: G_M000_IG24: add w0, w20, w24 movz x0, #0xD1FFAB1E str movk x0, #0xD1FFAB1E LSL #16 w0, [x19, #0x4C] movk x0, #0xD1FFAB1E mov w0, #1 LSL #32 G_M000_IG11: ldr x0, [x0 ldr x25, [sp, #0x48] ] ldp blr x0 x23, x24, [sp, #0x38] brk_windows #0 G_M000_IG25: ldp bl x21, CORINFO_HELP_RNGCHKFAILx22, [sp, #0x28] ldp x19, x20, [sp, #0x18] brk_windows #0 ldp fp, lr, [sp], #0x50 ; Total bytes of code 588 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl 2187: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenation() [Tier1, IL size=96, code size=588] CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2188: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.String:op_Inequality(System.String,System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: cmp x0, x1 bne G_M000_IG04 G_M000_IG03: mov w19, #1 b G_M000_IG07 G_M000_IG04: cbz x0, G_M000_IG05 cbz x1, G_M000_IG05 ldr w2, [x0, #0x08] ldr w3, [x1, #0x08] cmp w2, w3 beq G_M000_IG06 G_M000_IG05: mov w19, wzr b G_M000_IG07 G_M000_IG06: add x0, x0, #12 lsl w2, w2, #1 mov w2, w2 add x1, x1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w19, w0 G_M000_IG07: cmp w19, #0 cset x0, eq G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 120 2189: JIT compiled System.String:op_Inequality(System.String,System.String) [Tier1, IL size=11, code size=120] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Clear():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: ldp xzr, x0, [x19] ldr w2, [x19, #0x10] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str wzr, [x19, #0x10] ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 2190: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Clear() [Tier1, IL size=47, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceAlternation():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows mov x19, x0 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG02: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: cmp w0, #1 beq G_M000_IG06 b G_M000_IG13 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x28] mov w2, #22 strb w2, [x0, #0x2E] str w1, [x0, #0x28] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG08 G_M000_IG07: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG12 G_M000_IG08: mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr x2, [x2] blr x2 stp mov x2, x0 G_M000_IG11: ldr fp, lr, [sp, #-0x70]!w0 , [x2, #0x10] stp cmp w0, #0 x19, bls G_M000_IG15 x20, [sp, #0x58] ldr x0, [x2, #0x08] str ldr w1, [x0, #0x08] cmp w1, #0 x21, [sp, #0x68] bls G_M000_IG16 mov ldr x0, [x0, #0x10] fp, sp b G_M000_IG12 add G_M000_IG12: x9, fp, #24 ldr x19, [sp, #0x18] movi v16.16b, #0 ldp fp, lr, [sp], #0x20 stp ret lr q16, q16, [x9] stp G_M000_IG13: q16, q16, [x9, #0x20] mov x0, x19 mov movz x1, #0xD1FFAB1Ex19, x0 G_M000_IG02: movk x1, #0xD1FFAB1E LSL #16 ldr movk x1, #0xD1FFAB1E LSL w20, [x19, #0x4C]#32 ldr x1, [x1] cmp blr x1 w20, w2 mov bhi G_M000_IG19 x0, x19 ubfiz x0, x20, #1, #32 movz x1, #0xD1FFAB1E add x0, x1, x0 movk x1, #0xD1FFAB1E LSL #16 mov x1, x0 movk x1, #0xD1FFAB1E LSL #32 sub w3, w2, w20 ldr x1, [x1] cmp w3, #7 blr x1 ldrb bls G_M000_IG08 w1, [x0, #0x2E] G_M000_IG03: cmp w1, #24 str x1, [fp, #0x28] bne G_M000_IG14 str w3, [fp, #0x30] movz x1, #0xD1FFAB1E add x4, fp, #40 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x5, [x4] ldr x1, [x1] blr x1 ldr ldrb w1, [x0, #0x2E] w4, [x4, #0x08] cmp w1, #24 bne G_M000_IG14 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 cmp movk x1, #0xD1FFAB1E LSL #32 w4, #2 ldr x1, [x1] blr x1 blt G_M000_IG08 ldrb w1, [x0, #0x2E] cmp w1, #24 G_M000_IG04: bne G_M000_IG14 movz x1, #0xD1FFAB1E ldr movk x1, #0xD1FFAB1E LSL #16 w4, [x5] movk x1, #0xD1FFAB1E LSL #32 movz w5, #97 ldr x1, [x1] movk w5, #103 LSL #16 blr x1 cmp w4, w5 bne G_M000_IG08 G_M000_IG14: G_M000_IG02: ldrh w4, ldr [x19, [sp, #0x18] x1, #0x04] ldp fp, lr, [sp], #0x20 orr w5, w4, ret lr #2 G_M000_IG15: mov w6, #116 movz x0, #0xD1FFAB1E cmp movk x0, #0xD1FFAB1E LSL #16 w5, #99 movk x0, #0xD1FFAB1E LSL #32 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 ldr str x1, [fp, #0x18] x0, str w3, [fp, #0x20] [x0] add x4, fp, #24 blr x0 ldr x1, [x4] brk_windows #0 ldr w3, [x4, #0x08] cmp w3 G_M000_IG16: , #5 bl blt G_M000_IG08 CORINFO_HELP_RNGCHKFAIL G_M000_IG06: brk_windows #0 ; Total bytes of code 432 ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w12191: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceAlternation() [Tier1, IL size=104, code size=432] , [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Clear():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: G_M000_IG15: ldr x21, [sp, #0x68] stp fp, lr, [sp, #-0x10]! ldp x19, x20, [sp, #0x58] mov ldp fp, lr, [sp], #0x70 fp, sp ret lr G_M000_IG02: G_M000_IG17: movz x0, #0xD1FFAB1E ldr movk x0, #0xD1FFAB1E LSL #16 w2, [x0, #0x14] movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 add w2, w2, #1 brk_windows # str w2, [x0, #0x14] 0 ldr w2, [x0, #0x10] G_M000_IG20: str wzr, [x0, #0x10] cmp w2, #0 ble G_M000_IG05 G_M000_IG03: ldr bl x0CORINFO_HELP_RNGCHKFAIL , [x0, #0x08] brk_windows mov #0 w1, wzr movz x3, #0xD1FFAB1E movk x3, ; Total bytes of code 664 #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG04: ldp fp, lr, [sp], #0x10 br x3 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 76 2192: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex200_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] 2193: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Clear() [Tier1, IL size=61, code size=76] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:GetEnumerator():System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] G_M000_IG02: str x0, [fp, #0x18] ldr w14, [x0, #0x14] str w14, [fp, #0x24] stp xzr, xzr, [fp, #0x28] stp xzr, xzr, [fp, #0x38] str xzr, [fp, #0x48] mov x14, x8 add x13, fp, #24 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 100 2194: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:GetEnumerator() [Tier1, IL size=7, code size=100] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x14, x0 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF str wzr, [x0, #0x08] ldr w1, [x1, #0x14] str w1, [x0, #0x0C] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] str xzr, [x0, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2195: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=39, code size=52] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2196: JIT compiled System.Collections.Generic.List`1+Enumerator[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Dispose() [Tier1, IL size=1, code size=16] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BltFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #63 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2197: JIT compiled System.Text.RegularExpressions.RegexCompiler:BltFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:TryGetJoinableLengthCheckChildRange(int,byref,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x21, x0 mov w22, w1 mov x20, x2 mov x19, x3 G_M000_IG02: mov x0, x21 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG14 G_M000_IG03: mov x0, x23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [x20] mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w23, w0 add w0, w22, #1 str w0, [x19] ldr w0, [x19] cmp w0, w23 bge G_M000_IG12 G_M000_IG04: ldr w24, [x19] ldr x1, [x21, #0x08] mov x25, x1 cbz x25, G_M000_IG06 G_M000_IG05: ldr x0, [x25] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG10 G_M000_IG06: mov x2, x1 cbz x2, G_M000_IG09 G_M000_IG07: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG09 G_M000_IG08: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG09: ldr w0, [x2, #0x10] cmp w24, w0 bhs G_M000_IG16 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG17 add x0, x0, #16 ldr x0, [x0, w24, UXTW #3] b G_M000_IG11 G_M000_IG10: mov x0, x25 G_M000_IG11: mov x24, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG12 ldr w25, [x20] mov x0, x24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add w0, w0, w25 str w0, [x20] ldr w0, [x19] add w0, w0, #1 str w0, [x19] ldr w0, [x19] cmp w0, w23 blt G_M000_IG04 G_M000_IG12: ldr w0, [x19] sub w0, w0, w22 cmp w0, #1 ble G_M000_IG14 mov w0, #1 G_M000_IG13: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG14: str wzr, [x20] str wzr, [x19] mov w0, wzr G_M000_IG15: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG17: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 524 2198: JIT compiled System.Text.RegularExpressions.RegexNode:TryGetJoinableLengthCheckChildRange(int,byref,byref) [Tier1, IL size=94, code size=524] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__TransferSliceStaticPosToPos|3(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG05 G_M000_IG03: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 G_M000_IG05: tst w1, #255 beq G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 224 2199: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__TransferSliceStaticPosToPos|3(bool) [Tier1, IL size=95, code size=224] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:RemoveRange(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w3, w1 mov w20, w2 G_M000_IG02: tbnz w3, #31, G_M000_IG07 tbnz w20, #31, G_M000_IG08 ldr w4, [x19, #0x10] sub w1, w4, w3 cmp w1, w20 blt G_M000_IG09 cmp w20, #0 ble G_M000_IG06 G_M000_IG03: sub w4, w4, w20 str w4, [x19, #0x10] cmp w3, w4 bge G_M000_IG04 sub w4, w4, w3 add w1, w3, w20 ldr x0, [x19, #0x08] mov x2, x0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex201_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movk x5, #0xD1FFAB1E LSL #32 ; optimized code ; fp based frame ; partially interruptible ldr x5, [x5] ; No PGO data blr x5 G_M000_IG04: ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] ldr x0, [x19, #0x08] ldr w1, [x19, #0x10] mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldp G_M000_IG02: x19, x20, [sp, #0x10] ldp stp fp, lr, [sp], #0x20 fp, lr, [sp, #-0x30]! br x3 stp G_M000_IG06: x19, x20, [sp, #0x18] ldp x19, x20, [sp, #0x10] str ldp fpx21, [sp, #0x28] , lr, [sp], #0x20 mov ret lr fp, sp G_M000_IG07: mov movz x0, #0xD1FFAB1E x19, x0 movk x0, mov # 0xD1FFAB1E LSL #16 x21, x1 mov w20, w2 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG02: ldr x0, [x0] mov x1 blr , x21 x0 mov w2, w20 brk_windows mov x0, x19 #0 bl G_M000_IG08: mov w0, #27 mov System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool w1, #13 cbz w0, G_M000_IG04 G_M000_IG03: movz x2, #0xD1FFAB1E mov x1, x21 movk x2, #0xD1FFAB1E LSL #16 mov movk x2, # w2, w20 0xD1FFAB1E LSL #32 ldr x2, [x2] mov x0, x19 blr x2 bl brk_windows #0 G_M000_IG09: System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, mov G_M000_IG04 w0, #16 ldr w0, movz[x19, #0x4C] x1, #0xD1FFAB1E cmp movk x1, #0xD1FFAB1E LSL #16 w0, w20 movk beq x1, #0xD1FFAB1E LSL #32 ldr G_M000_IG04 x1, [x1] add blr x1 w0, w0, #1 brk_windows str # w0, [x19, #0x4C] 0 b G_M000_IG02 ; Total bytes of code 256 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2200: JIT compiled System.Collections.Generic.List`1[System.__Canon]:RemoveRange(int,int) [Tier1, IL size=136, code size=256] 2201: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex201_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2202: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2203: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex201_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ReduceSingleLetterAndNestedAlternations|41_0():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 6 inlinees with PGO data; 43 single block inlinees; 11 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x70] stp x21, x22, [sp, #0x80] stp x23, x24, [sp, #0x90] stp x25, x26, [sp, #0xA0] stp x27, x28, [sp, #0xB0] mov fp, sp mov x19, x0 G_M000_IG02: mov w20, wzr mov w21, wzr mov w22, wzr ldr x1, [x19, #0x08] mov x23, x1 cbz x23, G_M000_IG05 G_M000_IG03: ldr x0, [x23] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG05 G_M000_IG04: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 G_M000_IG05: mov w24, wzr mov w25, wzr ldr w0, [x23, #0x10] cmp w0, #0 ble G_M000_IG51 G_M000_IG06: ldr w0, [x23, #0x10] cmp w24, w0 bhs G_M000_IG56 ldr x0, [x23, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG60 add x0, x0, #16 ldr x26, [x0, w24, UXTW #3] cmp w25, w24 bge G_M000_IG08 G_M000_IG07: ldr w0, [x23, #0x10] cmp w25, w0 bhs G_M000_IG56 ldr x0, [x23, #0x08] sxtw x1, w25 mov x2, x26 bl CORINFO_HELP_ARRADDR_ST ldr w1, [x23, #0x14] add w1, w1, #1 str w1, [x23, #0x14] G_M000_IG08: ldrb w27, [x26, #0x2E] cmp w27, #24 bne G_M000_IG26 G_M000_IG09: ldr x1, [x26, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 cbz x2, G_M000_IG12 mov w1, wzr ldr w0, [x2, #0x10] cmp w0, #0 ble G_M000_IG11 align [4 bytes for IG10] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG10: cmp w1, w0 bhs G_M000_IG56 ldr x14, [x2, #0x08] ldr w15, [x14, #0x08] cmp w1, w15 bhs G_M000_IG60 add x14, x14, #16 ldr x14, [x14, w1, UXTW #3] add x14, x14, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF add w1, w1, #1 cmp w1, w0 blt G_M000_IG10 G_M000_IG11: add w1, w24, #1 mov x0, x23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG21 G_M000_IG12: ldr x1, [x26, #0x08] mov x28, x1 cbz x28, G_M000_IG14 G_M000_IG13: ldr x14, [x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x14, x0 bne G_M000_IG54 G_M000_IG14: add x14, x28, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF add w26, w24, #1 ldr w0, [x23, #0x10] cmp w26, w0 bhi G_M000_IG55 ldr w0, [x23, #0x10] ldr x1, [x23, #0x08] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG19 G_M000_IG15: ldr w0, [x23, #0x10] add w1, w0, #1 ldr x0, [x23, #0x08] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG25 G_M000_IG16: mov w0, #4 G_M000_IG17: movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 cmp w0, w2 bhi G_M000_IG58 str w0, [fp, #0x6C] cmp w0, w1 blt G_M000_IG59 G_M000_IG18: mov x0, x23 ldr w1, [fp, #0x6C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr w4, [x23, #0x10] cmp w26, w4 blt G_M000_IG22 G_M000_IG20: ldr x0, [x23, #0x08] sxtw x1, w26 mov x2, x28 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x23, #0x10] add w0, w0, #1 str w0, [x23, #0x10] ldr w0, [x23, #0x14] add w0, w0, #1 str w0, [x23, #0x14] G_M000_IG21: sub w25, w25, #1 b G_M000_IG50 G_M000_IG22: ldr w4, [x23, #0x10] sub w4, w4, w26 ldr x2, [x23, #0x08] mov x0, x2 add w3, w26, #1 mov w1, w26 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG20 G_M000_IG23: cbz w20, G_M000_IG35 G_M000_IG24: b G_M000_IG34 G_M000_IG25: ldr x0, [x23, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 b G_M000_IG17 G_M000_IG26: sxtw w0, w27 cmp w0, #9 ccmp w0, #11, z, ne bne G_M000_IG48 G_M000_IG27: ldr w0, [x26, #0x28] mov w1, #65 and w28, w0, w1 cmp w27, #11 bne G_M000_IG23 cbz w20, G_M000_IG28 cmp w22, w28 cset x0, ne b G_M000_IG29 G_M000_IG28: mov w0, #1 G_M000_IG29: orr w0, w0, w21 cbnz w0, G_M000_IG30 ldr x0, [x26, #0x10] cbz x0, G_M000_IG30 ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG60 ldrh w2, [x0, #0x0C] cmp w2, #1 beq G_M000_IG30 cmp w1, #2 bls G_M000_IG60 ldrh w2, [x0, #0x10] ldrh w0, [x0, #0x0E] add w0, w2, w0 add w0, w0, #3 cmp w0, w1 bge G_M000_IG37 G_M000_IG30: mov w20, #1 ldr x0, [x26, #0x10] cbz x0, G_M000_IG31 ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG60 ldrh w2, [x0, #0x0C] cmp w2, #1 beq G_M000_IG31 cmp w1, #2 bls G_M000_IG60 ldrh w2, [x0, #0x10] ldrh w0, [x0, #0x0E] add w0, w2, w0 add w0, w0, #3 cmp w0, w1 cset x0, ge b G_M000_IG32 G_M000_IG31: mov w0, wzr G_M000_IG32: cmp w0, #0 cset x21, eq G_M000_IG33: sxtw w22, w28 b G_M000_IG50 G_M000_IG34: cmp w22, w28 cset x1, ne b G_M000_IG36 G_M000_IG35: mov w1, #1 G_M000_IG36: orr w0, w1, w21 cbz w0, G_M000_IG37 mov w20, #1 mov w21, wzr b G_M000_IG33 G_M000_IG37: sub w25, w25, #1 ldr w0, [x23, #0x10] cmp w25, w0 bhs G_M000_IG56 ldr x0, [x23, #0x08] ldr w1, [x0, #0x08] cmp w25, w1 bhs G_M000_IG60 add x0, x0, #16 ldr x27, [x0, w25, UXTW #3] ldrb w0, [x27, #0x2E] cmp w0, #9 bne G_M000_IG40 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x28, x0 ldrh w1, [x27, #0x2C] str w1, [fp, #0x68] ldr x0, [x28, #0x08] cbnz x0, G_M000_IG38 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC ldr x1, [fp, #0x40] add x14, x1, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x28, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF mov x0, x1 G_M000_IG38: ldr w1, [fp, #0x68] ldr w2, [x0, #0x14] add w2, w2, #1 str w2, [x0, #0x14] ldr x2, [x0, #0x08] ldr w3, [x0, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG39 add w4, w3, #1 str w4, [x0, #0x10] ubfiz x0, x3, #2, #32 add x0, x0, #16 add x0, x2, x0 strh w1, [x0] strh w1, [x0, #0x02] b G_M000_IG43 G_M000_IG39: strh w1, [fp, #0x50] strh w1, [fp, #0x52] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG43 G_M000_IG40: ldr x28, [x27, #0x10] ldr w2, [x28, #0x08] str w2, [fp, #0x4C] cmp w2, #1 bls G_M000_IG60 ldrh w0, [x28, #0x0E] cmp w2, #2 bls G_M000_IG60 ldrh w3, [x28, #0x10] str w3, [fp, #0x64] add w1, w0, w3 add w4, w1, #3 str w4, [fp, #0x60] add w5, w0, #3 str w5, [fp, #0x5C] add x0, x28, #12 sxtw w1, w2 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 str x0, [fp, #0x38] mov x3, xzr ldr w4, [fp, #0x4C] ldr w1, [fp, #0x60] cmp w4, w1 ble G_M000_IG41 mov x0, x28 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] ldr x3, [fp, #0x30] G_M000_IG41: mov x1, xzr ldr w5, [fp, #0x64] cmp w5, #0 str x3, [fp, #0x30] str x1, [fp, #0x28] ble G_M000_IG42 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x1, x0 str x1, [fp, #0x20] movn w0, #0xD1FFAB1E LSL #16 str w0, [x1, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #16 bl CORINFO_HELP_NEWARR_1_VC ldr x1, [fp, #0x20] add x14, x1, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x5C] mov w2, w0 ldr w5, [fp, #0x64] add x2, x2, w5, UXTW ldr w3, [fp, #0x4C] cmp x2, x3 bhi G_M000_IG57 add x2, x28, #12 ubfiz x0, x0, #1, #32 add x0, x2, x0 sxtw w2, w5 str x0, [fp, #0x10] mov x0, x1 ldr x1, [fp, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x20] str x1, [fp, #0x28] G_M000_IG42: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldrh w14, [x28, #0x0C] cmp w14, #1 cset x1, eq add x14, x0, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF add x14, x0, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF strb w1, [x0, #0x24] add x14, x0, #24 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF mov x28, x0 G_M000_IG43: ldrb w0, [x26, #0x2E] cmp w0, #9 bne G_M000_IG46 ldrh w26, [x26, #0x2C] ldr x0, [x28, #0x08] cbnz x0, G_M000_IG44 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #6 bl CORINFO_HELP_NEWARR_1_VC ldr x1, [fp, #0x18] add x14, x1, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x28, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF mov x0, x1 G_M000_IG44: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x1, [x0, #0x08] ldr w2, [x0, #0x10] ldr w3, [x1, #0x08] cmp w3, w2 bls G_M000_IG45 add w3, w2, #1 str w3, [x0, #0x10] ubfiz x0, x2, #2, #32 add x0, x0, #16 add x0, x1, x0 strh w26, [x0] strh w26, [x0, #0x02] b G_M000_IG47 G_M000_IG45: strh w26, [fp, #0x50] strh w26, [fp, #0x52] ldr w1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG47 G_M000_IG46: ldr x0, [x26, #0x10] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x0 mov x0, x28 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG47: mov w0, #11 strb w0, [x27, #0x2E] mov x0, x28 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 add x14, x27, #16 bl CORINFO_HELP_ASSIGN_REF ldr w2, [x27, #0x28] tbz w2, #0, G_M000_IG50 and w2, w2, #0xD1FFAB1E str w2, [x27, #0x28] b G_M000_IG50 G_M000_IG48: cmp w27, #22 beq G_M000_IG21 G_M000_IG49: mov w20, wzr mov w21, wzr G_M000_IG50: add w24, w24, #1 add w25, w25, #1 ldr w2, [x23, #0x10] cmp w24, w2 blt G_M000_IG06 G_M000_IG51: cmp w25, w24 bge G_M000_IG53 G_M000_IG52: sub w2, w24, w25 mov x0, x23 mov w1, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG53: ldp x27, x28, [sp, #0xB0] ldp x25, x26, [sp, #0xA0] ldp x23, x24, [sp, #0x90] ldp x21, x22, [sp, #0x80] ldp x19, x20, [sp, #0x70] ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG54: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG55: mov w0, #21 mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG56: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG57: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG58: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 cmp w0, w1 str w0, [fp, #0x6C] bge G_M000_IG18 G_M000_IG59: sxtw w0, w1 str w0, [fp, #0x6C] b G_M000_IG18 G_M000_IG60: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 2156 2204: JIT compiled System.Text.RegularExpressions.RegexNode:g__ReduceSingleLetterAndNestedAlternations|41_0() [Tier1, IL size=564, code size=2156] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex202_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2205: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex202_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2206: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2207: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex202_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixOneNotoneSet|41_1(System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 7 inlinees with PGO data; 36 single block inlinees; 6 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x19, x0 G_M000_IG02: ldr x1, [x19, #0x08] mov x20, x1 cbz x20, G_M000_IG05 G_M000_IG03: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG05 G_M000_IG04: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x20, x0 G_M000_IG05: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG08 G_M000_IG06: mov x0, x19 G_M000_IG07: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG08: mov x1, x20 ldr wzr, [x1, #0x14] mov w21, wzr b G_M000_IG10 G_M000_IG09: ldrb w0, [x1, #0x2E] cmp w0, #25 bne G_M000_IG12 ldr x1, [x1, #0x08] cbz x1, G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG12 ldr w0, [x0, #0x10] cmp w0, #2 blt G_M000_IG12 G_M000_IG10: ldr w22, [x20, #0x10] cmp w21, w22 bhs G_M000_IG13 G_M000_IG11: ldr x1, [x20, #0x08] ldr w0, [x1, #0x08] cmp w21, w0 bhs G_M000_IG48 add x1, x1, #16 ldr x1, [x1, w21, UXTW #3] add w21, w21, #1 b G_M000_IG09 G_M000_IG12: mov x0, x19 b G_M000_IG46 G_M000_IG13: mov w21, wzr sub w0, w22, #1 cmp w0, #0 ble G_M000_IG42 G_M000_IG14: ldr w0, [x20, #0x10] cmp w21, w0 bhs G_M000_IG47 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w21, w1 bhs G_M000_IG48 add x0, x0, #16 ldr x0, [x0, w21, UXTW #3] ldr x22, [x0, #0x08] cbnz x22, G_M000_IG19 G_M000_IG15: ldr x1, [x0, #0x08] mov x2, x1 cbz x2, G_M000_IG18 G_M000_IG16: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG18 G_M000_IG17: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG18: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG47 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG48 ldr x23, [x0, #0x10] b G_M000_IG21 G_M000_IG19: ldr x1, [x22] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG15 G_M000_IG20: mov x23, x22 G_M000_IG21: ldrb w0, [x23, #0x2E] sub w1, w0, #3 cmp w1, #5 bls G_M000_IG23 G_M000_IG22: sub w1, w0, #9 sub w0, w0, #43 cmp w1, #2 ccmp w0, #2, z, hi bls G_M000_IG24 b G_M000_IG41 G_M000_IG23: ldp w0, w1, [x23, #0x20] cmp w0, w1 bne G_M000_IG41 G_M000_IG24: add w22, w21, #1 ldr w0, [x20, #0x10] cmp w22, w0 bge G_M000_IG34 G_M000_IG25: ldr w0, [x20, #0x10] cmp w22, w0 bhs G_M000_IG47 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG48 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] ldr x2, [x0, #0x08] cbnz x2, G_M000_IG30 G_M000_IG26: ldr x1, [x0, #0x08] mov x2, x1 cbz x2, G_M000_IG29 G_M000_IG27: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG29 G_M000_IG28: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG29: ldr w1, [x2, #0x10] cmp w1, #0 bls G_M000_IG47 ldr x2, [x2, #0x08] ldr w1, [x2, #0x08] cmp w1, #0 bls G_M000_IG48 ldr x2, [x2, #0x10] b G_M000_IG31 G_M000_IG30: ldr x1, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x1, x3 bne G_M000_IG26 G_M000_IG31: ldrb w1, [x23, #0x2E] ldrb w0, [x2, #0x2E] cmp w1, w0 bne G_M000_IG34 ldr w1, [x23, #0x28] ldr w0, [x2, #0x28] cmp w1, w0 bne G_M000_IG34 ldr w1, [x23, #0x20] ldr w0, [x2, #0x20] cmp w1, w0 bne G_M000_IG34 ldr w1, [x23, #0x24] ldr w0, [x2, #0x24] cmp w1, w0 bne G_M000_IG34 ldrh w1, [x23, #0x2C] ldrh w0, [x2, #0x2C] cmp w1, w0 bne G_M000_IG34 ldr x1, [x23, #0x10] ldr x0, [x2, #0x10] cmp x1, x0 beq G_M000_IG33 G_M000_IG32: cbz x1, G_M000_IG34 cbz x0, G_M000_IG34 ldr w2, [x1, #0x08] ldr w3, [x0, #0x08] cmp w2, w3 bne G_M000_IG34 add x3, x1, #12 lsl w2, w2, #1 mov w2, w2 add x1, x0, #12 mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG34 G_M000_IG33: add w22, w22, #1 ldr w0, [x20, #0x10] cmp w22, w0 blt G_M000_IG25 G_M000_IG34: sub w0, w22, w21 cmp w0, #1 ble G_M000_IG41 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x24, x0 ldr w0, [x19, #0x28] mov w1, #24 strb w1, [x24, #0x2E] str w0, [x24, #0x28] sxtw w25, w21 cmp w25, w22 bge G_M000_IG39 G_M000_IG35: ldr w0, [x20, #0x10] cmp w25, w0 bhs G_M000_IG47 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w25, w1 bhs G_M000_IG48 add x0, x0, #16 ubfiz x26, x25, #3, #32 ldr x0, [x0, x26] ldr x1, [x0, #0x08] mov x27, x1 cbnz x27, G_M000_IG44 G_M000_IG36: ldr w0, [x27, #0x10] cbz w0, G_M000_IG47 sub w4, w0, #1 str w4, [x27, #0x10] cmp w4, #0 ble G_M000_IG38 G_M000_IG37: ldr x2, [x27, #0x08] mov x0, x2 mov w1, #1 mov w3, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG38: ldr x0, [x27, #0x08] ldrsw x1, [x27, #0x10] ldr w2, [x0, #0x08] cmp x1, x2 bhs G_M000_IG48 add x0, x0, #16 lsl x1, x1, #3 str xzr, [x0, x1] ldr w0, [x27, #0x14] add w0, w0, #1 str w0, [x27, #0x14] ldr w0, [x20, #0x10] cmp w25, w0 bhs G_M000_IG47 ldr x0, [x20, #0x08] ldr w1, [x0, #0x08] cmp w25, w1 bhs G_M000_IG48 add x0, x0, #16 ldr x1, [x0, x26] mov x0, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w25, w25, #1 cmp w25, w22 blt G_M000_IG35 G_M000_IG39: ldr x0, [x19, #0x18] cbz x0, G_M000_IG40 ldrb w0, [x0, #0x2E] cmp w0, #32 bne G_M000_IG40 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x25, x0 ldr w0, [x19, #0x28] mov w1, #32 strb w1, [x25, #0x2E] str w0, [x25, #0x28] mov x0, x25 mov x1, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x24, x25 G_M000_IG40: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x25, x0 ldr w0, [x19, #0x28] mov w1, #25 strb w1, [x25, #0x2E] str w0, [x25, #0x28] mov x0, x25 mov x1, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x25 mov x1, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w21 mov x2, x25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w2, w22, w21 sub w2, w2, #1 add w1, w21, #1 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG41: add w21, w21, #1 ldr w0, [x20, #0x10] sub w0, w0, #1 cmp w21, w0 blt G_M000_IG14 G_M000_IG42: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG43: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG44: ldr x0, [x27] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG36 G_M000_IG45: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x27, x0 b G_M000_IG36 G_M000_IG46: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG47: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG48: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1600 2208: JIT compiled System.Text.RegularExpressions.RegexNode:g__ExtractCommonPrefixOneNotoneSet|41_1(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=541, code size=1600] ; Assembly listing for method System.Collections.Generic.List`1[System.__Canon]:GetEnumerator():System.Collections.Generic.List`1+Enumerator[System.__Canon]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr xzr, [x0] mov x14, x0 ldr w1, [x14, #0x14] mov x14, x8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF str xzr, [x8, #0x08] stp wzr, w1, [x8, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 2209: JIT compiled System.Collections.Generic.List`1[System.__Canon]:GetEnumerator() [Tier1, IL size=7, code size=52] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[System.__Canon]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2210: JIT compiled System.Collections.Generic.List`1+Enumerator[System.__Canon]:Dispose() [Tier1, IL size=1, code size=16] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:g__RemoveRedundantEmptiesAndNothings|41_2(System.Text.RegularExpressions.RegexNode):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 G_M000_IG02: ldr x1, [x19, #0x08] mov x20, x1 cbz x20, G_M000_IG05 G_M000_IG03: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG05 G_M000_IG04: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x20, x0 G_M000_IG05: mov w21, wzr mov w22, wzr mov w23, wzr ldr w0, [x20, #0x10] cmp w0, #0 ble G_M000_IG11 G_M000_IG06: ldr w0, [x20, #0x10] cmp w21, w0 bhs G_M000_IG13 ldr x1, [x20, #0x08] mov x2, x1 ldr w3, [x2, #0x08] cmp w21, w3 bhs G_M000_IG14 add x2, x2, #16 ldr x2, [x2, w21, UXTW #3] ldrb w3, [x2, #0x2E] cmp w3, #22 beq G_M000_IG08 G_M000_IG07: cmp w3, #23 bne G_M000_IG09 cbnz w23, G_M000_IG08 mov w23, #1 b G_M000_IG09 G_M000_IG08: add w21, w21, #1 b G_M000_IG10 G_M000_IG09: cmp w22, w0 bhs G_M000_IG13 mov x0, x1 sxtw x1, w22 bl CORINFO_HELP_ARRADDR_ST ldr w2, [x20, #0x14] add w2, w2, #1 str w2, [x20, #0x14] add w21, w21, #1 add w22, w22, #1 G_M000_IG10: ldr w2, [x20, #0x10] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex203_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data cmp w21, w2 blt G_M000_IG06 G_M000_IG11: ldr w2, [x20, #0x10] sub w2, w2, w22 mov x0, x20 mov w1, w22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr x1, [x1] G_M000_IG12: stp ldr x23, [sp, #0x38] fp, lr, [sp, #-0x30]! ldp x21, stp x22, [sp, #0x28] x19, x20, [sp, #0x18] ldp x19, x20, [sp, #0x18 str ]x21, [sp, #0x28] mov ldp fpfp, sp , lr, [sp], #0x40 mov br x1 x19, x0 G_M000_IG13: mov x21, x1 movz x0, #0xD1FFAB1E mov w20, w2 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG02: ldr x0, [x0] mov x1, x21 blr x0 mov w2, w20 brk_windows # mov x0, x19 0 bl G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 352 System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 2211: JIT compiled System.Text.RegularExpressions.RegexNode:g__RemoveRedundantEmptiesAndNothings|41_2(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=116, code size=352] ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2212: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex203_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Nullable`1[int]:get_HasValue():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2213: JIT compiled System.Nullable`1[int]:get_HasValue() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Nullable`1[int]:get_Value():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w1, [x0] cbz w1, G_M000_IG04 ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 52 2214: JIT compiled System.Nullable`1[int]:get_Value() [Tier1, IL size=20, code size=52] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 mov x2, x1 G_M000_IG02: cbz x2, G_M000_IG08 ldr w1, [x19, #0x10] cmp w1, #1 ble G_M000_IG06 G_M000_IG03: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG04 cbnz w1, G_M000_IG09 mov x0, xzr mov w1, wzr b G_M000_IG05 G_M000_IG04: ldr w3, [x0, #0x08] cmp w3, w1 blo G_M000_IG09 add x0, x0, #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG05: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: mov w0, #29 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 172 2215: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=58, code size=172] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12; Assembly listing for method System.Math:Min(int,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 131796 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 G_M000_IG01: ble G_M000_IG03 stp G_M000_IG06: fp, lr, [sp, #-0x10]! add w0, w24, #3 cmp w0, w23 mov bhi G_M000_IG12 fp, sp ubfiz x1, x0, #1, #32 add x1, x22, x1 G_M000_IG02: sub w3, w23, w0 cmp mov x0, x1 w0, w1 mov w1, #97 mov w2, #103 csel movz x4, #0xD1FFAB1E w0, w0, w1, le G_M000_IG03: movk x4, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x10 movk x4, #0xD1FFAB1E LSL #32 ret lr ldr ; Total bytes of code 24 x4, [x4] blr x4 add w24, w24, w0 2216: JIT compiled System.Math:Min(int,int) [Tier1 with Static PGO, IL size=8, code size=24] tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2217: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSpanLengthCheck|2(int,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x38] add w1, w0, w1 sub w1, w1, #1 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 156 2218: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSpanLengthCheck|2(int,System.Reflection.Emit.LocalBuilder) [Tier1, IL size=68, code size=156] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BgeUnFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #65 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2219: JIT compiled System.Text.RegularExpressions.RegexCompiler:BgeUnFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp G_M000_IG02: mov x19, x0 sxtw w20, w1 mov w21, wzr cmp w20, #0 ble G_M000_IG04 G_M000_IG03: ldrh w0, [x19, w21, UXTW #2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 add w21, w21, #1 cmp w21, w20 blt G_M000_IG03 G_M000_IG04: mov w0, wzr G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 2220: JIT compiled System.Text.RegularExpressions.RegexCharClass:ParticipatesInCaseConversion(System.ReadOnlySpan`1[ushort]) [Tier1, IL size=42, code size=116] ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x1, G_M000_IG05 G_M000_IG03: orr w2, w2, w3 cbnz w2, G_M000_IG07 stp xzr, xzr, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w4, w2 add x4, x4, w3, UXTW ldr w5, [x1, #0x08] cmp x4, x5 bhi G_M000_IG07 add x1, x1, #16 mov w4, #40 umull x2, w2, w4 add x1, x1, x2 str x1, [x0] str w3, [x0, #0x08] G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 108 2221: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[],int,int) [Tier1, IL size=110, code size=108] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet](System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrsb wzr, [x0] add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 2222: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet](System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet[]) [Tier1, IL size=7, code size=24] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add G_M000_IG01: w4, w6, #13 cmp w0, w4 stp bne G_M000_IG17 fp, G_M000_IG10: lr, [sp, #-0x20]! ldrh w4, [x1, #0x04] mov orr w0, w4, #2 fp, sp mov w5, #103 add cmp w0, #99 x3, sp, #32 ccmp w4, w5, z, ne str bne G_M000_IG17 x3, cmp w3, #3 [fp, #0x18] blo G_M000_IG19 str add x0, x1, #6 x2, [fp sub w1, w3, #3 , #0x10] str mov x0, [fp, #0x38] x3, x2 str w1, [fp, #0x40] add x0, fp, #56 G_M000_IG02: ldr x1, [x0] cmp w1, #1 ble G_M000_IG03 ldr w0, [x0, #0x08] orr w2, w1, cmp w0, #5#1 blt G_M000_IG17 clz w2, w2 G_M000_IG11: eor w2, w2, #31 ldr x0, [x1] movz x3, #97 lsl w2, w2, #1 movk x3, #99 LSL #16 add w2, w2, #2 movk x3, #99 LSL #32 movz x4 movk x3, #99 LSL #48 , #0xD1FFAB1E eor x0, x0, x3 movk x4, #0xD1FFAB1E LSL #16 ldr movk x4, #0xD1FFAB1E LSL #32 w1, [x1, #0x06] ldr sub w3, w6, #4 x4, [x4] eor w1, w1, w3 blr x4 mov w1, w1 orr x0, x0, x1 G_M000_IG03: cbnz x0, G_M000_IG17 ldp G_M000_IG12: fp, lr, [sp], #0x20 ret lr add w0, w20, #8 G_M000_IG04: cmp w0, w2 stp bhi G_M000_IG19 fp, G_M000_IG13: lr, [sp, #-0x20]! str w0, [x19, #0x4C] add x3, fp, #32 sxtw w21, w0 str x3 , [sp, #0x18] cmp G_M000_IG05: w21, w20 ldr bge G_M000_IG14 x0, [fp, #0x10 mov w0, w20 ] movz x1, #0xD1FFAB1Emov w20, w21 mov w21, w0 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG14: movk x1, #0xD1FFAB1E LSL #32 ldr ldr x1, [x1] w0, [x19, #0x58] blr x1 cbnz w0, G_M000_IG15 adr x0 mov x0, x19 , [ G_M000_IG03] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 G_M000_IG06: movk x1, #0xD1FFAB1E LSL #32 ldp ldr x1, [x1] fp, lr blr x1 , [sp], #0x20 G_M000_IG15: ret lr ldr x3, [x19, #0x20] G_M000_IG07: stp ldr w0, [x19, #0x58] fp, sub w0, w0, #1 lr str w0, [x19, #0x58] , [sp, #-0x20]! ldr w2, [x3, #0x08] add cmp w0, w2 x3, fp, #32 bhs G_M000_IG20 str add x3, x3, #16 x3, [sp, #0x18] str wzr, [x3, w0, UXTW #2] G_M000_IG08: sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov x1 mov w1, wzr , movz x4, #0xD1FFAB1E x0 movk x4, #0xD1FFAB1E LSL #16 mov w0, #64 movk x4, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E ldr x4, [x4] movk x2, #0xD1FFAB1E LSL #16 ldr movk x2, #0xD1FFAB1E LSL #32 wzr, [x0] ldr x2 blr x4 , [x2] mov w0, #1 blr x2 G_M000_IG16: ldr x21, [sp, #0x68] adr x0 ldp , [G_M000_IG03] x19, x20, [sp, #0x58] G_M000_IG09: ldp fp, lr, [sp], #0x70 ldp fp, lr, [sp], #0x20 ret ret lr ; Total bytes of code 180 lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr 2223: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Sort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=30, code size=180] G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2224: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex203_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntrospectiveSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x3, x2 G_M000_IG02: cmp w1, #1 ble G_M000_IG04 G_M000_IG03: orr w2, w1, #1 clz w2, w2 eor w2, w2, #31 lsl w2, w2, #1 add w2, w2, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 68 2225: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntrospectiveSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=34, code size=68] ; Assembly listing for method System.Numerics.BitOperations:Log2(uint):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: orr w0, w0, #1 clz w0, w0 eor w0, w0, #31 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2226: JIT compiled System.Numerics.BitOperations:Log2(uint) [Tier1, IL size=38, code size=28] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntroSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 8 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #176 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] mov x20, x0 mov w22, w1 mov w19, w2 mov x21, x3 G_M000_IG02: sxtw w23, w22 cmp w22, #1 ble G_M000_IG34 G_M000_IG03: cmp w23, #16 ble G_M000_IG05 cbz w19, G_M000_IG33 sub w19, w19, #1 cmp w23, w22 bhi G_M000_IG35 sxtw w1, w23 mov x0, x20 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w24, w0 add w0, w24, #1 sub w1, w23, w0 mov w0, w0 add x2, x0, w1, UXTW mov w3, w22 cmp x2, x3 bhi G_M000_IG35 mov x2, #40 mul x0, x0, x2 add x0, x20, x0 mov w2, w19 mov x3, x21 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 sxtw w23, w24 cmp w23, #1 bgt G_M000_IG03 G_M000_IG04: b G_M000_IG34 G_M000_IG05: cmp w23, #2 bne G_M000_IG12 mov x19, x20 G_M000_IG06: sub x0, x19, #56 ldr x1, [x0, #0x38] str x1, [fp, #0x38] ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG07: add x20, x20, #40 G_M000_IG08: ldp q16, q17, [x20] stp q16, q17, [fp, #0x10] ldr x0, [x20, #0x20] str x0, [fp, #0x30] G_M000_IG09: ldr x0, [x21, #0x08] add x1, fp, #56 add x2, fp, #16 ldr x3, [x21, #0x18] blr x3 cmp w0, #0 ble G_M000_IG34 G_M000_IG10: sub x13, x19, #216 ldr x14, [x13, #0xD8] str x14, [fp, #0xD8] ldp q16, q17, [x13, #0xE0] stp q16, q17, [fp, #0xE0] G_M000_IG11: mov x14, x19 mov x13, x20 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 mov x14, x20 add x13, fp, #216 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG34 G_M000_IG12: cmp w23, #3 bne G_M000_IG32 mov x0, x20 mov x19, x0 G_M000_IG13: sub x1, x19, #56 ldr x2, [x1, #0x38] str x2, [fp, #0x38] ldp q16, q17, [x1, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG14: add x0, x0, #40 mov x23, x0 G_M000_IG15: ldp q16, q17, [x23] stp q16, q17, [fp, #0x10] ldr x0, [x23, #0x20] str x0, [fp, #0x30] G_M000_IG16: ldr x0, [x21, #0x08] add x1, fp, #56 add x2, fp, #16 ldr x3, [x21, #0x18] blr x3 cmp w0, #0 ble G_M000_IG19 G_M000_IG17: ldp q16, q17, [x19] stp q16, q17, [fp, #0xB0] ldr x13, [x19, #0x20] str x13, [fp, #0xD0] G_M000_IG18: mov x14, x19 mov x13, x23 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 mov x14, x23 add x13, fp, #176 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG19: mov x0, x20 G_M000_IG20: sub x1, x19, #56 ldr x2, [x1, #0x38] str x2, [fp, #0x38] ldp q16, q17, [x1, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG21: cmp w22, #2 bls G_M000_IG36 add x20, x0, #80 G_M000_IG22: ldp q16, q17, [x20] stp q16, q17, [fp, #0x10] ldr x0, [x20, #0x20] str x0, [fp, #0x30] G_M000_IG23: ldr x0, [x21, #0x08] add x1, fp, #56 add x2, fp, #16 ldr x3, [x21, #0x18] blr x3 cmp w0, #0 ble G_M000_IG26 G_M000_IG24: sub x13, x19, #136 ldr x14, [x13, #0x88] str x14, [fp, #0x88] ldp q16, q17, [x13, #0x90] stp q16, q17, [fp, #0x90] G_M000_IG25: mov x14, x19 mov x13, x20 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 mov x14, x20 add x13, fp, #136 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG26: mov x3, x21 G_M000_IG27: sub x0, x23, #56 ldr x1, [x0, #0x38] str x1, [fp, #0x38] ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG28: ldp q16, q17, [x20] stp q16, q17, [fp, #0x10] ldr x0, [x20, #0x20] str x0, [fp, #0x30] G_M000_IG29: ldr x0, [x3, #0x08] add x1, fp, #56 add x2, fp, #16 ldr x3, [x3, #0x18] blr x3 cmp w0, #0 ble G_M000_IG34 G_M000_IG30: ldp q16, q17, [x23] stp q16, q17, [fp, #0x60] ldr x13, [x23, #0x20] str x13, [fp, #0x80] G_M000_IG31: mov x14, x23 mov x13, x20 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 mov x14, x20 add x13, fp, #96 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 b G_M000_IG34 G_M000_IG32: cmp w23, w22 bhi G_M000_IG35 mov x0, x20 mov w1, w23 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG34 G_M000_IG33: cmp w23, w22 bhi G_M000_IG35 mov x0, x20 sxtw w1, w23 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG34: ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG35: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG36: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 984 2227: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:IntroSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=152, code size=984] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex204_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG01: mov x21, x1 stp mov w20, w2 fp, lr, [sp, #-0x10]! mov G_M000_IG02: fp, sp mov x1, x21 mov w2, w20 G_M000_IG02: mov x0, x19 ldp bl fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 2228: JIT compiled System.Text.RegularExpressions.RegexCharClass:.ctor() [Tier1, IL size=7, code size=16] mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2229: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex204_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldp x0, x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str xzr, [x19, #0x20] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 2230: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate() [Tier1, IL size=25, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2231: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceSet():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 35 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: mov w0, #22 strb w0, [x19, #0x2E] str xzr, [x19, #0x10] b G_M000_IG14 G_M000_IG04: ldr x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG09 ldr x0, [x19, #0x10] ldr w1, [x0, #0x08] cmp w1, #3 bls G_M000_IG29 ldrh w0, [x0, #0x12] strh w0, [x19, #0x2C] str xzr, [x19, #0x10] mov x0, x19 ldrb w0, [x0, #0x2E] cmp w0, #11 beq G_M000_IG07 cmp w0, #5 beq G_M000_IG06 cmp w0, #45 beq G_M000_IG05 mov w0, #6 b G_M000_IG08 G_M000_IG05: mov w0, #43 b G_M000_IG08 G_M000_IG06: mov w0, #3 b G_M000_IG08 G_M000_IG07: mov w0, #9 G_M000_IG08: strb w0, [x19, #0x2E] b G_M000_IG14 G_M000_IG09: ldr x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG14 ldr x2, [x19, #0x10] ldr w1, [x2, #0x08] cmp w1, #3 bls G_M000_IG29 ldrh w2, [x2, #0x12] strh w2, [x19, #0x2C] str xzr, [x19, #0x10] mov x2, x19 ldrb w2, [x2, #0x2E] cmp w2, #11 beq G_M000_IG12 cmp w2, #5 beq G_M000_IG11 cmp w2, #45 beq G_M000_IG10 mov w2, #7 b G_M000_IG13 G_M000_IG10: mov w2, #44 b G_M000_IG13 G_M000_IG11: mov w2, #4 b G_M000_IG13 G_M000_IG12: mov w2, #10 G_M000_IG13: strb w2, [x19, #0x2E] G_M000_IG14: ldr x20, [x19, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x20, x2 beq G_M000_IG26 G_M000_IG15: cbz x20, G_M000_IG16 ldr w21, [x20, #0x08] cmp w21, #23 bne G_M000_IG16 lsl w2, w21, #1 mov w2, w2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 add x0, x20, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG26 G_M000_IG16: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x20, x1 beq G_M000_IG26 cbz x20, G_M000_IG17 ldr w21, [x20, #0x08] cmp w21, #23 bne G_M000_IG17 lsl w2, w21, #1 mov w2, w2 add x1, x1, #12 add x0, x20, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG26 G_M000_IG17: cbz x20, G_M000_IG27 G_M000_IG18: ldr w21, [x20, #0x08] cmp w21, #5 bne G_M000_IG20 G_M000_IG19: ldr x0, [x20, #0x0C] movz x1, #2 LSL #32 movk x1, #9 LSL #48 eor x0, x0, x1 ldr w1, [x20, #0x12] movz w2, #9 movk w2, #0xD1FFAB1E LSL #16 eor w1, w1, w2 mov w1, w1 orr x0, x0, x1 cbz x0, G_M000_IG26 G_M000_IG20: cmp w21, #5 bne G_M000_IG22 G_M000_IG21: ldr x0, [x20, #0x0C] movz x1, #2 LSL #32 movk x1, #0xD1FFAB1E LSL #48 eor x0, x0, x1 ldr w1, [x20, #0x12] movz w2, #0xD1FFAB1E movk w2, #9 LSL #16 eor w1, w1, w2 mov w1, w1 orr x0, x0, x1 cbz x0, G_M000_IG26 G_M000_IG22: cmp w21, #5 bne G_M000_IG24 G_M000_IG23: ldr x0, [x20, #0x0C] movz x1, #2 LSL #32 movk x1, #100 LSL #48 eor x0, x0, x1 ldr w1, [x20, #0x12] movz w2, #100 movk w2, #0xD1FFAB1E LSL #16 eor w1, w1, w2 mov w1, w1 orr x0, x0, x1 cbz x0, G_M000_IG26 G_M000_IG24: cmp w21, #5 bne G_M000_IG27 G_M000_IG25: ldr x0, [x20, #0x0C] movz x1, #2 LSL #32 movk x1, #0xD1FFAB1E LSL #48 eor x0, x0, x1 ldr w1, [x20, #0x12] movz w2, #0xD1FFAB1E movk w2, #100 LSL #16 eor w1, w1, w2 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG27 G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x19, #0x10] G_M000_IG27: mov x0, x19 G_M000_IG28: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG29: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 736 2232: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceSet() [Tier1, IL size=301, code size=736] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsEmpty(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG01: stp G_M000_IG02: fp, lr, [sp, #-0x10]! ldr w20, [x19, #0x4C] mov cmp w20, w2 fp, bhi G_M000_IG15 sp G_M000_IG02: ubfiz x0, x20, #1, #32 ldr add w1, [x0, #0x08] x0 cmp w1, #2, x1 , x0 bls G_M000_IG07 mov x1, x0 ldrh sub w3, w2, w20 w1, [x0, #0x10] cmp cbnz w1, G_M000_IG05 w3, G_M000_IG03: # ldrh w1, [x0, #0x0E] 7 cbnz w1, G_M000_IG05 ldrh w1, [x0, #0x0C] bls G_M000_IG06 cmp w1, #1 G_M000_IG03: beq G_M000_IG05 str x1, [fp, #0x18] movz x1, # str 0xD1FFAB1E w3, [fp, #0x20] movk x1, #0xD1FFAB1E LSL #16 add x3, fp, #24 movk x1, #0xD1FFAB1E LSL # ldr 32 x4, [x3] ldr x1, [x1] ldr blr x1 w3, [x3, #0x08] cmp w0, #0 cmp w3, #6 cset blt G_M000_IG06 x0, eq G_M000_IG04: G_M000_IG04: ldr x3, [x4] ldp fp, lr, [sp], #0x10 movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 ret eor x3, x3, x5 lr ldr w4, [x4, #0x08] G_M000_IG05: mov w0, wzr movz w5, #116 G_M000_IG06: movk w5, #97 LSL #16 ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL eor brk_windows #0 w4, w4, w5 ; Total bytes of code 104 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 2233: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsEmpty(System.String) [Tier1, IL size=38, code size=104] G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSingleton(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] 2234: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex204_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x08] cmp w20, #2 bls G_M000_IG09 ldrh w0, [x19, #0x10] cbnz w0, G_M000_IG07 G_M000_IG03: ldrh w0, [x19, #0x0E] cmp w0, #2 bne G_M000_IG07 ldrh w0, [x19, #0x0C] cmp w0, #1 beq G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG07 cmp w20, #3 bls G_M000_IG09 ldrh w0, [x19, #0x12] mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG05 add w0, w0, #1 cmp w20, #4 bls G_M000_IG09 ldrh w1, [x19, #0x14] cmp w0, w1 cset x0, eq G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, #1 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 188 2235: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSingleton(System.String) [Tier1, IL size=72, code size=188] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsSingletonInverse(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x08] cmp w20, #2 bls G_M000_IG09 ldrh w0, [x19, #0x10] cbnz w0, G_M000_IG07 G_M000_IG03: ldrh w0, [x19, #0x0E] cmp w0, #2 bne G_M000_IG07 ldrh w0, [x19, #0x0C] cmp w0, #1 bne G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG07 cmp w20, #3 bls G_M000_IG09 ldrh w0, [x19, #0x12] mov w1, #0xD1FFAB1E cmp w0, w1 beq G_M000_IG05 add w0, w0, #1 cmp w20, #4 bls G_M000_IG09 ldrh w1, [x19, #0x14] cmp w0, w1 cset x0, eq G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, #1 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 188 2236: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsSingletonInverse(System.String) [Tier1, IL size=72, code size=188] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex205_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2237: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex205_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2238: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentLoops():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 3 inlinees with PGO data; 110 single block inlinees; 7 inlinees without PGO data cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] G_M000_IG01: cbnz w0, G_M000_IG11 stp mov x0, x19 fp, lr, movz x1, #0xD1FFAB1E[sp, #-0x60]! movk x1 stp , #0xD1FFAB1E LSL #16 x19, movk x1, #0xD1FFAB1E LSL #x20, [sp32 , # ldr 0x10] x1 stp x21, x22, [sp, #0x20] , stp x23, x24, [sp, #0x30] [x1] stp x25, x26, [sp, #0x40] stp x27, x28, [sp, #0x50] blr x1 mov fp, sp G_M000_IG02: G_M000_IG09: ldr ldr x3, [x19, #0x20x1, [x0, #0x08] ] mov ldr w0, [x19, #0x58] x19, x1 cbz x19, G_M000_IG05 sub w0, w0, #1 G_M000_IG03: str w0, [x19, #0x58] ldr x0, [x19] ldr w2, [x3, #0x08] movz x2, # cmp w0, w2 0xD1FFAB1E bhs G_M000_IG16 add x3, x3, #16 movk x2, # str wzr, [x3, w0, UXTW #2]0xD1FFAB1E LSL # 16 sub w3, w21, w20 movk x2, #0xD1FFAB1E LSL #32 ldr x0, [x19, #0x28] cmp mov w2, w20 x0, x2 mov w1, wzr beq G_M000_IG05 movz x4, #0xD1FFAB1E G_M000_IG04: movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] mov blr x4 x0, x2 mov w0 movz x2, #0xD1FFAB1E, #1 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG12: movk x2, #0xD1FFAB1E LSL #32 ldr x21, [sp, #0x48] ldr ldp x2, [x2] x19, x20, [sp, #0x38] blr x2 ldp fp, lr, [sp], #0x50 mov x19, x0 ret lr G_M000_IG13: mov w0, wzr G_M000_IG03: G_M000_IG14: mov w20, wzr ldr x21, [sp, #0x48] mov w21, #1 ldp x19, x20, [sp, #0x38] mov w22, # ldp fp, lr, [sp], #0x50 1 ret lr ldr G_M000_IG15: w2, [x19, #0x10] movz x0, #0xD1FFAB1E cmp w2, #1 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ble G_M000_IG54 ldr x0, [x0] G_M000_IG06: blr x0 ldr w2, [x19, #0x10] brk_windows # cmp w20, w2 0 bhs G_M000_IG58 G_M000_IG16: ldr x1, [x19, #0x08] ldr w0, [x1, #0x08] cmp w20, w0 bhs G_M000_IG59 bl add CORINFO_HELP_RNGCHKFAIL brk_windows x1, x1, #16 #0 ldr x23, [x1, w20, UXTW #3] ; Total bytes of code 556 cmp w21, w2 bhs G_M000_IG58 cmp w21, w0 bhs G_M000_IG59 ubfiz x24, x21, #3, #32 ldr x25, [x1, x24] ldr w2, [x23, #0x28] ldr w1, [x25, #0x28] cmp w2, w1 bne G_M000_IG52 2239: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex205_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] G_M000_IG07: ldrb w26, [x23, #0x2E] sxtw w2, w26 sub w27, w2, #3 cmp w27, #8 bhi G_M000_IG08 mov w2, w27 adr x1, [@RWD00] ldr w1, [x1, x2, LSL #2] adr x0, [G_M000_IG02] add x1, x1, x0 br x1 G_M000_IG08: sub w1, w2, #43 cmp w1, #1 bls G_M000_IG10 cmp w2, #45 bne G_M000_IG52 mov w28, #6 b G_M000_IG15 align [4 bytes for IG32] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG09: mov w28, wzr b G_M000_IG13 G_M000_IG10: mov w28, #3 b G_M000_IG13 G_M000_IG11: mov w28, #4 b G_M000_IG13 G_M000_IG12: mov w28, #7 b G_M000_IG15 G_M000_IG13: ldrb w2, [x25, #0x2E] sxtw w1, w2 cmp w1, w26 bne G_M000_IG14 ldrh w1, [x23, #0x2C] ldrh w0, [x25, #0x2C] cmp w1, w0 beq G_M000_IG17 G_M000_IG14: cmp w28, #4 bhi G_M000_IG15 mov w0, w28 adr x1, [@RWD36] ldr w1, [x1, x0, LSL #2] adr x3, [G_M000_IG02] add x1, x1, x3 br x1 G_M000_IG15: ldrb w2, [x25, #0x2E] cmp w2, w26 bne G_M000_IG16 ldr x2, [x23, #0x10] ldr x1, [x25, #0x10] cmp x2, x1 beq G_M000_IG17 cbz x2, G_M000_IG16 cbz x1, G_M000_IG16 ldr w3, [x2, #0x08] ldr w4, [x1, #0x08] cmp w3, w4 bne G_M000_IG16 add x0, x2, #12 lsl w2, w3, #1 mov w2, w2 add x1, x1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG17 G_M000_IG16: cmp w28, #6 beq G_M000_IG52 cmp w28, #7 beq G_M000_IG26 G_M000_IG17: ldr w2, [x25, #0x20] cmp w2, #0 cset x0, gt cbz w0, G_M000_IG19 ldrb w4, [x23, #0x2E] sub w0, w4, #43 cmp w0, #2 bhi G_M000_IG18 mov w0, #1 b G_M000_IG19 G_M000_IG18: mov w0, wzr G_M000_IG19: cbnz w0, G_M000_IG52 ldp w0, w1, [x23, #0x20] ldr w3, [x25, #0x24] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG52 ldr w2, [x23, #0x20] ldr w1, [x25, #0x20] add w2, w2, w1 str w2, [x23, #0x20] ldr w2, [x23, #0x24] movn w1, #0xD1FFAB1E LSL #16 cmp w2, w1 beq G_M000_IG22 ldr w1, [x25, #0x24] movn w0, #0xD1FFAB1E LSL #16 cmp w1, w0 beq G_M000_IG20 add w2, w2, w1 b G_M000_IG21 G_M000_IG20: movn w2, #0xD1FFAB1E LSL #16 G_M000_IG21: str w2, [x23, #0x24] G_M000_IG22: add w21, w21, #1 b G_M000_IG53 G_M000_IG23: cmp w2, #9 bne G_M000_IG31 G_M000_IG24: ldrh w1, [x23, #0x2C] ldrh w0, [x25, #0x2C] cmp w1, w0 beq G_M000_IG27 b G_M000_IG31 G_M000_IG25: cmp w2, #10 bne G_M000_IG52 ldrh w1, [x23, #0x2C] sxtw w2, w1 ldrh w1, [x25, #0x2C] cmp w2, w1 beq G_M000_IG27 b G_M000_IG52 G_M000_IG26: ldrb w2, [x25, #0x2E] cmp w2, #11 bne G_M000_IG52 ldr x2, [x23, #0x10] ldr x1, [x25, #0x10] cmp x2, x1 beq G_M000_IG27 cbz x2, G_M000_IG52 cbz x1, G_M000_IG52 ldr w0, [x2, #0x08] ldr w3, [x1, #0x08] cmp w0, w3 bne G_M000_IG52 add x3, x2, #12 lsl w2, w0, #1 mov w2, w2 add x1, x1, #12 mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG52 G_M000_IG27: ldp w0, w1, [x23, #0x20] sxtw w2, w1 movn w3, #0xD1FFAB1E LSL #16 cmp w0, w3 beq G_M000_IG52 G_M000_IG28: add w0, w0, #1 movn w3, #0xD1FFAB1E LSL #16 cmp w0, w3 bhs G_M000_IG52 G_M000_IG29: movn w3, #0xD1FFAB1E LSL #16 add w4, w2, #1 movn w5, #0xD1FFAB1E LSL #16 cmp w2, w3 ccmp w4, w5, 0, ne bhs G_M000_IG52 G_M000_IG30: str w0, [x23, #0x20] movn w0, #0xD1FFAB1E LSL #16 cmp w1, w0 beq G_M000_IG22 add w0, w1, #1 str w0, [x23, #0x24] b G_M000_IG22 G_M000_IG31: cmp w2, #12 bne G_M000_IG52 ldrh w1, [x23, #0x2C] sxtw w0, w1 ldr x2, [x25, #0x10] mov x3, x2 ldr w4, [x3, #0x08] cmp w4, #0 bls G_M000_IG59 ldrh w3, [x3, #0x0C] cmp w0, w3 bne G_M000_IG52 mov w26, #1 b G_M000_IG33 G_M000_IG32: add w26, w26, #1 G_M000_IG33: ldr w0, [x2, #0x08] cmp w0, w26 ble G_M000_IG35 G_M000_IG34: sxtw w0, w1 mov x3, x2 cmp w26, w4 bhs G_M000_IG59 add x3, x3, #12 ldrh w3, [x3, w26, UXTW #2] cmp w3, w0 beq G_M000_IG32 G_M000_IG35: ldp w0, w1, [x23, #0x20] mov w2, w26 mov w3, w26 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG52 ldr w0, [x23, #0x20] add w0, w0, w26 str w0, [x23, #0x20] ldr w0, [x23, #0x24] movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG37 G_M000_IG36: ldr w0, [x23, #0x24] add w0, w0, w26 str w0, [x23, #0x24] G_M000_IG37: ldr x0, [x25, #0x10] ldr w1, [x0, #0x08] cmp w1, w26 beq G_M000_IG22 G_M000_IG38: ldr w1, [x0, #0x08] sub w1, w1, w26 cmp w1, #1 bne G_M000_IG39 mov w1, #9 strb w1, [x25, #0x2E] mov x1, x0 ldr w0, [x0, #0x08] sub w0, w0, #1 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG59 add x1, x1, #12 ldrh w0, [x1, w0, UXTW #2] strh w0, [x25, #0x2C] str xzr, [x25, #0x10] b G_M000_IG52 G_M000_IG39: mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x15, x0 add x14, x25, #16 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG52 G_M000_IG40: ldrb w2, [x25, #0x2E] sxtw w4, w2 mov w2, #43 cmp w4, #3 ccmp w4, #6, z, ne ccmp w4, w2, z, ne bne G_M000_IG52 ldrh w1, [x23, #0x2C] sxtw w4, w1 ldrh w1, [x25, #0x2C] cmp w4, w1 beq G_M000_IG43 b G_M000_IG52 G_M000_IG41: ldrb w2, [x25, #0x2E] sxtw w4, w2 mov w1, #44 cmp w4, #4 ccmp w4, #7, z, ne ccmp w4, w1, z, ne bne G_M000_IG49 ldrh w1, [x23, #0x2C] sxtw w4, w1 ldrh w1, [x25, #0x2C] cmp w4, w1 beq G_M000_IG43 b G_M000_IG49 G_M000_IG42: ldrb w2, [x25, #0x2E] sxtw w4, w2 mov w2, #45 cmp w4, #5 ccmp w4, #8, z, ne ccmp w4, w2, z, ne bne G_M000_IG50 ldr x2, [x23, #0x10] ldr x1, [x25, #0x10] cmp x2, x1 beq G_M000_IG43 cbz x2, G_M000_IG50 cbz x1, G_M000_IG50 ldr w3, [x2, #0x08] ldr w4, [x1, #0x08] cmp w3, w4 bne G_M000_IG50 add x0, x2, #12 lsl w2, w3, #1 mov w2, w2 add x1, x1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG50 G_M000_IG43: ldr w2, [x25, #0x20] sxtw w1, w2 ldr w0, [x25, #0x24] sxtw w3, w0 movn w4, #0xD1FFAB1E LSL #16 add w5, w1, #1 movn w6, #0xD1FFAB1E LSL #16 cmp w1, w4 ccmp w5, w6, c, ne bhs G_M000_IG52 G_M000_IG44: movn w1, #0xD1FFAB1E LSL #16 add w4, w3, #1 movn w5, #0xD1FFAB1E LSL #16 cmp w3, w1 ccmp w4, w5, 0, ne bhs G_M000_IG52 G_M000_IG45: ldrb w1, [x25, #0x2E] strb w1, [x23, #0x2E] add w2, w2, #1 str w2, [x23, #0x20] mov x2, x23 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 beq G_M000_IG47 G_M000_IG46: add w1, w0, #1 b G_M000_IG48 G_M000_IG47: movn w1, #0xD1FFAB1E LSL #16 G_M000_IG48: str w1, [x2, #0x24] b G_M000_IG22 G_M000_IG49: cmp w2, w26 bne G_M000_IG52 ldrh w1, [x23, #0x2C] sxtw w2, w1 ldrh w1, [x25, #0x2C] cmp w2, w1 beq G_M000_IG51 b G_M000_IG52 G_M000_IG50: ldrb w2, [x25, #0x2E] cmp w2, #11 bne G_M000_IG52 ldr x2, [x23, #0x10] ldr x1, [x25, #0x10] cmp x2, x1 beq G_M000_IG51 cbz x2, G_M000_IG52 cbz x1, G_M000_IG52 ldr w0, [x2, #0x08] ldr w3, [x1, #0x08] cmp w0, w3 bne G_M000_IG52 add x3, x2, #12 lsl w2, w0, #1 mov w2, w2 add x1, x1, #12 mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG52 G_M000_IG51: ldrb w0, [x23, #0x2E] add w0, w0, #250 uxtb w0, w0 strb w0, [x23, #0x2E] mov w0, #2 stp w0, w0, [x23, #0x20] b G_M000_IG22 G_M000_IG52: add w0, w22, #1 sxtw w23, w0 ldr w0, [x19, #0x10] cmp w21, w0 bhs G_M000_IG58 ldr x1, [x19, #0x08] mov x2, x1 ldr w3, [x2, #0x08] cmp w21, w3 bhs G_M000_IG59 add x2, x2, #16 ldr x2, [x2, x24] cmp w22, w0 bhs G_M000_IG58 mov x0, x1 sxtw x1, w22 bl CORINFO_HELP_ARRADDR_ST ldr w2, [x19, #0x14] add w2, w2, #1 str w2, [x19, #0x14] sxtw w20, w21 mov w22, w23 b G_M000_IG22 G_M000_IG53: ldr w2, [x19, #0x10] cmp w21, w2 blt G_M000_IG06 G_M000_IG54: ldr w2, [x19, #0x10] cmp w22, w2 bge G_M000_IG57 G_M000_IG55: ldr w2, [x19, #0x10] sub w2, w2, w22 mov x0, x19 mov w1, w22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG56: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 br x3 G_M000_IG57: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG58: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG59: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG40 - G_M000_IG02 dd G_M000_IG41 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 RWD36 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG52 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 ; Total bytes of code 1896 2240: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentLoops() [Tier1, IL size=1364, code size=1896] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex206_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2241: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex206_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2242: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2243: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex206_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentStrings():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 15 inlinees with PGO data; 48 single block inlinees; 9 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex207_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp G_M000_IG01: , #0x28] mov stp fpfp, lr, [sp, #-0x90]! , sp mov x19, x0 stp mov x21, x1 x19, x20, [sp, #0x40] mov w20, w2 stp x21, x22, [sp, #0x50] stp G_M000_IG02: x23, x24, [sp, #0x60] mov x1, x21 stp mov w2, w20 x25, x26, [sp, #0x70] mov x0, x19 stp x27, x28, [sp, #0x80] bl mov fp, sp add x9, fp, #24 movi System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool v16.16b, #0 cbz w0, G_M000_IG04 stp q16, q16, [x9] G_M000_IG03: str xzr mov x1, x21 , [x9, #0x20] mov w2, w20 mov mov x0, x19 x19 bl , x0 G_M000_IG02: mov w20, wzr System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 mov w21, wzr add ldr w0, w0, #1 x1, [x19, #0x08] str w0, [x19, #0x4C] mov x22, x1 cbz x22, G_M000_IG05 b G_M000_IG02 G_M000_IG03: G_M000_IG02: ldr x0, [x22] ldr x21, [sp, #0x28] movz x2, #0xD1FFAB1E ldp x19, x20, [sp, #0x18] movk x2, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x30 movk x2, #0xD1FFAB1E LSL #32 ret lr cmp ; Total bytes of code 108 x0, x2 beq G_M000_IG05 G_M000_IG04: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 2244: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex207_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ldr x2, [x2] blr x2 mov x22, x0 G_M000_IG05: mov w23, wzr mov w24, wzr ldr w0, [x22, #0x10] cmp w0, #0 ble G_M000_IG46 G_M000_IG06: ldr w0, [x22, #0x10] cmp w23, w0 bhs G_M000_IG51 ldr x0, [x22, #0x08] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG57 add x0, x0, #16 ldr x25, [x0, w23, UXTW #3] cmp w24, w23 bge G_M000_IG08 G_M000_IG07: ldr w0, [x22, #0x10] cmp w24, w0 bhs G_M000_IG51 ldr x0, [x22, #0x08] sxtw x1, w24 mov x2, x25 bl CORINFO_HELP_ARRADDR_ST ldr w1, [x22, #0x14] add w1, w1, #1 str w1, [x22, #0x14] G_M000_IG08: ldrb w26, [x25, #0x2E] cmp w26, #25 bne G_M000_IG23 G_M000_IG09: ldr w1, [x25, #0x28] and w1, w1, #64 ldr w0, [x19, #0x28] and w0, w0, #64 cmp w1, w0 bne G_M000_IG23 ldr x1, [x25, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 cbz x2, G_M000_IG12 mov w1, wzr ldr w0, [x2, #0x10] cmp w0, #0 ble G_M000_IG11 align [0 bytes for IG10] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG10: cmp w1, w0 bhs G_M000_IG51 ldr x14, [x2, #0x08] ldr w15, [x14, #0x08] cmp w1, w15 bhs G_M000_IG57 add x14, x14, #16 ldr x14, [x14, w1, UXTW #3] add x14, x14, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF add w1, w1, #1 cmp w1, w0 blt G_M000_IG10 G_M000_IG11: add w1, w23, #1 mov x0, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG21 G_M000_IG12: ldr x1, [x25, #0x08] mov x27, x1 cbz x27, G_M000_IG14 G_M000_IG13: ldr x14, [x27] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x14, x0 bne G_M000_IG49 G_M000_IG14: add x14, x27, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF add w28, w23, #1 ldr w0, [x22, #0x10] cmp w28, w0 bhi G_M000_IG50 ldr w0, [x22, #0x10] ldr x1, [x22, #0x08] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG19 G_M000_IG15: ldr w0, [x22, #0x10] add w1, w0, #1 ldr x0, [x22, #0x08] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG25 G_M000_IG16: mov w0, #4 G_M000_IG17: movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 cmp w0, w2 bhi G_M000_IG53 str w0, [fp, #0x14] cmp w0, w1 blt G_M000_IG54 G_M000_IG18: mov x0, x22 ldr w1, [fp, #0x14] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr w4, [x22, #0x10] cmp w28, w4 blt G_M000_IG22 G_M000_IG20: ldr x0, [x22, #0x08] sxtw x1, w28 mov x2, x27 bl CORINFO_HELP_ARRADDR_ST ldr w2, [x22, #0x10] add w2, w2, #1 str w2, [x22, #0x10] ldr w2, [x22, #0x14] add w2, w2, #1 str w2, [x22, #0x14] G_M000_IG21: sub w24, w24, #1 b G_M000_IG45 G_M000_IG22: ldr w4, [x22, #0x10] sub w4, w4, w28 ldr x2, [x22, #0x08] mov x0, x2 add w3, w28, #1 mov w1, w28 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG20 G_M000_IG23: sxtw w2, w26 cmp w2, #9 ccmp w2, #12, z, ne bne G_M000_IG43 G_M000_IG24: b G_M000_IG26 G_M000_IG25: ldr x0, [x22, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 b G_M000_IG17 G_M000_IG26: ldr w0, [x25, #0x28] mov w1, #65 and w27, w0, w1 cbz w20, G_M000_IG27 cmp w21, w27 beq G_M000_IG28 G_M000_IG27: mov w20, #1 sxtw w21, w27 b G_M000_IG45 G_M000_IG28: sub w24, w24, #1 ldr w0, [x22, #0x10] cmp w24, w0 bhs G_M000_IG51 ldr x0, [x22, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG57 add x0, x0, #16 ldr x28, [x0, w24, UXTW #3] ldrb w0, [x28, #0x2E] cmp w0, #9 bne G_M000_IG29 mov w0, #12 strb w0, [x28, #0x2E] ldrh w26, [x28, #0x2C] mov w0, #1 bl System.String:FastAllocateString(int):System.String strh w26, [x0, #0x0C] add x14, x28, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG29: tbnz w27, #6, G_M000_IG36 ldrb w1, [x25, #0x2E] cmp w1, #9 beq G_M000_IG30 ldr x0, [x28, #0x10] ldr x1, [x25, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x15, x0 b G_M000_IG35 G_M000_IG30: str xzr, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x26, [x0] mov x0, x26 mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] cbz x0, G_M000_IG55 add x27, x0, #16 ldr w3, [x0, #0x08] G_M000_IG31: str x27, [fp, #0x30] str w3, [fp, #0x38] str wzr, [fp, #0x28] strb wzr, [fp, #0x2C] ldr x1, [x28, #0x10] ldrb w2, [fp, #0x2C] cbnz w2, G_M000_IG32 cbz x1, G_M000_IG32 ldr w2, [fp, #0x28] ldr w0, [fp, #0x38] cmp w2, w0 bhi G_M000_IG52 ldr x3, [fp, #0x30] ubfiz x4, x2, #1, #32 add x3, x3, x4 sub w2, w0, w2 mov x0, x3 ldr w27, [x1, #0x08] cmp w27, w2 bhi G_M000_IG32 add x1, x1, #12 mov w2, w27 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x28] add w0, w0, w27 str w0, [fp, #0x28] b G_M000_IG33 G_M000_IG32: add x0, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG33: ldrh w1, [x25, #0x2C] add x0, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x28] ldr w0, [fp, #0x38] cmp w1, w0 bhi G_M000_IG52 ldr x0, [fp, #0x30] bl System.String:.ctor(System.ReadOnlySpan`1[ushort]):this mov x25, x0 ldr x1, [fp, #0x20] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] str xzr, [fp, #0x38] cbz x1, G_M000_IG34 mov x0, x26 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG34: mov x15, x25 G_M000_IG35: add x14, x28, #16 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG45 G_M000_IG36: mov x26, x28 ldrb w1, [x25, #0x2E] cmp w1, #9 beq G_M000_IG37 ldr x0, [x25, #0x10] mov x27, x28 ldr x1, [x27, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x15, x0 b G_M000_IG42 G_M000_IG37: str xzr, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x28, x0 mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] cbz x0, G_M000_IG56 add x2, x0, #16 ldr w3, [x0, #0x08] G_M000_IG38: str x2, [fp, #0x30] str w3, [fp, #0x38] str wzr, [fp, #0x28] strb wzr, [fp, #0x2C] ldrh w1, [x25, #0x2C] add x0, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x26, #0x10] ldrb w2, [fp, #0x2C] cbnz w2, G_M000_IG39 cbz x1, G_M000_IG39 ldr w2, [fp, #0x28] ldr w0, [fp, #0x38] cmp w2, w0 bhi G_M000_IG52 ldr x3, [fp, #0x30] ubfiz x4, x2, #1, #32 add x3, x3, x4 sub w2, w0, w2 mov x0, x3 ldr w27, [x1, #0x08] cmp w27, w2 bhi G_M000_IG39 add x1, x1, #12 mov w2, w27 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x28] add w0, w0, w27 str w0, [fp, #0x28] b G_M000_IG40 G_M000_IG39: add x0, fp, #24 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movz x2, #0xD1FFAB1E; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG40: ldr w1, [fp, #0x28] ldr w0, [fp, #0x38] cmp w1, w0 bhi G_M000_IG52 ldr x0, [fp, #0x30] bl System.String:.ctor(System.ReadOnlySpan`1[ushort]):this mov x25, x0 ldr x1, [fp, #0x20] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] str xzr, [fp, #0x38] cbz x1, G_M000_IG41 G_M000_IG01: mov x0, x28 stp mov w2, wzr fp, lr, [sp, movz #-0x50]! x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 stp movk x3, #0xD1FFAB1E LSL #32 x19, x20, [sp, #0x18] ldr x3, [x3] stp x21, x22, [sp, #0x28] blr x3 stp x23, x24, [sp, #0x38] str G_M000_IG41: x25, [sp, #0x48] mov x27, x26 mov mov x15, x25 fp, sp G_M000_IG42: mov x19, x0 add x14, x27, #16 bl G_M000_IG02: CORINFO_HELP_ASSIGN_REF ldr b G_M000_IG45 w20, [x19, G_M000_IG43: #0x4C cmp ] w26, #23 sxtw w21, w2 beq G_M000_IG21 sub G_M000_IG44: w0, w21, #3 mov w20, wzr G_M000_IG45: cmp w20, w0 add w23, w23, #1 ble G_M000_IG05 G_M000_IG03: add w24, w24, #1 str w21, [x19, #0x4C] ldr mov w0, wzr w2, [x22, #0x10] G_M000_IG04: cmp w23, w2 ldr x25, [sp, #0x48] blt G_M000_IG06 ldp G_M000_IG46: x23, x24, [sp, #0x38] cmp w24, w23 ldp x21, x22, [sp, #0x28] bge G_M000_IG48 G_M000_IG47: ldp sub w2, w23, w24 x19, x20, [sp, #0x18] mov x0, x22 mov w1, w24 ldp fp, lr, [sp], #0x50 movz ret lr x3, #0xD1FFAB1E movk x3 G_M000_IG05: , #0xD1FFAB1E LSL #16 cmp w20, w21 movk x3, #0xD1FFAB1E LSL #32 bhi G_M000_IG12 ldr x3, [ ubfiz x0, x20, #1x3], #32 add x22, x1, x0 blr x3 sub w23, w21, w20 G_M000_IG48: mov w24, wzr ldp sub x27, x28, [sp, #0x80] w25, w23, #2 ldp x25, x26, [sp, #0x70] cmp w25 ldp x23, x24, [sp, #0x60] , #0 ldp x21, x22, [sp, #0x50] ble G_M000_IG03 ldp G_M000_IG06: x19, x20, [sp, #0x40] add w0, w24, #2 ldp fp, lr, [sp], #0x90 cmp w0, w23 ret lr bhi G_M000_IG12 ubfiz x1, x0, #1, #32 G_M000_IG49: movz x2, #0xD1FFAB1E add x1, x22, x1 movk sub w4, w23 x2, #0xD1FFAB1E LSL #16 , w0 movk x2, #0xD1FFAB1E LSL #32 mov x0, x1 ldr mov w1, #68 x2, [x2] blr x2 mov w2, #78 brk_windows mov w3, #83 #0 movz x5, #0xD1FFAB1E G_M000_IG50: movk x5, #0xD1FFAB1E LSL #16 mov w0, #21 movk x5, #0xD1FFAB1E LSL #32 mov w1, #12 ldr x5, [x5] movz x2, #0xD1FFAB1E blr x5 movk x2, #0xD1FFAB1E LSL #16 add w24, w24, w0 movk x2, #0xD1FFAB1E LSL #32 tbnz w0, #31, G_M000_IG03 ldr x2, [x2] add w1, w24, #1 blr x2 cmp w1, w23 brk_windows #0 bhs G_M000_IG13 G_M000_IG51: movz x0, #0xD1FFAB1E ldrh movk x0, #0xD1FFAB1E LSL #16 w0, [x22, w1, UXTW #2] movk x0, #0xD1FFAB1E LSL #32 mov w2, #97 ldr x0, [x0] cmp w0, #78 blr x0 brk_windows # ccmp w0, w2, z, ne 0 bne G_M000_IG08 G_M000_IG52: G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 cmp w24, w23 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] bhs G_M000_IG13 blr x0 ldrh w0, [x22, w24, UXTW #2] brk_windows #0 sub w0, w0, #72 G_M000_IG53: uxth w0, w0 movz w0, #0xD1FFAB1E sxth w2, w0 movk w0, #0xD1FFAB1E LSL #16 movz w3, #80 cmp w0, w1 str movk w3, #0xD1FFAB1E LSL #16 w0, [fp, #0x14] lsl w2, w3, w2 bge sub w0, w0, #32 G_M000_IG18 and w0, w2, w0 G_M000_IG54: tbnz w0, #31, G_M000_IG10 sxtw w0, w1 str w0, [fp, #0x14] G_M000_IG08: b G_M000_IG18 G_M000_IG55: sxtw w24, w1 mov x27, xzr cmp w24, w25 mov w3, wzr blt G_M000_IG06 b G_M000_IG31 G_M000_IG09: G_M000_IG56: b G_M000_IG03 mov x2, xzr G_M000_IG10: mov w3, wzr add w0, w20, w24 b G_M000_IG38 G_M000_IG57: str w0, [x19, #0x4C] bl CORINFO_HELP_RNGCHKFAIL mov w0, #1 brk_windows #0 G_M000_IG11: ; Total bytes of code 1892 ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2245: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] 2246: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceConcatenationWithAdjacentStrings() [Tier1, IL size=553, code size=1892] ; Assembly listing for method System.Text.ValueStringBuilder:set_Length(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2247: JIT compiled System.Text.ValueStringBuilder:set_Length(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitConcatenation|15(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 1 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x38] stp x21, x22, [sp, #0x48] stp x23, x24, [sp, #0x58] stp x25, x26, [sp, #0x68] str x27, [sp, #0x78] mov fp, sp str xzr, [fp, #0x18] mov x19, x0 mov x20, x1 mov x21, x2 mov w22, w3 G_M000_IG02: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr stp fp, lr, [ x1, [x1] sp, #-0x80]! ldr wzr, [x0] blr x1 stp sxtw w23, w0 x19, x20, [sp, #0x50] mov w24, wzr stp x21, x22, [sp, #0x60] cmp w23, #0 stp x23, x24, [sp, #0x70] ble G_M000_IG28 G_M000_IG03: mov ldr w2, [x20, #fp, sp0x28] tst w2, add #64 x9, fp, #16 cset x2, eq movi uxtb w3, w22 v16.16b, #0 tst w2, w3 stp beq G_M000_IG19 q16, q16, [x9] G_M000_IG04: stp add x2, fp, q16, q16, [x9, #0x20] #48 mov add x3, fp, #40 x19, x0 mov x0, x20 mov w1, w24 G_M000_IG02: movz x4, # ldr 0xD1FFAB1E w20, [x19, #0x4C] movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL # cmp 32 w20, w2 ldr x4, [x4] bhi G_M000_IG22 ubfiz x0, x20, #1, #32 blr x4 cbz w0, G_M000_IG19 add x21, x1 ldr w0, [fp, #0x30] , x0 ldr w1, [x19, #0x38] mov x0, x21 add w0, w1, w0 sub w22, w2, w20 sub w1, w0, #1 sxtw w1, w22 ldr str x0, [x19, #0x08] x0, movz x2, #0xD1FFAB1E [fp, #0x40] movk x2, #0xD1FFAB1E LSL #16 str w1, [fp, #0x48] movk x2, #0xD1FFAB1E LSL #32 add x0, fp, #64 ldr x2, [x2] blr x2 ldr ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3x0 , [x19, #0x08] bge G_M000_IG05 ldr G_M000_IG03: x1, [x19, #0x20] mov x0, x21 movz x2, #0xD1FFAB1E sxtw w1, w22 movk x2, #0xD1FFAB1E LSL #16 str x0, [fp, #0x30] movk x2, #0xD1FFAB1E LSL #32 str w1, [fp, #0x38] ldr x2, [x2] add x0, blr x2 fp, #48 ldr x0, [x19, #0x08] movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 ldr x23, [x0] movk x25, #0xD1FFAB1E LSL #32 ldr w0, [x0, #0x08] ldr x1, [x25] cmp w0 movz x2, #0xD1FFAB1E , #3 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 blt G_M000_IG07 G_M000_IG04: ldr x2, [x2] b G_M000_IG09 G_M000_IG05: blr x2 ldr w0, [x1] ldr x0, [x19, #0x08] movz w3, #97 ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk w3, #78 LSL #16 movk x2, #0xD1FFAB1E LSL #32 eor w0, w0, w3 ldr x2, [x2] ldr w1, [x1, #0x02] blr x2 movz w3, #78 ldr movk w3, #68 LSL #16 w4, [fp, #0x28] cmp w24, w4 eor w1, bge G_M000_IG18 w1 , w3 orr w0, w0, w1 G_M000_IG05: cbnz w0, G_M000_IG03 add x4, fp, # G_M000_IG06: 24 add w0, w20, #3 add x3, fp, #32 cmp w0, w2 mov x0, x20 bhi G_M000_IG22 mov w1, w24 ldr w2, [fp, #0x28] b G_M000_IG16 G_M000_IG07: movz x5, #0xD1FFAB1E mov x1, x21 movk sxtw w0, w22 x5, #0xD1FFAB1E LSL #16 cmp w0, movk x5, #0xD1FFAB1E LSL #32 #2 ldr x5, [x5] blr x5 bls G_M000_IG13 cbz w0, G_M000_IG09 str G_M000_IG06: x1, ldr w0, [x19, #0x38] [fp, #0x10] cmp w0, #0 ble G_M000_IG07 str w0, [fp, #0x18] ldr x0, [x19, #0x08] add ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E x0 movk x2, #0xD1FFAB1E LSL #16 , fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 movk blt G_M000_IG13 x2, #0xD1FFAB1E LSL #32 ldr G_M000_IG08: x2, [x2] b G_M000_IG11 G_M000_IG09: blr x2 ldr w0, [x23] ldr movz w1, #99 x0, [x19, #0x08] ldr w1, [x19, #0x38] movk w1, #97 LSL #16 movz x2, #0xD1FFAB1E eor w0, movk x2, #0xD1FFAB1E LSL #16 w0, w1 movk x2, #0xD1FFAB1E LSL #32 ldr w1, [x23, #0x02] ldr x2, [x2] movz w3, #97 movk w3, #78 LSL #16 blr x2 eor w1, w1, w3 ldr x0, [x19, #0x08] orr w0, w0, w1 ldr x1, [x25, #0xD8] cbnz w0, G_M000_IG07 movz x2, #0xD1FFAB1E G_M000_IG10: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add w0, w20, #3 blr x2 cmp w0, w2 b G_M000_IG08 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: G_M000_IG11: ldr w0, [x24] ldr x0, [x19, #0x08] movz w3, #72 movk w3, #97 LSL #16 ldr x1, [x19, #0x20] cmp w0, w3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 bne G_M000_IG13 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG12: ldr x2, [x2] blr x2 ldrh G_M000_IG08: w0, [ ldr x0, [x19, #0x08] x1, #0x04] ldr x1, [fp, #0x18] mov w1, #83 movz x2, #0xD1FFAB1E cmp w0, #68 movk x2, #0xD1FFAB1E LSL #16 ccmp w0, w1, z, ne movk x2, #0xD1FFAB1E LSL #32 bne G_M000_IG13 ldr x2, [x2] add w0, w20, #3 blr x2 cmp w0, w2 ldr x0, [x19, #0x08] bhi G_M000_IG22 ldr x1, [x25, #0xF8] b G_M000_IG16 movz x2, #0xD1FFAB1E G_M000_IG13: movk x2, #0xD1FFAB1E LSL #16 str x21, [fp, #0x20] movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] str mov w1, #w22, [fp, #0x28] 5 movz x2, #0xD1FFAB1E add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG14: ldr w0, [x1] movk x2, #0xD1FFAB1E LSL #32 ldr movz w3, #87 x2, [x2] blr x2 movk w3, #97 LSL #16 ldr eor w0, w0, w3 x0, [x19, #ldr 0x08] w1, [x1, #0x02] ldr x1, [x25, #0xF0] movz w3, #97 movz x2, #0xD1FFAB1E movk w3, #83 LSL #16 eor w1, w1, w3 movk x2, #0xD1FFAB1E LSL #16 orr w0, w0, w1 movk x2, #0xD1FFAB1E LSL #32 cbnz w0, G_M000_IG20 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x40] G_M000_IG15: movz x2, #0xD1FFAB1E movk x2 add , #0xD1FFAB1E LSL #16 w0, w20, movk x2, #0xD1FFAB1E LSL #32 #3 ldr x2, [x2] blr x2 cmp w0 ldr w0, [x19, #0x38] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] add w0, w0, w1 str w0, [x19, #0x38] ldr w0, [fp, #0x20] add w0, w24, w0 , sub w24, w0, #1 w2 b G_M000_IG17 bhi G_M000_IG09: ldr x1, [x20, #0x08] G_M000_IG22 mov x26, x1 G_M000_IG16: cbz x26, G_M000_IG11 str G_M000_IG10: w0, [x19, #0x4C] ldr x0, [x26] movz x2, #0xD1FFAB1E sxtw w23, w0 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp w23, w20 bge G_M000_IG17 cmp x0, x2 mov w0, w20 beq G_M000_IG15 mov w20, w23 G_M000_IG11: mov w23, w0 mov x2, x1 G_M000_IG17: cbz x2, G_M000_IG14 ldr w0, [x19, #0x58] G_M000_IG12: cbnz w0, G_M000_IG18 ldr x0, [x2] mov x0, x19 movz x3, #0xD1FFAB1E movz movk x3, #0xD1FFAB1E LSL #16 x1, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 movk x1, #0xD1FFAB1E LSL #16 beq G_M000_IG14 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG13: ldr x1, [x1 mov x0, x3 ] movz x2, #0xD1FFAB1E blr x1 G_M000_IG18: movk x2, #0xD1FFAB1E LSL #16 ldr movk x2, #0xD1FFAB1E LSL #32 x3, [x19, #0x20] ldr x2, [x2] blr x2 ldr w0, [x19, #0x58] mov x2, x0 sub w0, w0 G_M000_IG14: , # ldr w0, [x2, #0x10] 1 cmp w24, w0 str w0, [x19, #0x58] bhs G_M000_IG29 ldr w2, [x3, #0x08] ldr x0, [x2, #0x08] cmp ldr w1w0, w2 , [x0 bhs G_M000_IG23 , #0x08] add x3 cmp w24, w1 , bhs G_M000_IG30 x3, #16 add x0, x0, #16 str wzr, ldr x27, [x0, [x3, w0, UXTW #2] w24, UXTW #3] sub w3 , w23, w20 b G_M000_IG16 ldr x0, [x19, G_M000_IG15: #0x28] mov x27, x26 G_M000_IG16: mov w2, w20 mov w0, w24 mov x1, x20 mov w1, wzr mov x2, x21 movz x3, #0xD1FFAB1E movz x4, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movk x4, #0xD1FFAB1E LSL #16 ldr movk x4, #0xD1FFAB1E LSL #32 x3, ldr x4[x3] , [x4] blr x3 ldr wzr, mov x2, x0 [x0] mov x1, x27 mov x0, x19 blr x4 mov w3, wzr mov w0, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 G_M000_IG19: movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldp blr x4 x23, x24, [sp, #0x70] G_M000_IG17: ldp x21, x22, [sp, #0x60] add w24, w24, #1 ldp x19, x20, [sp, #0x50] ldr ldp fp, lr, [sp], #0x80 w0, ret lr [fp, #0x28] G_M000_IG20: cmp w24, w0 mov w0, wzr blt G_M000_IG05 G_M000_IG21: G_M000_IG18: ldp sub w24, w24x23, x24, [sp, #0x70] , #1 ldp x21, x22, [sp, #0x60] b G_M000_IG27 G_M000_IG19: ldp x19, x20, [sp, #0x50] ldr x1, [x20, #0x08] ldp fp, lr, [sp], #0x80 mov x25, x1 ret lr G_M000_IG22: cbz x25, G_M000_IG21 movz x0, #0xD1FFAB1E G_M000_IG20: movk x0, #0xD1FFAB1E LSL #16 movk x0, ldr x0, [x25] #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ldr x0, [x0] movk x2, #0xD1FFAB1E LSL #32 blr x0 cmp x0, x2 brk_windows #0 beq G_M000_IG25 G_M000_IG23: G_M000_IG21: mov x2, x1 cbz x2, G_M000_IG24 G_M000_IG22: ldr x0, [x2] movz x3, #0xD1FFAB1E bl movk x3, #0xD1FFAB1E LSL #16 CORINFO_HELP_RNGCHKFAIL movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 brk_windows beq G_M000_IG24 #0 G_M000_IG23: mov x0, x3 movz x2, #0xD1FFAB1E movk x2 ; Total bytes of code 652 , #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG24: ldr w0, [x2, #0x10] cmp w24, w0 bhs G_M000_IG29 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG30 2248: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex207_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] add x0, x0, #16 ldr x26, [x0, w24, UXTW #3] b G_M000_IG26 G_M000_IG25: mov x26, x25 G_M000_IG26: mov w0, w24 mov x1, x20 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x2, x0 mov x1, x26 mov x0, x19 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG27: add w24, w24, #1 cmp w24, w23 blt G_M000_IG03 G_M000_IG28: ldr x27, [sp, #0x78] ldp x25, x26, [sp, #0x68] ldp x23, x24, [sp, #0x58] ldp x21, x22, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG29: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG30: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1164 2249: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitConcatenation|15(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool) [Tier1, IL size=333, code size=1164] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:IsTrueQuantifier():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 7 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x58] sxtw w2, w1 ldr x3, [x0, #0x28] mov x0, x3 ldr w4, [x0, #0x08] cmp w2, w4 bhs G_M000_IG15 add x5, x0, #12 ldrh w6, [x5, w2, UXTW #2] cmp w6, #123 beq G_M000_IG04 G_M000_IG03: cmp w6, #123 bgt G_M000_IG13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldrb w3, [x2, w6, UXTW #2] cmp w3, #5 cset x2, ge b G_M000_IG11 align [0 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: sxtw w7, w2 ldr w0, [x3, #0x08] sub w1, w0, w1 G_M000_IG05: sub w1, w1, #1 cmp w1, #0 ble G_M000_IG06 add w7, w7, #1 cmp w7, w4 bhs G_M000_IG15 ldrh w6, [x5, w7, UXTW #2] sub w0, w6, #48 cmp w0, #9 bls G_M000_IG05 G_M000_IG06: cbz w1, G_M000_IG13 sub w0, w7, w2 cmp w0, #1 beq G_M000_IG13 cmp w6, #125 bne G_M000_IG08 mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: cmp w6, #44 bne G_M000_IG13 align [0 bytes for IG09] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG09: sub w1, w1, #1 cmp w1, #0 ble G_M000_IG10 add w7, w7, #1 cmp w7, w4 bhs G_M000_IG15 ldrh w6, [x5, w7, UXTW #2] sub w0, w6, #48 cmp w0, #9 bls G_M000_IG09 G_M000_IG10: cmp w1, #0 ble G_M000_IG13 cmp w6, #125 cset x2, eq G_M000_IG11: uxtb w0, w2 G_M000_IG12: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 272 2250: JIT compiled System.Text.RegularExpressions.RegexParser:IsTrueQuantifier() [Tier1, IL size=152, code size=272] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CharAt(int):ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x28] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 48 2251: JIT compiled System.Text.RegularExpressions.RegexParser:CharAt(int) [Tier1, IL size=13, code size=48] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w1, w0 mov x0, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 ; Total bytes of code 80 2252: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize() [Tier1, IL size=19, code size=80] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex208_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize(int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov G_M000_IG01: stp fp, lr, [sp, #-0x40]!fp , sp stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov movfp, sp str x0, [fp, #0x18] mov x19, x0 mov w20, w1 G_M000_IG02: x19 ldr , x0, [x19] x0 ldr x1, [x0, #0x30] ldr x1, [x1] ldr x2, [x1, #0x20] mov cbz x2, G_M000_IG04 G_M000_IG03: mov x0, x2 b G_M000_IG05 align x21[0 bytes for IG06] , align [0 bytes] x1 align [0 bytes] align [0 bytes] G_M000_IG04: mov movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 w20, bl w2CORINFO_HELP_RUNTIMEHANDLE_CLASS G_M000_IG05: sxtw x1, w20 G_M000_IG02: bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr w22, [x19, #0x38] mov ldr x0, [x19, #0x10] mov x1, x21 mov w2, w22 x1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movn x14, #0 mov w15, w20 cmp x15, #0 beq G_M000_IG15 udiv x14, x14, x15 add x14, x14, #1 str x14, [x19, #0x30] mov w14, wzr cmp w22, #0 ble G_M000_IG13 ldr w15, [x21, #0x08] cmp w15, w22 blt G_M000_IG10 G_M000_IG06: ubfiz x15, x14, #5, #32 add x15, x15, #16 add x12, x21, x15 ldr w12, [x12, #0x04] cmn w12, #1 blt G_M000_IG08 G_M000_IG07: ldr w12, [x21, x15] ldr xip0, [x19, #0x08] ldr w0, [xip0, #0x08] sxtw w1, w0 ldr x2, [x19, #0x30] mov w12, w12 mul x12, x2, x12 lsr x12, x12, #32 add x12, x12, #1 mov w1, w1 mul x12, x12, x1 lsr x12, x12, #32 cmp w12, w0 , x21 movbhs G_M000_IG16 add xip0, xip0, #16 ubfiz x12, x12, #2, #32 add x12, xip0, x12 add x15, x21, x15 w2 add x15, x15, #4 , ldr w20wip0, [x12] sub wip0, wip0, #1 mov str wip0, [x15] add w15, w14, #1 str w15, [x12] G_M000_IG08: x0 add w14, w14, #1 , x19 bl cmp w14, w22 blt G_M000_IG06 G_M000_IG09: b G_M000_IG13 G_M000_IG10: ldr w12, [x21, #0x08] cmp w14, w12 bhs G_M000_IG16 ubfiz x15, x14, #5, #32 add x15, x15, #16 add x12, x21, x15 ldr wip0, [x12, #0x04] System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cmn wip0, #1 blt G_M000_IG12 G_M000_IG11: ldr w15, [x21, x15] cbz ldr xip0, [x19, #0x08] ldr w1, [xip0, #0x08] ldr x0, [x19, #0x30] mov w15, w15 mul x15, x0, x15 lsr x15, x15, #32 w0 add , x15, x15, #1 G_M000_IG04 mov w0, w1 mul x15, x15, x0 G_M000_IG03: lsr x15, x15, #32 ldr mov w0, [xip0, #0x08] cmp w15, w0 bhs G_M000_IG16 add xip0, xip0, #16 x1 ubfiz x15, x15, #2, #32 , x21add x15, xip0, x15 add movx12, x12, #4 ldr wip0, [x15] sub wip0, wip0, #1 str wip0, [x12] add w12, w14, #1 str w12, [x15] w2 G_M000_IG12: , add w14, w14, #1 w20 cmp w14, w22 blt mov G_M000_IG10 G_M000_IG13: add x14, x19, #16 mov x15, x21 bl x0CORINFO_HELP_ASSIGN_REF , G_M000_IG14: x19 ldp x21, x22, [sp, #0x30] ldp bl x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG15: bl CORINFO_HELP_THROWDIVZERO G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 520 System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG042253: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Resize(int,bool) [Tier1, IL size=254, code size=520] ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret ; Assembly listing for method System.Collections.HashHelpers:GetFastModMultiplier(uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data lr ; Total bytes of code 108 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov 2254: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex208_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] fp, sp G_M000_IG02: movn x1, #0 mov w0, w0 cmp x0, #0 beq G_M000_IG04 udiv x0, x1, x0 add x0, x0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 48 2255: JIT compiled System.Collections.HashHelpers:GetFastModMultiplier(uint) [Tier1, IL size=9, code size=48] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:InsertionSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 44 G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov w21, w1 mov x19, x2 G_M000_IG02: mov w22, wzr sub w23, w21, #1 cmp w23, #0 ble G_M000_IG08 G_M000_IG03: add w24, w22, #1 ubfiz x0, x24, #2, #32 add x0, x20, x0 ldrh w25, [x0] ldrh w26, [x0, #0x02] b G_M000_IG05 G_M000_IG04: add w0, w22, #1 cmp w0, w21 bhs G_M000_IG09 ubfiz x0, x0, #2, #32 add x0, x20, x0 ldr w1, [x27] str w1, [x0] sub w22, w22, #1 G_M000_IG05: tbnz w22, #31, G_M000_IG07 G_M000_IG06: strh w25, [fp, #0x10] strh w26, [fp, #0x12] ldr x0, [x19, #0x08] ldr w1, [fp, #0x10] cmp w22, w21 bhs G_M000_IG09 ubfiz x2, x22, #2, #32 add x27, x20, x2 ldr w2, [x27] ldr x3, [x19, #0x18] blr x3 tbnz w0, #31, G_M000_IG04 G_M000_IG07: add w0, w22, #1 cmp w0, w21 bhs G_M000_IG09 ubfiz x0, x0, #2, #32 add x0, x20, x0 strh w25, [x0] strh w26, [x0, #0x02] sxtw w22, w24 cmp w22, w23 blt G_M000_IG03 G_M000_IG08: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 240 2256: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.ValueTuple`2[ushort,ushort]]:InsertionSort(System.Span`1[System.ValueTuple`2[ushort,ushort]],System.Comparison`1[System.ValueTuple`2[ushort,ushort]]) [Tier1 with Static PGO, IL size=116, code size=240] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Slice(int,int):System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 G_M000_IG01: add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 stp ldrh fp, lr, [sp, #-0x10]!w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 mov movz x2, #0xD1FFAB1E LSL #16 fp, sp movk x2, # 0xD1FFAB1E LSL #48 G_M000_IG02: lsl x2, x2, x0 mov sub x0, x0, #64 w1, w1 and add x0 , x2, x0 x3, tbnz x1, w2, UXTW x0 , #63, G_M000_IG08 ldr sxtw w24 , w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: w4 b , G_M000_IG03 [ G_M000_IG08: x0 add w0, w20, w24 , str #w0, [x19, #0x4C] 0x08 mov w0, #1] G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 cmp x3, x4 bhi G_M000_IG04 ldr x0, [x0] mov x3, #40 mul x1, x1, x3 add x0, x0, x1 sxtw w1, w2 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 80 2258: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:Slice(int,int) [Tier1, IL size=39, code size=80] 2257: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(byref,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str x1, [x0] str w2, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 2259: JIT compiled System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:.ctor(byref,int) [Tier1, IL size=15, code size=24] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:InsertionSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x88] stp x21, x22, [sp, #0x98] stp x23, x24, [sp, #0xA8] str x25, [sp, #0xB8] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp xzr, xzr, [x9, #0x60] str xzr, [x9, #0x70] mov x20, x0 mov w21, w1 mov x19, x2 G_M000_IG02: mov w22, wzr sub w23, w21, #1 cmp w23, #0 ble G_M000_IG13 G_M000_IG03: add w24, w22, #1 mov w0, #40 umull x0, w24, w0 add x0, x20, x0 G_M000_IG04: ldp q16, q17, [x0] stp q16, q17, [fp, #0x60] ldr x1, [x0, #0x20] str x1, [fp, #0x80] G_M000_IG05: b G_M000_IG07 G_M000_IG06: add w0, w22, #1 cmp w0, w21 bhs G_M000_IG14 mov w13, #40 umull x13, w0, w13 add x14, x20, x13 mov x13, x25 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 sub w22, w22, #1 G_M000_IG07: tbnz w22, #31, G_M000_IG12 G_M000_IG08: add x0, fp, #40 ldr x1, [x0, #0x38] str x1, [fp, #0x38] ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG09: cmp w22, w21 bhs G_M000_IG14 mov w0, #40 umull x0, w22, w0 add x25, x20, x0 G_M000_IG10: ldp q16, q17, [x25] stp q16, q17, [fp, #0x10] ldr x0, [x25, #0x20] str x0, [fp, #0x30] G_M000_IG11: ldr x0, [x19, #0x08] add x1, fp, #56 add x2, fp, #16 ldr x3, [x19, #0x18] blr x3 tbnz w0, #31, G_M000_IG06 G_M000_IG12: add w0, w22, #1 cmp w0, w21 bhs G_M000_IG14 mov w14, #40 umull x14, w0, w14 add x14, x20, x14 add x13, fp, #96 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 sxtw w22, w24 cmp w22, w23 blt G_M000_IG03 G_M000_IG13: ldr x25, [sp, #0xB8] ldp x23, x24, [sp, #0xA8] ldp x21, x22, [sp, #0x98] ldp x19, x20, [sp, #0x88] ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 344 2260: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:InsertionSort(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=116, code size=344] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Globalization.CultureInfo:get_CurrentCulture():System.Globalization.CultureInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! G_M000_IG01: stp stp x19, x20, [sp, #0x28] fp, lr, [sp, #-0x10]! str mov x21, [sp, #0x38] fp, sp mov fp, sp G_M000_IG02: str xzr, [fp, #0x18] movz x0, #0xD1FFAB1E str xzr, [fp, #0x20] mov x19, x0 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG02: ldr mov w1, #0xD1FFAB1E w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 bl CORINFO_HELP_GETSHARED_GCTHREADSTATIC_BASE_NOCTOR G_M000_IG04: sub ldr w1, w2, w20 x0, [x0, #0x08] str cbnz x0, G_M000_IG05 x0, [fp, #0x18] str w1, [fp, #0x20] G_M000_IG03: add x0, fp, #24 movz x1, #0xD1FFAB1E ldr x1, [x0] movk x1, #0xD1FFAB1E LSL #16 ldr w0, [x0, #0x08] movk x1, #0xD1FFAB1E LSL #32 cmp w0, #2 ldar blt G_M000_IG11 x0, [x1] cbnz x0, G_M000_IG05 G_M000_IG05: sub x0, x1, #32 ldr ldar x0, [x0]w0, [x1] movz w1, #66 cbnz x0, G_M000_IG05 movk w1, #89 LSL #16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 cmp w0, w1 movk x0, #0xD1FFAB1E LSL #32 bne G_M000_IG11 ldr x0, [x0] G_M000_IG06: G_M000_IG04: add w0, w20, #2 ldp cmp w0, w2 fp, lr, [sp], #0x10 bhi G_M000_IG13 br x0 G_M000_IG07: G_M000_IG05: str ldp fp, lr, [sp], #0x10 w0, [x19, #0x4C] ret lr sxtw w21, w0 ; Total bytes of code 100 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov 2261: JIT compiled System.Globalization.CultureInfo:get_CurrentCulture() [Tier1, IL size=37, code size=100] w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2262: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex208_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:.ctor(System.String,int,System.Globalization.CultureInfo,System.Collections.Hashtable,int,System.Collections.Hashtable,System.Span`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp G_M000_IG02: add x14, x0, #40 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w2, [x0, #0x70] add x14, x0, #48 mov x15, x3 bl CORINFO_HELP_CHECKED_ASSIGN_REF str wzr, [x0, #0x5C] strb wzr, [x0, #0x74] add x14, x0, #56 mov x15, x4 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w5, [x0, #0x6C] add x14, x0, #64 mov x15, x6 bl CORINFO_HELP_CHECKED_ASSIGN_REF stp xzr, xzr, [fp, #0x10] stp xzr, xzr, [fp, #0x20] ldr x13, [fp, #0x30] str x13, [fp, #0x20] ldr w13, [fp, #0x38] str w13, [fp, #0x28] add x14, x0, #120 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] str xzr, [x0, #0x20] str wzr, [x0, #0x58] str xzr, [x0, #0x60] str wzr, [x0, #0x68] stp xzr, xzr, [x0, #0x48] strb wzr, [x0, #0x75] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 2263: JIT compiled System.Text.RegularExpressions.RegexParser:.ctor(System.String,int,System.Globalization.CultureInfo,System.Collections.Hashtable,int,System.Collections.Hashtable,System.Span`1[int]) [Tier1, IL size=157, code size=168] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[int]:.ctor(System.Span`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x3, x0, #16 str x1, [x3] str w2, [x3, #0x08] str xzr, [x0] str wzr, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 2264: JIT compiled System.Collections.Generic.ValueListBuilder`1[int]:.ctor(System.Span`1[int]) [Tier1, IL size=22, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Unit():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2265: JIT compiled System.Text.RegularExpressions.RegexParser:Unit() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.ValueStringBuilder:Append(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x1, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: ldr w2, [x0, #0x08] ldr w3, [x1, #0x08] cmp w3, #1 bne G_M000_IG06 ldr w3, [x0, #0x18] cmp w2, w3 bhs G_M000_IG06 add x3, x0, #16 ldr w4, [x3, #0x08] cmp w2, w4 bhs G_M000_IG08 ldr x3, [x3] ubfiz x4, x2, #1, #32 add x3, x3, x4 ldrh w1, [x1, #0x0C] strh w1, [x3] add w1, w2, #1 str w1, [x0, #0x08] G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG07: ldp fp, lr, [sp], #0x10 br x2 G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 132 2266: JIT compiled System.Text.ValueStringBuilder:Append(System.String) [Tier1, IL size=72, code size=132] ; Assembly listing for method System.Text.ValueStringBuilder:AppendSlow(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w21, [x19, #0x08] ldr w1, [x19, #0x18] ldr w22, [x20, #0x08] sub w1, w1, w22 cmp w1, w21 bge G_M000_IG04 G_M000_IG03: mov w1, w22 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: add x2, x19, #16 ldr w0, [x2, #0x08] cmp w21, w0 bhi G_M000_IG06 ldr x2, [x2] ubfiz x1, x21, #1, #32 add x2, x2, x1 sub w0, w0, w21 str x2, [fp, #0x18] cmp w22, w0 bhi G_M000_IG07 add x1, x20, #12 mov w0, w22 lsl x2, x0, #1 ldr x0, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x08] add w0, w0, w22 str w0, [x19, #0x08] G_M000_IG05: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 232 2267: JIT compiled System.Text.ValueStringBuilder:AppendSlow(System.String) [Tier1, IL size=78, code size=232] ; Assembly listing for method System.String:CopyTo(System.Span`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp w3, w2 bhi G_M000_IG04 add x4, x0, #12 mov w2, w3 lsl x2, x2, #1 mov x0, x1 mov x1, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 92 2268: JIT compiled System.String:CopyTo(System.Span`1[ushort]) [Tier1, IL size=47, code size=92] ; Assembly listing for method System.Text.RegularExpressions.Regex:get_RightToLeft():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x40] tst w0, #64 cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2269: JIT compiled System.Text.RegularExpressions.Regex:get_RightToLeft() [Tier1, IL size=13, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_M(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2270: JIT compiled System.Text.RegularExpressions.RegexNode:set_M(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_N(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2271: JIT compiled System.Text.RegularExpressions.RegexNode:set_N(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Buffers.ArrayPool`1[ushort]:get_Shared():System.Buffers.ArrayPool`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 2272: JIT compiled System.Buffers.ArrayPool`1[ushort]:get_Shared() [Tier1, IL size=6, code size=32] ; Assembly listing for method System.Array:Clear(System.Array) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG09 ldr x1, [x0] ldrh w2, [x1] ldr w3, [x0, #0x08] umull x3, w2, w3 add x2, x0, #8 ldr x0, [x0] ldr w0, [x0, #0x04] sub x0, x0, #16 add x0, x2, x0 ldr w1, [x1] tbnz w1, #24, G_M000_IG07 G_M000_IG03: cbz x3, G_M000_IG04 cmp x3, #0xD1FFAB1E bhi G_M000_IG05 mov w1, wzr mov w2, w3 bl CORINFO_HELP_MEMSET G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov x1, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 G_M000_IG07: lsr x1, x3, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG08: ldp fp, lr, [sp], #0x10 br x2 G_M000_IG09: mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 172 2273: JIT compiled System.Array:Clear(System.Array) [Tier1, IL size=74, code size=172] ; Assembly listing for method System.Reflection.Emit.DynamicResolver:Finalize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp add x1, sp, #48 str x1, [fp, #0x18] str x0, [fp, #0x10] G_M000_IG02: ldr x1, [x0, #0x18] cmp x1, #0 cset x2, eq cbnz w2, G_M000_IG05 ldr x19, [x1, #0x10] cbz x19, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST mov x20, x0 G_M000_IG04: mov x0, x19 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [x20, #0x08] G_M000_IG05: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: b G_M000_IG05 G_M000_IG07: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] add x3, fp, #48 str x3, [sp, #0x18] G_M000_IG08: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 adr x0, [G_M000_IG06] G_M000_IG09: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 168 2274: JIT compiled System.Reflection.Emit.DynamicResolver:Finalize() [Tier1, IL size=73, code size=168] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:set_Ch(ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strh w1, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2275: JIT compiled System.Text.RegularExpressions.RegexNode:set_Ch(ushort) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_M():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2276: JIT compiled System.Text.RegularExpressions.RegexNode:get_M() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_N():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2277: JIT compiled System.Text.RegularExpressions.RegexNode:get_N() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsOneFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex209_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x2E] cmp w0, #6 bhi G_M000_IG04 G_M000_IG03: cmp w0, #3 ccmp w0, #6, z, ne G_M000_IG01: beq G_M000_IG05 b G_M000_IG06 stp G_M000_IG04: fp, lr, [sp mov w1, #43 , #-0x30]! cmp w0, #9 ccmp w0, w1, z, ne stp bne G_M000_IG06 x19, x20, G_M000_IG05: [sp, #0x18] mov w0, #1 str b G_M000_IG07 x21, G_M000_IG06: [sp, #0x28] mov w0, wzr G_M000_IG07: mov ldp fpfp, lr, [sp], #0x10 , sp ret lr mov ; Total bytes of code 72 x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: 2278: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsOneFamily() [Tier1, IL size=39, code size=72] mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2279: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex209_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Buffer:_BulkMoveWithWriteBarrier(byref,byref,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 78 G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: cmp x20, x19 beq G_M000_IG06 sub x0, x19, x20 cmp x0, x21 blo G_M000_IG07 G_M000_IG03: sub x21, x21, #4, LSL #12 mov x0, x19 mov x1, x20 mov x2, #0xD1FFAB1E bl System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) add x19, x19, #4, LSL #12 add x20, x20, #4, LSL #12 cmp x21, #4, LSL #12 bhi G_M000_IG03 G_M000_IG04: mov x0, x19 mov x1, x20 mov x2, x21 bl System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: sub x21, x21, #4, LSL #12 add x0, x19, x21 add x1, x20, x21 mov x2, #0xD1FFAB1E bl System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) cmp x21, #4, LSL #12 bhi G_M000_IG07 b G_M000_IG04 ; Total bytes of code 164 2280: JIT compiled System.Buffer:_BulkMoveWithWriteBarrier(byref,byref,ulong) [Tier1 with Static PGO, IL size=135, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Reflection.Emit.DynamicResolver+DestroyScout:Finalize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] G_M000_IG01: mov w0, wzr G_M000_IG04: stp ldr x21, [sp, #0x28] fp, lr, [sp, #-0xB0]! ldp x19, x20, [sp, #0x18] stp ldp fp, lr, [sp], #0x30 x19, x20, [sp, #0x60] ret lr stp x21, x22, G_M000_IG05: [sp, #0x70] cmp w20, w21 stp x23, x24, [sp, #0x80] bhi G_M000_IG07 stp x25, x26, [sp, #0x90] ubfiz x0, x20, #1, #32 stp x27, x28, [sp, #0xA0] add x0, x1, x0 mov sub w2, w21, w20 fp, sp mov w1, #60 mov x19, x0 movz x3, #0xD1FFAB1E G_M000_IG02: movk x3, #0xD1FFAB1E LSL #16 add movk x3, #0xD1FFAB1E LSL #32 x0, fp, #32 mov x1, x12 ldr x3, [x3] blr x3 bl tbnz w0, #31, G_M000_IG03 CORINFO_HELP_INIT_PINVOKE_FRAME add w0, w20, w0 mov x20, x0 str mov w0, [x19, #0x4C] x0, sp mov w0, #1 str x0, [fp, #0x40] G_M000_IG06: mov x0, fp ldr x21, [sp, #0x28] str x0, [fp, #0x50] ldp x19, x20, [sp, #0x18] ldr x0, [x19, #0x08] ldp fp, lr, [sp], #0x30 cbz x0, G_M000_IG09 ret lr G_M000_IG03: G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk bl x0, #0xD1FFAB1E LSL #32 ldr System.RuntimeMethodHandle:GetResolver(long):System.Resolver x0, [x0] cbz x0, G_M000_IG04 blr x0 mov x0, x19 brk_windows #0 ; Total bytes of code 164 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 2281: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] b G_M000_IG09 G_M000_IG04: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x30] adr x1, [G_M000_IG07] str x1, [fp, #0x48] add x1, fp, #32 str x1, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG06: blr x1 G_M000_IG07: mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG08 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG08: ldr x0, [fp, #0x28] str x0, [x20, #0x10] G_M000_IG09: ldp x27, x28, [sp, #0xA0] ldp x25, x26, [sp, #0x90] ldp x23, x24, [sp, #0x80] ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 236 2282: JIT compiled System.Reflection.Emit.DynamicResolver+DestroyScout:Finalize() [Tier1, IL size=57, code size=236] ; Assembly listing for method System.Text.RegularExpressions.Regex:.ctor(System.String,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movn x3, #0xD1FFAB1E mov x4, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x5 ; Total bytes of code 40 2283: JIT compiled System.Text.RegularExpressions.Regex:.ctor(System.String,int) [Tier1, IL size=15, code size=40] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 ; Assembly listing for method System.Text.RegularExpressions.Regex:.ctor(System.String,int,System.TimeSpan,System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG06: ; 0 inlinees with PGO data; 8 single block inlinees; 3 inlinees without PGO data ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: G_M000_IG01: stp fp, lr, [sp, #-0x40]! bl stp CORINFO_HELP_RNGCHKFAIL x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] brk_windows str #0 x23, [sp, #0x38] mov ; Total bytes of code 372 fp, sp mov x19, x0 mov x21, x1 mov w20, w2 mov x23, x3 mov x22, x4 G_M000_IG02: cbz x21, G_M000_IG11 mov w0, w20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 2284: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex209_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ldr x1, [x1] blr x1 mov x0, x23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF str w20, [x19, #0x40] str x23, [x19, #0x48] cbnz x22, G_M000_IG05 G_M000_IG03: tbnz w20, #9, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x22, x0 b G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x22, [x0] G_M000_IG05: mov x0, x21 mov w1, w20 mov x2, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x22, x0 ldr x15, [x22, #0x28] add x14, x19, #32 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x22, #0x20] add x14, x19, #40 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x22, #0x30] add x14, x19, #24 bl CORINFO_HELP_ASSIGN_REF ldr w0, [x22, #0x3C] str w0, [x19, #0x44] tbz w20, #10, G_M000_IG08 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 mov x1, x22 mov w2, w20 mov x3, x23 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add x14, x19, #16 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: tbz w20, #3, G_M000_IG09 movn x3, #0xD1FFAB1E cmp x23, x3 cset x3, ne mov x0, x21 mov x1, x22 mov w2, w20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldr x0, [x19, #0x10] cbnz x0, G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 ldr x15, [x22, #0x18] add x14, x20, #16 bl CORINFO_HELP_ASSIGN_REF mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG10: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 528 2285: JIT compiled System.Text.RegularExpressions.Regex:.ctor(System.String,int,System.TimeSpan,System.Globalization.CultureInfo) [Tier1, IL size=118, code size=528] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidatePattern(System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 48 2286: JIT compiled System.Text.RegularExpressions.Regex:ValidatePattern(System.String) [Tier1, IL size=11, code size=48] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidateOptions(int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: lsr w1, w0, #11 cbnz w1, G_M000_IG07 tbz w0, #8, G_M000_IG04 G_M000_IG03: movn w1, #0xD1FFAB1E tst w0, w1 bne G_M000_IG07 G_M000_IG04: tbz w0, #10, G_M000_IG06 G_M000_IG05: mov w1, #0xD1FFAB1E tst w0, w1 bne G_M000_IG07 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w0, #11 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 84 2287: JIT compiled System.Text.RegularExpressions.Regex:ValidateOptions(int) [Tier1, IL size=50, code size=84] ; Assembly listing for method System.Text.RegularExpressions.Regex:ValidateMatchTimeout(System.TimeSpan) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movn x1, #0xD1FFAB1E cmp x0, x1 beq G_M000_IG04 G_M000_IG03: sub x0, x0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bhs G_M000_IG05 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 80 2288: JIT compiled System.Text.RegularExpressions.Regex:ValidateMatchTimeout(System.TimeSpan) [Tier1, IL size=40, code size=80] ; Assembly listing for method System.TimeSpan:get_Ticks():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2289: JIT compiled System.TimeSpan:get_Ticks() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.Regex:Init(System.String,int,System.TimeSpan,byref):System.Text.RegularExpressions.RegexTree:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x22, x1 mov w21, w2 mov x20, x4 G_M000_IG02: add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF str w21, [x19, #0x40] str x3, [x19, #0x48] ldr x0, [x20] cbnz x0, G_M000_IG06 G_M000_IG03: tbnz w21, #9, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG05: mov x14, x20 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG06: ldr x2, [x20] mov x0, x22 mov w1, w21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [x0, #0x28] add x14, x19, #32 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x0, #0x20] add x14, x19, #40 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x0, #0x30] add x14, x19, #24 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x0, #0x3C] str w1, [x19, #0x44] G_M000_IG07: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 208 2290: JIT compiled System.Text.RegularExpressions.Regex:Init(System.String,int,System.TimeSpan,byref) [Tier1, IL size=96, code size=208] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:GetTargetCulture(int):System.Globalization.CultureInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: tbnz w0, #9, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x10 br x0 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 60 2291: JIT compiled System.Text.RegularExpressions.RegexParser:GetTargetCulture(int) [Tier1, IL size=21, code size=60] ; Assembly listing for method System.Collections.Hashtable:.ctor(int,float):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: tbnz w20, #31, G_M000_IG07 ldr s16, [@RWD00] fcmp s0, s16 blt G_M000_IG08 fmov s16, #1.0000 fcmp s0, s16 bhi G_M000_IG08 ldr s16, [@RWD04] fmul s16, s0, s16 str s16, [x19, #0x34] scvtf s16, w20 ldr s17, [x19, #0x34] fdiv s16, s16, s17 fcvt d16, s16 ldr d17, [@RWD08] fcmp d16, d17 bgt G_M000_IG09 fmov d17, #3.0000 fcmp d16, d17 bgt G_M000_IG04 G_M000_IG03: mov w20, #3 b G_M000_IG05 G_M000_IG04: fcvtzs w0, d16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 G_M000_IG05: sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr s16, [x19, #0x34] scvtf s17, w20 fmul s16, s16, s17 fcvtzs w0, s16 str w0, [x19, #0x30] dmb ish strb wzr, [x19, #0x3C] G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG09: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 RWD00 dd 3DCCCCCDh ; 0.1 RWD04 dd 3F3851ECh ; 0.72 RWD08 dq 41DFFFFFFFC00000h ; 2.14748365e+09 ; Total bytes of code 480 2292: JIT compiled System.Collections.Hashtable:.ctor(int,float) [Tier1, IL size=162, code size=480] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex210_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2293: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex210_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2294: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2295: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex210_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:CountCaptures(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 34 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x22, x0 str wzr, [x22, #0x08] ldr x0, [x19, #0x38] mov x1, x22 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 G_M000_IG03: mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x38] str wzr, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x22 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w0, [x19, #0x64] add w0, w0, #1 str w0, [x19, #0x64] ldr w0, [x19, #0x68] cmp w0, #0 bgt G_M000_IG04 mov w0, #1 str w0, [x19, #0x68] G_M000_IG04: str wzr, [x20] mov w0, #1 str w0, [x19, #0x60] ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w1, [x19, #0x58] sub w0, w0, w1 cmp w0, #0 ble G_M000_IG28 G_M000_IG05: ldr w0, [x19, #0x58] sxtw w22, w0 ldr x1, [x19, #0x28] add w2, w0, #1 str w2, [x19, #0x58] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG30 add x1, x1, #12 ldrh w23, [x1, w0, UXTW #2] cmp w23, #40 bhi G_M000_IG07 G_M000_IG06: cmp w23, #35 beq G_M000_IG08 cmp w23, #40 bne G_M000_IG27 ldr x24, [x19, #0x28] ldr w0, [x24, #0x08] ldr w25, [x19, #0x58] sub w0, w0, w25 cmp w0, #2 blt G_M000_IG12 b G_M000_IG11 G_M000_IG07: cmp w23, #41 beq G_M000_IG10 cmp w23, #91 beq G_M000_IG09 cmp w23, #92 bne G_M000_IG27 ldr x24, [x19, #0x28] ldr w0, [x24, #0x08] ldr w25, [x19, #0x58] sub w0, w0, w25 cmp w0, #0 ble G_M000_IG27 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG27 G_M000_IG08: ldr w0, [x19, #0x70] tbz w0, #5, G_M000_IG27 ldr w25, [x19, #0x58] sub w0, w25, #1 str w0, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG27 G_M000_IG09: mov x0, x19 mov w1, wzr mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG27 G_M000_IG10: ldr w0, [x19, #0x80] cbz w0, G_M000_IG27 add x0, x19, #120 ldr w1, [x0, #0x08] sub w1, w1, #1 str w1, [x0, #0x08] ldr w1, [x0, #0x08] add x0, x0, #16 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 ldr x0, [x0] ldr w0, [x0, w1, UXTW #2] str w0, [x19, #0x70] b G_M000_IG27 G_M000_IG11: add w0, w25, #1 ldr w1, [x24, #0x08] cmp w0, w1 bhs G_M000_IG30 add x2, x24, #12 ldrh w0, [x2, w0, UXTW #2] cmp w0, #35 bne G_M000_IG12 sxtw w0, w25 cmp w0, w1 bhs G_M000_IG30 ldrh w0, [x2, w0, UXTW #2] cmp w0, #63 bne G_M000_IG12 sub w0, w25, #1 str w0, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG26 G_M000_IG12: add x0, x19, #120 ldr w1, [x19, #0x70] ldr w2, [x0, #0x08] add x3, x0, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 bhs G_M000_IG13 str w1, [x4, w2, UXTW #2] add w1, w2, #1 str w1, [x0, #0x08] b G_M000_IG14 G_M000_IG13: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG24 sxtw w1, w2 ldr w3, [x0, #0x08] cmp w1, w3 bhs G_M000_IG30 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #63 bne G_M000_IG24 add w0, w2, #1 str w0, [x19, #0x58] ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #1 ble G_M000_IG22 sxtw w1, w2 ldr w3, [x0, #0x08] cmp w1, w3 bhs G_M000_IG30 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #60 beq G_M000_IG15 cmp w0, #39 bne G_M000_IG22 G_M000_IG15: add w0, w2, #1 str w0, [x19, #0x58] ldr x0, [x19, #0x28] ldr w1, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG30 add x0, x0, #12 ldrh w23, [x0, w1, UXTW #2] cmp w23, #48 beq G_M000_IG26 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 asr w24, w23, #3 cmp w24, #16 blo G_M000_IG16 mov w0, w23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, #1 lsl w0, w1, w0 movz w1, #0xD1FFAB1E movk w1, #4 LSL #16 tst w0, w1 bne G_M000_IG18 mov w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w23, w0 ccmp w23, w1, z, ne cset x0, eq b G_M000_IG17 G_M000_IG16: ldrb w0, [x1, w24, UXTW #2] and w1, w23, #7 mov w2, #1 lsl w1, w2, w1 tst w0, w1 beq G_M000_IG26 b G_M000_IG18 G_M000_IG17: cbz w0, G_M000_IG26 G_M000_IG18: sub w0, w23, #49 cmp w0, #8 bhi G_M000_IG21 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w23, w0 mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x24, x0 str w23, [x24, #0x08] ldr x0, [x19, #0x38] mov x1, x24 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG26 mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x38] str w22, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x24 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w0, [x19, #0x64] add w0, w0, #1 str w0, [x19, #0x64] ldr w0, [x19, #0x68] cmp w0, w23 bgt G_M000_IG26 movn w0, #0xD1FFAB1E LSL #16 cmp w23, w0 beq G_M000_IG19 add w0, w23, #1 b G_M000_IG20 G_M000_IG19: movn w0, #0xD1FFAB1E LSL #16 G_M000_IG20: str w0, [x19, #0x68] b G_M000_IG26 G_M000_IG21: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x19 mov w2, w22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG26 G_M000_IG22: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [x20] ldr w1, [x19, #0x70] orr w0, w0, w1 str w0, [x20] ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG26 sxtw w1, w2 ldr w3, [x0, #0x08] cmp w1, w3 bhs G_M000_IG30 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #41 bne G_M000_IG23 add w0, w2, #1 str w0, [x19, #0x58] add x0, x19, #120 ldr w1, [x0, #0x08] sub w1, w1, #1 str w1, [x0, #0x08] b G_M000_IG26 G_M000_IG23: cmp w0, #40 bne G_M000_IG26 mov w0, #1 strb w0, [x19, #0x75] b G_M000_IG27 G_M000_IG24: ldr w0, [x19, #0x70] tbnz w0, #2, G_M000_IG26 ldrb w0, [x19, #0x75] cbnz w0, G_M000_IG26 ldr w23, [x19, #0x60] add w0, w23, #1 str w0, [x19, #0x60] mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x24, x0 str w23, [x24, #0x08] ldr x0, [x19, #0x38] mov x1, x24 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG26 mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x38] str w22, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x24 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w0, [x19, #0x64] add w0, w0, #1 str w0, [x19, #0x64] ldr w0, [x19, #0x68] cmp w0, w23 bgt G_M000_IG26 movn w0, #0xD1FFAB1E LSL #16 cmp w23, w0 beq G_M000_IG25 add w23, w23, #1 b G_M000_IG25 G_M000_IG25: str w23, [x19, #0x68] G_M000_IG26: strb wzr, [x19, #0x75] G_M000_IG27: ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w1, [x19, #0x58] sub w0, w0, w1 cmp w0, #0 bgt G_M000_IG05 G_M000_IG28: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG29: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:WorkloadActualStop(long):this G_M000_IG30: ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1612 G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #16 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr 2296: JIT compiled System.Text.RegularExpressions.RegexParser:CountCaptures(byref) [Tier1, IL size=481, code size=1612] x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 2297: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:WorkloadActualStop(long) [Tier0, IL size=10, code size=56] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:Calculate(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int):BenchmarkDotNet.Mathematics.MeasurementsStatistics ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #0xD1FFAB1E add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] str x8, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xC8] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0xC0] ldr x1, [fp, #0xC0] ldr x0, [fp, #0xC8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xC8] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] scvtf d16, w0 fdiv d0, d0, d16 str d0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0xB8] ldr d0, [fp, #0xB8] bl System.Math:Sqrt(double):double str d0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] scvtf d0, w0 bl System.Math:Sqrt(double):double ldr d1, [fp, #0xD1FFAB1E] fdiv d0, d1, d0 str d0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w2, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w1, [fp, #0xD1FFAB1E] cbnz w1, G_M000_IG06 movi v0.16b, #0 stp q0, q0, [fp, #0xD0] stp q0, q0, [fp, #0xF0] str xzr, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] str d0, [fp, #0x78] ldr d0, [fp, #0xD1FFAB1E] str d0, [fp, #0x70] ldp q0, q1, [fp, #0xD1FFAB1E] stp q0, q1, [fp, #0x80] ldr q0, [fp, #0xD1FFAB1E] str q0, [fp, #0xA0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xB0] ldr d0, [fp, #0x78] ldr d1, [fp, #0x70] add x1, fp, #128 add x0, fp, #208 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldp q16, q17, [fp, #0xD0] stp q16, q17, [x0] ldp q16, q17, [fp, #0xF0] stp q16, q17, [x0, #0x20] ldr x1, [fp, #0xD1FFAB1E] str x1, [x0, #0x40] G_M000_IG05: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w8, [fp, #0xD1FFAB1E] cmp w8, #1 bne G_M000_IG07 add x8, fp, #0xD1FFAB1E ldr x0, [fp, #0xD1FFAB1E] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xD1FFAB1E] ldr d16, [fp, #0xD1FFAB1E] str d16, [fp, #0xD1FFAB1E] ldr d16, [fp, #0xD1FFAB1E] str d16, [fp, #0xD1FFAB1E] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] lsr w1, w1, #31 ldr w0, [fp, #0x14] add w1, w1, w0 asr w1, w1, #1 str w1, [fp, #0x6C] ldr w1, [fp, #0x6C] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w1, #3 mul w1, w0, w1 str w1, [fp, #0x10] ldr w1, [fp, #0x10] lsr w1, w1, #31 ldr w0, [fp, #0x10] add w1, w1, w0 asr w1, w1, #1 str w1, [fp, #0x68] ldr w1, [fp, #0x68] ldr x0, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0xD1FFAB1E] G_M000_IG08: ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] fsub d0, d0, d1 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] fmov d16, #1.5000 fmul d1, d1, d16 fsub d0, d0, d1 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] fmov d16, #1.5000 fmul d1, d1, d16 fadd d0, d0, d1 str d0, [fp, #0xD1FFAB1E] add x2, fp, #0xD1FFAB1E add x3, fp, #0xD1FFAB1E ldr w0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr d0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] scvtf d1, w0 fdiv d0, d0, d1 str d0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w2, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] ldr d2, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str d0, [fp, #0x60] ldr d0, [fp, #0x60] bl System.Math:Sqrt(double):double str d0, [fp, #0xD1FFAB1E] ldr w0, [fp, #0xD1FFAB1E] scvtf d0, w0 bl System.Math:Sqrt(double):double ldr d1, [fp, #0xD1FFAB1E] fdiv d0, d1, d0 str d0, [fp, #0xD1FFAB1E] add x0, fp, #0xD1FFAB1E ldr d0, [fp, #0xD1FFAB1E] ldr d1, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] mov w2, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movi v0.16b, #0 stp q0, q0, [fp, #0xD1FFAB1E] stp q0, q0, [fp, #0xD1FFAB1E] str xzr, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] str d0, [fp, #0x20] ldr d0, [fp, #0xD1FFAB1E] str d0, [fp, #0x18] G_M000_IG09: add x0, fp, #0xD1FFAB1E ldr x1, [x0, #0x28] str x1, [fp, #0x28] ldp q0, q1, [x0, #0x30] stp q0, q1, [fp, #0x30] ldr q0, [x0, #0x50] str q0, [fp, #0x50] G_M000_IG10: ldr d0, [fp, #0x20] ldr d1, [fp, #0x18] add x1, fp, #40 add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [x0] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [x0, #0x20] ldr x1, [fp, #0xD1FFAB1E] str x1, [x0, #0x40] G_M000_IG11: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr ; Total bytes of code 1188 2298: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:Calculate(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int) [Tier0, IL size=257, code size=1188] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:Sum(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] add x1, sp, #128 str x1, [fp, #0x78] str x0, [fp, #0x70] G_M000_IG02: str xzr, [fp, #0x68] add x8, fp, #56 ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w0, #0xD1FFAB1E str w0, [fp, #0x10] G_M000_IG03: b G_M000_IG05 G_M000_IG04: add x0, fp, #56 add x8, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x68] fadd d16, d0, d16 str d16, [fp, #0x68] G_M000_IG05: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #16 mov w1, #37 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0x78] bl G_M000_IG12 G_M000_IG09: nop G_M000_IG10: ldr d0, [fp, #0x68] G_M000_IG11: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG12: stp fp, lr, [sp, #-0x20]! add x3, fp, #128 str x3, [sp, #0x18] G_M000_IG13: add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 292 2299: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:Sum(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=64, code size=292] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:GetEnumerator():System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] str x8, [fp, #0x40] G_M000_IG02: add x0, fp, #16 ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x40] add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 104 2300: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:GetEnumerator() [Tier0, IL size=7, code size=104] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x18] str wzr, [x0, #0x08] ldr x0, [fp, #0x10] ldr w0, [x0, #0x14] ldr x1, [fp, #0x18] str w0, [x1, #0x0C] ldr x0, [fp, #0x18] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 2301: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=39, code size=72] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr w0, [x0, #0x0C] ldr x1, [fp, #0x10] ldr w1, [x1, #0x14] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] ldr x1, [fp, #0x10] ldr w1, [x1, #0x10] cmp w0, w1 bhs G_M000_IG04 ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x18] ldp q16, q17, [x0] stp q16, q17, [x1, #0x10] ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 196 2302: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNext() [Tier0, IL size=81, code size=196] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:get_Current():BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] ldp q16, q17, [x0, #0x10] stp q16, q17, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 2303: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:get_Current() [Tier0, IL size=7, code size=40] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNextRare():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x0C] ldr x1, [fp, #0x18] ldr x1, [x1] ldr w1, [x1, #0x14] cmp w0, w1 beq G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x18] ldr x0, [x0] ldr w0, [x0, #0x10] add w0, w0, #1 ldr x1, [fp, #0x18] str w0, [x1, #0x08] ldr x0, [fp, #0x18] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 2304: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNextRare() [Tier0, IL size=57, code size=108] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 2305: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:Dispose() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:Variance(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] add x2, sp, #160 str x2, [fp, #0x98] str x0, [fp, #0x90] str w1, [fp, #0x8C] str d0, [fp, #0x80] G_M000_IG02: mov w8, #0xD1FFAB1E str w8, [fp, #0x18] ldr w8, [fp, #0x8C] cmp w8, #1 bne G_M000_IG04 movi v0.16b, #0 G_M000_IG03: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG04: str xzr, [fp, #0x78] add x8, fp, #72 ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG05: b G_M000_IG07 G_M000_IG06: add x0, fp, #72 add x8, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x80] fsub d16, d0, d16 str d16, [fp, #0x20] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x80] fsub d16, d0, d16 ldr d17, [fp, #0x20] fmul d16, d16, d17 ldr w0, [fp, #0x8C] sub w0, w0, #1 scvtf d17, w0 fdiv d16, d16, d17 ldr d17, [fp, #0x78] fadd d16, d16, d17 str d16, [fp, #0x78] G_M000_IG07: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #24 mov w1, #68 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 b G_M000_IG10 G_M000_IG10: ldr x0, [fp, #0x98] bl G_M000_IG14 G_M000_IG11: nop G_M000_IG12: ldr d0, [fp, #0x78] G_M000_IG13: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG14: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG15: add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG16: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 392 2306: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:Variance(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int,double) [Tier0, IL size=95, code size=392] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceInterval:.ctor(double,double,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str w1, [fp, #0x34] str w2, [fp, #0x30] str d0, [fp, #0x40] str d1, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x48] ldr w1, [fp, #0x34] str w1, [x0] ldr x0, [fp, #0x48] ldr d16, [fp, #0x40] str d16, [x0, #0x08] ldr x0, [fp, #0x48] ldr d16, [fp, #0x38] str d16, [x0, #0x10] ldr x0, [fp, #0x48] ldr w1, [fp, #0x30] str w1, [x0, #0x18] ldr x0, [fp, #0x48] str x0, [fp, #0x28] ldr w0, [fp, #0x34] cmp w0, #2 ble G_M000_IG03 ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr w0, [fp, #0x30] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr d16, [fp, #0x38] fmul d16, d0, d16 str d16, [fp, #0x18] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr d16, [@RWD00] str d16, [fp, #0x18] G_M000_IG04: ldr x0, [fp, #0x20] ldr d16, [fp, #0x18] str d16, [x0, #0x20] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x40] fsub d16, d16, d0 ldr x0, [fp, #0x48] str d16, [x0, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x40] fadd d16, d0, d16 ldr x0, [fp, #0x48] str d16, [x0, #0x30] G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr RWD00 dq FFF8000000000000h ; -nan(ind) ; Total bytes of code 276 2307: JIT compiled Perfolizer.Mathematics.Common.ConfidenceInterval:.ctor(double,double,int,int) [Tier0, IL size=89, code size=276] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceInterval:get_Margin():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 2308: JIT compiled Perfolizer.Mathematics.Common.ConfidenceInterval:get_Margin() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Sort():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w2, [fp, #0x14] ldr x0, [fp, #0x18] mov w1, wzr mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 2309: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Sort() [Tier0, IL size=15, code size=84] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Sort(int,int,System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] str x3, [fp, #0x18] G_M000_IG02: ldr w0, [fp, #0x24] tbz w0, #31, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr w0, [fp, #0x20] tbz w0, #31, G_M000_IG04 mov w0, #27 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] ldr w1, [fp, #0x24] sub w0, w0, w1 ldr w1, [fp, #0x20] cmp w0, w1 bge G_M000_IG05 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr w0, [fp, #0x20] cmp w0, #1 ble G_M000_IG06 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w1, [fp, #0x24] ldr w2, [fp, #0x20] ldr x3, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG06: ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 220 2310: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Sort(int,int,System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=73, code size=220] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Item(int):BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x1C] str x8, [fp, #0x20] G_M000_IG02: ldr w0, [fp, #0x1C] ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] cmp w0, w1 blo G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x20] ldp q16, q17, [x0] stp q16, q17, [x1] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 120 2311: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Item(int) [Tier0, IL size=27, code size=120] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:SumWithoutOutliers(int,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],double,double,byref,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp add x9, fp, #40 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x4, sp, #176 str x4, [fp, #0xA8] str w0, [fp, #0xA4] str x1, [fp, #0x98] str x2, [fp, #0x80] str x3, [fp, #0x78] str d0, [fp, #0x90] str d1, [fp, #0x88] G_M000_IG02: ldr x8, [fp, #0x80] str xzr, [x8] ldr x8, [fp, #0x78] str wzr, [x8] add x8, fp, #72 ldr x0, [fp, #0x98] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov w0, #0xD1FFAB1E str w0, [fp, #0x18] G_M000_IG03: b G_M000_IG05 G_M000_IG04: add x0, fp, #72 add x8, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] ldr d0, [fp, #0x10] ldr w0, [fp, #0xA4] ldr d1, [fp, #0x90] ldr d2, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG05 ldr x0, [fp, #0x80] ldr d16, [x0] str d16, [fp, #0x20] add x0, fp, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x20] fadd d16, d0, d16 ldr x0, [fp, #0x80] str d16, [x0] ldr x0, [fp, #0x78] ldr w0, [x0] add w0, w0, #1 ldr x1, [fp, #0x78] str w0, [x1] G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #72 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0xA8] bl G_M000_IG11 G_M000_IG09: nop G_M000_IG10: ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG11: stp fp, lr, [sp, #-0x20]! add x3, fp, #176 str x3, [sp, #0x18] G_M000_IG12: add x0, fp, #72 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG13: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 420 2312: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:SumWithoutOutliers(int,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],double,double,byref,byref) [Tier0, IL size=98, code size=420] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:IsOutlier(int,double,double,double):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x10] str w0, [fp, #0x4C] str d0, [fp, #0x40] str d1, [fp, #0x38] str d2, [fp, #0x30] G_M000_IG02: ldr w0, [fp, #0x4C] cmp w0, #3 bhi G_M000_IG03 ldr w0, [fp, #0x4C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG13 G_M000_IG04: b G_M000_IG05 G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: ldr d16, [fp, #0x40] ldr d17, [fp, #0x30] fcmp d16, d17 cset x0, gt str w0, [fp, #0x1C] b G_M000_IG14 G_M000_IG08: ldr d16, [fp, #0x40] ldr d17, [fp, #0x38] fcmp d16, d17 cset x0, lo str w0, [fp, #0x1C] b G_M000_IG14 G_M000_IG09: ldr d16, [fp, #0x40] ldr d17, [fp, #0x38] fcmp d16, d17 blo G_M000_IG10 ldr d16, [fp, #0x40] ldr d17, [fp, #0x30] fcmp d16, d17 cset x0, gt str w0, [fp, #0x1C] b G_M000_IG14 G_M000_IG10: b G_M000_IG11 G_M000_IG11: mov w0, #1 G_M000_IG12: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr w1, [fp, #0x4C] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x2, [fp, #0x28] ldr x0, [fp, #0x20] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x20] bl CORINFO_HELP_THROW G_M000_IG14: ldr w0, [fp, #0x1C] uxtb w0, w0 G_M000_IG15: ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 ; Total bytes of code 336 2313: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:IsOutlier(int,double,double,double) [Tier0, IL size=65, code size=336] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:VarianceWithoutOutliers(int,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int,double,double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xC0]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] add x3, sp, #192 str x3, [fp, #0xB8] str w0, [fp, #0xB4] str x1, [fp, #0xA8] str w2, [fp, #0xA4] str d0, [fp, #0x98] str d1, [fp, #0x90] str d2, [fp, #0x88] G_M000_IG02: mov w8, #0xD1FFAB1E str w8, [fp, #0x20] ldr w8, [fp, #0xA4] cmp w8, #1 bne G_M000_IG04 movi v0.16b, #0 G_M000_IG03: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG04: str xzr, [fp, #0x80] add x8, fp, #80 ldr x0, [fp, #0xA8] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG05: b G_M000_IG07 G_M000_IG06: add x0, fp, #80 add x8, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d0, [fp, #0x18] ldr w0, [fp, #0xB4] ldr d1, [fp, #0x90] ldr d2, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG07 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x98] fsub d16, d0, d16 str d16, [fp, #0x28] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x98] fsub d16, d0, d16 ldr d17, [fp, #0x28] fmul d16, d16, d17 ldr w0, [fp, #0xA4] sub w0, w0, #1 scvtf d17, w0 fdiv d16, d16, d17 ldr d17, [fp, #0x80] fadd d16, d16, d17 str d16, [fp, #0x80] G_M000_IG07: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #32 mov w1, #87 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 b G_M000_IG10 G_M000_IG10: ldr x0, [fp, #0xB8] bl G_M000_IG14 G_M000_IG11: nop G_M000_IG12: ldr d0, [fp, #0x80] G_M000_IG13: ldp fp, lr, [sp], #0xC0 ret lr G_M000_IG14: stp fp, lr, [sp, #-0x20]! add x3, fp, #192 str x3, [sp, #0x18] G_M000_IG15: add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG16: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 472 2314: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:VarianceWithoutOutliers(int,System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int,double,double,double) [Tier0, IL size=114, code size=472] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:.ctor(double,double,Perfolizer.Mathematics.Common.ConfidenceInterval):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x10] str d0, [fp, #0x20] str d1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr d16, [fp, #0x20] str d16, [x0] ldr x0, [fp, #0x28] ldr d16, [fp, #0x18] str d16, [x0, #0x08] ldr x0, [fp, #0x10] ldr x1, [fp, #0x28] ldp q16, q17, [x0] stp q16, q17, [x1, #0x10] ldr q16, [x0, #0x20] str q16, [x1, #0x30] ldr x2, [x0, #0x30] str x2, [x1, #0x40] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 2315: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:.ctor(double,double,Perfolizer.Mathematics.Common.ConfidenceInterval) [Tier0, IL size=22, code size=88] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:get_ConfidenceInterval():Perfolizer.Mathematics.Common.ConfidenceInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] ldp q16, q17, [x0, #0x10] stp q16, q17, [x1] ldr q16, [x0, #0x30] str q16, [x1, #0x20] ldr x2, [x0, #0x40] str x2, [x1, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 2316: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:get_ConfidenceInterval() [Tier0, IL size=7, code size=56] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:get_Mean():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 2317: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:get_Mean() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Nullable`1[Perfolizer.Horology.TimeInterval]:get_HasValue():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 2318: JIT compiled System.Nullable`1[Perfolizer.Horology.TimeInterval]:get_HasValue() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex211_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2319: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex211_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2320: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2321: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex211_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex212_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2322: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex212_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2323: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2324: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex212_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex213_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2325: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex213_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2326: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2327: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex213_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex214_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2328: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex214_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2329: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2330: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex214_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex215_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2331: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex215_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2332: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2333: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex215_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex216_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2334: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex216_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2335: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2336: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex216_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex217_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2337: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex217_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2338: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2339: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex217_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex218_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2340: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex218_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2341: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2342: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex218_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex219_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2343: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex219_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2344: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2345: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex219_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex220_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2346: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex220_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2347: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2348: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex220_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex221_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2349: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex221_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2350: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2351: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex221_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex222_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2352: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex222_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2353: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2354: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex222_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex223_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2355: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex223_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2356: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2357: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex223_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex224_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2358: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex224_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2359: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2360: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex224_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex225_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2361: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex225_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2362: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2363: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex225_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex226_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2364: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex226_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2365: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2366: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex226_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex227_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2367: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex227_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2368: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2369: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex227_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex228_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2370: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex228_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2371: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2372: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex228_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex229_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2373: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex229_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2374: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2375: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex229_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex230_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2376: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex230_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2377: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2378: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex230_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex231_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2379: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex231_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2380: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2381: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex231_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex232_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2382: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex232_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2383: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2384: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex232_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex233_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2385: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex233_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2386: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2387: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex233_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex234_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2388: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex234_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2389: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2390: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex234_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex235_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2391: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex235_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2392: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2393: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex235_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex236_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2394: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex236_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2395: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2396: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex236_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex237_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2397: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex237_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2398: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2399: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex237_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex238_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2400: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex238_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2401: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2402: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex238_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex239_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2403: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex239_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2404: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2405: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex239_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex240_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2406: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex240_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2407: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2408: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex240_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex241_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2409: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex241_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2410: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2411: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex241_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex242_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2412: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex242_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2413: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2414: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex242_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex243_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2415: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex243_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2416: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2417: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex243_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex244_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2418: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex244_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2419: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2420: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex244_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex245_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2421: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex245_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2422: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2423: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex245_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex246_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2424: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex246_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2425: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2426: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex246_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex247_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2427: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex247_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2428: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2429: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex247_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex248_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2430: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex248_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2431: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2432: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex248_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex249_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2433: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex249_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2434: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2435: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex249_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex250_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2436: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex250_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2437: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2438: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex250_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex251_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2439: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex251_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2440: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2441: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex251_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex252_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2442: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex252_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2443: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2444: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex252_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex253_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2445: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex253_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2446: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2447: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex253_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex254_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2448: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex254_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2449: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2450: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex254_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex255_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2451: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex255_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2452: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2453: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex255_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex256_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2454: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex256_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2455: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2456: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex256_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex257_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2457: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex257_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2458: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2459: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex257_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex258_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2460: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex258_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2461: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2462: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex258_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex259_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2463: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex259_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2464: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2465: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex259_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:NoteCaptureSlot(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov w20, w1 mov w21, w2 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 str w20, [x22, #0x08] ldr x0, [x19, #0x38] mov x1, x22 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG06 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x38] str w21, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x22 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w0, [x19, #0x64] add w0, w0, #1 str w0, [x19, #0x64] ldr w0, [x19, #0x68] cmp w0, w20 bgt G_M000_IG06 movn w0, #0xD1FFAB1E LSL #16 cmp w20, w0 beq G_M000_IG04 add w0, w20, #1 b G_M000_IG05 G_M000_IG04: movn w0, #0xD1FFAB1E LSL #16 G_M000_IG05: str w0, [x19, #0x68] G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 200 2466: JIT compiled System.Text.RegularExpressions.RegexParser:NoteCaptureSlot(int,int) [Tier1, IL size=83, code size=200] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex260_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2467: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex260_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Collections.Hashtable:ContainsKey(System.Object):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 48267 ; 3 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: cbz x19, G_M000_IG30 ldr x21, [x20, #0x08] ldr w22, [x21, #0x08] sxtw w23, w22 ldr x0, [x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG13 G_M000_IG03: mov x0, x20 ldr x0, [x0, #0x20] cbnz x0, G_M000_IG14 G_M000_IG04: ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG12 G_M000_IG05: mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int G_M000_IG06: and w24, w0, #0xD1FFAB1E mov w0, #101 mul w0, w24, w0 sub w1, w23, #1 cmp w1, #0 beq G_M000_IG28 udiv w2, w0, w1 msub w0, w2, w1, w0 add w23, w0, #1 mov w25, wzr sxtw w0, w22 cmp w0, #0 beq G_M000_IG28 udiv w1, w24, w0 msub w26, w1, w0, w24 G_M000_IG07: cmp w26, w22 bhs G_M000_IG31 mov w0, #24 umull x0, w26, w0 add x0, x0, #16 add x0, x21, x0 ldr x1, [x0] ldr w27, [x0, #0x10] cbz x1, G_M000_IG26 G_M000_IG08: and w0, w27, #0xD1FFAB1E sxtw x0, w0 mov w2, w24 cmp x0, x2 bne G_M000_IG19 G_M000_IG09: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 bne G_M000_IG17 G_M000_IG10: mov x0, x20 str x1, [fp, #0x10] ldr x0, [x0, #0x08] cmp x0, x1 beq G_M000_IG19 G_M000_IG11: cmp x1, x19 beq G_M000_IG24 ldr x0, [x20, #0x20] cbz x0, G_M000_IG16 b G_M000_IG15 G_M000_IG12: mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x40] ldr x1, [x1, #0x18] blr x1 b G_M000_IG06 G_M000_IG13: mov x0, x20 mov x1, x19 ldr x2, [x20] ldr x2, [x2, #0x50] ldr x2, [x2] blr x2 b G_M000_IG06 G_M000_IG14: ldr x0, [x20, #0x20] mov x1, x19 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 b G_M000_IG06 G_M000_IG15: mov x2, x19 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 b G_M000_IG18 G_M000_IG16: ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool mov x0, x1 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data mov x1, x19 ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x10] blr x2 b G_M000_IG18 G_M000_IG17: mov x0, x20 mov x2, x19 ldr x3, [x20] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] blr x3 G_M000_IG18: cbnz w0, G_M000_IG24 G_M000_IG19: sxtw x0, w26 add x0, x0, w23, UXTW mov w2, w22 cmp x2, #0 beq G_M000_IG28 G_M000_IG01: cmn x2, #1 bne G_M000_IG20 stp cmp x0, #1 bvs G_M000_IG29 G_M000_IG20: fp, lr, [sp, #-0x50 ] sdiv x1, x0, x2 ! msub x26, x1, x2, x0 stp tbz w27x19, x20, [sp, #0x18] , #31, G_M000_IG22 stp x21, x22, [sp G_M000_IG21: , #0x28] add stp w25, w25, #1 cmp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] w22, w25 sxtw w21, w2 sub bgt G_M000_IG07 w0, w21, #8 G_M000_IG22: cmp mov w0, wzr w20, w0 G_M000_IG23: ble G_M000_IG05 ldr x27, [ G_M000_IG03: sp, #0x58] ldp x25, x26, [str w21, [x19, #0x4C] sp, mov w0, wzr #0x48] G_M000_IG04: ldp x23, x24, [sp, #0x38] ldr x25, [sp, #0x48] ldp ldp x21, x22, [sp, #0x28] x23, x24, [sp, #0x38] ldp x19, x20, [sp, #0x18] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ldp fp, lr, [sp], #0x60 ret ret lr lr G_M000_IG24: G_M000_IG05: mov w0, #1 cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 G_M000_IG25: add x22, x1, x0 ldr sub w23, w21, w20 x27, [sp, #0x58] mov ldp x25, x26, [sp, #0x48] w24, wzr sub w25, w23 ldp x23, x24, [sp, #0x38] , #7 ldp x21, x22, [sp, #0x28] cmp w25, #0 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ble G_M000_IG03 ret lr G_M000_IG26: mov w0, wzr G_M000_IG27: ldr x27, [sp, #0x58] G_M000_IG06: ldp x25, x26, [sp, #0x48] add ldp x23, x24, [sp, #0x38] w0, ldp x21, x22w24, #3, [sp, #0x28] cmp w0, w23 ldp x19, x20, [sp, #0x18] bhi G_M000_IG12 ldp fp, lr, [sp], #0x60 ubfiz x1, x0, #1, #32 ret lr add x1, x22, x1 G_M000_IG28: sub w3, w23, w0 bl mov x0, x1 CORINFO_HELP_THROWDIVZERO G_M000_IG29: mov w1, #97 bl CORINFO_HELP_OVERFLOW mov w2, #103 G_M000_IG30: movz x4, #0xD1FFAB1E movz w0, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL # movk16 w0, #1 LSL #16 movk x4, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E ldr movk x1, #0xD1FFAB1E LSL #16 x4, movk x1, #0xD1FFAB1E LSL #32 [x4] bl blr x4 CORINFO_HELP_STRCNS add w24, w24, w0 movz x1, #0xD1FFAB1E tbnz w0, #31, G_M000_IG03 movk x1, #0xD1FFAB1E LSL #16 add w1, w24, #6 movk x1, #0xD1FFAB1E LSL #32 cmp w1, w23 ldr bhs G_M000_IG03 x1, [x1] add w2, w24, #1 blr x1 brk_windows cmp w2, w23 #0 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] G_M000_IG31: mov w3, #116 bl CORINFO_HELP_RNGCHKFAIL cmp w0, #103 brk_windows # ccmp w0, w3, z, ne 0 ; Total bytes of code 692 bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] 2468: JIT compiled System.Collections.Hashtable:ContainsKey(System.Object) [Tier1 with Static PGO, IL size=138, code size=692] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2469: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Collections.Hashtable:Add(System.Object,System.Object):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x4 ; Total bytes of code 36 2470: JIT compiled System.Collections.Hashtable:Add(System.Object,System.Object) [Tier1, IL size=10, code size=36] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2471: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex260_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Collections.Hashtable:Insert(System.Object,System.Object,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 31516 ; 3 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 mov w22, w3 G_M000_IG02: cbz x20, G_M000_IG29 ldr w0, [x19, #0x28] ldr w23, [x19, #0x30] cmp w0, w23 bge G_M000_IG12 G_M000_IG03: ldr w0, [x19, #0x2C] cmp w0, w23 bgt G_M000_IG30 G_M000_IG04: ldr x0, [x19, #0x08] ldr w23, [x0, #0x08] ldr x0, [x19] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG26 G_M000_IG05: mov x0, x19 ldr x0, [x0, #0x20] cbnz x0, G_M000_IG09 G_M000_IG06: ldr x0, [x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG25 G_M000_IG07: mov x0, x20 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int G_M000_IG08: and w24, w0, #0xD1FFAB1E mov w14, #101 mul w14, w24, w14 sub w15, w23, #1 cmp w15, #0 beq G_M000_IG27 udiv w12, w14, w15 msub w14, w12, w15, w14 add w23, w14, #1 mov w25, wzr movn w26, #0 ldr x14, [x19, #0x08] ldr w14, [x14, #0x08] cmp w14, #0 beq G_M000_IG27 udiv w15, w24, w14 msub w27, w15, w14, w24 b G_M000_IG13 G_M000_IG09: ldr x0, [x19, #0x20] mov x1, x20 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 b G_M000_IG08 G_M000_IG10: cmn w26, #1 bne G_M000_IG14 G_M000_IG11: b G_M000_IG13 G_M000_IG12: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG04 G_M000_IG13: ldr x28, [x19, #0x08] mov x14, x28 ldr w15, [x14, #0x08] cmp w27, w15 bhs G_M000_IG37 mov w15, #24 umull x15, w27, w15 add x15, x15, #16 ldr x14, [x14, x15] cmp x14, x28 beq G_M000_IG31 G_M000_IG14: ldr x28, [x19, #0x08] mov x14, x28 ldr w15, [x14, #0x08] cmp w27, w15 bhs G_M000_IG37 mov w15, #24 umull x15, w27, w15 add x3, x15, #16 str x3, [fp, #0x18] ldr x1, [x14, x3] cbnz x1, G_M000_IG17 G_M000_IG15: cmn w26, #1 csel w27, w27, w26, eq mov w14, #1 dmb ish strb w14, [x19, #0x3C] ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] cmp w27, w15 bhs G_M000_IG37 mov w15, #24 umull x15, w27, w15 add x15, x15, #16 add x3, x14, x15 add x14, x3, #8 mov x15, x21 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x14, x3 mov x15, x20 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x1, x3, #16 ldr w0, [x1] orr w0, w0, w24 str w0, [x1] ldr w0, [x19, #0x28] add w0, w0, #1 str w0, [x19, #0x28] add x0, x19, #56 ldar w1, [x0] add w1, w1, #1 stlr w1, [x0] dmb ish strb wzr, [x19, #0x3C] G_M000_IG16: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: cmp x1, x28 beq G_M000_IG32 G_M000_IG18: ldr w0, [x28, #0x08] cmp w27, w0 bhs G_M000_IG37 add x0, x28, x3 ldr w0, [x0, #0x10] and w0, w0, #0xD1FFAB1E sxtw x0, w0 mov w2, w24 cmp x0, x2 beq G_M000_IG23 G_M000_IG19: cmn w26, #1 bne G_M000_IG21 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w27, w1 bhs G_M000_IG37 ldr x3, [fp, #0x18] add x0, x0, x3 ldr w1, [x0, #0x10] tbnz w1, #31, G_M000_IG21 G_M000_IG20: add x0, x0, #16 ldr w1, [x0] orr w1, w1, #0xD1FFAB1E str w1, [x0] ldr w0, [x19, #0x2C] add w0, w0, #1 str w0, [x19, #0x2C] G_M000_IG21: sxtw x0, w27 add x0, x0, w23, UXTW ldr x1, [x19, #0x08] ldr w2, [x1, #0x08] cmp x2, #0 beq G_M000_IG27 cmn x2, #1 bne G_M000_IG22 cmp x0, #1 bvs G_M000_IG28 G_M000_IG22: sdiv x3, x0, x2 msub x27, x3, x2, x0 add w25, w25, #1 ldr w0, [x1, #0x08] cmp w0, w25 ble G_M000_IG34 b G_M000_IG10 G_M000_IG23: mov x0, x19 mov x2, x20 ldr x4, [x19] ldr x4, [x4, #0x50] ldr x4, [x4, #0x20] blr x4 cbz w0, G_M000_IG19 tst w22, #255 bne G_M000_IG33 mov w14, #1 dmb ish strb w14, [x19, #0x3C] ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] cmp w27, w15 bhs G_M000_IG37 ldr x28, [fp, #0x18] add x14, x14, x28 add x14, x14, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 dmb ish strb wzr, [x19, #0x3C] G_M000_IG24: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG25: mov x0, x20 ldr x1, [x20] ldr x1, [x1, #0x40] ldr x1, [x1, #0x18] blr x1 b G_M000_IG08 G_M000_IG26: mov x0, x19 mov x1, x20 ldr x2, [x19] ldr x2, [x2, #0x50] ldr x2, [x2] blr x2 b G_M000_IG08 G_M000_IG27: bl CORINFO_HELP_THROWDIVZERO G_M000_IG28: bl CORINFO_HELP_OVERFLOW G_M000_IG29: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG30: ldr w1, [x19, #0x28] cmp w1, #100 ble G_M000_IG04 ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG04 G_M000_IG31: ldr w0, [x28, #0x08] cmp w27, w0 bhs G_M000_IG37 mov w0, #24 umull x0, w27, w0 add x0, x0, #16 add x0, x28, x0 ldr w0, [x0, #0x10] tbz w0, #31, G_M000_IG14 sxtw w26, w27 b G_M000_IG14 G_M000_IG32: mov x0, x28 ldr w2, [x0, #0x08] cmp w27, w2 bhs G_M000_IG37 add x0, x0, x3 ldr w0, [x0, #0x10] tst w0, #0xD1FFAB1E ldr x3, [fp, #0x18] bne G_M000_IG18 b G_M000_IG15 G_M000_IG33: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x26, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [x19, #0x08] ldr w2, [x1, #0x08] cmp w27, w2 bhs G_M000_IG37 ldr x28, [fp, #0x18] ldr x1, [x1, x28] mov x2, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x26 bl CORINFO_HELP_THROW G_M000_IG34: cmn w26, #1 beq G_M000_IG36 mov w14, #1 dmb ish strb w14, [x19, #0x3C] ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] cmp w26, w15 bhs G_M000_IG37 mov w15, #24 umull x15, w26, w15 add x15, x15, #16 add x14, x14, x15 add x14, x14, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr x14, [x19, #0x08] ldr w15, [x14, #0x08] cmp w26, w15 bhs G_M000_IG37 mov w15, #24 umull x15, w26, w15 add x15, x15, #16 add x14, x14, x15 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w26, w1 bhs G_M000_IG37 mov w1, #24 umull x1, w26, w1 add x1, x1, #16 add x0, x0, x1 add x0, x0, #16 ldr w1, [x0] orr w1, w1, w24 str w1, [x0] ldr w0, [x19, #0x28] add w0, w0, #1 str w0, [x19, #0x28] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 dmb ish strb wzr, [x19, #0x3C] G_M000_IG35: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x27, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x27 bl CORINFO_HELP_THROW G_M000_IG37: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1540 2472: JIT compiled System.Collections.Hashtable:Insert(System.Object,System.Object,bool) [Tier1 with Static PGO, IL size=700, code size=1540] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex261_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2473: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex261_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2474: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AssignNameSlots():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 8 inlinees with PGO data; 9 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x40] cbz x0, G_M000_IG16 G_M000_IG03: mov w20, wzr b G_M000_IG15 G_M000_IG04: ldr w0, [x19, #0x60] add w0, w0, #1 str w0, [x19, #0x60] G_M000_IG05: ldr w21, [x19, #0x60] ldr x22, [x19, #0x38] cbz x22, G_M000_IG06 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 mov x0, x23 bl CORINFO_HELP_NEWSFAST str w21, [x0, #0x08] mov x1, x0 mov x0, x22 ldr x2, [x22] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 b G_M000_IG08 G_M000_IG06: tbnz w21, #31, G_M000_IG09 ldr w0, [x19, #0x6C] cmp w21, w0 blt G_M000_IG04 G_M000_IG07: b G_M000_IG09 G_M000_IG08: cbnz w0, G_M000_IG04 G_M000_IG09: ldr x0, [x19, #0x50] ldr w1, [x0, #0x10] cmp w20, w1 bhs G_M000_IG52 ldr x0, [x0, #0x08] ldr w1, [x0, #0x08] cmp w20, w1 bhs G_M000_IG54 add x0, x0, #16 ldr x21, [x0, w20, UXTW #3] ldr x0, [x19, #0x40] mov x1, x21 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 mov x22, x0 ldr x1, [x22] movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 cmp x1, x23 beq G_M000_IG11 G_M000_IG10: mov x1, x22 mov x0, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: ldr w22, [x22, #0x08] mov x0, x23 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x40] ldr w2, [x19, #0x60] str w2, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x21 ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x28] blr x3 ldr w21, [x19, #0x60] mov x0, x23 bl CORINFO_HELP_NEWSFAST mov x24, x0 str w21, [x24, #0x08] ldr x0, [x19, #0x38] mov x1, x24 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbnz w0, G_M000_IG14 mov x0, x23 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x38] str w22, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x24 ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w1, [x19, #0x64] add w1, w1, #1 str w1, [x19, #0x64] ldr w1, [x19, #0x68] cmp w1, w21 bgt G_M000_IG14 movn w1, #0xD1FFAB1E LSL #16 cmp w21, w1 beq G_M000_IG12 add w1, w21, #1 b G_M000_IG13 G_M000_IG12: movn w1, #0xD1FFAB1E LSL #16 G_M000_IG13: str w1, [x19, #0x68] G_M000_IG14: ldr w1, [x19, #0x60] add w1, w1, #1 str w1, [x19, #0x60] add w20, w20, #1 G_M000_IG15: ldr x0, [x19, #0x50] ldr w0, [x0, #0x10] cmp w20, w0 blt G_M000_IG05 G_M000_IG16: ldp w1, w0, [x19, #0x64] cmp w1, w0 bge G_M000_IG22 G_M000_IG17: ldrsw x1, [x19, #0x64] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #72 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w20, wzr ldr x0, [x19, #0x38] ldr x1, [x0] ldr x1, [x1, #0x48] ldr x1, [x1, #0x38] blr x1 mov x21, x0 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 mov x11, x22 ldr x1, [x11] blr x1 cbz w0, G_M000_IG21 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 G_M000_IG18: add w0, w20, #1 sxtw w24, w0 ldr x25, [x19, #0x48] mov x0, x21 add x11, x22, #8 ldr x1, [x11] blr x1 mov x26, x0 ldr x1, [x26] cmp x1, x23 beq G_M000_IG20 G_M000_IG19: mov x1, x26 mov x0, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG20: ldr w0, [x26, #0x08] ldr w11, [x25, #0x08] cmp w20, w11 bhs G_M000_IG54 add x11, x25, #16 str w0, [x11, w20, UXTW #2] mov x0, x21 mov x11, x22 ldr x1, [x11] blr x1 mov w20, w24 cbnz w0, G_M000_IG18 G_M000_IG21: ldr x0, [x19, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldr x0, [x19, #0x40] cbnz x0, G_M000_IG24 G_M000_IG23: ldr x0, [x19, #0x48] cbz x0, G_M000_IG51 G_M000_IG24: mov w20, wzr ldr x0, [x19, #0x40] cbnz x0, G_M000_IG25 mov x21, xzr movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 fmov s0, #1.0000 mov x0, x23 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #64 mov x15, x23 bl CORINFO_HELP_CHECKED_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #80 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF movn w22, #0 b G_M000_IG28 G_M000_IG25: ldr x21, [x19, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #80 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [x19, #0x40] ldr w1, [x21, #0x10] cmp w1, #0 bls G_M000_IG52 ldr x1, [x21, #0x08] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG54 ldr x1, [x1, #0x10] ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 mov x22, x0 ldr x1, [x22] movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 cmp x1, x23 beq G_M000_IG27 G_M000_IG26: mov x1, x22 mov x0, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG27: ldr w22, [x22, #0x08] G_M000_IG28: mov w23, wzr ldr w1, [x19, #0x64] cmp w1, #0 ble G_M000_IG51 G_M000_IG29: ldr x1, [x19, #0x48] cbz x1, G_M000_IG31 G_M000_IG30: ldr x1, [x19, #0x48] ldr w0, [x1, #0x08] cmp w23, w0 bhs G_M000_IG54 add x1, x1, #16 ldr w24, [x1, w23, UXTW #2] b G_M000_IG32 G_M000_IG31: sxtw w24, w23 G_M000_IG32: cmp w22, w24 bne G_M000_IG41 G_M000_IG33: add w1, w20, #1 sxtw w25, w1 ldr x0, [x19, #0x50] ldr w1, [x21, #0x10] cmp w20, w1 bhs G_M000_IG52 ldr x1, [x21, #0x08] ldr w2, [x1, #0x08] cmp w20, w2 bhs G_M000_IG54 add x1, x1, #16 ldr x2, [x1, w20, UXTW #3] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x3, [x0, #0x08] ldr w1, [x0, #0x10] ldr w4, [x3, #0x08] cmp w4, w1 bls G_M000_IG35 G_M000_IG34: add w4, w1, #1 str w4, [x0, #0x10] sxtw x1, w1 mov x0, x3 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG36 G_M000_IG35: mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG36: ldr w0, [x21, #0x10] cmp w25, w0 beq G_M000_IG39 ldr x1, [x19, #0x40] cmp w25, w0 bhs G_M000_IG52 str x1, [fp, #0x18] ldr x0, [x21, #0x08] ldr w2, [x0, #0x08] cmp w25, w2 bhs G_M000_IG54 add x0, x0, #16 ldr x2, [x0, w25, UXTW #3] mov x0, x1 mov x1, x2 ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 mov x22, x0 ldr x1, [x22] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x20, x0 cmp x1, x20 beq G_M000_IG38 G_M000_IG37: mov x1, x22 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG38: ldr w22, [x22, #0x08] b G_M000_IG40 G_M000_IG39: movn w22, #0 G_M000_IG40: b G_M000_IG50 G_M000_IG41: ldr x0, [x19, #0x30] tbz w24, #31, G_M000_IG43 cbz x0, G_M000_IG53 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG42: ldr x2, [x0, #0x28] mov w0, w24 movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x25, x0 b G_M000_IG46 G_M000_IG43: cmp w24, #0xD1FFAB1E bhs G_M000_IG45 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp w24, #0xD1FFAB1E bhs G_M000_IG54 add x0, x0, #16 ldr x25, [x0, w24, UXTW #3] cbnz x25, G_M000_IG44 mov w0, w24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x25, x0 G_M000_IG44: b G_M000_IG46 G_M000_IG45: mov w0, w24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x25, x0 G_M000_IG46: ldr x0, [x19, #0x50] ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x2, [x0, #0x08] ldr w1, [x0, #0x10] ldr w3, [x2, #0x08] cmp w3, w1 bls G_M000_IG48 G_M000_IG47: add w3, w1, #1 str w3, [x0, #0x10] sxtw x1, w1 mov x0, x2 mov x2, x25 bl CORINFO_HELP_ARRADDR_ST b G_M000_IG49 G_M000_IG48: mov x1, x25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG49: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x26, x0 bl CORINFO_HELP_NEWSFAST ldr x3, [x19, #0x40] str w24, [x0, #0x08] mov x2, x0 mov x0, x3 mov x1, x25 ldr x3, [x3] ldr x3, [x3, #0x48] ldr x3, [x3, #0x28] blr x3 mov w25, w20 G_M000_IG50: add w23, w23, #1 ldr w0, [x19, #0x64] cmp w23, w0 mov w20, w25 blt G_M000_IG29 G_M000_IG51: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ldp fp, lr, [sp], #0x60 ret lr G_M000_IG52: movz x0, #0xD1FFAB1E movk x0, ; optimized code #0xD1FFAB1E LSL #16 ; fp based frame movk x0, #0xD1FFAB1E LSL #32 ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG53: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG42 G_M000_IG54: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1844 G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] 2475: JIT compiled System.Text.RegularExpressions.RegexParser:AssignNameSlots() [Tier1, IL size=512, code size=1844] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2476: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex261_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex262_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2477: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex262_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2478: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanRegex():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 4 inlinees with PGO data; 103 single block inlinees; 5 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: mov w20, wzr movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 mov G_M000_IG01: x0, x21 bl CORINFO_HELP_NEWSFAST stp fp, lr, [sp, #-0x70]! ldr w14, [x19, #0x70] stp x19, x20, [spand , #0x58] w14, str w14, x21, [sp, #0x68#0xD1FFAB1E ] mov w15, #28 mov strb fp, sp w15, [x0, #0x2E] add str x9w14, [x0, #0x28] , fp, #24 str wzr, [x0, #0x20] movn w14, #0 movi str w14, [x0, #0x24] v16.16b, #0 add x14, x19, #8 stp mov x15, x0 q16, q16, [x9] bl stp CORINFO_HELP_CHECKED_ASSIGN_REF q16, q16, [x9, #0x20] mov x0, x21 mov bl CORINFO_HELP_NEWSFAST x19, x0 ldr w14, [x19, #0x70] G_M000_IG02: mov w15, #24 ldr w20, strb [x19, #0x4C] w15, [x0, #0x2E] cmp w20, w2 str w14, [x0, #0x28] bhi G_M000_IG19 add x14, x19, #16 ubfiz x0, x20, #1, # mov x15, x0 32 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x0, x1, x0 mov x0, x21 mov x1, x0 bl CORINFO_HELP_NEWSFAST sub w3, w2, w20 ldr w14, [x19, #0x70] mov w15, #25 cmp w3, #7 strb bls w15, [x0, #0x2E] G_M000_IG08 str w14, [x0, #0x28] add x14, x19, #24 G_M000_IG03: mov x15, x0 str bl CORINFO_HELP_CHECKED_ASSIGN_REF x1, [fp, #0x28] ldr x0, [x19, #0x28] str w3, [fp, #0x30] ldr w0, [x0, #0x08] add x4, fp, #40 ldr w1, [x19, #0x58] ldr x5, [x4] sub ldrw0, w0, w1 cmp w4, [x4, #0x08] w0, #0 cmp w4, #4 blt G_M000_IG08 ble G_M000_IG61 G_M000_IG04: ldr G_M000_IG03: x4, [x5] mov w22, wzr movz x5, #97 mov x0, x19 movk x5, #103 LSL #16 movz x1, #0xD1FFAB1E movk x5, #103 LSL #32 movk x1, #0xD1FFAB1E LSL #16 movk x5, #103 LSL #48 movk x1, #0xD1FFAB1E LSL #32 cmp ldr x4, x5 x1, [x1] bne G_M000_IG08 blr x1 G_M000_IG05: ldr w23, [x19, #0x58] ldrh w4, [x1, ldr w0, [x19, #0x70] # tbz w0, 0x08] #5, orr w5, w4, G_M000_IG09 #2 G_M000_IG04: mov w6, #103 b G_M000_IG06 cmp w5, #99 ccmp w4, w6, z, ne G_M000_IG05: bne G_M000_IG08 ldr w0, [x19, #0x58] cmp w3, #5 add w0, w0, blo G_M000_IG19 #1 add x1, x1, #10 str w0, [x19, #0x58] sub w3, w3, #5 G_M000_IG06: ldr x0 str , [x19, #0x28] x1, [fp, #0x18] ldr w1, [x0, #0x08] str w3, [fp, #0x20] ldr w2, [x19, #0x58] add x4, fp, #24 sub w1, w1, w2 ldr x1, [x4] cmp w1, #0 ldr w3, [x4, #0x08] ble G_M000_IG10 ldr w1, [x0, #0x08] cmp cmp w3, #3w2, w1 bhs G_M000_IG70 blt G_M000_IG08 add G_M000_IG06: x0, x0, #12 ldr w3, [x1] ldrh w24, [x0, w2, UXTW #2] movz w4, #97 cmp w24, #124 movk w4, #97 LSL #16 bgt G_M000_IG05 eor w3, w3, w4 ldr w1, [x1, #0x02] movz x0, #0xD1FFAB1E eor w1, w1, w4 orr w1, w3, w1 movk x0, #0xD1FFAB1E LSL #16 cbnz w1, G_M000_IG08 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG07: ldrb add w0, w20, #8 w0, [x0, w24, cmp w0, w2 UXTW #2] bhi G_M000_IG19 cmp w0, #2 b G_M000_IG13 blt G_M000_IG05 G_M000_IG08: cmp w24, #123 sub w3, w2, w20 bne G_M000_IG10 mov x1, x0 mov x0 cmp w3, #7 , x19 bls G_M000_IG17 movz x1, #0xD1FFAB1E str x1, [fp, #0x48] movk x1, #0xD1FFAB1E LSL #16 str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 movk x1 , #0xD1FFAB1E LSL #32 blt G_M000_IG17 G_M000_IG09: ldr ldr w0, [x4] x1, [x1] movz w5, #116 blr x1 movk w5, #116 LSL #16 cbz w0, G_M000_IG05 G_M000_IG07: b G_M000_IG10 G_M000_IG08: ldr w0, [x19, #0x58] add w0, w0, #1 eor str w0, [x19, #0x58] w0, w0, w5 G_M000_IG09: ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 ldr G_M000_IG10: x0, [x19, #0x28] ldrh ldr w1, [x0, #0x08] w4, [x1, #0x06] ldr w2, [x19, #0x58] orr w0, w4, #4 sub w1, w1, w2 mov w5, #116 cmp w1, #0 cmp w0, ble G_M000_IG10 #103 ldr w1, [x0, #0x08] ccmp w4, w5, z, ne cmp w2, w1 bne G_M000_IG17 bhs G_M000_IG70 cmp w3, #4 add x0, x0, #12 blo G_M000_IG19 ldrh add x0, x1, w24, [x0, w2, UXTW #2] #8 cmp w24, #124 bgt G_M000_IG08 movz x0, #0xD1FFAB1E sub movk x0, #0xD1FFAB1E LSL #16 w1, w3, #4 movk x0, #0xD1FFAB1E LSL #32 ldrb w0, [x0, w24, str UXTW #2] x0, [fp, #0x38] str w1, cmp w0, #4 [fp, #0x40] blt G_M000_IG08 add x0, fp, #56 cmp w24, #123 ldr x1, [x0] bne G_M000_IG10 ldr w0, [x0, #0x08] cmp w0, #4 mov x0, x19 movz x1, #0xD1FFAB1E blt G_M000_IG17 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG11: ldr x1, ldr x0, [x1] [x1] movz x1, #99 blr x1 movk x1, #99 LSL #16 cbz w0, G_M000_IG08 movk x1, #99 LSL #32 movk G_M000_IG10: ldr w25, [x19, #0x58] x1, #116 LSL #48 mov x0, x19 movz x1, #0xD1FFAB1E cmp x0, x1 bne G_M000_IG17 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG12: movk x1, #0xD1FFAB1E LSL #32 add w0, w20, #8 ldr x1, [x1] cmp w0, w2 blr x1 ldr bhi G_M000_IG19 x0, [x19, #0x28] G_M000_IG13: ldr w0, [x0, #0x08] str w0, [x19, #0x4C] sxtw w21, w0 ldr w1, [x19, #0x58] cmp w21, w20 sub w0, w0, w1 bge G_M000_IG14 cbnz w0, G_M000_IG12 mov w0, w20 G_M000_IG11: mov w20, w21 mov w24, #33 mov w21, w0 b G_M000_IG14: G_M000_IG16 ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 G_M000_IG12: mov x0, x19 ldr movz x1, #0xD1FFAB1E x0, [x19, #0x28] movk x1, #0xD1FFAB1E LSL #16 sxtw w2, w1 movk x1, ldr w3, [x0, #0x08] #0xD1FFAB1E LSL #32 cmp w2, w3 ldr x1, [x1] bhs G_M000_IG70 add x0, x0, blr x1 #12 G_M000_IG15: ldrh ldr w24, [x0, w2, UXTW #2] x3, [x19, #0x20] cmp w24, #124 ldr w0, [x19, #0x58] sub w0, w0, #1 bgt G_M000_IG15 str w0, [x19, #0x58] movz x0, #0xD1FFAB1E ldr w2, [x3, #0x08] movk x0, #0xD1FFAB1E LSL #16 cmp w0, w2 movk x0, bhs G_M000_IG20 #0xD1FFAB1E LSL #32 add x3, x3, #16 ldrb w0, [x0, w24, UXTW #2] str wzr, [ cmp w0, #4 x3, w0, UXTW #2] blt G_M000_IG15 sub w3, w21, w20 cmp w24, #123 bgt G_M000_IG13 ldr x0, [x19, #0x28] mov cmp w0, #5 w2, w20 cset x22, ge mov b G_M000_IG14 w1, wzr G_M000_IG13: movz x4, #0xD1FFAB1E mov w22, wzr movk x4, #0xD1FFAB1E LSL #16 G_M000_IG14: movk x4, #0xD1FFAB1E LSL #32 add w0, w1, #1 ldr str w0, [x19, #0x58] x4, [x4] b G_M000_IG16 ldr wzr, [x0] G_M000_IG15: blr x4 mov w24, #32 G_M000_IG16: mov w0, #1 cmp w23, w25 bge G_M000_IG21 G_M000_IG16: G_M000_IG17: ldr sub w0, w25, w23 x21, [sp, #0x68] cbnz w22, G_M000_IG18 ldp mov x19, x20, [sp, #0x58] w1, wzr ldp fp, lr, [sp], #0x70 b G_M000_IG19 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: G_M000_IG18: mov w1, #1 ldr x21, G_M000_IG19: [ sub w2, w0, w1 sp, #0x68] ldp x19, x20, [sp, #0x58] mov w20, wzr cmp w2, #0 ldp fp, lr, [sp], #0x70 ble G_M000_IG20 ret lr mov x0, x19 G_M000_IG19: mov w1, w23 movz x0, #0xD1FFAB1E mov w3, wzr movk x0, #0xD1FFAB1E LSL #16 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movk x4, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr blr x0 x4, [x4] blr x4 brk_windows G_M000_IG20: #0 cbz w22, G_M000_IG21 G_M000_IG20: ldr x3, [x19, #0x28] sub w1, w25, #1 ldr w2, [x3, #0x08] cmp bl w1, w2 CORINFO_HELP_RNGCHKFAIL bhs G_M000_IG70 add x3, x3, #12 brk_windows sub w1, w25, #1 #0 ldrh w0, ; Total bytes of code 636 [x3, w1, UXTW #2] add x3, x19, #92 ldr w1, [x19, #0x70] ldr x2, [x19, #0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add x14, x19, #32 2479: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex262_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG21: cmp w24, #63 bhi G_M000_IG24 G_M000_IG22: sub w23, w24, #32 cmp w23, #14 bhi G_M000_IG23 mov w0, w23 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG23: cmp w24, #63 beq G_M000_IG42 b G_M000_IG43 G_M000_IG24: sub w25, w24, #91 cmp w25, #3 bhi G_M000_IG25 mov w1, w25 adr x0, [@RWD60] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG25: cmp w24, #123 beq G_M000_IG42 cmp w24, #124 bne G_M000_IG43 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG60 G_M000_IG26: ldr w1, [x19, #0x70] and w1, w1, #1 mov x0, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x20, x0 mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] and w14, w14, #0xD1FFAB1E mov w15, #11 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG43 G_M000_IG27: add x0, x19, #120 ldr w1, [x19, #0x70] ldr w2, [x0, #0x08] add x3, x0, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 bhs G_M000_IG28 str w1, [x4, w2, UXTW #2] add w1, w2, #1 str w1, [x0, #0x08] b G_M000_IG29 G_M000_IG28: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG29: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x0, G_M000_IG30 ldr x14, [x19, #0x08] add x14, x14, #24 ldr x15, [x19] bl CORINFO_HELP_ASSIGN_REF ldr x14, [x19, #0x10] add x14, x14, #24 ldr x15, [x19, #0x08] bl CORINFO_HELP_ASSIGN_REF ldr x14, [x19, #0x18] add x14, x14, #24 ldr x15, [x19, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x15, [x19, #0x18] mov x14, x19 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #24 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #25 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG60 G_M000_IG30: add x0, x19, #120 ldr w1, [x0, #0x08] sub w1, w1, #1 str w1, [x0, #0x08] b G_M000_IG60 G_M000_IG31: ldr x0, [x19] cbz x0, G_M000_IG64 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, x19, #120 ldr w1, [x0, #0x08] sub w1, w1, #1 str w1, [x0, #0x08] ldr w1, [x0, #0x08] add x0, x0, #16 ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG70 ldr x0, [x0] ldr w0, [x0, w1, UXTW #2] str w0, [x19, #0x70] ldr x0, [x19, #0x20] cbnz x0, G_M000_IG43 b G_M000_IG60 G_M000_IG32: ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w1, [x19, #0x58] sub w0, w0, w1 cbz w0, G_M000_IG65 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x15, x0 add x14, x19, #32 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG43 G_M000_IG33: mov x0, x19 ldr w0, [x0, #0x70] tbnz w0, #1, G_M000_IG34 mov w20, #18 b G_M000_IG35 G_M000_IG34: mov w20, #14 G_M000_IG35: mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] strb w20, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG43 G_M000_IG36: mov x0, x19 ldr w0, [x0, #0x70] tbnz w0, #1, G_M000_IG37 mov w20, #20 b G_M000_IG38 G_M000_IG37: mov w20, #15 G_M000_IG38: mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] strb w20, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #32 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG43 G_M000_IG39: mov x24, x19 ldr w0, [x24, #0x70] tbnz w0, #4, G_M000_IG40 mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x15, x0 ldr w0, [x24, #0x70] and w0, w0, #0xD1FFAB1E mov w1, #10 strb w1, [x15, #0x2E] str w0, [x15, #0x28] strh w1, [x15, #0x2C] b G_M000_IG41 G_M000_IG40: mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x15, x0 ldr w14, [x24, #0x70] and w14, w14, #0xD1FFAB1E mov w12, #11 strb w12, [x15, #0x2E] str w14, [x15, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x15, #0x10] G_M000_IG41: add x14, x19, #32 bl CORINFO_HELP_CHECKED_ASSIGN_REF b G_M000_IG43 G_M000_IG42: ldr x0, [x19, #0x20] cbz x0, G_M000_IG66 ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] G_M000_IG43: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w1, [x19, #0x58] sub w0, w0, w1 cbz w0, G_M000_IG44 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w22, w0 cbnz w22, G_M000_IG45 G_M000_IG44: ldp x0, x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str xzr, [x19, #0x20] b G_M000_IG60 G_M000_IG45: ldr x0, [x19, #0x28] ldr w1, [x19, #0x58] add w2, w1, #1 str w2, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG70 add x0, x0, #12 ldrh w24, [x0, w1, UXTW #2] ldr x0, [x19, #0x20] cbz x0, G_M000_IG60 G_M000_IG46: mov w23, wzr mov w20, wzr cmp w24, #43 bhi G_M000_IG48 G_M000_IG47: cmp w24, #42 beq G_M000_IG49 cmp w24, #43 bne G_M000_IG55 mov w23, #1 b G_M000_IG49 G_M000_IG48: cmp w24, #63 beq G_M000_IG50 cmp w24, #123 bne G_M000_IG55 ldr w23, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w25, w0 sxtw w20, w25 ldr w0, [x19, #0x58] cmp w23, w0 bge G_M000_IG53 b G_M000_IG51 G_M000_IG49: movn w20, #0xD1FFAB1E LSL #16 b G_M000_IG55 G_M000_IG50: mov w20, #1 b G_M000_IG55 G_M000_IG51: ldr x1, [x19, #0x28] ldr w2, [x1, #0x08] sub w2, w2, w0 cmp w2, #0 ble G_M000_IG53 sxtw w2, w0 ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG70 add x1, x1, #12 ldrh w1, [x1, w2, UXTW #2] cmp w1, #44 bne G_M000_IG53 add w0, w0, #1 str w0, [x19, #0x58] ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cbz w1, G_M000_IG52 ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG70 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, #125 beq G_M000_IG52 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 b G_M000_IG53 G_M000_IG52: movn w20, #0xD1FFAB1E LSL #16 G_M000_IG53: ldr w0, [x19, #0x58] cmp w23, w0 beq G_M000_IG59 ldr x1, [x19, #0x28] ldr w2, [x1, #0x08] sub w2, w2, w0 cbz w2, G_M000_IG59 add w2, w0, #1 str w2, [x19, #0x58] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG70 add x1, x1, #12 ldrh w0, [x1, w0, UXTW #2] cmp w0, #125 bne G_M000_IG59 G_M000_IG54: mov w23, w25 G_M000_IG55: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, wzr ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w2, [x19, #0x58] sub w0, w0, w2 cbz w0, G_M000_IG57 G_M000_IG56: ldr x0, [x19, #0x28] sxtw w3, w2 ldr w4, [x0, #0x08] cmp w3, w4 bhs G_M000_IG70 add x0, x0, #12 ldrh w0, [x0, w3, UXTW #2] cmp w0, #63 bne G_M000_IG57 add w1, w2, #1 str w1, [x19, #0x58] mov w1, #1 G_M000_IG57: cmp w23, w20 bgt G_M000_IG69 ldp x25, x0, [x19, #0x18] mov w2, w23 mov w3, w20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov x1, x0 mov x0, x25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str xzr, [x19, #0x20] ldr x0, [x19, #0x20] cbnz x0, G_M000_IG46 G_M000_IG58: b G_M000_IG60 G_M000_IG59: ldp x0, x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str xzr, [x19, #0x20] sub w0, w23, #1 str w0, [x19, #0x58] G_M000_IG60: ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w1, [x19, #0x58] sub w0, w0, w1 cmp w0, #0 mov w20, w22 bgt G_M000_IG03 G_M000_IG61: ldr x0, [x19] cbnz x0, G_M000_IG63 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG62: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG63: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG64: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #30 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG65: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #13 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG66: cbnz w20, G_M000_IG67 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 strh w24, [x20, #0x08] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #29 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG68 G_M000_IG67: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 strh w24, [x20, #0x08] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #28 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG68: bl CORINFO_HELP_THROW G_M000_IG69: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG70: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG60 - G_M000_IG02 dd G_M000_IG61 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG36 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG27 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG42 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 RWD60 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG32 - G_M000_IG02 dd G_M000_IG43 - G_M000_IG02 dd G_M000_IG33 - G_M000_IG02 ; Total bytes of code 3052 2480: JIT compiled System.Text.RegularExpressions.RegexParser:ScanRegex() [Tier1, IL size=1150, code size=3052] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb w1, [x0, #0x2E] str w2, [x0, #0x28] stp w3, w4, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2481: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,int,int) [Tier1, IL size=36, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:StartGroup(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: add x14, x19, #8 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 mov x0, x20 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #24 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov x0, x20 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #25 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 124 2482: JIT compiled System.Text.RegularExpressions.RegexParser:StartGroup(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=46, code size=124] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: strb w1, [x0, #0x2E] str w2, [x0, #0x28] strh w3, [x0, #0x2C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2483: JIT compiled System.Text.RegularExpressions.RegexNode:.ctor(ubyte,int,ushort) [Tier1, IL size=28, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:EmptyStack():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0] cmp x0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2484: JIT compiled System.Text.RegularExpressions.RegexParser:EmptyStack() [Tier1, IL size=10, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex263_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2485: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex263_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddGroup():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x08] ldrb w0, [x20, #0x2E] sub w0, w0, #33 cmp w0, #1 bhi G_M000_IG07 G_M000_IG03: ldr x0, [x19, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [x19, #0x08] ldrb w1, [x0, #0x2E] cmp w1, #33 bne G_M000_IG04 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cmp w0, #2 bgt G_M000_IG08 G_M000_IG04: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cmp w0, #3 bgt G_M000_IG08 G_M000_IG05: ldr x15, [x19, #0x08] add x14, x19, #32 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: ldp x20, x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG05 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 352 2486: JIT compiled System.Text.RegularExpressions.RegexParser:AddGroup() [Tier1, IL size=158, code size=352] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2487: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FinalOptimize():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 5 inlinees with PGO data; 8 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: mov x0, x19 ldr w0, [x0, #0x28] mov w1, #0xD1FFAB1E tst w0, w1 bne G_M000_IG27 G_M000_IG03: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x19, #0x08] mov x20, x1 cbz x20, G_M000_IG05 G_M000_IG04: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG09 G_M000_IG05: mov x2, x1 cbz x2, G_M000_IG08 G_M000_IG06: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG08 G_M000_IG07: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG08: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG42 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG44 ldr x21, [x0, #0x10] b G_M000_IG10 G_M000_IG09: mov x21, x20 G_M000_IG10: mov w20, #1 G_M000_IG11: ldrb w22, [x21, #0x2E] cmp w22, #8 bls G_M000_IG25 cmp w22, #25 beq G_M000_IG18 cmp w22, #32 bne G_M000_IG26 ldr x1, [x21, #0x08] mov x21, x1 cbz x21, G_M000_IG13 G_M000_IG12: ldr x0, [x21] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG17 G_M000_IG13: mov x2, x1 cbz x2, G_M000_IG16 G_M000_IG14: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG16 G_M000_IG15: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG16: ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ldr ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG42 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG44 ldr x21, [x0, #0x10] b G_M000_IG17 G_M000_IG17: b G_M000_IG11 G_M000_IG18: mov w20, wzr ldr x1, [x21, #0x08] mov x21, x1 cbz x21, G_M000_IG20 G_M000_IG19: ldr x0, [x21] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG01: cmp x0, x2 stp fp, lr, [sp, #-0x70]!beq G_M000_IG24 G_M000_IG20: stp mov x2, x1 x19, x20, cbz x2, G_M000_IG23 [sp, #0x58] G_M000_IG21: str ldr x0, [x2] x21, [sp, #0x68] movz x3, #0xD1FFAB1E mov movk x3, #0xD1FFAB1E LSL #16 fp, sp movk x3, #0xD1FFAB1E LSL #32 add cmp x0, x3 x9, fp, #24 beq G_M000_IG23 G_M000_IG22: movi mov x0, x3 v16.16b, #0 movz x2, #0xD1FFAB1E stp movk x2, #0xD1FFAB1E LSL #16 q16, q16, [x9] movk x2, #0xD1FFAB1E LSL #32 stp ldr x2, [x2] q16, q16, [ blr x2 x9, #0x20] mov x2, x0 mov G_M000_IG23: x19, x0 ldr w0, [x2, #0x10] G_M000_IG02: cmp w0, #0 ldr bls G_M000_IG42w20, [x19, #0x4C] cmp ldr x0, [x2, #0x08] w20, w2 ldr w1, [x0, #0x08] bhi G_M000_IG19 cmp w1, #0 ubfiz x0, x20, #1, #32 bls G_M000_IG44 add x0, x1, x0 ldr x21, [x0, #0x10] mov x1, x0 b G_M000_IG24 sub w3, w2, w20 G_M000_IG24: cmp w3, #7 b G_M000_IG11 G_M000_IG25: bls G_M000_IG08 sub w0, w22, #3 G_M000_IG03: cmp w0, #2 str x1, [fp, #0x28] bls G_M000_IG29 str w3, [fp, #0x30] sub w0, w22, #6 add x4, fp, #40 ldr cmp w0, #2 x5, [x4] bhi G_M000_IG27 ldr w4, [x4, #0x08] ldr w0, [x21, #0x24] cmp w4, #5 movn w1, #0xD1FFAB1E LSL #16 cmp w0, w1 bne G_M000_IG27 b G_M000_IG30 blt G_M000_IG08 G_M000_IG26: sub w0, w22 G_M000_IG04: , #43 ldr cmp w0, #2 x4, [x5] bls G_M000_IG29 movz x6, #97 G_M000_IG27: movk x6 mov x0, x19 , #103 LSL #16 G_M000_IG28: movk x6, #103 LSL #32 ldp movk x6, #103 LSL #48 x21, x22, [sp, #0x20] eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, ldp #116 LSL #16 x19, x20, [sp, #0x10] eor w6, w5, w6 mov w5, w6 ldp fp, lr, [sp], #0x30 orr x4, x4, x5 ret lr cbnz x4, G_M000_IG08 G_M000_IG05: G_M000_IG04: ldr ldrh w0, w4, [x1, #0x0A] [x21, orr w5, w4, ##4 0x24] movn w1, #0xD1FFAB1E LSL #16mov w6, # cmp w0, w1 116 cmp w5, #103 beq G_M000_IG31 ccmp w4, w6, z, ne bne G_M000_IG08 b G_M000_IG27 G_M000_IG30: cmp w3, #6 blo G_M000_IG19 cbnz w20, G_M000_IG27 G_M000_IG31: add x1, x1, #12 ldr x20, [x21, #0x18] sub w3, w3, #6 cbz x20, G_M000_IG27 str ldrb w0, [x20, #0x2E] x1, cmp w0, #25 [fp, #0x18] bne G_M000_IG27 str w3, [fp, #0x20] movz x0, #0xD1FFAB1E add x4, fp, #24 movk x0, #0xD1FFAB1E LSL #16 ldr x1, [x4] movk x0, #0xD1FFAB1E LSL #32 ldr w3, [x4, #0x08] cmp w3, #2 bl blt G_M000_IG08 CORINFO_HELP_NEWSFAST G_M000_IG06: ldr ldr w1, [x1] w14, [x21, #0x28] movz w3, #97 mov w15, #46 movk w3, #97 LSL #16 strb w15, [x0, #0x2E] cmp w1, w3 str w14, [x0, #0x28] bne G_M000_IG08 add G_M000_IG07: x14, x0, #24 add w0, w20, #8 mov x15, x20 cmp w0, w2 bl CORINFO_HELP_ASSIGN_REF bhi G_M000_IG19 movz x1, #0xD1FFAB1E b G_M000_IG13 G_M000_IG08: movk x1, #0xD1FFAB1E LSL sub w3, w2, w20 # mov x1, x0 16 cmp w3, #7 bls G_M000_IG17 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 str add x14, x21, #24 x1, [fp, #0x48] mov x15, x20 bl CORINFO_HELP_ASSIGN_REF str ldr x1, [x20, #0x08] w3, [fp mov x20, x1 , #0x50] cbz x20, G_M000_IG34 add x0, fp, #72 G_M000_IG32: ldr x4, [x0] ldr ldr w0, [x0, #0x08x0, [x20] ] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 cmp w0, #2 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 blt G_M000_IG17 beq G_M000_IG34 G_M000_IG33: G_M000_IG07: mov x0, x2 ldr w0, [x4] movz x2, #0xD1FFAB1E movz w6, #103 movk x2, #0xD1FFAB1E LSL #16 movk w6, #116 LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: mov ldrh x20, x0 w4, [x1, #0x04] orr w0, w4, #2 G_M000_IG34: mov w5, #103 ldr cmp w0, #99 w0, [x20, #0x10] cbz w0, G_M000_IG43 ccmp w4, w5, z, ne bne G_M000_IG17 ldr x1, [x20, #0x08] cmp w3, #3 blo G_M000_IG19 ldr w1, [x1, #0x08] add x0, x1, #6 cmp w1, w0 sub w1, w3, #3 bne G_M000_IG38 str x0, [fp, #0x38] G_M000_IG35: str w1, [fp, add w0, w0, #1 #0x40] ldr x1, [x20, #0x08] add x0, fp, #56 ldr w1, [x1, #0x08] ldr x1, [x0] cbnz w1, G_M000_IG41 ldr w0, [x0, #0x08] G_M000_IG36: cmp w0, #5 mov w1, #4 blt G_M000_IG17 G_M000_IG37: G_M000_IG34: ldr x0, [x1] movz w2, #0xD1FFAB1E movz x3, #97 movk w2, #0xD1FFAB1E LSL #16 movk x3, #99 LSL #16 movz w3, #0xD1FFAB1E movk x3, #99 LSL #32 movk w3, #0xD1FFAB1E LSL #16 movk x3, #99 LSL #48 cmp w1, w2 csel eor x0, x0, x3 w1, w1, w3, ls cmp w1, w0 ldr w1, [x1, #0x06] csel w1, w1, w0, ge sub w3, w6, #4 mov x0, x20 eor w1, w1, w3 movz x2, #0xD1FFAB1E mov w1, w1 movk x2, #0xD1FFAB1E LSL #16 orr x0, x0, x1 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] cbnz x0, G_M000_IG17 blr G_M000_IG12: x2 add G_M000_IG38: w0, w20, #8 ldr w4 cmp w0, w2 , [x20, #0x10] bhi G_M000_IG19 cmp w4, #1 bgt G_M000_IG40 G_M000_IG13: G_M000_IG39: str w0, [x19, #0x4C] ldr x0, [x20, #0x08] sxtw w21, w0 mov cmp w21, w20 x2, x21 mov x1, #1 bge G_M000_IG14 bl CORINFO_HELP_ARRADDR_ST mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 ldr mov x0, x19 w0, [x20, #0x10] add w0, w0, #1 movz x1, #0xD1FFAB1E str w0, [x20, #0x10] ldr w0, [x20 movk x1, #0xD1FFAB1E LSL #16 , #0x14] movk x1, #0xD1FFAB1E LSL #32 add w0, w0, #1 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] str ldr w0, [x19, #0x58] w0, [x20, #0x14] sub w0, w0, #1 b G_M000_IG27 str w0, [x19, #0x58] ldr w2, [x3, #0x08] G_M000_IG40: ldr w4, [x20, #0x10] cmp w0, w2 sub w4, bhs G_M000_IG20 w4, #1 add x3, x3, #16 ldr x2, [x20, #0x08] str wzr, [x3, w0, UXTW #2 mov x0, x2 ] mov w1, #1 sub w3, w21, w20 ldr x0, [x19, #0x28] mov w3, #2 mov w2, w20 movz x5, #0xD1FFAB1E mov w1, wzr movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 movz x4, #0xD1FFAB1E ldr x5, [x5] blr x5 movk x4, #0xD1FFAB1E LSL #16 b G_M000_IG39 movk x4, #0xD1FFAB1E LSL #32 G_M000_IG41: ldr x4, [x4] ldr x1, [x20, #0x08] ldr w1, [x1, #0x08] ldr wzr, [x0] lsl w1, w1, #1 blr b G_M000_IG37 G_M000_IG42: x4 movz x0, #0xD1FFAB1E mov w0, #1 movk x0, #0xD1FFAB1E LSL #16 G_M000_IG16: movk x0, #0xD1FFAB1E LSL #32 ldr x21, [sp, #0x68] ldr x0, [x0] ldp blr x0 x19, x20, [sp, #0x58] brk_windows ldp fp, lr, [sp#]0 , #0x70 G_M000_IG43: ret lr mov w0, #21 mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG44: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG17: ; Total bytes of code 1080 mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: 2488: JIT compiled System.Text.RegularExpressions.RegexNode:FinalOptimize() [Tier1, IL size=187, code size=1080] bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2489: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex263_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex264_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2490: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex264_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:.ctor(System.Text.RegularExpressions.RegexNode,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 32 single block inlinees; 9 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #232 stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #0xD1FFAB1E] mov x19, x0 mov x20, x1 mov w21, w2 G_M000_IG02: mov w0, #19 str w0, [x19, #0x20] movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x19, #0x10] tst w21, #64 cset ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool x0, ne ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows strb w0, [x19, #0x28] ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [x19, #0x24] mov x0, x20 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG01: movk stp x2, #0xD1FFAB1E LSL #32 fp, lr, [sp, #-0x50]! ldr x2, [x2 stp ]x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] blr x2 stp x23, x24, [sp, #0x38] str strb x25, w0, [sp, #0x48] [x19, # mov fp, sp 0x29] mov x19, x0 ldrb w2, [x19, #0x28] G_M000_IG02: cbz w2, G_M000_IG04 ldr w20, [x19, #0x4C] G_M000_IG03: sxtw w21, w2 ldrb w0, [x19, #0x29] sub cmp w0, w21, # 8w0, #14 cmp bne G_M000_IG04 w20, w0 strb ble G_M000_IG05wzr, [x19, #0x29] G_M000_IG04: G_M000_IG01: str w21, [x19, #0x4C] ldrb w0, [x19, #0x29] mov w0, wzr sxtw w3, w0 G_M000_IG04: sub w1, w3, #18 ldr x25, [sp, #0x48] ldp cmp w1, #3x23, x24, [sp, #0x38 ] bhi G_M000_IG11 ldp x21, x22, [sp, #0x28] G_M000_IG05: ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 sub w22, w0, #18 ret cmp w22, #3 lr bhi G_M000_IG09 mov w0, w22 G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 adr ubfiz x0, x20, #1, #32 x1, [ add x22, x1, x0 @RWD00] sub w23, w21, w20 ldr w1, [x1, x0, LSL #2] mov w24, wzr adr x3, [ sub w25, w23, #7 G_M000_IG02] cmp w25, #0 add x1, x1, x3 br x1 ble G_M000_IG03 G_M000_IG06: G_M000_IG06: mov w0, #4 add w0, w24 , #3 cmp w2, #0 cmp w0, w23 csel w23, wzr, w0, eq bhi G_M000_IG12 b G_M000_IG10 ubfiz x1, x0, #1, #32 G_M000_IG07: add x1, x22, x1 mov w0, #1 sub w3, w23, w0 mov w1, #5 mov x0, x1 cmp w2, #0 mov w1, #97 csel w23, w0, w1 mov w2, #103 , eq movz x4, #0xD1FFAB1E b G_M000_IG10 movk x4, #0xD1FFAB1E LSL # G_M000_IG08: 16 mov movk x4, #0xD1FFAB1E LSL #32 w0, #3 ldr x4, [x4] blr x4 mov w1, #7 add w24, w24, w0 cmp w2, #0 csel w23, w0, w1, eq tbnz w0, #31, G_M000_IG03 b G_M000_IG10 G_M000_IG09: add mov w0, #2 w1 mov w1, #6 , w24, #5 cmp w2, #0 cmp w1, w23 csel w23, w0, w1, eq G_M000_IG10: str w23, [x19, #0x20] b G_M000_IG42 G_M000_IG11: bhs G_M000_IG03 cbnz w2, G_M000_IG14 add mov x0, x20 w0, w24, #2 mov w1, wzr cmp w0, w23 movz x2, #0xD1FFAB1E bhs G_M000_IG13 movk x2, #0xD1FFAB1E LSL # ldrh 16 w0, [x22, w0, UXTW #2] movk x2, #0xD1FFAB1E LSL #32 mov w2, #116 ldr x2, [x2] blr x2 cmp w0, #103 strb ccmp w0, w2, z, ne w0, [x19, #0x2A] bne G_M000_IG08 ldrb w3, [x19, #0x2A] sub w0, w3, #20 G_M000_IG07: cmp w0, #1 ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 bhi G_M000_IG14 G_M000_IG08: add w24, w24, #1 mov cmp w24, w25 x0, x20 movz x1, #0xD1FFAB1Eblt G_M000_IG06 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG09: b G_M000_IG03 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG10: ldr add x1, [x1] blr x1 w0, w20, w24 str str x0, [fp, #0xF8] w0, [x19, #0x4C] ldrb w0, [fp, #0xF8] mov w0, #1 cbz w0, G_M000_IG14 ldr G_M000_IG11: w0, [fp, #0xFC] ldr x25, [sp, #0x48] add x1, ldp x19, #44 x23, x24, [sp, #0x38] mov w2, #1 ldp x21, x22, [sp, #0x28] strb w2, [x1] ldp x19, x20, [sp, #0x18] str w0, [x1, #0x04] ldp fp, lr, [sp], #0x50 ldr w0, [x19, #0x24] ret lr G_M000_IG12: ldr w1, [fp, #0xFC] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 cmp w0, w1 movk x0, #0xD1FFAB1E LSL #32 bne G_M000_IG14 ldr x0, [x0] mov x0, x19 blr x0 ldrb w0, [x0, #0x2A] brk_windows cmp w0, #21 #0 G_M000_IG13: beq G_M000_IG12 mov w0, #9 b G_M000_IG13 G_M000_IG12: mov w0, #8 bl CORINFO_HELP_RNGCHKFAIL brk_windows G_M000_IG13: #0 str w0, ; Total bytes of code 324 [x19, #0x20] b G_M000_IG42 G_M000_IG14: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w14, [x0, #0x08] 2491: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] cmp w14, #1 ble G_M000_IG17 add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 ldrb w0, [x0, #0x28] cbnz w0, G_M000_IG15 mov w0, #10 b G_M000_IG16 G_M000_IG15: mov w0, #11 G_M000_IG16: str w0, [x19, #0x20] b G_M000_IG42 G_M000_IG17: tst w21, #0xD1FFAB1E cset x0, ne tbz w21, #3, G_M000_IG18 cmp w0, #0 cset x1, eq b G_M000_IG19 G_M000_IG18: mov w1, wzr G_M000_IG19: uxtb w22, w1 cbnz w22, G_M000_IG20 cmp w0, #0 cset x0, eq b G_M000_IG21 G_M000_IG20: mov w0, wzr G_M000_IG21: uxtb w23, w0 ldrb w0, [x19, #0x28] cbz w0, G_M000_IG26 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x23, x0 cbz x23, G_M000_IG42 add x20, fp, #0xD1FFAB1E mov x21, xzr ldr w1, [x23, #0x08] cmp w1, #0 bls G_M000_IG46 ldrh w1, [x23, #0x0C] cmp w1, #1 beq G_M000_IG22 mov x1, x20 mov w2, #5 mov x0, x23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w24, w0 cmp w24, #0 ble G_M000_IG22 cmp w24, #5 bhi G_M000_IG44 sxtw x1, w24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 add x0, x21, #16 mov w2, w24 lsl x2, x2, #1 mov x1, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG22: cbnz w22, G_M000_IG23 cbz x21, G_M000_IG23 ldr w0, [x21, #0x08] cmp w0, #1 bne G_M000_IG23 ldrh w0, [x21, #0x10] add x1, x19, #56 str xzr, [x1] str wzr, [x1, #0x08] strh w0, [x1, #0x0C] mov w0, #14 str w0, [x19, #0x20] b G_M000_IG42 G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x22, #8 bl CORINFO_HELP_ASSIGN_REF str xzr, [fp, #0x60] str x21, [fp, #0x48] str x23, [fp, #0x40] G_M000_IG24: add x0, fp, #40 ldr x1, [x0, #0x18] str x1, [fp, #0x18] ldp q16, q17, [x0, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG25: ldr w1, [x22, #0x14] add w1, w1, #1 str w1, [x22, #0x14] add x1, fp, #24 mov x0, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #24 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF mov w1, #13 str w1, [x19, #0x20] b G_M000_IG41 G_M000_IG26: cmp w23, #0 cset x1, eq mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x21, x0 cbz x21, G_M000_IG27 add x8, fp, #224 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrb w14, [fp, #0xE0] cbz w14, G_M000_IG27 ldr x15, [fp, #0xE8] ldr w8, [fp, #0xF0] cbz x15, G_M000_IG27 mov w14, #16 str w14, [x19, #0x20] add x0, x19, #56 mov x14, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w8, [x0, #0x08] strh wzr, [x0, #0x0C] b G_M000_IG42 G_M000_IG27: add x8, fp, #0xD1FFAB1E mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x21, G_M000_IG40 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w2, [x21, #0x10] cbz w2, G_M000_IG45 ldr x0, [x21, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG46 add x0, x0, #16 G_M000_IG28: sub x1, x0, #184 ldr x3, [x1, #0xB8] str x3, [fp, #0xB8] ldp q16, q17, [x1, #0xC0] stp q16, q17, [fp, #0xC0] G_M000_IG29: ldr x1, [fp, #0xC0] cbnz x1, G_M000_IG30 ldrb w3, [fp, #0xD1FFAB1E] cbnz w3, G_M000_IG40 G_M000_IG30: cbnz w22, G_M000_IG33 cmp w2, #1 bne G_M000_IG33 mov x3, x1 cbz x3, G_M000_IG33 ldr w3, [x3, #0x08] cmp w3, #1 bne G_M000_IG33 ldrh w2, [x1, #0x10] G_M000_IG31: sub x1, x0, #104 ldr x3, [x1, #0x68] str x3, [fp, #0x68] ldp q16, q17, [x1, #0x70] stp q16, q17, [fp, #0x70] G_M000_IG32: ldr w0, [fp, #0x80] add x1, x19, #56 str xzr, [x1] str w0, [x1, #0x08] strh w2, [x1, #0x0C] mov w2, #15 str w2, [x19, #0x20] b G_M000_IG42 G_M000_IG33: cmp w2, #3 ble G_M000_IG34 sub w2, w2, #3 mov x0, x21 mov w1, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG34: add x14, x19, #24 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF ldr w1, [x21, #0x10] cmp w1, #1 bne G_M000_IG37 cbz w1, G_M000_IG45 ldr x0, [x21, #0x08] ldr w2, [x0, #0x08] cmp w2, #0 bls G_M000_IG46 G_M000_IG35: ldp q16, q17, [x0, #0x10] stp q16, q17, [fp, #0x90] ldr x2, [x0, #0x30] str x2, [fp, #0xB0] G_M000_IG36: ldr w0, [fp, #0xA8] cbz w0, G_M000_IG38 G_M000_IG37: mov w0, #17 b G_M000_IG39 G_M000_IG38: mov w0, #12 G_M000_IG39: str w0, [x19, #0x20] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_OBJ add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG42 G_M000_IG40: ldrb w14, [fp, #0xD1FFAB1E] cbz w14, G_M000_IG42 mov w14, #18 str w14, [x19, #0x20] add x14, x19, #72 add x13, fp, #0xD1FFAB1E ldr x12, [x13], #0x08 str x12, [x14], #0x08 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG41: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG42: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG43 bl CORINFO_HELP_FAIL_FAST G_M000_IG43: ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG44: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG45: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG46: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 ; Total bytes of code 1704 2492: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:.ctor(System.Text.RegularExpressions.RegexNode,int) [Tier1, IL size=974, code size=1704] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingAnchor(System.Text.RegularExpressions.RegexNode):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 36 2493: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindLeadingAnchor(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindTrailingAnchor(System.Text.RegularExpressions.RegexNode):ubyte ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 36 2494: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindTrailingAnchor(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=8, code size=36] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:FindPrefix(System.Text.RegularExpressions.RegexNode):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov G_M000_IG01: x1, x0 sub sp, sp, cmp w3, #7 #64 bls G_M000_IG13 ldrh w0, [x1] stp cmp w0, #116 fp, lr, [sp, #0x30] bne G_M000_IG13 add fp, sp, #48 str ldrh w0, [x1, #0x02] xzr, [fp, #-0x20] orr w4, w0, #2 str xzr, [fp, #-0x10] mov w5, #103 movz x1, #0xD1FFAB1E cmp w4, #99 movk x1, #0xD1FFAB1E LSL #16 ccmp w0, w5, z, ne movk x1, #0xD1FFAB1E LSL #32 bne G_M000_IG13 str x1, [fp, #-0x28] cmp w3, #2 blo G_M000_IG15 G_M000_IG02: add x0, x1, #4 ldr sub w1, w3, #2 wzr, [sp], #-0x80 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] mov cmp w0, #6x1, sp str blt G_M000_IG13 xzr, [fp, #-0x20] str x1, [fp, #-0x10] mov w1, #64 str w1, [fp, #-0x08] G_M000_IG07: str wzr, [fp, #-0x18] ldr sub x1, fp, #32 x0, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #116 ldr x2, [x2] movk x3, #97 LSL #16 blr movk x3, #99 LSL #32 x2 movk x3, #99 LSL #48 sub x0, fp, #32 eor x0, x0, x3 ldr movz x1, #0xD1FFAB1E w1, [x1, #0x08] movk x1, #0xD1FFAB1E LSL #16 movz w3, #99 movk x1, #0xD1FFAB1E LSL #32 movk w3, #116 LSL #16 ldr x1, [x1] eor w1, w1, w3 mov w1, w1 blr x1 orr x0, x0, x1 movz xip0, #0xD1FFAB1E cbnz x0, G_M000_IG13 movk xip0, #0xD1FFAB1E LSL #16 G_M000_IG08: movk xip0, #0xD1FFAB1E LSL #32 add w0, w20, #8 ldr xip1, [fp, #-0x28] cmp w0, w2 cmp bhi G_M000_IG15 xip0, xip1 G_M000_IG09: beq G_M000_IG03 bl str w0, [x19, #0x4C] CORINFO_HELP_FAIL_FAST sxtw w21, w0 cmp G_M000_IG03: w21, w20 sub sp, fp, #48 bge G_M000_IG10 ldp mov w0fp, lr, [sp, #0x30] , w20 add sp, sp, #64 mov w20, w21 ret lr mov w21, w0 G_M000_IG10: ; Total bytes of code 156 ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E 2495: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:FindPrefix(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=47, code size=156] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL ; Assembly listing for method System.Runtime.CompilerServices.RuntimeFeature:get_IsDynamicCodeCompiled():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data brk_windows #0 ; Total bytes of code 572 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 2496: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex264_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ret lr ; Total bytes of code 20 2497: JIT compiled System.Runtime.CompilerServices.RuntimeFeature:get_IsDynamicCodeCompiled() [Tier1, IL size=6, code size=20] ; Assembly listing for method System.Text.RegularExpressions.Regex:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov w21, w2 mov w22, w3 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST uxtb w4, w22 mov x1, x19 mov x2, x20 mov w3, w21 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 100 2498: JIT compiled System.Text.RegularExpressions.Regex:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier1, IL size=10, code size=100] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov w21, w2 mov w22, w3 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST uxtb w4, w22 mov x1, x19 mov x2, x20 mov w3, w21 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x5 ; Total bytes of code 96 2499: JIT compiled System.Text.RegularExpressions.RegexCompiler:Compile(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier1, IL size=15, code size=96] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2500: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2501: JIT compiled System.Text.RegularExpressions.RegexCompiler:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex265_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2502: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex265_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2503: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2504: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex265_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.RegexLWCGCompiler:FactoryInstanceFromCode(System.String,System.Text.RegularExpressions.RegexTree,int,bool):System.Text.RegularExpressions.RegexRunnerFactory:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 27 inlinees with PGO data; 56 single block inlinees; 18 inlinees without PGO data G_M000_IG01: sub sp, sp, #160 stp fp, lr, [sp, #0x10] stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] stp x25, x26, [sp, #0x80] stp x27, x28, [sp, #0x90] add fp, sp, #16 add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] mov x19, x0 mov x20, x2 mov w21, w3 mov w22, w4 G_M000_IG02: ldr x0, [x20, #0x08] add x1, fp, #56 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG05 G_M000_IG03: mov x0, xzr G_M000_IG04: ldp x27, x28, [sp, #0x90] ldp x25, x26, [sp, #0x80] ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp, #0x10] add sp, sp, #160 ret lr G_M000_IG05: add x14, x19, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF str w21, [x19, #0x30] strb w22, [x19, #0x34] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #1 ldaddal w1, w0, [x0] add w22, w0, #1 str xzr, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x23, [x0] mov x0, x23 mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] cbz x0, G_M000_IG33 add x24, x0, #16 ldr w25, [x0, #0x08] G_M000_IG06: str x24, [fp, #0x28] str w25, [fp, #0x30] str wzr, [fp, #0x20] strb wzr, [fp, #0x24] ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #5 blo G_M000_IG07 movz x26, #0xD1FFAB1E movk x26, #0xD1FFAB1E LSL #16 movk x26, #0xD1FFAB1E LSL #32 add x0, x26, #12 ldr x2, [x0] ldr x3, [x0, #0x02] str x2, [x1] str x3, [x1, #0x02] ldr w0, [fp, #0x20] add w0, w0, #5 str w0, [fp, #0x20] b G_M000_IG08 G_M000_IG07: add x0, fp, #16 movz x26, #0xD1FFAB1E movk x26, #0xD1FFAB1E LSL #16 movk x26, #0xD1FFAB1E LSL #32 mov x1, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG08: add x0, fp, #16 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #36 blo G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x2, x0, #12 mov x0, x1 mov x1, x2 mov x2, #72 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x20] add w0, w0, #36 str w0, [fp, #0x20] b G_M000_IG10 G_M000_IG09: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG10: ldrb w2, [fp, #0x24] cbnz w2, G_M000_IG11 ldr w2, [fp, #0x20] ldr w0, [fp, #0x30] cmp w2, w0 bhi G_M000_IG36 ldr x0, [fp, #0x28] ubfiz x2, x2, #1, #32 add x0, x0, x2 movz x1, #20 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x20] str w0, [fp, #0x20] b G_M000_IG12 G_M000_IG11: add x0, fp, #16 movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x24, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x27, [x0] mov x25, x27 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x28, x0 mov w0, wzr str w0, [sp] G_M000_IG13: str w0, [sp, #0x08] mov x0, x28 mov x1, x24 mov x5, x25 mov w2, #22 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 mov x7, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 mov x0, x28 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str xzr, [fp, #0x10] mov x0, x23 mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] cbz x0, G_M000_IG34 add x24, x0, #16 ldr w25, [x0, #0x08] G_M000_IG14: str x24, [fp, #0x28] str w25, [fp, #0x30] str wzr, [fp, #0x20] strb wzr, [fp, #0x24] ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #5 blo G_M000_IG15 add x0, x26, #12 ldr x2, [x0] ldr x3, [x0, #0x02] str x2, [x1] str x3, [x1, #0x02] ldr w0, [fp, #0x20] add w0, w0, #5 str w0, [fp, #0x20] b G_M000_IG16 G_M000_IG15: add x0, fp, #16 mov x1, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG16: add x0, fp, #16 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #26 blo G_M000_IG17 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x0, x0, #12 ldp q16, q17, [x0] ldr q18, [x0, #0x20] ldr q19, [x0, #0x24] stp q16, q17, [x1] str q18, [x1, #0x20] str q19, [x1, #0x24] ldr w0, [fp, #0x20] add w0, w0, #26 str w0, [fp, #0x20] b G_M000_IG18 G_M000_IG17: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG18: ldrb w2, [fp, #0x24] cbnz w2, G_M000_IG19 ldr w2, [fp, #0x20] ldr w0, [fp, #0x30] cmp w2, w0 bhi G_M000_IG36 ldr x0, [fp, #0x28] ubfiz x2, x2, #1, #32 add x0, x0, x2 movz x1, #20 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x20] str w0, [fp, #0x20] b G_M000_IG20 G_M000_IG19: add x0, fp, #16 movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG20: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x24, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x25, x0 mov w0, wzr str w0, [sp] G_M000_IG21: str w0, [sp, #0x08] mov x0, x25 mov x1, x24 mov x5, x27 mov w2, #22 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 mov x7, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 mov x0, x25 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str xzr, [fp, #0x10] mov x0, x23 mov w1, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] cbz x0, G_M000_IG35 add x24, x0, #16 ldr w27, [x0, #0x08] G_M000_IG22: str x24, [fp, #0x28] str w27, [fp, #0x30] str wzr, [fp, #0x20] strb wzr, [fp, #0x24] ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #5 blo G_M000_IG23 add x0, x26, #12 ldr x2, [x0] ldr x3, [x0, #0x02] str x2, [x1] str x3, [x1, #0x02] ldr w0, [fp, #0x20] add w0, w0, #5 str w0, [fp, #0x20] b G_M000_IG24 G_M000_IG23: add x0, fp, #16 mov x1, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG24: add x0, fp, #16 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x20] ldr w1, [fp, #0x30] cmp w0, w1 bhi G_M000_IG36 ldr x1, [fp, #0x28] ubfiz x2, x0, #1, #32 add x1, x1, x2 ldr w2, [fp, #0x30] sub w0, w2, w0 cmp w0, #5 blo G_M000_IG25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x0, x0, #12 ldr x2, [x0] ldr x3, [x0, #0x02] str x2, [x1] str x3, [x1, #0x02] ldr w0, [fp, #0x20] add w0, w0, #5 str w0, [fp, #0x20] b G_M000_IG26 G_M000_IG25: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG26: ldrb w2, [fp, #0x24] cbnz w2, G_M000_IG27 ldr w2, [fp, #0x20] ldr w0, [fp, #0x30] cmp w2, w0 bhi G_M000_IG36 ldr x0, [fp, #0x28] ubfiz x2, x2, #1, #32 add x0, x0, x2 movz x1, #20 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov x2, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x20] str w0, [fp, #0x20] b G_M000_IG28 G_M000_IG27: add x0, fp, #16 movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG28: add x0, fp, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x23, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #2 bl CORINFO_HELP_NEWARR_1_OBJ mov x24, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x24, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x24, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x27, x0 mov w0, wzr str w0, [sp] G_M000_IG29: str w0, [sp, #0x08] mov x0, x27 mov x1, x23 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 mov x5, x24 mov w2, #22 mov w3, #1 mov x4, xzr mov x7, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 mov x0, x27 mov w1, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 mov w1, w21 mov x2, x28 mov x3, x25 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [x19, #0x18] cbnz x0, G_M000_IG30 mov x19, xzr b G_M000_IG31 G_M000_IG30: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 G_M000_IG31: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr x1, [x20, #0x18] add x14, x0, #8 mov x15, x27 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #16 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #24 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG32: ldp x27, x28, [sp, #0x90] ldp x25, x26, [sp, #0x80] ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp, #0x10] add sp, sp, #160 ret lr G_M000_IG33: mov x24, xzr mov w25, wzr b G_M000_IG06 G_M000_IG34: mov x24, xzr mov w25, wzr b G_M000_IG14 G_M000_IG35: mov x24, xzr mov w27, wzr b G_M000_IG22 G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 2432 2505: JIT compiled System.Text.RegularExpressions.RegexLWCGCompiler:FactoryInstanceFromCode(System.String,System.Text.RegularExpressions.RegexTree,int,bool) [Tier1, IL size=445, code size=2432] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex266_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2506: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex266_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:SupportsCompilation(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w0, [x19, #0x28] tbz w0, #10, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x20] mov w0, wzr G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w21, w0 mov w22, wzr cmp w21, #0 ble G_M000_IG13 G_M000_IG06: ldr x1, [x19, #0x08] mov x0, x1 cbz x0, G_M000_IG08 G_M000_IG07: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 beq G_M000_IG12 G_M000_IG08: mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG11: ldr w0, [x2, #0x10] cmp w22, w0 bhs G_M000_IG17 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w22, w1 bhs G_M000_IG18 add x0, x0, #16 ldr x0, [x0, w22, UXTW #3] b G_M000_IG12 G_M000_IG12: mov w1, #39 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG15 add w22, w22, #1 cmp w22, w21 blt G_M000_IG06 G_M000_IG13: str xzr, [x20] mov w0, #1 G_M000_IG14: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x20] mov w0, wzr G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG18: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 376 2507: JIT compiled System.Text.RegularExpressions.RegexNode:SupportsCompilation(byref) [Tier1, IL size=47, code size=376] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Assembly listing for method System.Threading.Interlocked:Increment(byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ; Total bytes of code 184 G_M000_IG01: stp 2508: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, #1 ldaddal w1, w0, [x0] add w0, w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 2509: JIT compiled System.Threading.Interlocked:Increment(byref) [Tier1, IL size=8, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2510: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex266_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTryFindNextPossibleStartingPosition():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 11 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] mov x19, x0 G_M000_IG02: str x19, [fp, #0x18] ldr x20, [x19, #0x20] cbz x20, G_M000_IG04 G_M000_IG03: ldr x0, [x20, #0x08] ldr w2, [x20, #0x10] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str wzr, [x20, #0x10] ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] G_M000_IG04: ldr x20, [x19, #0x28] cbz x20, G_M000_IG06 G_M000_IG05: ldr x0, [x20, #0x08] ldr w2, [x20, #0x10] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str wzr, [x20, #0x10] ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] G_M000_IG06: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0x28] ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0x20] ldr w0, [x19, #0x30] tst w0, #64 cset x0, ne strb w0, [fp, #0x34] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x21, [x20] mov x1, x21 ldr x22, [fp, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x10] ldr x0, [x0, #0x10] ldr w0, [x0, #0x24] str w0, [fp, #0x30] ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 str w0, [fp, #0x38] ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w22, w0 mov x0, x19 ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [fp, #0x34] cbnz w0, G_M000_IG09 G_M000_IG07: mov x0, x19 ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x30] cmp w0, #0 ble G_M000_IG08 mov x0, x19 ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex267_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows w1; optimized code ; fp based frame ; partially interruptible ; No PGO data , [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr x1, [x1] stp blr x1 fp, lr, [sp, #-0x30]! stp G_M000_IG08: x19, x20, [sp, #0x18] mov x0, x19 str mov w1, w22 x21, [sp, #0x28] movz x2, #0xD1FFAB1E mov movk x2, #0xD1FFAB1E LSL #16 fp, sp movk x2, #0xD1FFAB1E LSL #32 mov x19, x0 ldr x2, [x2] mov x21, x1 blr x2 mov w20, w2 b G_M000_IG10 G_M000_IG02: G_M000_IG07: mov x0, x19 ldr w1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov mov w1, w22 x1, x21 movz x2, #0xD1FFAB1E mov w2, w20 movk x2, #0xD1FFAB1E LSL #16 mov x0, x19 movk x2, #0xD1FFAB1E LSL #32 bl ldr x2, [x2] blr x2 G_M000_IG10: ldr x0, [x19, #0x08] System.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldr cbz w0, G_M000_IG04 w1, [fp, #0x38] ldr x2, [x0] G_M000_IG03: ldr x2, [x2, #0x60] mov x1, x21 ldr x2, [x2] mov w2, w20 mov x0, x19 blr x2 bl mov x0, x19 movz x1, #0xD1FFAB1ESystem.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG04 ldrb w0, [fp, #0x34] ldr cbnz w0, G_M000_IG12 w0, [x19, #0x4C] cmp G_M000_IG11: w0, w20 mov x0, x19 beq G_M000_IG04 ldr x1, [fp, #0x28] add movz x2, #0xD1FFAB1E w0, w0, #1 str w0, [x19, #0x4C] movk x2, #0xD1FFAB1E LSL #16 b G_M000_IG02 movk x2, #0xD1FFAB1E LSL #32 ldr G_M000_IG04: x2, [x2 ldr x21, [sp, #0x28] ] ldp x19, x20, [sp, #0x18] blr x2 ldp fp, lr, [sp], #0x30 ldr x1, [x20, #0xD1FFAB1E] ret lr mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ; Total bytes of code 108 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG13 G_M000_IG12: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E 2511: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex267_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG13: mov x1, x21 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] mov w1, w22 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG21 G_M000_IG14: ldr x0, [x19, #0x10] ldr x0, [x0, #0x10] ldr w0, [x0, #0x20] sub w20, w0, #10 cmp w20, #9 bhi G_M000_IG20 mov w1, w20 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG15: add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG16: add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG17: add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG18: add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG19: add x1, fp, #24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG20: mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG21: ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x60 ret lr RWD00 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 ; Total bytes of code 1232 2512: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTryFindNextPossibleStartingPosition() [Tier1, IL size=490, code size=1232] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Mvfldloc(System.Reflection.FieldInfo,System.Reflection.Emit.LocalBuilder):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x2 G_M000_IG02: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 80 2513: JIT compiled System.Text.RegularExpressions.RegexCompiler:Mvfldloc(System.Reflection.FieldInfo,System.Reflection.Emit.LocalBuilder) [Tier1, IL size=15, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_MinRequiredLength():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2514: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_MinRequiredLength() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ble(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #49 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2515: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ble(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2516: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2517: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex267_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex268_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2518: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex268_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitAnchors|154_0(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 29 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] stp x23, x24, [sp, #0x48] str x25, [sp, #0x58] mov fp, sp str xzr, [fp, #0x10] str xzr, [fp, #0x18] add x2, sp, #96 str x2, [fp, #0x20] mov x19, x0 mov x20, x1 G_M000_IG02: ldr x0, [x19, #0x10] ldr x0, [x0, #0x10] ldr w21, [x0, #0x20] cmp w21, #9 bhi G_M000_IG17 mov w1, w21 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x2, [G_M000_IG02] add x0, x0, x2 br x0 G_M000_IG03: ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG05: ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG04 G_M000_IG06: ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w22, w0 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x24, [x23, #0xD1FFAB1E] mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG08: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG09: ldr x0, [x19, #0x08] mov w1, w22 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG10: ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w22, w0 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x24, [x23, #0xD1FFAB1E] mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr stpx2, [x2] blr x2 fp, lr, [sp, #-0x50]! b G_M000_IG08 stp G_M000_IG11: x19, ldr x20, [sp, #0x18] x0, [x19, #0x08] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] ldr x1, [x0] str ldrx25, [sp, #0x48] x1, [x1, #0x58] mov ldr x1, [x1, #0x38] fp, sp blr x1 mov x19, x0 sxtw w22, w0 G_M000_IG02: ldr x1, [x20, #0x08] ldr mov x0, x19 w20, [x19, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 sxtw movk x2, #0xD1FFAB1E LSL #32 w21 ldr x2, [x2] , blr x2 w2 mov x0, x19 sub mov w1, wzr w0, w21, #2 movz x2, #0xD1FFAB1E cmp movk x2, #0xD1FFAB1E LSL #16 w20, w0 movk x2, #0xD1FFAB1E LSL #32 ble G_M000_IG05 ldr x2, [x2] G_M000_IG03: blr x2 str w21, [x19, #0x4C] mov x0, x19 mov w0, wzr mov w1, w22 G_M000_IG04: movz x2, #0xD1FFAB1E ldr x25, [sp, #0x48] movk x2, #0xD1FFAB1E LSL #16 ldp movk x2, #0xD1FFAB1E LSL #32 x23, ldr x2, [x2] x24, [sp, #0x38] blr x2 ldp x21, x22, [sp, #0x28] mov x0, x19 movz ldp x19, x20, [sp, #0x18] x1 ldp fp, lr, [sp], #0x50 , #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ret ldr x1, [x1] lr blr x1 mov x0, x19 G_M000_IG05: mov w1, wzr movz x2, #0xD1FFAB1E cmp w20, w21 movk x2, #0xD1FFAB1E LSL #16 bhi G_M000_IG10 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [ ubfiz x0, x20, #1, #32 x2] add blr x2x22, x1, x0 sub w23, w21, w20 b G_M000_IG08 mov w24, wzr sub G_M000_IG12: w25, w23, #1 ldr cmp w25, #0x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] ble blr x1 G_M000_IG03 sxtw w22, w0 ldr G_M000_IG06: x1, [x20, #0x08] cmp w24, w23 mov bhi G_M000_IG10 x0, x19 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 movz x2 mov w2, #97 , #0xD1FFAB1E movz x4, # 0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk movk x4, #0xD1FFAB1E LSL #16 x2, #0xD1FFAB1E LSL #32 ldr movk x4, #0xD1FFAB1E LSL #x2, [x2] 32 blr x2 ldr ldr x1, [x20, #0x10] x4, [x4] mov x0, x19 blr x4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 add ldr x2, [x2] w24, w24, w0 blr x2 movz x23, #0xD1FFAB1E tbnz w0, #31, G_M000_IG03 movk x23, #0xD1FFAB1E LSL #16 add w1, w24, #1 movk x23, #0xD1FFAB1E LSL #32 cmp w1, w23 ldr x24, [x23, #0xD1FFAB1E] bhs G_M000_IG03 mov x1, x24 ldrh w0, [ mov x0, x19 x22, w1, UXTW #2] movz x2, #0xD1FFAB1E sub w0, w0, #78 movk mov w0, w0 movz x2, #0xD1FFAB1E LSL #16x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movk x2, #0xD1FFAB1E LSL #48 ldr x2, [x2] blr lsl x2, x2, x0 x2 sub x0, x0, #64 mov x0, x19 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 mov sxtw w24, w1 w1, # 1cmp w24, w25 blt movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG06 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG07: ldr x2, [x2] b G_M000_IG03 blr G_M000_IG08: x2 add mov x0, x19 w0, w20, w24 movz x1, #0xD1FFAB1E str movk x1, #0xD1FFAB1E LSL #16 w0, movk x1, #0xD1FFAB1E LSL #32 [ x19, #0x4C] ldr x1, [x1] mov w0, #1 blr x1 ldr G_M000_IG09: w1, [x20, #0x20] ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] mov ldp x19, x20, [sp, #0x18] x0, x19 movz x2, #0xD1FFAB1Eldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movk x2, #0xD1FFAB1E LSL #16 movz x0, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #32 ldr movk x0, #0xD1FFAB1E LSL #16 x2, movk x0, #0xD1FFAB1E LSL #32 [x2] blr x2 ldr x0, [x0] ldr blr x0 x1, [x20, #0x08] mov x0, x19 brk_windows movz x2, #0xD1FFAB1E # movk x2, #0xD1FFAB1E LSL #16 0 movk x2, #0xD1FFAB1E LSL #32 ; Total bytes of code 296 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E 2519: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG09 G_M000_IG13: ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x24, [x23, #0xD1FFAB1E] mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG15 G_M000_IG14: cmp w21, #9 cset x21, eq ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w22, w0 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x24, [x23, #0xD1FFAB1E] mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x19, #0x10] ldr x1, [x1, #0x10] ldr w1, [x1, #0x24] add w1, w1, w21 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x19, #0x10] ldr x1, [x1, #0x10] ldr w1, [x1, #0x24] add w1, w1, w21 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG07 G_M000_IG15: mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w0, #1 G_M000_IG16: ldr x25, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG17: ldrb w1, [x20, #0x1C] cbnz w1, G_M000_IG24 ldrb w0, [x0, #0x29] cmp w0, #14 bne G_M000_IG23 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w22, w0 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #10 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG18: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x24, [x23, #0xD1FFAB1E] mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x24 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x18] cbz w1, G_M000_IG19 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool 0xD1FFAB1E LSL #16 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movk x2, #0xD1FFAB1E LSL #32 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG19: ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG20: ldp x24, x2, [fp, #0x10] ldr x1, [fp, #0x10] ldr w25, [x1, #0x10] ldr x1, [fp, #0x10] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w25 bls G_M000_IG21 sxtw x1, w25 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x24, #0x14] add G_M000_IG01: w0, w0, # 1 stp str w0, [x24, #0x14] fp, lr, [sp, #-0x40]! add w0, w25, #1 str w0, [x24, #0x10] stp b G_M000_IG22 x19, x20, [sp, #0x28] G_M000_IG21: mov x0, x24 str mov x21, [sp, #0x38] x1, x2 mov fp, sp movz x2, str #0xD1FFAB1E xzr, [fp, #0x18] str movk x2, #0xD1FFAB1E LSL #16 xzr, [fp, #0x20] movk x2, #0xD1FFAB1E LSL #32 mov x19, x0 ldr G_M000_IG02: ldr x2, [x2] w20, [x19, #0x4C] blr x2 cmp G_M000_IG22: w20, w2 ldr bhi x0, [G_M000_IG13 x19, ubfiz #x0, x20, #1, 0x08] #32 mov w1, w22 add ldr x2, [x0] x0, x1, ldr x2, [x2, #0x60]x0 mov x1, x0 ldr x2, [x2] sub w3, w2 blr x2 , w20 G_M000_IG23: cmp w3, #1 ldr bls G_M000_IG04 x0, [x19, #0x10] ldr G_M000_IG03: x0, ldrh [x0, #0x10]w3 , [ ldrb w1, x1] [x0, #0x2A] cmp w3, #97 sub w1, w1, #20 bne G_M000_IG04 cmp w1, #1 ldrh w1, [x1 , #0x02] bhi G_M000_IG24 add mov w3, #83 x1 mov , x0, #44 w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ldrb ccmp w1, w4, z, ne bne G_M000_IG04 w2, [x1] add w0, w20, #2 ldr cmp w0 , w2 w21, [x1, #0x04] bhi G_M000_IG13 tst w2, b G_M000_IG07 #255 G_M000_IG04: beq G_M000_IG24 sub w1, w2, w20 ldr str w0, [x0, #0x20] x0, [fp, #0x18] str cmp w0, #9 w1, [fp, #0x20] cset x25, eq add x0, fp, #24 ldr x0, [x19, #0x08] ldr ldr x1, [x0] x1, [x0] ldr w0, [x0, #0x08] ldr x1, cmp w0, #2 [ blt G_M000_IG11 x1, #0x58] G_M000_IG05: ldr ldr w0, [x1] x1, [x1, #0x38] movz w1, #66 blr x1 movk w1, #89 LSL #16 sxtw w22, w0 cmp w0, w1 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 bne G_M000_IG11 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: blr x2 add ldr w0, w20, #2 cmp w0, w2x1, [x20, #0x10] mov x0, x19 bhi G_M000_IG13 movz x2, #0xD1FFAB1E G_M000_IG07: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str ldr x2, [ x2] w0, [x19, #0x4C] blr x2 sxtw w21, w0 movz cmp w21, w20 x23, #0xD1FFAB1E bge movk x23, #0xD1FFAB1E LSL #16 G_M000_IG08 movk mov w0, w20 x23, #0xD1FFAB1E LSL #32 mov w20, w21 mov w21, w0 ldr G_M000_IG08: x24, [x23, #0xD1FFAB1E] ldr w0, [ mov x1, x24 x19, #0x58] mov x0, x19 cbnz w0, G_M000_IG09 movz mov x0, x19 x2, movz x1, #0xD1FFAB1E #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movk x2, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x2, [x2] blr x1 blr x2 G_M000_IG09: add w23 ldr x3, [x19, #0x20] , w21, w25 ldr mov w1, w23 w0, [ mov x0, x19 x19, #0x58] sub movz w0, w0, #1 str w0, [x19, #0x58 x2, #0xD1FFAB1E ] ldr w2, [x3, #0x08] cmp w0, w2 movk x2, #0xD1FFAB1E LSL #16 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] movk x2, #0xD1FFAB1E LSL #32 sub w3, w21, w20 ldr x2, [x2] ldr x0, blr x2 [ mov x0, x19 x19, movz x1, #0xD1FFAB1E# 0x28] mov movk w2, w20 x1, #0xD1FFAB1E LSL #16 mov movk x1, #0xD1FFAB1E LSL #32 w1, wzr ldr x1, [x1] blr x1 movz x4, #0xD1FFAB1E mov x0, x19 mov w1, w22 movk x4, #0xD1FFAB1E LSL movz x2, #0xD1FFAB1E #16 movk x2, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movk x2, ldr x4#0xD1FFAB1E LSL #32 , [x4] ldr x2, [x2] ldr blr x2 wzr, [x0] blr x4 ldr mov w0, #1 x1, [x20, #0x10] G_M000_IG10: mov x0, x19 ldr movz x2, #0xD1FFAB1E x21, [sp, #0x38] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldp ldr x2, [x2] x19, x20, [sp, #0x28] blr x2 ldp mov x1, x24 fp, mov x0, x19 lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] movz x2 ldp x19, #0xD1FFAB1E, x20, [sp, #0x28] ldp movk x2, fp, lr, [sp], #0x40 #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr ret lr x2, [x2] blr x2 G_M000_IG13: movz x0, #0xD1FFAB1E mov w1, w23 movkmov x0 , x19 x0 movz x2, #0xD1FFAB1E , #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #32 LSL #16 movk x2, #0xD1FFAB1E LSL #ldr 32x0, [x0] blr x0 brk_windows ldr #0 x2, [x2] G_M000_IG14: blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E bl LSL #32CORINFO_HELP_RNGCHKFAIL brk_windows ldr #0 x1, [x1] blr x1 ; Total bytes of code 392 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w22 2520: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex268_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 G_M000_IG24: mov w0, wzr G_M000_IG25: ldr x25, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG26: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] add x3, fp, #96 str x3, [sp, #0x10] G_M000_IG27: ldp x24, x2, [fp, #0x10] ldr x1, [fp, #0x10] ldr w25, [x1, #0x10] ldr x1, [fp, #0x10] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w25 bls G_M000_IG28 sxtw x1, w25 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x24, #0x14] add w0, w0, #1 str w0, [x24, #0x14] add w0, w25, #1 str w0, [x24, #0x10] b G_M000_IG29 G_M000_IG28: mov x0, x24 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG29: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr RWD00 dd G_M000_IG03 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG12 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 ; Total bytes of code 4000 2521: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitAnchors|154_0(byref) [Tier1, IL size=1638, code size=4000] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x1, [x1, #0x10] cbz x1, G_M000_IG04 G_M000_IG03: b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x1, x0 G_M000_IG05: mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 2522: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:.ctor() [Tier1, IL size=18, code size=112] ; Assembly listing for method System.Array:Empty[System.__Canon]():System.__Canon[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x1, [x0, #0x10] ldr x1, [x1, #0x18] cbz x1, G_M000_IG04 G_M000_IG03: b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD mov x1, x0 G_M000_IG05: mov x0, x1 bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x0, [x0] G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 2523: JIT compiled System.Array:Empty[System.__Canon]() [Tier1, IL size=6, code size=68] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:PushWithResize(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: ldr w1, [x19, #0x10] add w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrsw x1, [x19, #0x10] ldr x0, [x19, #0x08] mov x2, x20 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] ldr w0, [x19, #0x10] add w0, w0, #1 str w0, [x19, #0x10] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 104 2524: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:PushWithResize(System.__Canon) [Tier1, IL size=61, code size=104] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str x0, [fp, #0x18] mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x08] ldr w2, [x0, #0x08] cbz w2, G_M000_IG04 G_M000_IG03: ldr w0, [x0, #0x08] lsl w20, w0, #1 b G_M000_IG05 G_M000_IG04: mov w20, #4 G_M000_IG05: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 cmp w20, w0 csel w20, w20, w0, ls cmp w20, w1 csel w20, w20, w1, ge ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x2, [x1, #0x28] cbz x2, G_M000_IG07 G_M000_IG06: mov x0, x2 b G_M000_IG08 G_M000_IG07: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS G_M000_IG08: add x1, x19, #8 mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG09: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 br x3 ; Total bytes of code 152 2525: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:Grow(int) [Tier1, IL size=58, code size=152] ; Assembly listing for method System.Array:get_MaxLength():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 2526: JIT compiled System.Array:get_MaxLength() [Tier1, IL size=6, code size=24] ; Assembly listing for method System.Array:Resize[System.__Canon](byref,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp str x0, [fp, #0x10] mov x20, x0 mov x21, x1 mov w19, w2 G_M000_IG02: tbnz w19, #31, G_M000_IG15 ldr x22, [x21] cbnz x22, G_M000_IG08 G_M000_IG03: ldr x0, [x20, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG05 G_M000_IG04: b G_M000_IG06 G_M000_IG05: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD G_M000_IG06: sxtw x1, w19 bl CORINFO_HELP_NEWARR_1_OBJ mov x15, x0 mov x14, x21 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG07: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr w0, [x22, #0x08] cmp w0, w19 beq G_M000_IG14 ldr x0, [x20, #0x10] ldr x0, [x0, #0x20] cbz x0, G_M000_IG11 G_M000_IG09: sxtw x1, w19 bl CORINFO_HELP_NEWARR_1_OBJ mov x23, x0 add x24, x23, #16 add x25, x22, #16 ldr w0, [x22, #0x08] cmp w19, w0 csel w19, w19, w0, le ldr x0, [x20, #0x10] ldr x0, [x0, #0x28] cbz x0, G_M000_IG12 G_M000_IG10: b G_M000_IG13 G_M000_IG11: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD b G_M000_IG09 G_M000_IG12: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD G_M000_IG13: mov w3, w19 mov x1, x24 mov x2, x25 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x14, x21 mov x15, x23 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG14: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: mov w0, #71 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 348 2527: JIT compiled System.Array:Resize[System.__Canon](byref,int) [Tier1, IL size=72, code size=348] ; Assembly listing for method System.Buffer:Memmove[System.__Canon](byref,byref,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 15868 ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x0, x1 mov x1, x2 G_M000_IG02: lsl x2, x3, #3 cmp x2, #4, LSL #12 bhi G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 b System.Buffer:__BulkMoveWithWriteBarrier(byref,byref,ulong) G_M000_IG04: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 60 2528: JIT compiled System.Buffer:Memmove[System.__Canon](byref,byref,ulong) [Tier1 with Static PGO, IL size=61, code size=60] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex269_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2529: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex269_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2530: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTryMatchAtCurrentPosition():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 22 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E G_M000_IG01: LSL #32 ldr x1, [x1] stp blr x1 fp, G_M000_IG05: lr, [sp, #-0x50]! ldr x3, [x19, #0x20] stp ldr x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] w0, [x19, #0x58] stp x23, x24, [sp, #0x30] stp x25, sub w0, w0, #1 x26, [sp, #0x40] str mov w0, [x19, #0x58] fp, sp ldr w2, [x3, #0x08] mov cmp w0, w2 x19, x0 bhs G_M000_IG10 add x3, x3, #16 G_M000_IG02: str wzr, [x3, movz x0, #0xD1FFAB1Ew0, UXTW #2] sub w3, w21, w20 movk x0, #0xD1FFAB1E LSL #16 ldr x0, [x19, #0x28] movk x0, #0xD1FFAB1E LSL # mov w2, w20 32 mov bl w1, wzr CORINFO_HELP_NEWSFAST movz x4, #0xD1FFAB1E mov x20, x0 add movk x4, #0xD1FFAB1E LSL #16 x14, x20, #8 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] mov x15, x19 ldr bl wzr, [x0] CORINFO_HELP_ASSIGN_REF blr x4 ldr mov w0, #1 x21, [x19, #0x20] cbz x21, G_M000_IG04 G_M000_IG06: G_M000_IG03: ldp ldrx21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] x0, [x21, #0x08] ldp fp, lr, [sp], #0x30 ldr ret lr w2, [x21, #0x10] G_M000_IG07: mov w1, wzr mov w0, wzr movz x3, #0xD1FFAB1E G_M000_IG08: movk x3, #0xD1FFAB1E LSL #16 ldp x21, x22, [sp, #0x20] movk x3, #0xD1FFAB1E LSL #32 ldp x19, x20, [sp, #0x10] ldr ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 x3, [x3] ldr x0, [x0] blr x0 blr x3 brk_windows str #0 wzr, G_M000_IG10: [x21, #0x10] ldr w0, [x21, #0x14] add w0, w0, #1 str w0, [x21, #0x14] bl CORINFO_HELP_RNGCHKFAIL G_M000_IG04: brk_windows ldr x21, [x19, #0x28] # cbz x21, G_M000_IG06 0 G_M000_IG05: ldr x0, [x21, #0x08] ldr w2, [x21, #0x10] mov w1, wzr ; Total bytes of code 372 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str wzr, [x21, #0x10] ldr w0, [x21, #0x14] add w0, w0, #1 str w0, [x21, #0x14] G_M000_IG06: 2531: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex269_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ldr x0, [x19, #0x10] ldr x21, [x0, #0x08] ldr x2, [x21, #0x08] cbz x2, G_M000_IG08 G_M000_IG07: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 beq G_M000_IG12 G_M000_IG08: ldr x1, [x21, #0x08] mov x2, x1 cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG11 G_M000_IG10: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG11: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG26 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG27 ldr x21, [x0, #0x10] b G_M000_IG13 G_M000_IG12: mov x21, x2 G_M000_IG13: ldrb w0, [x21, #0x2E] sxtw w1, w0 sub w1, w1, #9 cmp w1, #3 bhi G_M000_IG19 G_M000_IG14: cmp w0, #12 beq G_M000_IG15 mov w20, #1 b G_M000_IG16 G_M000_IG15: ldr x0, [x21, #0x10] ldr w20, [x0, #0x08] G_M000_IG16: ldr w0, [x21, #0x28] tbz w0, #6, G_M000_IG17 neg w20, w20 G_M000_IG17: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 ldr x23, [x22] mov x1, x23 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x22, #0x30] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x23 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x23 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG18: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 br x1 G_M000_IG19: ldr x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x20, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x20, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 mov x1, x23 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x24, x0 ldr x0, [x19, #0x08] mov x1, x23 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x20, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x20, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 str w0, [x20, #0x40] ldr w25, [x20, #0x40] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 ldr x1, [x22] mov x26, x1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov x1, x23 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x20, #48 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x30] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x20, #0x38] mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x20, #0x28] ldrb w1, [x0, #0x30] cbz w1, G_M000_IG20 ldr x0, [x0, #0x10] ldrsb wzr, [x0] mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, ge b G_M000_IG21 G_M000_IG20: mov w0, #1 G_M000_IG21: strb w0, [x20, #0x3C] mov x0, x20 mov x1, x21 mov x2, xzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x38] cmp w1, #0 ble G_M000_IG22 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG22: mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x18] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x22, #0x30] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldrb w0, [x20, #0x3C] cbz w0, G_M000_IG23 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w20, w0 mov x0, x19 mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w25 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w25, w0 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w21, w0 mov x0, x19 mov w1, w25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w21 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x22, #0x40] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w25 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x22, #0x78] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w20 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 b G_M000_IG24 G_M000_IG23: ldr x0, [x19, #0x08] mov w1, w25 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 G_M000_IG24: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG25: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 br x1 G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG27: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 2284 2532: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTryMatchAtCurrentPosition() [Tier1, IL size=729, code size=2284] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2533: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.RegexTreeAnalyzer:Analyze(System.Text.RegularExpressions.RegexTree):System.Text.RegularExpressions.AnalysisResults ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov x1, x20 mov w2, #1 mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 strb w0, [x20, #0x30] mov x0, x20 G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 2534: JIT compiled System.Text.RegularExpressions.RegexTreeAnalyzer:Analyze(System.Text.RegularExpressions.RegexTree) [Tier1, IL size=29, code size=116] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:.ctor(System.Text.RegularExpressions.RegexTree):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 7 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 mov x0, x21 bl CORINFO_HELP_NEWSFAST movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x22, [x14] mov x15, x22 add x14, x0, #24 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov x0, x21 bl CORINFO_HELP_NEWSFAST mov x15, x22 add x14, x0, #24 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #40 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 144 2535: JIT compiled System.Text.RegularExpressions.AnalysisResults:.ctor(System.Text.RegularExpressions.RegexTree) [Tier1, IL size=36, code size=144] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:MayContainCapture(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w2, [x0, #0x30] cbz w2, G_M000_IG05 G_M000_IG03: ldr x0, [x0, #0x10] ldrsb wzr, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, ge G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 72 2536: JIT compiled System.Text.RegularExpressions.AnalysisResults:MayContainCapture(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=23, code size=72] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex270_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2537: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex270_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2538: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitScan(int,System.Reflection.Emit.DynamicMethod,System.Reflection.Emit.DynamicMethod):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 11 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov fp, sp mov x19, x0 mov x20, x2 mov x21, x3 G_M000_IG02: tst w1, #64 cset x22, ne ldr x0, [x19, #0x10] ldr x0, [x0, #0x08] ldr x23, [x0, #0x08] cbz x23, G_M000_IG04 G_M000_IG03: ldr x1, [x23] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG08 G_M000_IG04: ldr x1, [x0, #0x08] mov x2, x1 cbz x2, G_M000_IG07 G_M000_IG05: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG07 G_M000_IG06: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG07: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG25 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG26 ldr x24, [x0, #0x10] b G_M000_IG09 G_M000_IG08: mov x24, x23 G_M000_IG09: ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w23, w0 ldrb w0, [x24, #0x2E] sub w0, w0, #9 cmp w0, #3 bhi G_M000_IG15 G_M000_IG10: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x20, x0 movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 ldr x26, [x25] mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x21, x0 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w1, [x24, #0x2E] cmp w1, #12 beq G_M000_IG11 mov w1, #1 b G_M000_IG12 G_M000_IG11: ldr x1, [x24, #0x10] ldr w1, [x1, #0x08] G_M000_IG12: cbz w22, G_M000_IG13 movn w0, #0 b G_M000_IG14 G_M000_IG13: mov w0, #1 G_M000_IG14: mul w1, w1, w0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movk x2, #0xD1FFAB1E LSL #16 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x2, #0xD1FFAB1E LSL #32 stp ldr x2, [x2] fp, lr, [sp, #-0x30]! blr x2 ldr stp x1, [x25, #0x30] x19, x20, [sp, #0x10] mov x0, x19 stp x21, x22, [sp, #0x20] movz x2, #0xD1FFAB1E mov movk x2, #0xD1FFAB1E LSL #16 fp, sp movk x2, #0xD1FFAB1E LSL #32 mov ldr x2, [x2] x19, x0 blr x2 b G_M000_IG23 G_M000_IG15: ldr x0, [x19, #0x10] ldr x0, [x0, #0x10] G_M000_IG02: ldr w0, [x0, #0x20] ldr cmp w0, #1 w20, [x19, #0x4C] ccmp w0, #5, z, hi cmp ccmp w0, #7, z, ne w20, w2 bne G_M000_IG18 bhi G_M000_IG09 mov x0, x19 ubfiz x0, x20, #1 movz x1, #0xD1FFAB1E , #32 movk x1, #0xD1FFAB1E LSL #16 add movk x1, #0xD1FFAB1E LSL #32 x21, x1, x0 ldr x1, [x1] sub w22, w2, w20 blr x1 cmp w22, #0 mov x0, x19 bls G_M000_IG07 movz x1, #0xD1FFAB1E G_M000_IG03: movk x1, #0xD1FFAB1E LSL #16 ldrh w0, [x21] movk x1, #0xD1FFAB1E LSL #32 cmp w0, #124 ldr x1, [x1] bne G_M000_IG07 cmp w22, #1 blr x1 blo G_M000_IG09 mov x0, x19 mov x1, x20 add x0, x21, #2 sub w2, w22, #1 movz x2, #0xD1FFAB1E mov w1, #124 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E ldr x2, [x2] movk x3, #0xD1FFAB1E LSL #16 blr x2 movk x3, #0xD1FFAB1E LSL #32 mov x0, x19 mov w1, w23 ldr x3, [x3] movz x2, #0xD1FFAB1E blr movk x2, #0xD1FFAB1E LSL #16 x3 movk x2, #0xD1FFAB1E LSL #32 sub w1, w22, #1 ldr x2, [x2] cmp w0, #0 blr x2 csel w0, w0, w1, ge mov x0, x19 cmp w0, #0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ble movk x1, #0xD1FFAB1E LSL #32 G_M000_IG07 ldr x1, [x1] cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 blr x1 add x21, x21, x1 mov x0, x19 sub w22, w22, w0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 add w0, w20, w0 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #1 blr x1 bls G_M000_IG07 mov x0, x19 ldrh mov x1, x21 w1, movz x2, #0xD1FFAB1E [x21, movk x2, #0xD1FFAB1E LSL #16 #0x02] movk x2, #0xD1FFAB1E LSL #32 cmp w1, #124 ldr x2, [x2] bne G_M000_IG07 blr x2 add w0, w0, #2 mov x0, x19 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1Estr LSL #32 w0, [x19, #0x4C] ldr x2, [x2] sxtw w21, w0 blr x2 cmp w21, w20 mov x0, x19 bge G_M000_IG04 movz x1, #0xD1FFAB1E mov w0, w20 movk x1, #0xD1FFAB1E LSL #16 mov w20, w21 movk x1, #0xD1FFAB1E LSL #32 mov w21, w0 ldr x1, [ x1] blr x1 G_M000_IG04: cbnz w22, G_M000_IG16 mov x0, x19 ldr w0, [x19, #0x58] mov w1, #1 cbnz w0, G_M000_IG05 mov x0, x19 movz x2, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movk x1, ldr x2, [x2] #0xD1FFAB1E LSL #16 blr x2 movk x1, #0xD1FFAB1E LSL #32 movz x25, #0xD1FFAB1E ldr x1, [x1] movk x25, #0xD1FFAB1E LSL #16 blr x1 movk x25, #0xD1FFAB1E LSL #32 G_M000_IG05: ldr ldr x1, [x25, #0xD1FFAB1E] x3, mov x0, x19 [x19, movz x2, #0xD1FFAB1E #0x20] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr w0, [x19, #0x58] ldr x2, [x2] sub w0, w0, #1 blr x2 str w0, [x19, #0x58] b G_M000_IG17 ldr w2 G_M000_IG16: , [x3, #0x08] mov x0, x19 cmp w0, w2 mov w1, wzr bhs G_M000_IG10 movz x2, #0xD1FFAB1E add x3, x3, #16 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str wzr, [x3, ldr w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr x2, [x2] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL # blr x2 16 movk x4, #0xD1FFAB1E LSL #32 G_M000_IG17: ldr x4, [x4] movz x25, #0xD1FFAB1E ldr wzr, [x0] blr x4 mov w0, #1 movk x25, #0xD1FFAB1E LSL #16 G_M000_IG06: movk x25, #0xD1FFAB1E LSL #32 ldr x26, [x25] ldp mov x1, x26 x21, x22, [sp, #0x20] mov x0, x19 movz ldp x19, x20, [sp, #0x10] x2, #0xD1FFAB1E ldp fp, lr, [sp], #0x30 movk x2, #0xD1FFAB1E LSL ret #16 lr movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG07: blr x2 mov w0, wzr b G_M000_IG23 G_M000_IG08: G_M000_IG18: ldp x21, x22, [sp, #0x20] ldr ldp x19, x20, [sp, #0x10] x0, [x19, #0x08] ldp fp, lr, [sp], #0x30 ldr x1, [x0] ret lr ldr x1, [x1, #0x58] G_M000_IG09: ldr x1, [x1, #0x38] movz x0, #0xD1FFAB1E blr x1 movk x0, #0xD1FFAB1Esxtw w24, w0 LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x19, #0x08] ldr mov w1, w24 x0, [x0] ldr x2, [x0] blr x0 brk_windows ldr x2, [x2, #0x60] # ldr x2, [x2] 0 blr x2 G_M000_IG10: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RNGCHKFAIL ldr brk_windows x1, [x1] # blr x1 0 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ; Total bytes of code 380 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w23 2539: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex270_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x25, #0xD1FFAB1E movk x25, #0xD1FFAB1E LSL #16 movk x25, #0xD1FFAB1E LSL #32 ldr x26, [x25] mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w22, G_M000_IG19 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x25, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG20 G_M000_IG19: mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG20: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w22, G_M000_IG21 movn w1, #0 b G_M000_IG22 G_M000_IG21: mov w1, #1 G_M000_IG22: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x26 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG23: ldr x0, [x19, #0x08] mov w1, w23 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG24: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 br x1 G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG26: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 2000 2540: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitScan(int,System.Reflection.Emit.DynamicMethod,System.Reflection.Emit.DynamicMethod) [Tier1, IL size=593, code size=2000] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Ldarga_s(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #15 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x48] ldr x3, [x3, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2541: JIT compiled System.Text.RegularExpressions.RegexCompiler:Ldarga_s(int) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:EmitTimeoutCheckIfNeeded():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldrb w0, [x19, #0x34] cbz w0, G_M000_IG05 G_M000_IG03: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 2542: JIT compiled System.Text.RegularExpressions.RegexCompiler:EmitTimeoutCheckIfNeeded() [Tier1, IL size=26, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunnerFactory:.ctor(System.Reflection.Emit.DynamicMethod,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #16 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #24 mov x15, x3 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2543: JIT compiled System.Text.RegularExpressions.CompiledRegexRunnerFactory:.ctor(System.Reflection.Emit.DynamicMethod,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo) [Tier1, IL size=28, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexRunnerFactory:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2544: JIT compiled System.Text.RegularExpressions.RegexRunnerFactory:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunnerFactory:CreateInstance():System.Text.RegularExpressions.RegexRunner:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x20] cbnz x20, G_M000_IG04 G_M000_IG03: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x20, x0 add x14, x19, #32 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldp x1, x2, [x19, #0x10] add x14, x0, #112 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #120 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #128 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 148 2545: JIT compiled System.Text.RegularExpressions.CompiledRegexRunnerFactory:CreateInstance() [Tier1, IL size=48, code size=148] ; Assembly listing for method System.Reflection.MethodInfo:CreateDelegate[System.__Canon]():System.__Canon:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str x1, [fp, #0x18] mov x19, x0 G_M000_IG02: ldr x20, [x1, #0x10] ldr x0, [x20] bl CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPE mov x1, x0 mov x0, x19 ldr x2, [x19] ldr x2, [x2, #0x68] ldr x2, [x2, #0x10] blr x2 mov x1, x0 ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 2546: JIT compiled System.Reflection.MethodInfo:CreateDelegate[System.__Canon]() [Tier1, IL size=22, code size=96] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:CreateDelegate(System.Type):System.Delegate:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x70] stp x21, x22, [sp, #0x80] stp x23, x24, [sp, #0x90] stp x25, x26, [sp, #0xA0] stp x27, x28, [sp, #0xB0] mov fp, sp str x1, [fp, #0x60] mov x19, x0 G_M000_IG02: add x0, fp, #24 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x21, x0 mov x0, sp str x0, [fp, #0x38] mov x0, fp str x0, [fp, #0x48] ldr x20, [fp, #0x60] ldrb w0, [x19, #0x72] cbz w0, G_M000_IG10 G_M000_IG03: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x19, [fp, #0x68] ldr x22, [x19, #0x10] str x22, [fp, #0x58] cbnz x22, G_M000_IG04 ldr x19, [fp, #0x68] mov x0, xzr str x19, [fp, #0x68] str x20, [fp, #0x60] b G_M000_IG05 G_M000_IG04: ldr x19, [fp, #0x68] mov x0, x22 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x19, [fp, #0x68] str x20, [fp, #0x60] G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x28] adr x1, [G_M000_IG08] str x1, [fp, #0x40] add x1, fp, #24 str x1, [x21, #0x10] strb wzr, [x21, #0x0C] G_M000_IG06: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG07: blr x1 G_M000_IG08: mov w0, #1 strb w0, [x21, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG09 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG09: ldr x0, [fp, #0x20] str x0, [x21, #0x10] ldp x20, x19, [fp, #0x60] G_M000_IG10: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x2, x0 mov x0, x20 mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x20, x1 cbz x20, G_M000_IG13 G_M000_IG11: ldr x0, [x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG13 G_M000_IG12: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x20, x0 G_M000_IG13: mov x0, x20 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 mov x0, x20 G_M000_IG14: ldp x27, x28, [sp, #0xB0] ldp x25, x26, [sp, #0xA0] ldp x23, x24, [sp, #0x90] ldp x21, x22, [sp, #0x80] ldp x19, x20, [sp, #0x70] ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 464 2547: JIT compiled System.Reflection.Emit.DynamicMethod:CreateDelegate(System.Type) [Tier1, IL size=9, code size=464] ; Assembly listing for method System.Reflection.Emit.DynamicMethod:CreateDelegate(System.Type,System.Object):System.Delegate:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] mov fp, sp str x1, [fp, #0x70] str x2, [fp, #0x68] mov x19, x0 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x22, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldp x21, x20, [fp, #0x68] ldrb w0, [x19, #0x72] cbz w0, G_M000_IG10 G_M000_IG03: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x19, [fp, #0x78] ldr x23, [x19, #0x10] str x23, [fp, #0x60] cbnz x23, G_M000_IG04 ldr x19, [fp, #0x78] mov x0, xzr str x19, [fp, #0x78] str x20, [fp, #0x70] str x21, [fp, #0x68] b G_M000_IG05 G_M000_IG04: ldr x19, [fp, #0x78] mov x0, x23 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x19, [fp, #0x78] str x20, [fp, #0x70] ; Assembly listing for method System.Array:Sort[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement[],int,int,System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]) str ; Emitting BLENDED_CODEx21, for generic ARM64 CPU - Windows [fp, ; Tier-0 compilation #0x68] ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x30] adr x1, [G_M000_IG08] str x1, [fp, #0x48] add x1, fp, #32 str x1, [x22, #0x10] strb wzr, [x22, #0x0C] G_M000_IG06: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG07: blr x1 G_M000_IG08: mov w0, #1 strb w0, [x22, #0x0C] G_M000_IG01: movz x0, #0xD1FFAB1E stp movk x0, #0xD1FFAB1E LSL #16 fp, lr, [sp, #-0x60]! movk x0, #0xD1FFAB1E LSL #32 mov ldr w0, [x0] fp, sp cmp w0, #0 add beq x9, fp G_M000_IG09 , #24 bl CORINFO_HELP_STOP_FOR_GC movi G_M000_IG09: v16.16b, ldr #0 x0, [fp, #0x28] stp str q16, q16, [x9] x0, [x22, #0x10] stp xzr, xzr, [x9, #0x20] ldp str x20, x19, [fp, #0x70] x0, [fp, #0x58] ldr x21, [fp, #0x68] str G_M000_IG10: w1, mov x0, x19 [fp, #0x54] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str blr x1 w2, [fp, #0x50] mov x2, x0 mov x0, x20 str x3, [fp, #0x48] mov x1, x21 movz G_M000_IG02: x3, ldr x0, #[fp0xD1FFAB1E , #0x58] movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] cbnz x0, G_M000_IG03 blr x3 mov w0, #2 mov x1, x0 movz x1, #0xD1FFAB1E mov x20, x1 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cbz x20, G_M000_IG13 ldr x1, [x1] G_M000_IG11: blr x1 ldr x0, [x20] G_M000_IG03: movz x2, #0xD1FFAB1E ldr movk w0, [fp, #0x54] x2 tbz w0, #31, G_M000_IG04 , #0xD1FFAB1E LSL #16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movk blr x0 x2, G_M000_IG04: #0xD1FFAB1E LSL ldr #w0, 32[ fp, #0x50] cmp x0, x2 tbz beq G_M000_IG13 w0, #31, G_M000_IG05 movz x0, #0xD1FFAB1E G_M000_IG12: movk x0, #0xD1FFAB1E LSL #16 mov x0, x2 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: ldr x0, [fp, #0x58] ldr w0, [x0, #0x08] movz x2, #0xD1FFAB1E ldr w1, [fp, #0x54] sub movk x2, #0xD1FFAB1E LSL #16 w0, movk x2, #0xD1FFAB1E LSL #32 w0, w1 ldr ldr w1, [fp, #0x50] x2, [x2] cmp blr x2 w0, w1 mov x20bge G_M000_IG06 , x0 mov w0, #16 G_M000_IG13: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 mov x1, x19 movz x2, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #32 movk x2, #0xD1FFAB1E LSL #16 ldr movk x2, #0xD1FFAB1E LSL #32 x1, [x1] ldr blr x1 x2, [x2] ldr wzr, [x0] G_M000_IG06: blr x2 ldr mov x0, x20 G_M000_IG14: ldp x27, x28, [sp, #0xC0] w0, [fp, #0x50] ldp x25, x26, [sp, #0xB0] cmp w0, #1 ldp x23, x24, [ sp, #0xA0] ble G_M000_IG09 ldp x21, x22, [sp, #0x90] stp ldp x19, x20, [sp, #0x80xzr] , xzr, [fp, #0x28] ldp fp, lr, [sp], # ldr 0xD0 ret lr x0, ; Total bytes of code 480 [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x54] sxtw x1, w1 lsl x1, x1, #5 add x1, x0, x1 str x1, [fp, #0x20] 2548: JIT compiled System.Reflection.Emit.DynamicMethod:CreateDelegate(System.Type,System.Object) [Tier1, IL size=77, code size=480] ldr x1, [fp, #0x20] add x0, fp, #40 ldr w2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: ldp x0, x1, [fp, #0x28] stp x0, x1, [fp, #0x38] G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x38] ldr x2, [fp, #0x40] ldr x3, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x4, [x11] blr x4 G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 348 2549: JIT compiled System.Array:Sort[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement[],int,int,System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=78, code size=348] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement[]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] mov x1, xzr add x0, x0, x1, LSL #5 add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 2550: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetArrayDataReference[BenchmarkDotNet.Reports.Measurement](BenchmarkDotNet.Reports.Measurement[]) [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Span`1[BenchmarkDotNet.Reports.Measurement]:.ctor(byref,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] str x1, [x0] ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 52 2551: JIT compiled System.Span`1[BenchmarkDotNet.Reports.Measurement]:.ctor(byref,int) [Tier0, IL size=15, code size=52] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:get_Default():System.Collections.Generic.IArraySortHelper`1[BenchmarkDotNet.Reports.Measurement] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #69 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2552: JIT compiled System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:get_Default() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 2553: JIT compiled System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:.cctor() [Tier0, IL size=11, code size=56] ; Assembly listing for method System.Delegate:CreateDelegateNoSecurityCheck(System.Type,System.Object,System.RuntimeMethodHandle):System.Delegate ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x20, x1 mov x19, x2 G_M000_IG02: cbz x0, G_M000_IG04 cbz x19, G_M000_IG05 mov x21, x0 ldr x0, [x21] movz x1, #0xD1FFAB1E; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:CreateArraySortHelper():System.Collections.Generic.IArraySortHelper`1[BenchmarkDotNet.Reports.Measurement] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG06 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr G_M000_IG01: x1, [x1] stp ldr wzr, [x0] fp, lr, blr [sp, x1 #-0x30]! cbz w0, G_M000_IG07 mov x0 mov , x21 fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, bl #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 System.Delegate:InternalAlloc(System.RuntimeType):System.MulticastDelegate movk x0, #0xD1FFAB1E LSL #32 mov movz x1, #0xD1FFAB1E x21, x0 movk x1, #0xD1FFAB1E LSL #16 mov x0, x19 movk x1, #0xD1FFAB1E LSL #32 movz x11, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] movk movz x0, #0xD1FFAB1E x11, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movk x11, #0xD1FFAB1E LSL #32 movz ldr x1, #0xD1FFAB1E x1, [x11] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 blr x1 movz x2, #0xD1FFAB1E bl movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 System.RuntimeMethodHandle:GetDeclaringType(long):System.RuntimeType ldr mov x3, x0 x2, [x2] mov x0, x21 blr x2 mov x1, x20 str mov x2, x19 x0, [fp, #0x18] mov ldr x0, [fp, #0x20] w4, #64 ldr x1, [fp, #0x18] ldr wzr, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl ldr x2, [x2] blr x2 System.Delegate:BindToMethodInfo(System.Object,System.IRuntimeMethodInfo,System.RuntimeType,int):bool:this cbz w0, G_M000_IG08 str mov x0, x21 x0, [fp, #0x10] ldr x1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x0, #0xD1FFAB1E LSL #32 ldr movz x2, #0xD1FFAB1E x21, [sp, #0x28] movk x2, #0xD1FFAB1E LSL #16 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr movk x2, G_M000_IG04: #0xD1FFAB1E LSL #32 mov w0, #0xD1FFAB1E ldr movz x1, #0xD1FFAB1E x2, [x2] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 blr bl x2 CORINFO_HELP_STRCNS str movz x1, #0xD1FFAB1E x0, movk x1, #0xD1FFAB1E LSL #16 [fp, #0x28] movk x1, #0xD1FFAB1E LSL #32 b G_M000_IG03 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x28] G_M000_IG04: brk_windows ldp #fp, lr, [sp], #0x30 0 ret lr G_M000_IG05: ; Total bytes of code 208 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 2554: JIT compiled System.Collections.Generic.ArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:CreateArraySortHelper() [Tier0, IL size=78, code size=208] bl CORINFO_HELP_STRCNS mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG06: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG07: movz x0, #40 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr stp x3, [x3] fp, lr, [sp, #-0x20]! blr x3 mov mov x0, x19 fp, sp bl CORINFO_HELP_THROW str x0, [fp, #0x18] G_M000_IG08: movz x0, #40 G_M000_IG02: movk x0, #0xD1FFAB1E LSL #16 ldr x0, [fp, movk x0, #0xD1FFAB1E LSL #32 # bl CORINFO_HELP_NEWSFAST 0x18] mov x19, x0 movz x1, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [x1] blr x0 mov x1, x0 blr x1 mov x0, x19 G_M000_IG03: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ldp movk x2, #0xD1FFAB1E LSL #32 fp, ldr x2, [x2] lr, [sp], #0x20 blr x2 ret lr mov x0, x19 ; Total bytes of code 44 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 592 2555: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:.ctor() [Tier0, IL size=7, code size=44] 2556: JIT compiled System.Delegate:CreateDelegateNoSecurityCheck(System.Type,System.Object,System.RuntimeMethodHandle) [Tier1, IL size=131, code size=592] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:Sort(System.Span`1[BenchmarkDotNet.Reports.Measurement],System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x4, sp, #160 str x4, [fp, #0x98] str x0, [fp, #0x90] str x1, [fp, #0x80] str x2, [fp, #0x88] str x3, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x78] cbz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0x78] cmp x0, x1 bne G_M000_IG06 G_M000_IG03: ldr w0, [fp, #0x88] cmp w0, #1 ble G_M000_IG09 b G_M000_IG04 G_M000_IG04: ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x48] G_M000_IG05: ldr w0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 lsl w2, w0, #1 add w2, w2, #2 str w2, [fp, #0x1C] ldr w2, [fp, #0x1C] ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG09 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] G_M000_IG07: ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x30] G_M000_IG08: ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x10] ldr x2, [fp, #0x10] ldr x1, [fp, #0x78] ldr x0, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: b G_M000_IG10 G_M000_IG10: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG11: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG12: str x0, [fp, #0x20] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 adr x0, [G_M000_IG10] G_M000_IG13: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG14: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG15: str x0, [fp, #0x28] ldr x1, [fp, #0x28] str x1, [fp, #0x58] ldr x1, [fp, #0x58] mov w0, #64 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 adr x0, [G_M000_IG10] G_M000_IG16: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 444 2557: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:Sort(System.Span`1[BenchmarkDotNet.Reports.Measurement],System.Collections.Generic.IComparer`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=212, code size=444] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:IntroSort(System.Span`1[BenchmarkDotNet.Reports.Measurement],int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str x0, [fp, #0x90] str x1, [fp, #0x98] str w2, [fp, #0x8C] G_M000_IG02: ldr w0, [fp, #0x98] str w0, [fp, #0x88] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG08 G_M000_IG03: ldr w1, [fp, #0x88] cmp w1, #16 bgt G_M000_IG06 ldr w1, [fp, #0x88] cmp w1, #2 bne G_M000_IG04 ldr w1, [fp, #0x98] cmp w1, #1 bls G_M000_IG12 ldr x1, [fp, #0x90] add x1, x1, #32 ldr w0, [fp, #0x98] cmp w0, #0 bls G_M000_IG12 ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG04: ldr w0, [fp, #0x88] cmp w0, #3 bne G_M000_IG05 ldr w0, [fp, #0x98] cmp w0, #2 bls G_M000_IG12 ldr x0, [fp, #0x90] mov x1, #32 lsl x1, x1, #1 add x0, x0, x1 str x0, [fp, #0x78] ldr w0, [fp, #0x98] cmp w0, #1 bls G_M000_IG12 ldr x0, [fp, #0x90] add x0, x0, #32 str x0, [fp, #0x70] ldr w0, [fp, #0x98] cmp w0, #0 bls G_M000_IG12 ldr x0, [fp, #0x90] str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr x1, [fp, #0x70] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x68] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG05: add x0, fp, #144 ldr w2, [fp, #0x88] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG06: ldr w0, [fp, #0x8C] cbnz w0, G_M000_IG07 add x0, fp, #144 ldr w2, [fp, #0x88] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x30] str x1, [fp, #0x38] ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG07: ldr w0, [fp, #0x8C] sub w0, w0, #1 str w0, [fp, #0x8C] add x0, fp, #144 ldr w2, [fp, #0x88] mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x50] str x1, [fp, #0x58] ldr x0, [fp, #0x50] ldr x1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x84] ldr w2, [fp, #0x84] add w2, w2, #1 str w2, [fp, #0x64] ldr w2, [fp, #0x88] ldr w0, [fp, #0x64] sub w2, w2, w0 add x0, fp, #144 ldr w1, [fp, #0x64] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x40] str x1, [fp, #0x48] ldr x0, [fp, #0x40] ldr x1, [fp, #0x48] ldr w2, [fp, #0x8C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x84] str w0, [fp, #0x88] G_M000_IG08: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #24 mov w1, #179 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr w1, [fp, #0x88] cmp w1, #1 bgt G_M000_IG03 b G_M000_IG11 G_M000_IG11: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 724 2558: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:IntroSort(System.Span`1[BenchmarkDotNet.Reports.Measurement],int) [Tier0, IL size=187, code size=724] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:SwapIfGreater(byref,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldrsb wzr, [x0] mov w0, #1 cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 100 2559: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:SwapIfGreater(byref,byref) [Tier0, IL size=30, code size=100] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:GreaterThan(byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: b G_M000_IG03 G_M000_IG03: b G_M000_IG04 G_M000_IG04: b G_M000_IG05 G_M000_IG05: b G_M000_IG06 G_M000_IG06: b G_M000_IG07 G_M000_IG07: b G_M000_IG08 G_M000_IG08: b G_M000_IG09 G_M000_IG09: b G_M000_IG10 G_M000_IG10: b G_M000_IG11 G_M000_IG11: b G_M000_IG12 G_M000_IG12: b G_M000_IG13 G_M000_IG13: b G_M000_IG14 G_M000_IG14: b G_M000_IG15 G_M000_IG15: ldr x0, [fp, #0x48] str x0, [fp, #0x18] ldr x0, [fp, #0x40] ldp q16, q17, [x0] stp q16, q17, [fp, #0x20] ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 bgt G_M000_IG17 mov w0, wzr G_M000_IG16: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG17: mov w0, #1 G_M000_IG18: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 152 2560: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:GreaterThan(byref,byref) [Tier0, IL size=834, code size=152] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:CompareTo(BenchmarkDotNet.Reports.Measurement):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] ldr d0, [fp, #0x10] add x0, fp, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 2561: JIT compiled BenchmarkDotNet.Reports.Measurement:CompareTo(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=22, code size=112] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:Swap(byref,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldp q16, q17, [x0] stp q16, q17, [fp, #0x10] ldr x0, [fp, #0x30] ldr x1, [fp, #0x38] ldp q16, q17, [x0] stp q16, q17, [x1] ldr x0, [fp, #0x30] ldp q16, q17, [fp, #0x10] stp q16, q17, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 64 2562: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:Swap(byref,byref) [Tier0, IL size=27, code size=64] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:GetQuartile(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x38] str x0, [fp, #0x48] str w1, [fp, #0x44] G_M000_IG02: ldr w1, [fp, #0x44] lsr w1, w1, #31 ldr w8, [fp, #0x44] add w1, w1, w8 asr w1, w1, #1 lsl w1, w1, #1 ldr w8, [fp, #0x44] sub w1, w8, w1 cbnz w1, G_M000_IG04 ldr w1, [fp, #0x44] lsr w1, w1, #31 ldr w8, [fp, #0x44] add w1, w1, w8 asr w1, w1, #1 sub w1, w1, #1 add x8, fp, #32 ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr w1, [fp, #0x44] lsr w1, w1, #31 ldr w8, [fp, #0x44] add w1, w1, w8 asr w1, w1, #1 add x8, fp, #32 ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x18] fadd d0, d0, d16 fmov d16, #0.5000 fmul d0, d0, d16 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr w1, [fp, #0x44] lsr w1, w1, #31 ldr w8, [fp, #0x44] add w1, w1, w8 asr w1, w1, #1 add x8, fp, #32 ldr x0, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 add x0, fp, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 336 2563: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:GetQuartile(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],int) [Tier0, IL size=71, code size=336] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex271_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2564: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex271_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2565: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2566: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex271_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex272_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2567: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex272_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2568: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2569: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex272_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex273_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2570: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex273_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2571: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2572: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex273_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex274_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2573: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex274_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2574: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2575: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex274_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex275_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2576: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex275_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2577: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2578: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex275_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex276_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2579: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex276_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2580: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2581: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex276_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex277_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2582: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex277_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2583: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2584: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex277_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex278_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2585: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex278_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2586: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2587: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex278_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex279_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2588: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex279_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2589: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2590: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex279_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex280_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2591: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex280_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2592: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2593: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex280_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex281_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2594: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex281_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2595: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2596: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex281_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex282_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2597: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex282_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2598: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2599: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex282_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex283_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2600: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex283_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2601: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2602: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex283_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex284_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2603: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex284_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2604: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2605: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex284_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex285_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2606: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex285_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2607: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2608: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex285_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex286_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2609: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex286_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2610: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2611: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex286_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex287_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2612: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex287_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2613: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2614: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex287_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex288_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2615: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex288_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2616: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2617: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex288_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex289_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2618: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex289_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2619: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2620: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex289_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex290_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2621: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex290_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2622: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2623: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex290_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex291_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2624: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex291_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2625: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2626: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex291_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex292_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2627: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex292_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2628: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2629: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex292_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex293_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2630: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex293_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2631: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2632: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex293_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex294_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2633: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex294_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2634: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2635: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex294_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex295_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2636: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex295_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2637: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2638: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex295_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex296_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2639: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex296_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2640: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2641: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex296_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex297_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2642: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex297_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2643: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2644: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex297_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex298_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2645: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex298_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2646: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2647: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex298_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex299_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2648: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex299_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2649: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2650: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex299_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex300_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2651: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex300_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2652: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2653: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex300_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex301_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2654: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex301_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2655: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2656: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex301_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex302_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2657: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex302_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2658: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2659: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex302_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex303_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2660: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex303_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2661: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2662: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex303_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex304_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2663: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex304_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2664: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2665: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex304_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex305_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2666: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex305_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2667: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2668: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex305_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex306_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2669: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex306_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2670: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2671: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex306_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex307_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2672: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex307_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2673: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2674: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex307_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex308_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2675: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex308_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2676: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2677: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex308_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex309_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2678: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex309_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2679: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2680: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex309_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex310_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2681: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex310_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2682: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2683: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex310_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex311_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2684: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex311_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2685: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2686: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex311_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex312_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2687: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex312_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2688: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2689: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex312_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex313_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2690: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex313_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2691: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2692: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex313_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex314_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2693: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex314_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2694: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2695: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex314_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex315_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2696: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex315_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2697: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2698: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex315_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex316_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2699: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex316_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2700: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2701: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex316_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex317_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2702: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex317_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2703: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2704: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex317_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex318_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2705: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex318_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2706: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2707: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex318_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex319_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2708: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex319_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2709: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2710: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex319_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex320_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2711: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex320_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2712: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2713: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex320_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex321_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2714: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex321_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2715: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2716: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex321_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex322_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2717: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex322_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2718: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2719: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex322_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.RuntimeType:IsDelegate():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0, #0x18] mov x2, x1 tbnz w1, #1, G_M000_IG04 G_M000_IG03: ldr x1, [x2, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] cmp x1, x2 cset x1, eq b G_M000_IG05 G_M000_IG04: mov w1, wzr G_M000_IG05: uxtb w1, w1 mov w0, w1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 72 2720: JIT compiled System.RuntimeType:IsDelegate() [Tier1, IL size=55, code size=72] ; Assembly listing for method System.Runtime.CompilerServices.CastHelpers:ChkCastClassSpecial(ulong,System.Object):System.Object ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 854738 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x1] G_M000_IG03: ldr x2, [x2, #0x10] cmp x2, x0 bne G_M000_IG06 G_M000_IG04: mov x0, x1 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: cbz x2, G_M000_IG10 ldr x2, [x2, #0x10] cmp x2, x0 beq G_M000_IG04 G_M000_IG07: cbz x2, G_M000_IG10 ldr x2, [x2, #0x10] cmp x2, x0 beq G_M000_IG04 G_M000_IG08: cbz x2, G_M000_IG10 ldr x2, [x2, #0x10] cmp x2, x0 beq G_M000_IG04 G_M000_IG09: cbnz x2, G_M000_IG03 G_M000_IG10: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG11: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 112 2721: JIT compiled System.Runtime.CompilerServices.CastHelpers:ChkCastClassSpecial(ulong,System.Object) [Tier1 with Static PGO, IL size=83, code size=112] ; Assembly listing for method System.MulticastDelegate:StoreDynamicMethod(System.Reflection.MethodInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x1 G_M000_IG02: ldr x1, [x0, #0x30] cbz x1, G_M000_IG08 G_M000_IG03: ldr x1, [x0, #0x28] mov x2, x1 cbz x2, G_M000_IG06 G_M000_IG04: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG06 G_M000_IG05: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG06: add x14, x2, #16 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: add x14, x0, #16 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 136 2722: JIT compiled System.MulticastDelegate:StoreDynamicMethod(System.Reflection.MethodInfo) [Tier1, IL size=36, code size=136] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:.ctor(System.Text.RegularExpressions.CompiledRegexRunner+ScanDelegate,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #112 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #120 mov x15, x2 bl CORINFO_HELP_ASSIGN_REF add x14, x0, #128 mov x15, x3 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2723: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:.ctor(System.Text.RegularExpressions.CompiledRegexRunner+ScanDelegate,System.Buffers.IndexOfAnyValues`1[ushort][],System.Globalization.CultureInfo) [Tier1, IL size=28, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2724: JIT compiled System.Text.RegularExpressions.RegexRunner:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex323_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 ; Assembly listing for method System.Text.RegularExpressions.RegexRunner:InitTrackCount():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data bl System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG01: cbz w0, G_M000_IG04 stp G_M000_IG03: fp, lr, [sp, #-0x10]! mov x1, x21 mov w2, w20 mov mov x0, x19 fp, sp bl System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] G_M000_IG02: cmp w0, w20 ldp beq G_M000_IG04 fp, lr, [sp], #0x10 add w0, w0, #1 ret lr str w0, [x19, #0x4C] b G_M000_IG02 ; Total bytes of code 16 G_M000_IG04: ldr x21, [sp, #0x28] ldp 2725: JIT compiled System.Text.RegularExpressions.RegexRunner:InitTrackCount() [Tier1, IL size=1, code size=16] x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2726: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex323_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddAlternate():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x08] ldrb w0, [x20, #0x2E] sub w0, w0, #33 cmp w0, #1 bhi G_M000_IG04 G_M000_IG03: ldr x0, [x19, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 b G_M000_IG05 G_M000_IG04: ldp x20, x0, [x19, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #25 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 216 2727: JIT compiled System.Text.RegularExpressions.RegexParser:AddAlternate() [Tier1, IL size=94, code size=216] ; Assembly listing for method System.Nullable`1[System.ValueTuple`2[System.__Canon,int]]:get_HasValue():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 2728: JIT compiled System.Nullable`1[System.ValueTuple`2[System.__Canon,int]]:get_HasValue() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add ; Assembly listing for method System.Text.RegularExpressions.RegexPrefixAnalyzer:SortFixedDistanceSetsByQuality(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: G_M000_IG04: ldrh w0, [x22, w1, UXTW #2] stp orr w0, w0, fp, lr, [sp, #-0x20]!#2 cmp w0, #99 stp x19, x20, [sp, #0x10] beq G_M000_IG10 mov G_M000_IG08: fp, sp sxtw w24, w2 cmp w24, w25 G_M000_IG02: blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: movz x19, #0xD1FFAB1E add movk x19, #0xD1FFAB1E LSL #16 w0, w20, w24 movk x19, #0xD1FFAB1E LSL #32 str ldr w0, [x19, #0x4C] mov x1, [x19] w0, #1 mov x20, x0 cbnz x1, G_M000_IG04 G_M000_IG11: ldr x25, [sp, #0x48] G_M000_IG03: ldp movz x0, #0xD1FFAB1Ex23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldp x19, x20, [sp, #0x18] bl ldp fp, lr, [sp]CORINFO_HELP_NEWSFAST , # mov x1, x0 0x50 ret lr ldr G_M000_IG12: movz x0, #0xD1FFAB1E x15, [x19, #-0x10] movk x0, #0xD1FFAB1E LSL #16 add x14, x1, #8 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] bl CORINFO_HELP_ASSIGN_REF blr movz x14, #0xD1FFAB1E x0 movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 brk_windows #0 str G_M000_IG13: x14, [x1, #0x18] mov x14, x19 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov bl x0, x20 CORINFO_HELP_RNGCHKFAIL movz x2, #0xD1FFAB1E brk_windows #0 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ; Total bytes of code 324 ldr x2, [x2] ldr wzr, [x0] G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 132 2729: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] 2730: JIT compiled System.Text.RegularExpressions.RegexPrefixAnalyzer:SortFixedDistanceSetsByQuality(System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]) [Tier1, IL size=38, code size=132] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2731: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex323_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex324_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2732: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex324_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2733: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2734: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex324_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitFixedSet_LeftToRight|154_3(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 3 inlinees with PGO data; 65 single block inlinees; 18 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xD1FFAB1E] stp x21, x22, [sp, #0xD1FFAB1E] stp x23, x24, [sp, #0xD1FFAB1E] stp x25, x26, [sp, #0xD1FFAB1E] stp x27, x28, [sp, #0xD1FFAB1E] mov fp, sp movi v16.16b, #0 add x9, fp, #120 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] mov x19, x0 mov x20, x1 G_M000_IG02: ldr x0, [x19, #0x10] ldr x0, [x0, #0x10] ldr x21, [x0, #0x18] ldr w0, [x21, #0x10] cbz w0, G_M000_IG96 ldr x1, [x21, #0x08] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG97 G_M000_IG03: ldp q16, q17, [x1, #0x10] stp q16, q17, [fp, #0xD1FFAB1E] ldr x2, [x1, #0x30] str x2, [fp, #0xD1FFAB1E] G_M000_IG04: mov w1, #4 cmp w0, #4 csel w22, w0, w1, le mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG05: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG06: ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w24, wzr ldr x25, [fp, #0xD1FFAB1E] mov x0, x25 cbz x0, G_M000_IG10 G_M000_IG07: ldr w26, [x0, #0x08] cmp w26, #5 bne G_M000_IG10 G_M000_IG08: ldr x1, [x0, #0x0C] movz x2, #1 movk x2, #2 LSL #16 movk x2, #10 LSL #48 eor x1, x1, x2 ldr w0, [x0, #0x12] movz w2, #10 movk w2, #11 LSL #16 eor w0, w0, w2 mov w0, w0 orr x0, x1, x0 cbnz x0, G_M000_IG10 G_M000_IG09: mov w0, wzr b G_M000_IG15 G_M000_IG10: mov x0, x25 cbz x0, G_M000_IG13 G_M000_IG11: ldr w26, [x0, #0x08] cmp w26, #4 bne G_M000_IG13 G_M000_IG12: ldr x0, [x0, #0x0C] cmp x0, #16, LSL #12 cset x0, eq b G_M000_IG14 align [0 bytes for IG63] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG13: mov w0, wzr G_M000_IG14: cmp w0, #0 cset x0, eq G_M000_IG15: uxtb w26, w0 cbz w26, G_M000_IG17 G_M000_IG16: cmp w22, #1 cset x0, gt b G_M000_IG18 G_M000_IG17: mov w0, #1 G_M000_IG18: uxtb w27, w0 mov w28, wzr mov w1, wzr mov w2, wzr cbz w27, G_M000_IG20 G_M000_IG19: ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w28, w0 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 str w0, [fp, #0x2C] ldr x0, [x19, #0x08] ldr x2, [x0] ldr x2, [x2, #0x58] ldr x2, [x2, #0x38] blr x2 str w0, [fp, #0x28] mov x0, x19 mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w28 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [fp, #0x28] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldp w2, w1, [fp, #0x28] G_M000_IG20: cbz w26, G_M000_IG68 G_M000_IG21: mov w24, #1 cbz w27, G_M000_IG23 stp w2, w1, [fp, #0x28] mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG22 mov x0, x19 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG23: ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG24 stp w2, w1, [fp, #0x28] mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 ldr w1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG22 G_M000_IG24: stp w2, w1, [fp, #0x28] mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG25: ldr x0, [fp, #0xD1FFAB1E] cbz x0, G_M000_IG31 ldr x0, [fp, #0xD1FFAB1E] ldr w26, [x0, #0x08] sub w1, w26, #1 cmp w1, #2 bhi G_M000_IG30 mov w0, w1 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG26: ldr x0, [fp, #0xD1FFAB1E] cmp w26, #0 bls G_M000_IG27 ldrh w1, [x0, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG27: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG28: ldr x0, [fp, #0xD1FFAB1E] cmp w26, #0 bls G_M000_IG27 ldrh w1, [x0, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] cmp w26, #1 bls G_M000_IG27 ldrh w1, [x0, #0x12] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG29: ldr x0, [fp, #0xD1FFAB1E] cmp w26, #0 bls G_M000_IG27 ldrh w1, [x0, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] cmp w26, #1 bls G_M000_IG27 ldrh w1, [x0, #0x12] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] cmp w26, #2 bls G_M000_IG27 ldrh w1, [x0, #0x14] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG30: ldr x0, [fp, #0xD1FFAB1E] bl System.String:.ctor(ushort[]):this mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG31: ldr x1, [fp, #0xD1FFAB1E] cbz x1, G_M000_IG32 ldr x1, [fp, #0xD1FFAB1E] add x2, x1, #16 ldr w0, [x1, #0x08] mov x1, x2 mov w2, w0 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG32: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldrb w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG38 ldrb w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG85 ldrh w1, [fp, #0xD1FFAB1E] uxth w0, w1 ldrh w2, [fp, #0xD1FFAB1E] uxth w0, w0 cmp w0, w2 bne G_M000_IG35 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG33 ldr x1, [x23, #0xD1FFAB1E] b G_M000_IG34 G_M000_IG33: ldr x1, [x23, #0xD1FFAB1E] G_M000_IG34: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG35: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrh w1, [fp, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldrb w0, [fp, #0xD1FFAB1E] cbnz w0, G_M000_IG37 ldr x1, [x23, #0xD1FFAB1E] G_M000_IG36: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG57 G_M000_IG37: ldr x1, [x23, #0xD1FFAB1E] b G_M000_IG36 G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x26, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #59 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x26, #8 bl CORINFO_HELP_ASSIGN_REF mov w5, wzr G_M000_IG39: mov x6, x25 str x6, [fp, #0x18] str w5, [fp, #0xD1FFAB1E] uxth w7, w5 str w7, [fp, #0x30] ldr w0, [x6, #0x08] sxtw w8, w0 cmp w8, #1 bls G_M000_IG27 ldrh w3, [x6, #0x0E] str w8, [fp, #0x20] cmp w8, #2 bls G_M000_IG27 ldrh w4, [x6, #0x10] add w0, w3, w4 add w9, w0, #3 str w9, [fp, #0x34] mov w0, w7 mov x1, x6 mov w2, wzr movz x10, #0xD1FFAB1E movk x10, #0xD1FFAB1E LSL #16 movk x10, #0xD1FFAB1E LSL #32 ldr x10, [x10] blr x10 ldr x1, [fp, #0x18] ldrh w2, [x1, #0x0C] cmp w2, #1 bne G_M000_IG41 G_M000_IG40: cmp w0, #0 cset x0, eq cbz w0, G_M000_IG43 b G_M000_IG42 G_M000_IG41: cbz w0, G_M000_IG43 G_M000_IG42: ldr w2, [fp, #0x20] ldr w9, [fp, #0x34] cmp w2, w9 ble G_M000_IG43 ldr w0, [fp, #0x30] mov w2, w9 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG46 b G_M000_IG44 G_M000_IG43: cbnz w0, G_M000_IG46 G_M000_IG44: ldrh w1, [fp, #0xD1FFAB1E] ldr w0, [x26, #0x14] add w0, w0, #1 str w0, [x26, #0x14] ldr x0, [x26, #0x08] ldr w3, [x26, #0x10] ldr w4, [x0, #0x08] cmp w4, w3 bls G_M000_IG45 add w4, w3, #1 str w4, [x26, #0x10] add x0, x0, #16 strh w1, [x0, w3, UXTW #2] b G_M000_IG46 G_M000_IG45: mov x0, x26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG46: ldr w0, [fp, #0xD1FFAB1E] add w0, w0, #1 cmp w0, #127 mov w5, w0 ble G_M000_IG39 G_M000_IG47: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG48: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG49: mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex325_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x26, #0x10] cmp w0, #128 bne G_M000_IG50 G_M000_IG01: mov x0, x19 stp mov w1, wzr fp, lr, [sp, #-0x30]! movz x2, #0xD1FFAB1E stp movk x2, #0xD1FFAB1E LSL #16 x19, x20, [sp, #0x18] movk x2, str #0xD1FFAB1E LSL #32 x21, [sp ldr x2, [x2] , #0x28] blr x2 mov mov x0, x19 fp, mov w1, #127 sp movz mov x2, #0xD1FFAB1E x19, x0 movk x2, #0xD1FFAB1E LSL #16 mov x21, x1 movk x2, #0xD1FFAB1E LSL #32 mov w20, w2 ldr x2, [x2] blr x2 G_M000_IG02: ldr x1, [x23, #0xD1FFAB1E] mov x1, x21 mov x0, x19 mov w2, w20 movz x2, #0xD1FFAB1E mov x0, x19 movk x2, #0xD1FFAB1E LSL #16 bl movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool blr x2 cbz w0, G_M000_IG04 b G_M000_IG51 G_M000_IG03: mov x1, x21 G_M000_IG50: mov w2, w20 mov x0, x26 movz x1, #0xD1FFAB1E mov x0, x19 movk x1, #0xD1FFAB1E LSL #16 bl movk x1, #0xD1FFAB1E LSL #32 System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr x1, [x1] ldr blr x1 w0, [x19, #0x4C] mov w2, w1 cmp mov x1, x0w0, w20 beq G_M000_IG04 mov x0, x19 add movzw0, w0, #1 x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 str w0 movk x3, #0xD1FFAB1E LSL #32 , [x19, #0x4C] ldr x3, [x3] b G_M000_IG02 blr x3 G_M000_IG04: ldr ldr x1, [x23, #0xD1FFAB1E] x21, [sp, #0x28] mov x0, x19 ldp movz x2, #0xD1FFAB1E x19, x20, [sp, #0x18] movk x2, ldp fp, lr, [sp], #0x30 # ret lr0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ; Total bytes of code 108 ldr x2, [x2] blr x2 G_M000_IG51: mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E 2735: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex325_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w26, w0 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #127 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w2, w0 str w2, [fp, #0x24] ldr x0, [x19, #0x08] mov w1, w2 ldr x3, [x0] ldr x3, [x3, #0x60] ldr x3, [x3] blr x3 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 mov x1, x25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG52: blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movn w1, #0 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w26 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG53: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG54 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG55 G_M000_IG54: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG55: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG56 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG57 G_M000_IG56: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG57: cbz w27, G_M000_IG87 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG58: mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG59: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG86 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] G_M000_IG60: cmp w22, #1 ble G_M000_IG83 ldr w0, [x21, #0x10] cmp w0, #1 bls G_M000_IG84 ldr x1, [x21, #0x08] mov x2, x1 ldr w3, [x2, #0x08] cmp w3, #1 bls G_M000_IG27 G_M000_IG61: sub x4, x2, #40 ldp q16, q17, [x4, #0x60] stp q16, q17, [fp, #0x60] ldr x5, [x4, #0x80] str x5, [fp, #0x80] G_M000_IG62: ldr w26, [fp, #0x78] mov w2, #2 cmp w22, #2 ble G_M000_IG67 G_M000_IG63: cmp w2, w0 bhs G_M000_IG84 mov x4, x1 cmp w2, w3 bhs G_M000_IG27 mov w5, #40 umull x5, w2, w5 add x5, x5, #16 add x4, x4, x5 G_M000_IG64: sub x5, x4, #56 ldr x6, [x5, #0x38] str x6, [fp, #0x38] ldp q16, q17, [x5, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG65: ldr w4, [fp, #0x50] cmp w26, w4 bge G_M000_IG88 G_M000_IG66: sxtw w26, w4 add w2, w2, #1 cmp w2, w22 blt G_M000_IG63 G_M000_IG67: ldr w0, [fp, #0xD1FFAB1E] cmp w26, w0 ble G_M000_IG82 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, w26 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x2, #0xD1FFAB1E LSL #32 stp ldr x2, [x2] fp, lr, [sp, #-0x50]! blr x2 ldr x0, [x19, #0x08] stp x19, x20, [sp, #0x18] movz x1, #65 stp x21, x22, [sp, #0x28] movk x1, #0xD1FFAB1E LSL #32 stp x23, x24, [sp, #0x38] movk x1, #0xD1FFAB1E LSL #48 str ldr x25, [sp, #0x48] w2, [x20, #0x20] mov fp, sp ldr x3, [x0] mov x19, x0 ldr x3, [x3, #0x50] G_M000_IG02: ldr x3, [x3, #0x20] ldr blr x3 w20, [x19, #0x4C] ldp sxtw w21, w2 w2, w1, sub [fp, #0x28] w0, w21, #8 cmp w20, w0 G_M000_IG68: ble G_M000_IG05 cmp w24, w22 G_M000_IG03: stp str w21, [x19, #0x4C] w2, w1, [fp, #0x28 mov w0, wzr ] G_M000_IG04: bge G_M000_IG78 ldr x25, [sp, #0x48] G_M000_IG69: ldp mov x0, x19 x23, x24, [sp, #0x38] ldr x1, [fp, #0xD1FFAB1E] ldp x21, x22, [sp, #0x28] movz x3, #0xD1FFAB1E ldp x19, x20, [sp, #0x18] movk x3, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x50 movk ret lr x3, #0xD1FFAB1E LSL #32 ldr G_M000_IG05: x3, [x3] cmp w20, w21 blr x3 bhi G_M000_IG12 mov x0, x19 ubfiz ldr x0, x20x1, [, #1, #32 fp, #0xD1FFAB1E] add x22, x1, x0 movz x2, #0xD1FFAB1E sub w23, w21, w20 movk x2, #0xD1FFAB1E LSL #16 mov w24, wzr sub w25, w23, #7 movk x2, #0xD1FFAB1E LSL #32 cmp w25, #0 ldr x2, [x2] blr x2 ble G_M000_IG03 ldr G_M000_IG06: w0, [x21, #0x10] add w0, w24, #3 cmp w24, w0 bhs G_M000_IG84 cmp w0, w23 ldr x0, [x21, #0x08] bhi G_M000_IG12 ldr w1, [x0, ubfiz x1, x0, ##1, #32 0x08] add x1, x22, x1 cmp w24, w1 sub w3, w23, w0 bhs G_M000_IG27 mov x0, x1 mov w1, #40 mov w1, #97 umull x1, w24, w1 mov w2, #103 add x25, x1, #16 movz x4, #0xD1FFAB1E add x0, x0, x25 movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 G_M000_IG70: ldr sub x1, x0, #216 x4, [x4] ldr x2, [x1, #0xD8] blr x4 str x2, [fp, #0xD8] add w24, w24, w0 ldp tbnz w0, #31, G_M000_IG03 q16, q17, [x1, #0xE0] add w1, stp w24q16, q17, [fp, #0xE0] , #1 G_M000_IG71: cmp w1, w23 ldr bhs G_M000_IG13 w1, ldrh [w0, fp, #0xF0] [ cbz w1, G_M000_IG75 x22, w1, UXTW #2] G_M000_IG72: mov w2, #116 ldr w1, [x21, #0x10] cmp w24, w1 cmp w0, #103 bhs G_M000_IG84 ccmp w0, w2, z, ne G_M000_IG73: bne G_M000_IG08 sub x1, x0, #136 G_M000_IG07: ldr x2, [x1, #0x88] add w0, w24, #2 str x2, [fp, #0x88] cmp w0, w23 ldp bhs G_M000_IG13 q16, q17, [x1, #0x90] ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 stp q16, q17, [fp, #0x90] G_M000_IG74: ccmp w0, w2, z, ne mov x0, x19 beq G_M000_IG10 ldr w1, [fp, #0xA0] G_M000_IG08: movz x2, #0xD1FFAB1E sxtw w24, w1 movk x2, #0xD1FFAB1E LSL #16 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: movk x2, #0xD1FFAB1E LSL #32 add w0, w20, w24 str ldr x2, [x2] blr x2 mov x0, x19 w0, [x19, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 mov w0, #1 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr G_M000_IG75: x25, [sp, #0x48] ldr ldp x1, x23, x24, [sp, #0x38] [x23, #0xD1FFAB1E] ldp x21, x22, [sp, #0x28] mov x0, x19 ldp x19, x20, [sp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ldp movk x2, #0xD1FFAB1E LSL #32 fp, ldr x2, [x2] lr, [sp], #0x50 blr x2 ret lr mov x0, x19 G_M000_IG12: movz x1, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk movk x0, #0xD1FFAB1E LSL #16 x1, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 ldr ldr x1, [x1] x0, [x0] blr x1 ldr blr x0 w0, [x21, #0x10] brk_windows cmp w24, w0 #0 bhs G_M000_IG84 G_M000_IG13: ldr x0, [x21, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG27 bl add CORINFO_HELP_RNGCHKFAIL x0, x0, x25 brk_windows #0 G_M000_IG76: ; Total bytes of code 328 ldp q16, q17, [x0] stp q16, q17, [fp, #0xB0] ldr x1, [x0, #0x20] str x1, [fp, #0xD0] G_M000_IG77: mov x0, x19 ldr x1, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 2736: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr w1, [fp, #0x2C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w24, w24, #1 cmp w24, w22 blt G_M000_IG69 G_M000_IG78: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x23] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w27, G_M000_IG89 G_M000_IG79: ldr x0, [x19, #0x08] ldr w1, [fp, #0x2C] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w28 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x23, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w22, #1 bgt G_M000_IG80 ldr w1, [fp, #0xD1FFAB1E] cbz w1, G_M000_IG81 G_M000_IG80: ldr w1, [x20, #0x18] sub w1, w1, #1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG81: mov x0, x19 ldr w1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG89 G_M000_IG82: ldp w2, w1, [fp, #0x28] b G_M000_IG68 G_M000_IG83: ldp w2, w1, [fp, #0x28] b G_M000_IG68 G_M000_IG84: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG85: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG86: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG60 G_M000_IG87: mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG60 G_M000_IG88: sxtw w4, w26 b G_M000_IG66 G_M000_IG89: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG91 G_M000_IG90: sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG92 G_M000_IG91: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG92: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG94 G_M000_IG93: sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG95 G_M000_IG94: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG95: ldp x27, x28, [sp, #0xD1FFAB1E] ldp x25, x26, [sp, #0xD1FFAB1E] ldp x23, x24, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xD1FFAB1E] ldp x19, x20, [sp, #0xD1FFAB1E] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG96: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG97: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG98: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG99: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG100 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG101 G_M000_IG100: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG101: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG102: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG103: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG104 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG105 G_M000_IG104: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG105: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG106: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG107: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG108 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG109 G_M000_IG108: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG109: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG110: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG111: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG112 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG113 G_M000_IG112: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG113: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG114: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG115: ldp x25, x2, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] ldr w26, [x1, #0x10] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w26 bls G_M000_IG116 sxtw x1, w26 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x25, #0x14] add w0, w0, #1 str w0, [x25, #0x14] add w0, w26, #1 str w0, [x25, #0x10] b G_M000_IG117 G_M000_IG116: mov x0, x25 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG117: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr RWD00 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 ; Total bytes of code 6324 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data 2737: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitFixedSet_LeftToRight|154_3(byref) [Tier1, IL size=2024, code size=6324] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_FixedDistanceSets():System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows G_M000_IG08: ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 G_M000_IG01: mov w0, w20 stp mov w20, w21 fp, lr, mov w21, w0 [sp, #-0x10]! G_M000_IG10: mov ldr w0, [x19, #0x58] fp, sp cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E G_M000_IG02: movk x1, #0xD1FFAB1E LSL #16 ldr movk x1, #0xD1FFAB1E LSL #32 x0, [x0, #0x18] ldr x1, [x1] blr x1 G_M000_IG03: G_M000_IG11: ldp ldr x3, [x19, #0x20] fp, lr, ldr w0, [x19, #0x58] [ sub w0, w0, #1 sp], #0x10 str w0, [x19, #0x58] ret lr ldr w2, [x3, #0x08] ; Total bytes of code 20 cmp w0, w2 bhs G_M000_IG16 add 2738: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_FixedDistanceSets() [Tier1, IL size=7, code size=20] x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2739: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex325_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:RentReadOnlySpanCharLocal():System.Text.RegularExpressions.RegexCompiler+RentedLocalBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x18] mov x19, x0 G_M000_IG02: ldr x20, [x19, #0x28] cbnz x20, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_OBJ add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #40 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x0, [x19, #0x28] add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG06 G_M000_IG05: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 mov x1, x0 b G_M000_IG07 G_M000_IG06: ldr x1, [fp, #0x18] G_M000_IG07: mov x0, x20 G_M000_IG08: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 2740: JIT compiled System.Text.RegularExpressions.RegexCompiler:RentReadOnlySpanCharLocal() [Tier1, IL size=55, code size=188] ; Assembly listing for method System.Collections.Generic.Stack`1[System.__Canon]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str x0, [fp, #0x18] mov x20, x0 mov w19, w1 G_M000_IG02: tbnz w19, #31, G_M000_IG07 ldr x0, [x20] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x1, [x1, #0x20] cbz x1, G_M000_IG06 G_M000_IG03: str x1, [fp, #0x10] G_M000_IG04: sxtw x1, w19 ldr x0, [fp, #0x10] bl CORINFO_HELP_NEWARR_1_OBJ add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS str x0, [fp, #0x10] b G_M000_IG04 G_M000_IG07: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 160 2741: JIT compiled System.Collections.Generic.Stack`1[System.__Canon]:.ctor(int) [Tier1, IL size=30, code size=160] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:CreateOneWithCaseConversion(ushort,int,System.Globalization.CultureInfo,byref):System.Text.RegularExpressions.RegexNode ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 12 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x10] mov w20, w0 mov w19, w1 mov x4, x3 G_M000_IG02: tbz w19, #0, G_M000_IG07 G_M000_IG03: uxth w0, w20 add x3, fp, #16 mov x1, x2 mov x2, x4 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w1, #9 strb w1, [x0, #0x2E] and w1, w19, #0xD1FFAB1E str w1, [x0, #0x28] strh w20, [x0, #0x2C] G_M000_IG04: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: ldr x0, [fp, #0x10] ldr w1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] and w14, w19, #0xD1FFAB1E str w14, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w1, #9 strb w1, [x0, #0x2E] str w19, [x0, #0x28] strh w20, [x0, #0x2C] G_M000_IG08: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 252 2742: JIT compiled System.Text.RegularExpressions.RegexNode:CreateOneWithCaseConversion(ushort,int,System.Globalization.CultureInfo,byref) [Tier1, IL size=60, code size=252] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex326_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2743: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex326_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:Resize(int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 9186 ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp str x0, [fp, #0x18] mov x19, x0 mov w20, w1 mov w21, w2 G_M000_IG02: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x2, [x1, #0x78] cbz x2, G_M000_IG12 G_M000_IG03: mov x0, x2 G_M000_IG04: sxtw x22, w20 mov x1, x22 bl CORINFO_HELP_NEWARR_1_VC mov x23, x0 ldr w24, [x19, #0x28] ldr x0, [x19, #0x10] mov x1, x23 mov w2, w24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 uxtb w1, w21 tbnz w1, #0, G_M000_IG17 G_M000_IG05: mov x1, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movn x14, #0 mov w15, w20 cmp x15, #0 beq G_M000_IG16 udiv x14, x14, x15 add x14, x14, #1 str x14, [x19, #0x20] mov w0, wzr cmp w24, #0 ble G_M000_IG10 G_M000_IG06: ldr w14, [x23, #0x08] cmp w14, w24 blt G_M000_IG13 align [0 bytes for IG07] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG07: ubfiz x14, x0, #4, #32 add x14, x14, #16 add x1, x23, x14 ldr w14, [x1, #0x0C] cmn w14, #1 blt G_M000_IG09 G_M000_IG08: ldr w2, [x1, #0x08] ldr x3, [x19, #0x08] ldr w14, [x3, #0x08] sxtw w4, w14 ldr x15, [x19, #0x20] mov w12, w2 mul x15, x15, x12 lsr x15, x15, #32 add x15, x15, #1 mov w12, w4 mul x15, x15, x12 lsr x5, x15, #32 cmp w5, w14 bhs G_M000_IG27 add x14, x3, #16 ubfiz x15, x5, #2, #32 add x6, x14, x15 ldr w14, [x6] sub w14, w14, #1 str w14, [x1, #0x0C] add w14, w0, #1 str w14, [x6] G_M000_IG09: add w0, w0, #1 cmp w0, w24 blt G_M000_IG07 G_M000_IG10: add x14, x19, #16 mov x15, x23 bl CORINFO_HELP_ASSIGN_REF G_M000_IG11: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG12: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS b G_M000_IG04 G_M000_IG13: ldr w1, [x23, #0x08] cmp w0, w1 bhs G_M000_IG27 ubfiz x2, x0, #4, #32 add x3, x2, #16 add x1, x23, x3 ldr w4, [x1, #0x0C] cmn w4, #1 blt G_M000_IG15 G_M000_IG14: ldr w2, [x1, #0x08] ldr x3, [x19, #0x08] ldr w4, [x3, #0x08] ldr x5, [x19, #0x20] mov w6, w2 mul x2, x5, x6 lsr x2, x2, #32 add x2, x2, #1 mov w4, w4 mul x2, x2, x4 lsr x5, x2, #32 ldr w2, [x3, #0x08] cmp w5, w2 bhs G_M000_IG27 add x2, x3, #16 ubfiz x3, x5, #2, #32 add x6, x2, x3 ldr w2, [x6] sub w2, w2, #1 str w2, [x1, #0x0C] add w1, w0, #1 str w1, [x6] G_M000_IG15: add w0, w0, #1 cmp w0, w24 blt G_M000_IG13 b G_M000_IG10 G_M000_IG16: bl CORINFO_HELP_THROWDIVZERO G_M000_IG17: ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x21, [x1, #0x70] cbz x21, G_M000_IG18 b G_M000_IG19 G_M000_IG18: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x21, x0 G_M000_IG19: ldr x1, [x19, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movz x2, #0xD1FFAB1E ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 mov x1, x0 mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x21, x0 add x14, x19, #24 mov x15 G_M000_IG01: , x21 bl CORINFO_HELP_ASSIGN_REF mov w25, wzr stp b G_M000_IG26 fp, lr, [sp, #-0x30]! G_M000_IG20: ldr stp w0, [x23, #0x08] x19, x20, [sp, #0x18] cmp w25, w0 str bhs G_M000_IG27 x21, ubfiz x0, x25, #4, #32 [sp, #0x28] add mov x0, x0, #16 fp, sp add x26, x23, x0 mov ldr w0, [x26, #0x0C] x19, x0 cmn w0, #1 blt G_M000_IG25 G_M000_IG02: mov x27, x26 ldr x0, [x27] cbnz x0, G_M000_IG21 ldr mov w20, [x19, #0x4C] w28, sxtwwzr w21, w2 b G_M000_IG24 sub w0, w21, # G_M000_IG21: 4 cmp ldr x0, [x19] w20, w0 ldr ble G_M000_IG05 x1, [x0, # 0x30] ldr G_M000_IG03: x1, [x1] ldr x11, [x1, #0x58] str w21, [x19, #0x4C] cbz x11, G_M000_IG22 mov w0, wzr G_M000_IG04: b G_M000_IG23 ldr G_M000_IG22: x21, [sp, #0x28] movz x1, #0xD1FFAB1E ldp x19, x20, [sp, #0x18] movk x1, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x30 movk x1, #0xD1FFAB1E LSL #32 ret lr bl G_M000_IG05: CORINFO_HELP_RUNTIMEHANDLE_CLASS cmp w20, w21 mov x11, x0 bhi G_M000_IG07 G_M000_IG23: ubfiz x0, x20, #1, #32 mov add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E x27, x26 movk x2, #0xD1FFAB1E LSL # ldr x1, [x27] 16 mov x0, x21 ldr x2, [x11] movk x2, #0xD1FFAB1E LSL #32 blr x2 ldr x2, [x2] add x2, x2, #12 sxtw mov w3, #3 w28, w0 G_M000_IG24: movz x4, #0xD1FFAB1E str movk x4, #0xD1FFAB1E LSL #16 w28, movk x4, #0xD1FFAB1E LSL #32 [x27, #0x08] ldr x4, [x4] G_M000_IG25: blr x4 add w25, w25, #1 tbnz w0, #31, G_M000_IG03 G_M000_IG26: add w0, w20 cmp w25, w24 , w0 blt G_M000_IG20 str w0, [x19, #0x4C] b G_M000_IG05 G_M000_IG27: mov w0, #1 bl CORINFO_HELP_RNGCHKFAIL G_M000_IG06: brk_windows # ldr x21, [sp0 , #0x28] ; Total bytes of code 840 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2745: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:Resize(int,bool) [Tier1 with Static PGO, IL size=255, code size=840] 2744: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Collections.Generic.ObjectEqualityComparer`1[System.__Canon]:Equals(System.__Canon,System.__Canon):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 64968 ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! str x19, [sp, #0x28] mov fp, sp mov x0, x2 G_M000_IG02: cbz x1, G_M000_IG13 cbz x0, G_M000_IG11 str x1, [fp, #0x18] ldr x2, [x1] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG09 G_M000_IG03: cmp x1, x0 bne G_M000_IG05 G_M000_IG04: mov w19, #1 b G_M000_IG07 G_M000_IG05: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG10 ldr w2, [x1, #0x08] ldr w3, [x0, #0x08] cmp w2, w3 bne G_M000_IG10 G_M000_IG06: add x3, x1, #12 lsl w2, w2, #1 mov w2, w2 add x1, x0, #12 mov x0, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w19, w0 G_M000_IG07: uxtb ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool w0, w19 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG08: ldr x19, [sp, #0x28] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: str x0, [fp, #0x20] mov x0, x1 ldp x2, x1, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x40] ldr x2, [x2, #0x10] blr x2 sxtw w19, w0 b G_M000_IG07 G_M000_IG10: mov w19, wzr b G_M000_IG07 G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x19, [sp, #0x28] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG13: cmp x0, #0 cset x0, eq G_M000_IG14: ldr x19, [sp, #0x28] G_M000_IG01: ldp fp, lr, [sp], #0x30 stp ret lr fp, lr ; Total bytes of code 248 , [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str 2746: JIT compiled System.Collections.Generic.ObjectEqualityComparer`1[System.__Canon]:Equals(System.__Canon,System.__Canon) [Tier1 with Static PGO, IL size=50, code size=248] xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 ; Assembly listing for method System.Object:Equals(System.Object):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr G_M000_IG01: x3, [x19, #0x20] stp ldr w0, [x19, #0x58] fp, sub w0, w0, #1lr, [sp, #-0x10]! str w0, [x19, #0x58] mov fp, sp ldr w2, [x3, #0x08] G_M000_IG02: cmp w0, w2 cmp bhs G_M000_IG12 x0, x1 add x3, x3, #16 cset x0, eq G_M000_IG03: str ldp wzr, [x3, w0, UXTW #2] fp, lr, [sp], #0x10 sub w3, w21, w20 ret ldr x0, [x19, #0x28] lr mov w2, w20 ; Total bytes of code 24 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 2747: JIT compiled System.Object:Equals(System.Object) [Tier1, IL size=5, code size=24] movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2748: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex326_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReplaceChild(int,System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x20, x0 mov w21, w1 mov x19, x2 G_M000_IG02: add x14, x19, #24 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 add x14, x19, #24 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF ldr x14, [x20, #0x08] cbz x14, G_M000_IG04 G_M000_IG03: ldr x14, [x14] movz x15, #0xD1FFAB1E movk x15, #0xD1FFAB1E LSL #16 movk x15, #0xD1FFAB1E LSL #32 cmp x14, x15 beq G_M000_IG09 G_M000_IG04: ldr x1, [x20, #0x08] mov x22, x1 cbz x22, G_M000_IG07 G_M000_IG05: ldr x0, [x22] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG07 G_M000_IG06: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x22, x0 G_M000_IG07: ldr w0, [x22, #0x10] cmp w21, w0 bhs G_M000_IG11 ldr x0, [x22, #0x08] sxtw x1, w21 mov x2, x19 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x22, #0x14] add w0, w0, #1 str w0, [x22, #0x14] G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: add x14, x20, #8 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG10: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 284 2749: JIT compiled System.Text.RegularExpressions.RegexNode:ReplaceChild(int,System.Text.RegularExpressions.RegexNode) [Tier1, IL size=62, code size=284] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex327_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2750: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex327_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2751: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:ReduceAtomic():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows mov ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 12 inlinees with PGO data; 20 single block inlinees; 6 inlinees without PGO data fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 G_M000_IG01: bne G_M000_IG13 stp G_M000_IG12: fp, lr, [sp, #-0x70]! ldrh stp w0, [x1, #0x04] x19, x20, [sp, #0x20] mov w1, #83 stp x21, x22, [sp, #0x30] cmp w0, #68 stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] ccmp w0 stp x27, x28, [sp, #0x60] , w1, z, ne mov bne G_M000_IG13 fp, sp add w0, w20, #3 mov cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 x19 ldr x1, [x0] , x0 ldr w0, [x0, #0x08] cmp w0 G_M000_IG02: , #3 ldr blt G_M000_IG20 w0, [x19, #0x28] G_M000_IG14: tbz w0, #10, ldr w0, [x1] G_M000_IG04 G_M000_IG03: movz w3, #87 mov x0, x19 b G_M000_IG71 align [0 bytes for IG25] movk w3, #97 LSL #16 align [0 bytes] align [0 bytes] eor w0 align [0 bytes] , w0, w3 ldr G_M000_IG04: w1, mov x20, x19 [x1 ldr x1, [x20, #, #0x02]0x08] mov x21, x1 movz w3, #97 cbz x21, G_M000_IG06 movk w3, #83 LSL #16 G_M000_IG05: eor w1, w1, w3 ldr orr w0, w0, w1 x0, [x21] cbnz w0, G_M000_IG20 movz x2, #0xD1FFAB1E G_M000_IG15: add w0, w20, #3 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp w0, w2 cmp bhi G_M000_IG22 x0, G_M000_IG16: x2 beq G_M000_IG10 str w0, [x19, #0x4C] G_M000_IG06: sxtw w23, w0 mov x2, x1 cbz x2, G_M000_IG09 cmp w23, w20 G_M000_IG07: bge G_M000_IG17 ldr x0, [x2] mov w0, w20 movz x3, #0xD1FFAB1E mov w20, w23 movk x3, #0xD1FFAB1E LSL #16 mov w23, w0 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG17: cmp x0, x3 ldr w0, [x19, #0x58] beq G_M000_IG09 cbnz w0, G_M000_IG18 G_M000_IG08: mov x0, x19 mov x0, x3 movz x2, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL ldr x2, [x2] #32 ldr x1, [x1] blr x1 blr x2 G_M000_IG18: mov x2, x0 G_M000_IG09: ldr ldr x3, [x19, #0x20] w0, [x2, #0x10] ldr w0, [x19, #0x58] cmp w0, #0 sub w0, w0, #1 str w0 bls G_M000_IG75 , [x19, #0x58] ldr x0, [x2, #0x08] ldr w2, [x3, ldr w1, [x0, #0x08] # cmp w1, #0 0x08] bls G_M000_IG76 cmp w0, w2 bhs G_M000_IG23 ldr x22, [x0, #0x10] add x3, x3, #16 b G_M000_IG11 G_M000_IG10: str wzr, [x3, w0, UXTW #2] mov x22, x21 sub w3, w23, w20 G_M000_IG11: ldr x0, [x19, #0x28] ldrb mov w2, w20 w0, mov w1, wzr [x22, #0x2E] movz x4, #0xD1FFAB1E cmp w0, #32 bne G_M000_IG19 movk x4, #0xD1FFAB1E LSL #16 G_M000_IG12: movk x4, #0xD1FFAB1E LSL #32 mov x20, x22 ldr x4, [x4] ldr x22, [x20, #0x08] cbz x22, G_M000_IG14 G_M000_IG13: ldr x0, [x22] ldr wzr, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 blr x4 cmp x0, x1 mov w0, #1 beq G_M000_IG18 G_M000_IG14: ldr x1, [x20, #0x08] G_M000_IG19: mov ldp x2, x1 x23, cbz x2, G_M000_IG17 x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] G_M000_IG15: ldp x19, x20, [sp, ldr #0x50] x0, [x2] ldp fp, lr, [sp], #0x80 movz x3, #0xD1FFAB1E ret lr movk x3, #0xD1FFAB1E LSL #16 G_M000_IG20: movk x3, #0xD1FFAB1E LSL #32 mov w0, wzr G_M000_IG21: cmp x0, x3 ldp x23, x24, [sp, #0x70] beq G_M000_IG17 ldp x21, x22, [sp, #0x60] G_M000_IG16: ldp x19, x20, mov x0, x3 [sp, #0x50] movz x2, #0xD1FFAB1E ldp fp, lr, [sp], #0x80 movk x2, #0xD1FFAB1E LSL #16 ret lr G_M000_IG22: movk x2, #0xD1FFAB1E LSL #32 movz x0, ldr x2, [x2] #0xD1FFAB1E blr x2 movk x0, #0xD1FFAB1E LSL #16 mov x2, x0 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG17: ldr x0, [x0] ldr blr x0 w0, [x2, #0x10] brk_windows cmp w0, #0 #0 G_M000_IG23: bls G_M000_IG75 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bl CORINFO_HELP_RNGCHKFAIL bls G_M000_IG76 brk_windows ldr #x22, [x0, #0x10] 0 b G_M000_IG18 ; Total bytes of code 652 G_M000_IG18: ldrb w0, [x22, #0x2E] cmp w0, #32 beq G_M000_IG12 G_M000_IG19: ldrb w0, [x22, #0x2E] cmp w0, #23 bhi G_M000_IG21 sub w1, w0, #3 cmp w1, #5 bls G_M000_IG22 sub w0, w0, #22 cmp w0, #1 bhi G_M000_IG66 G_M000_IG20: mov x0, x22 b G_M000_IG71 G_M000_IG21: 2752: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex327_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] cmp w0, #24 beq G_M000_IG23 sub w0, w0, #43 cmp w0, #2 bhi G_M000_IG66 b G_M000_IG20 G_M000_IG22: mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG20 G_M000_IG23: ldr w1, [x19, #0x28] tbnz w1, #6, G_M000_IG66 ldr x1, [x22, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x19, x0 ldr w21, [x19, #0x10] cbz w21, G_M000_IG75 ldr x23, [x19, #0x08] mov x0, x23 ldr w24, [x0, #0x08] cmp w24, #0 bls G_M000_IG76 ldr x0, [x0, #0x10] ldrb w0, [x0, #0x2E] cmp w0, #23 bne G_M000_IG24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w2, [x22, #0x28] mov w1, #23 strb w1, [x0, #0x2E] str w2, [x0, #0x28] b G_M000_IG71 G_M000_IG24: mov w1, #1 sub w2, w21, #1 cmp w2, #1 ble G_M000_IG28 G_M000_IG25: cmp w1, w21 bhs G_M000_IG75 mov x0, x23 cmp w1, w24 bhs G_M000_IG76 add x0, x0, #16 ldr x0, [x0, w1, UXTW #3] ldrb w0, [x0, #0x2E] cmp w0, #23 beq G_M000_IG27 add w1, w1, #1 cmp w1, w2 blt G_M000_IG25 G_M000_IG26: b G_M000_IG28 G_M000_IG27: add w2, w1, #1 sub w2, w21, w2 add w1, w1, #1 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG28: mov w21, wzr mov w23, wzr ldr w0, [x19, #0x10] cmp w0, #0 ble G_M000_IG66 G_M000_IG29: ldr w0, [x19, #0x10] cmp w23, w0 bhs G_M000_IG75 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG76 add x0, x0, #16 ldr x0, [x0, w23, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz x0, G_M000_IG60 G_M000_IG30: add w24, w23, #1 b G_M000_IG32 G_M000_IG31: add w24, w24, #1 G_M000_IG32: ldr w0, [x19, #0x10] cmp w24, w0 bge G_M000_IG33 cmp w24, w0 bhs G_M000_IG75 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w24, w1 bhs G_M000_IG76 add x0, x0, #16 ldr x0, [x0, w24, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz x0, G_M000_IG31 G_M000_IG33: sub w0, w24, w23 cmp w0, #3 blt G_M000_IG59 cmp w23, w24 bge G_M000_IG59 G_M000_IG34: ldr w0, [x19, #0x10] cmp w23, w0 bhs G_M000_IG75 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG76 add x0, x0, #16 ldr x0, [x0, w23, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldrb w1, [x0, #0x2E] cmp w1, #9 beq G_M000_IG36 G_M000_IG35: ldr x0, [x0, #0x10] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG76 ldrh w25, [x0, #0x0C] b G_M000_IG37 G_M000_IG36: ldrh w25, [x0, #0x2C] G_M000_IG37: b G_M000_IG39 G_M000_IG38: add w23, w23, #1 G_M000_IG39: cmp w23, w24 bge G_M000_IG44 G_M000_IG40: ldr w0, [x19, #0x10] cmp w23, w0 bhs G_M000_IG75 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w23, w1 bhs G_M000_IG76 add x0, x0, #16 ldr x0, [x0, w23, UXTW #3] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldrb w1, [x0, #0x2E] cmp w1, #9 beq G_M000_IG42 G_M000_IG41: ldr x0, [x0, #0x10] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG76 ldrh w0, [x0, #0x0C] b G_M000_IG43 G_M000_IG42: ldrh w0, [x0, #0x2C] G_M000_IG43: cmp w0, w25 beq G_M000_IG38 G_M000_IG44: cmp w23, w24 bge G_M000_IG58 G_M000_IG45: add w26, w23, #1 cmp w26, w24 bge G_M000_IG58 G_M000_IG46: ldr w0, [x19, #0x10] cmp w26, w0 bhs G_M000_IG75 ldr x0, [x19, #0x08] ldr w1, [x0, #0x08] cmp w26, w1 bhs G_M000_IG76 add x0, x0, #16 ldr x27, [x0, w26, UXTW #3] mov x0, x27 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldrb w1, [x0, #0x2E] cmp w1, #9 beq G_M000_IG48 G_M000_IG47: ldr x0, [x0, #0x10] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG76 ldrh w0, [x0, #0x0C] b G_M000_IG49 G_M000_IG48: ldrh w0, [x0, #0x2C] G_M000_IG49: cmp w0, w25 bne G_M000_IG57 G_M000_IG50: mov x0, x19 mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w0, w23, #1 sxtw w28, w0 ldr w0, [x19, #0x10] cmp w23, w0 bhi G_M000_IG74 ldr x1, [x19, #0x08] ldr w1, [x1, #0x08] cmp w1, w0 bne G_M000_IG55 G_M000_IG51: add w1, w0, #1 ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] cbnz w0, G_M000_IG65 G_M000_IG52: mov w0, #4 G_M000_IG53: movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 cmp w0, w2 bhi G_M000_IG72 str w0, [fp, #0x1C] cmp w0, w1 blt G_M000_IG73 G_M000_IG54: mov x0, x19 ldr w1, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG55: ldr w4, [x19, #0x10] cmp w23, w4 blt G_M000_IG64 G_M000_IG56: ldr x0, [x19, #0x08] sxtw x1, w23 mov x2, x27 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x10] add w0, w0, #1 str w0, [x19, #0x10] ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] mov w21, #1 mov w23, w28 G_M000_IG57: add w26, w26, #1 cmp w26, w24 blt G_M000_IG46 G_M000_IG58: cmp w23, w24 blt G_M000_IG34 G_M000_IG59: sxtw w23, w24 G_M000_IG60: add w23, w23, #1 ldr w0, [x19, #0x10] cmp w23, w0 blt G_M000_IG29 G_M000_IG61: cbz w21, G_M000_IG66 mov x0, x20 mov x2, x22 mov w1, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr x1, [x20, #0x08] mov x22, x1 cbz x22, G_M000_IG67 G_M000_IG62: ldr x0, [x22] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 bne G_M000_IG67 G_M000_IG63: b G_M000_IG66 G_M000_IG64: ldr w4, [x19, #0x10] sub w4, w4, w23 ldr x2, [x19, #0x08] mov x0, x2 add w3, w23, #1 mov w1, w23 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG56 G_M000_IG65: ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] lsl w0, w0, #1 b G_M000_IG53 G_M000_IG66: mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 mov x0, x20 b G_M000_IG71 G_M000_IG67: mov x2, x1 cbz x2, G_M000_IG70 G_M000_IG68: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG70 G_M000_IG69: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG70: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG75 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG76 ldr x22, [x0, #0x10] b G_M000_IG66 G_M000_IG71: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG72: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 cmp w0, w1 str w0, [fp, #0x1C] bge G_M000_IG54 G_M000_IG73: sxtw w0, w1 str w0, [fp, #0x1C] b G_M000_IG54 G_M000_IG74: mov w0, #21 mov w1, #12 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG75: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG76: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1864 2753: JIT compiled System.Text.RegularExpressions.RegexNode:ReduceAtomic() [Tier1, IL size=512, code size=1864] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex328_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data 2754: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex328_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x20, x0 mov x19, x2 G_M000_IG02: tbnz w1, #31, G_M000_IG07 cmp w1, #0 ble G_M000_IG04 G_M000_IG03: mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: cbz x19, G_M000_IG06 G_M000_IG05: movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x14, [x14] cmp x19, x14 beq G_M000_IG06 add x14, x20, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov w0, #22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 136 2755: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]) [Tier1, IL size=136, code size=136] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Initialize(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str x0, [fp, #0x10] mov x19, x0 G_M000_IG02: mov w0, w1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 sxtw x1, w20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 ldr x0, [x19] ldr x1, [x0, #0x30] ldr x1, [x1] ldr x2, [x1, #0x20] cbz x2, G_M000_IG04 G_M000_IG03: mov x0, x2 b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS G_M000_IG05: sxtw x1, w20 bl CORINFO_HELP_NEWARR_1_VC movn w14, #0 str w14, [x19, #0x3C] movn x14, #0 mov w15, w20 cmp x15, #0 beq G_M000_IG07 udiv x14, x14, x15 add x14, x14, #1 str x14, [x19, #0x30] add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF mov w0, w20 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 216 2756: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[System.__Canon,int]]:Initialize(int) [Tier1, IL size=56, code size=216] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2757: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAtomic|13(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] add x3, sp, #80 str x3, [fp, #0x28] mov x19, x0 mov x20, x2 G_M000_IG02: ldr x21, [x1, #0x08] cbz x21, G_M000_IG04 G_M000_IG03: ldr x0, [x21] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG08 G_M000_IG04: ldr x1, [x1, #0x08] mov x2, x1 cbz x2, G_M000_IG07 G_M000_IG05: ldr x0, [x2] movz x3, #0xD1FFAB1E ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows movk x3, #0xD1FFAB1E LSL #16 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG07 G_M000_IG06: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG07: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG18 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG19 ldr x22, [x0, #0x10] b G_M000_IG09 G_M000_IG08: mov x22, x21 G_M000_IG09: ldr x0, [x19, #0x28] ldrb w1, [x0, #0x30] cbz w1, G_M000_IG11 G_M000_IG10: ldr x0, [x0, #0x18] cbz x0, G_M000_IG14 mov x1, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbnz w0, #31, G_M000_IG14 G_M000_IG01: G_M000_IG11: ldr w21, [x19, #0x40] stp ldr x0, [x19, #0x08] fp, lr, [sp, #-0x40]! movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp movk str xzr, [fp, #0x18] x1, #0xD1FFAB1E LSL #32 str xzr, [fp, #0x20] mov ldr x19, x0 x1, [x1] G_M000_IG02: blr x1 ldr str w20, [x19, #0x4C] x0, [fp, #0x18] cmp str w20x1, [fp, #0x20] , w2 bhi G_M000_IG13 G_M000_IG12: ubfiz ldr x0, [x19, #0x08] x0, x20, #1, #32 ldr x1, [x19, #0x30] add x0, x1, x0 movz x2, #0xD1FFAB1E mov x1, x0 movk x2, #0xD1FFAB1E LSL #16 sub w3, w2, w20 movk x2, #0xD1FFAB1E LSL #32 cmp w3, #1 ldr x2, [x2] blr x2 bls G_M000_IG04 ldr x0, [x19, #0x08] G_M000_IG03: ldrh ldr x1, [fp, #0x20] w3, [x1] movz x2, #0xD1FFAB1E cmp w3, #97 movk x2, # bne G_M000_IG04 0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldrh ldr x2, [x2] w1, [x1, #0x02] blr x2 mov w3, #83 mov mov w4, #116 cmp x0 w1, #78, x19 mov x1, x22 ccmp w1, w3, z, ne mov x2, x20 ccmp w1, w4, z, ne mov w3, #1 bne G_M000_IG04 movz add w0, w20, #2 cmp w0, x4, #0xD1FFAB1E w2 movk x4, #0xD1FFAB1E LSL #16 bhi G_M000_IG13 movk x4, #0xD1FFAB1E LSL #32 b G_M000_IG07 ldr x4, [x4] blr x4 G_M000_IG04: ldr sub w1, w2, w20 x0, [x19, #0x08] str ldr x1, [fp, #0x20] x0, [fp, #0x18] movz x2, #0xD1FFAB1E str w1, [fp, #0x20] movk x2, #0xD1FFAB1E LSL #16 add x0 movk x2, #0xD1FFAB1E LSL #32 , fp, #24 ldr x2, [x2] ldr x1, [x0] blr x2 ldr w0, [x0, #0x08] ldr x0, [x19, #0x08] cmp w0, #2 ldr x1, [x19, #0x30] blt G_M000_IG11 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 G_M000_IG05: movk x2, #0xD1FFAB1E LSL #32 ldr ldr x2, [x2] blr x2 w0, [x1] str movz w1w21, [x19, #0x40] , #66 movk w1, #89 LSL #16 G_M000_IG13: cmp w0, w1 ldp bne G_M000_IG11 x19, x2, [fp, #0x18] ldr x1, [fp, #0x18] G_M000_IG06: ldr w20, [x1, #0x10] add w0, w20, #2 ldr x1, [ cmp w0, w2 fp, #0x18] bhi G_M000_IG13 ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] G_M000_IG07: cmp w1, w20 bls G_M000_IG16 str sxtw x1, w20 w0, [x19, #0x4C] bl CORINFO_HELP_ARRADDR_ST sxtw w21, w0 ldr cmp w21, w20 w0, [x19, #0x14] bge G_M000_IG08 add w0, w0, #1 mov w0, w20 str w0, [x19, #0x14] add mov w20, w21 w0, w20, #1 str w0, [x19, #0x10] mov w21, w0 b G_M000_IG17 G_M000_IG08: G_M000_IG14: ldr mov x0, x19 w0, [x19, #0x58] mov x1, cbnz w0, G_M000_IG09 x22 mov mov x2, x20 x0, x19 mov w3, #1 movz x1, # 0xD1FFAB1E movz x4, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr x1, [x1] blr x4 blr x1 G_M000_IG15: G_M000_IG09: ldp x21, x22, [sp, #0x40] ldr x3, [x19, #0x20] ldp ldr w0, [x19, #0x58] x19, x20, [sp, #0x30] sub w0, w0, #1 ldp fp, lr, [sp], #0x50 ret lr str G_M000_IG16: w0, [x19, #0x58] mov x0, x19 ldr w2, [x3 mov x1, x2 , #0x08] movz x2, #0xD1FFAB1E cmp w0, w2 movk x2, #0xD1FFAB1E LSL #16 bhs G_M000_IG14 movk x2, #0xD1FFAB1E LSL #32 add x3, x3, #16 ldr x2, [x2] str blr x2 wzr, [x3, w0, UXTW #2] G_M000_IG17: sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 ldp x21, x22, [sp, #0x40] movk x4, #0xD1FFAB1E LSL #32 ldp ldr x4, [x4] x19, x20, [sp, #0x30] ldr wzr, [x0] ldp fp, lr, [sp], #0x50 blr x4 ret lr mov w0, #1 G_M000_IG18: G_M000_IG09: ldr movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 x21 ldr , [sp, #0x38x0] , [x0] ldp blr x0 x19, x20, [sp, #0x28] brk_windows # ldp fp, lr, [sp], #0 0x40 G_M000_IG19: ret lr bl CORINFO_HELP_RNGCHKFAIL G_M000_IG11: brk_windows #0 mov w0, wzr G_M000_IG20: G_M000_IG12: stp fp, lr, ldr [spx21, [sp, #0x38] , #-0x40]! ldp x19, x20, [sp, #0x28] stp x19, x20, [sp, #0x20] ldp fp, lr, [sp stp x21, x22, [sp, #0x30] ], # add x3, fp, #80 0x40 str ret lr x3 G_M000_IG13: , [sp, #0x18] movz x0, #0xD1FFAB1E G_M000_IG21: movk x0, #0xD1FFAB1E LSL #16 ldp x19, x2, [fp, #0x18] movk ldr x0, #0xD1FFAB1E LSL #32 x1, [fp, #0x18] ldr x0, [x0] ldr blr x0 w20, [x1, #0x10] brk_windows ldr #0 x1 G_M000_IG14: , [fp, #0x18] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG22 bl sxtw x1, w20 CORINFO_HELP_RNGCHKFAIL bl CORINFO_HELP_ARRADDR_ST ldr brk_windows #0 w0, [x19, #0x14] add w0, w0, #1 ; Total bytes of code 392 str w0, [x19, #0x14] add w0, w20, #1 str w0, [x19, #0x10] b G_M000_IG23 G_M000_IG22: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 2758: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex328_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG23: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 732 2759: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAtomic|13(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode) [Tier1, IL size=152, code size=732] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:MayBacktrack(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w2, [x0, #0x30] cbz w2, G_M000_IG07 G_M000_IG03: ldr x0, [x0, #0x18] cbnz x0, G_M000_IG05 mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, ge G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 84 2760: JIT compiled System.Text.RegularExpressions.AnalysisResults:MayBacktrack(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=29, code size=84] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAlternation|4(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 17 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xB0]! stp x19, x20, [sp, #0x60] stp x21, x22, [sp, #0x70] stp x23, x24, [sp, #0x80] stp x25, x26, [sp, #0x90] stp x27, x28, [sp, #0xA0] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 add x14, x21, #24 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w22, w0 ldr w23, [x19, #0x40] ldr x0, [x19, #0x28] ldr x0, [x0, #0x08] ldrsb wzr, [x0] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x24, ge ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w25, w0 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x21, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x21, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w26, [x19, #0x38] str xzr, [x21, #0x08] ldrb w0, [x19, #0x3C] cbz w0, G_M000_IG05 G_M000_IG03: ldr x0, [x19, #0x28] ldrb w1, [x0, #0x30] cbz w1, G_M000_IG04 ldr x0, [x0, #0x10] ldrsb wzr, [x0] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbz w0, #31, G_M000_IG04 cbnz w24, G_M000_IG05 G_M000_IG04: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2, #0x28] blr x2 add x14, x21, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex329_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG01: ldr x0, [x19, #0x08] ldr x1, [x21, #0x08] stp movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 fp, lr, [sp, #-0x30]! movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] stp blr x2 x19, x20, [sp, #0x18] str G_M000_IG05: x21, [sp, #0x28] cbnz w24, G_M000_IG10 mov G_M000_IG06: fp, sp ldr x0, [x19, #0x28] mov x19, x0 ldrb w1, [x0, #0x30] mov x21, x1 cbz w1, G_M000_IG08 ldr x0, [x0, #0x20] cbnz x0, G_M000_IG07 mov w27, wzr b G_M000_IG09 mov G_M000_IG07: w20, w2 mov x1, x20 movz x2, #0xD1FFAB1E G_M000_IG02: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x1, x21 ldr x2, [x2] mov w2, w20 blr x2 mov x0, x19 blcmp w0, #0 cset x27, ge b G_M000_IG09 G_M000_IG08: mov w27, #1 System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG09: cbz w0, G_M000_IG04 cmp w27, #0 G_M000_IG03: cset x1, eq mov x1, x21 b G_M000_IG11 mov w2, w20 G_M000_IG10: mov x0, x19 mov w1, wzr G_M000_IG11: bl uxtb w27, w1 sxtw x1, w22 System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movz x0, #0xD1FFAB1E cbnz w0, G_M000_IG04 movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 w0, [x19, #0x4C] bl cmp CORINFO_HELP_NEWARR_1_VC w0, w20 mov x28, x0 beq G_M000_IG04 ldr add x0, [x19, #0x08] w0, w0, #1 ldr x0, [x0, #0x08] str w0, [x19, #0x4C] ldr x1, [x0] b ldr x1, [x1, #0x58] G_M000_IG02 ldr x1, [x1, #0x38] G_M000_IG04: blr x1 ldr x21, [sp, #0x28 str w0, [fp, #0x58] ] ldp cbnz w27, G_M000_IG13 x19, x20, G_M000_IG12: [sp, #0x18] ldp fp, lr, [sp], #0x30 mov x27, xzr ret lr b G_M000_IG14 ; Total bytes of code 108 G_M000_IG13: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E2761: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex329_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x3, [x0] ldr x3, [x3, #0x60] ldr x3, [x3, #0x28] blr x3 mov x27, x0 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x1, x0 str x1, [fp, #0x38] add x14, x1, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF str wzr, [x1, #0x10] ldr w0, [x1, #0x10] cmp w0, w22 bge G_M000_IG31 G_M000_IG15: ldr w0, [x1, #0x10] sub w2, w22, #1 cmp w0, w2 cset x2, eq str w2, [fp, #0x5C] mov w3, wzr cbnz w2, G_M000_IG17 G_M000_IG16: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x3, [x0] ldr x3, [x3, #0x58] ldr x3, [x3, #0x38] blr x3 sxtw w2, w0 str w2, [fp, #0x54] str w2, [x19, #0x40] b G_M000_IG18 G_M000_IG17: str w23, [x19, #0x40] str w3, [fp, #0x54] G_M000_IG18: ldr x1, [fp, #0x38] ldr w1, [x1, #0x10] mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x0 mov x0, x19 mov x2, xzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbnz w24, G_M000_IG26 G_M000_IG19: cbnz x27, G_M000_IG25 ldr x2, [fp, #0x38] ldr x1, [x2, #0x08] ldr x1, [x1, #0x08] cbnz x1, G_M000_IG20 mov w1, wzr b G_M000_IG21 G_M000_IG20: mov w1, #1 G_M000_IG21: add w1, w1, #2 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [fp, #0x48] mov x0, x1 bl CORINFO_HELP_NEWSFAST mov x1, x0 add x14, x1, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0x40] str x2, [x1, #0x18] mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x38] ldr x2, [x1, #0x08] mov x15, x2 str x15, [fp, #0x20] ldr x0, [x15, #0x08] cbz x0, G_M000_IG23 ldr x0, [x15, #0x20] str x0, [fp, #0x28] cbnz x0, G_M000_IG22 ldr x0, [fp, #0x48] bl CORINFO_HELP_NEWSFAST ldr x15, [fp, #0x20] mov x1, x15 cbz x15, G_M000_IG39 add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF ldr x2, [fp, #0x40] sub x14, x2, #168 str x14, [x0, #0x18] add x14, x1, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str x0, [fp, #0x28] G_M000_IG22: mov x0, x19 ldr x1, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG23: ldr x1, [fp, #0x38] ldr x2, [x1, #0x08] mov x15, x2 str x15, [fp, #0x18] ldr x0, [x15, #0x28] str x0, [fp, #0x30] cbnz x0, G_M000_IG24 ldr x0, [fp, #0x48] bl CORINFO_HELP_NEWSFAST ldr x15, [fp, #0x18] mov x1, x15 cbz x15, G_M000_IG39 add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x40] sub x14, x14, #144 str x14, [x0, #0x18] add x14, x1, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF str x0, [fp, #0x30] G_M000_IG24: mov x0, x19 ldr x1, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG26 G_M000_IG25: ldr x0, [x19, #0x08] ldr x2, [fp, #0x38] ldr w1, [x2, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] mov x1, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG26: ldr x2, [fp, #0x38] ldr w0, [x2, #0x10] ldr w1, [x19, #0x40] ldr w3, [x28, #0x08] cmp w0, w3 bhs G_M000_IG40 ubfiz x0, x0, #2, #32 add x0, x0, #16 str w1, [x28, x0] ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG28 G_M000_IG27: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG28: ldr x0, [x19, #0x08] mov w1, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [fp, #0x5C] cbnz w0, G_M000_IG30 G_M000_IG29: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr w1, [fp, #0x54] ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x2, [fp, #0x38] ldr x1, [x2, #0x08] ldr x1, [x1, #0x10] ldr x0, [x19, #0x08] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w26, [x19, #0x38] ldr x2, [fp, #0x38] ldr x1, [x2, #0x08] ldr x1, [x1, #0x08] cbz x1, G_M000_IG30 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG30: ldr x0, [fp, #0x38] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ldr w1, [x0, #0x10] add w1, w1, #1 str w1, [x0, #0x10] cmp w1, w22 mov x1, x0 blt G_M000_IG15 G_M000_IG31: cbz w24, G_M000_IG35 G_M000_IG32: str w23, [x19, #0x40] G_M000_IG33: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] mov w1, w25 ldr x2, [x0] ldr x2, [x2, #0x60] G_M000_IG01: ldr x2, [x2] stp blr x2 fp, lr G_M000_IG34: , ldp [sp, #-0x30]!x27, x28, [sp, #0xA0] ldp x25, x26, [sp, #0x90] stp ldp x23, x24, [sp, #0x80] x19, x20, [sp ldp x21, x22, [sp, #0x70] , #0x18] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0xB0 ret lr G_M000_IG35: ldr w20, [fp, #0x58] str w20, [x19, #0x40] ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] mov w1, w20 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz x27, G_M000_IG37 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x21, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x21, #0x08] cbz x0, G_M000_IG36 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x21, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 str movk x21, x2, #0xD1FFAB1E LSL #32 [sp, # ldr 0x28] x2, [x2 mov ] fp, sp blr x2 mov x19, x0 G_M000_IG02: G_M000_IG01: mov x0, x19 ldr movz x1, #0xD1FFAB1E w20, movk [x19, #0x4C] x1, #0xD1FFAB1E LSL #16 sxtw w21, w2 movk x1, #0xD1FFAB1E sub LSL #32 ldr x1, [x1] w0, w21, #2 blr x1 b G_M000_IG38 cmp w20, w0 G_M000_IG37: ldr ble G_M000_IG05 x0, [x19, #0x08] G_M000_IG03: mov x1, x27 str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp movzx19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 x2, ret lr #0xD1FFAB1E G_M000_IG05: cmp w20, w21 movk x2, #0xD1FFAB1E LSL #16 bhi G_M000_IG07 movk x2, #0xD1FFAB1E LSL #32 ldr ubfiz x0, x20, #1, #32 x2, [x2] add x0, x1, x0 blr x2 sub w2, w21, w20 mov w1 G_M000_IG38: , #60 ldr x0, [x19, #0x08] movz x3, #0xD1FFAB1E mov x1, x28 movz x2, #0xD1FFAB1E movk x3, # movk x2, #0xD1FFAB1E LSL #16 0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movk ldr x2, [x2] x3, #0xD1FFAB1E LSL #32 ldr blr x3, [x2 x3] b G_M000_IG33 G_M000_IG39: blr x3 movz x0, #0xD1FFAB1E tbnz w0, #31, G_M000_IG03 add w0, w20, w0 movk str w0, [x19, #0x4C] x0, #0xD1FFAB1E LSL #16 mov w0, #1 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG06: ldr x0, [x0] ldr x21, [sp, #0x28] blr ldp x19, x20, [sp, #0x18] x0 ldp fp, lr, [sp], #0x30 ret lr brk_windows G_M000_IG07: # movz x0, #0xD1FFAB1E 0 movk x0, #0xD1FFAB1E LSL #16 G_M000_IG40: movk x0 bl , #0xD1FFAB1E LSL #32 CORINFO_HELP_RNGCHKFAIL ldr x0, [x0] brk_windows # blr x0 0 brk_windows # ; Total bytes of code 2092 0 ; Total bytes of code 164 2762: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] 2763: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitAlternation|4(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=919, code size=2092] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_1:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2764: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_1:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Text.RegularExpressions.AnalysisResults:IsAtomicByAncestor(System.Text.RegularExpressions.RegexNode):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] ldrsb wzr, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cmp w0, #0 cset x0, ge G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2765: JIT compiled System.Text.RegularExpressions.AnalysisResults:IsAtomicByAncestor(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=13, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_2:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 2766: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_2:.ctor() [Tier1, IL size=7, code size=16] ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Grow(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x0, #0x08] ldr w3, [x2, #0x08] cbz w3, G_M000_IG04 G_M000_IG03: ldr w2, [x2, #0x08] lsl w2, w2, #1 b G_M000_IG05 G_M000_IG04: mov w2, #4 G_M000_IG05: movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 cmp w2, w3 csel w2, w2, w3, ls cmp w2, w1 csel w2, w2, w1, ge mov w1, w2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 88 2767: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:Grow(int) [Tier1, IL size=53, code size=88] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr ; Assembly listing for method System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:set_Capacity(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation x4, [x4]; optimized code ; fp based frame ; partially interruptible ; No PGO data ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG01: stp G_M000_IG09: fp, lr, [sp, #-0x30]! movz x0, #0xD1FFAB1E stp movk x0, #0xD1FFAB1E LSL #16 movk x19, x20, [sp, #0x18] str x0, #0xD1FFAB1E LSL #32 x21, [sp, #0x28] ldr mov x0fp, sp , [x0] mov blrx19, x0 x0 brk_windows G_M000_IG02: #0 ldr G_M000_IG10: w20, [x19, #0x10] cmp w1, w20 blt G_M000_IG08 ldr x0, [x19, #0x08] ldr bl w0, [x0, #0x08] CORINFO_HELP_RNGCHKFAIL cmp w0, w1 brk_windows beq #0 G_M000_IG07 ; Total bytes of code 372 G_M000_IG03: cmp w1, #0 ble G_M000_IG06 sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 cmp w20, #0 ble G_M000_IG04 ldr x0, 2768: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex329_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] [x19, #0x08] mov w2, w20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: add x14, x19, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #55 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 ldr x15, [x14] add x14, x19, #8 bl CORINFO_HELP_ASSIGN_REF G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: mov w0, #7 mov w1, #15 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 240 2769: JIT compiled System.Collections.Generic.List`1[System.ValueTuple`2[ushort,ushort]]:set_Capacity(int) [Tier1, IL size=86, code size=240] ; Assembly listing for method System.Text.ValueStringBuilder:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x15, x0 mov x14, x19 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [x19] cbz x0, G_M000_IG06 G_M000_IG03: add x1, x0, #16 ldr w0, [x0, #0x08] G_M000_IG04: add x2, x19, #16 str x1, [x2] str w0, [x2, #0x08] str wzr, [x19, #0x08] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov x1, xzr mov w0, wzr b G_M000_IG04 ; Total bytes of code 120 2770: JIT compiled System.Text.ValueStringBuilder:.ctor(int) [Tier1, IL size=42, code size=120] ; Assembly listing for method System.Span`1[ushort]:op_Implicit(ushort[]):System.Span`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG06 G_M000_IG03: add x2, x0, #16 ldr w1, [x0, #0x08] G_M000_IG04: mov x0, x2 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: mov x2, xzr mov w1, wzr b G_M000_IG04 ; Total bytes of code 44 2771: JIT compiled System.Span`1[ushort]:op_Implicit(ushort[]) [Tier1, IL size=7, code size=44] ; Assembly listing for method System.Text.ValueStringBuilder:AsSpan(int,int):System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x0, x0, #16 mov w1, w1 add x3, x1, w2, UXTW ldr w4, [x0, #0x08] cmp x3, x4 bhi G_M000_IG04 ldr x0, [x0] lsl x1, x1, #1 add x0, x0, x1 sxtw w1, w2 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 80 2772: JIT compiled System.Text.ValueStringBuilder:AsSpan(int,int) [Tier1, IL size=19, code size=80] ; Assembly listing for method System.Text.ValueStringBuilder:AsSpan():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: add x1, x0, #16 ldr w0, [x0, #0x08] ldr w2, [x1, #0x08] cmp w0, w2 bhi G_M000_IG04 ldr x1, [x1] str w0, [fp, #0x1C] mov x0, x1 ldr w1, [fp, #0x1C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 76 2773: JIT compiled System.Text.ValueStringBuilder:AsSpan() [Tier1, IL size=24, code size=76] ; Assembly listing for method System.MemoryExtensions:CommonPrefixLength[ushort](System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 2 ; 2 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x4, x2 G_M000_IG02: mov w2, w1 mov w1, w3 cmp x2, x1 csel x2, x2, x1, ls lsl x2, x2, #1 mov x1, x4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 lsr x0, x0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 68 2774: JIT compiled System.MemoryExtensions:CommonPrefixLength[ushort](System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]) [Tier1 with Static PGO, IL size=148, code size=68] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex330_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ; Assembly listing for method System.SpanHelpers:CommonPrefixLength(byref,byref,ulong):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 2 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2775: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex330_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x2, #16 bhs G_M000_IG18 and x3, x2, #3 cbnz x3, G_M000_IG08 G_M000_IG03: sub x4, x2, #4 cmp x3, x4 ble G_M000_IG05 G_M000_IG04: mov x3, x2 b G_M000_IG06 G_M000_IG05: ldrb w4, [x0, x3] ldrb w5, [x1, x3] cmp w4, w5 bne G_M000_IG14 add x4, x3, #1 ldrb w5, [x0, x4] ldrb w6, [x1, x4] cmp w5, w6 bne G_M000_IG15 add x5, x3, #2 ldrb w4, [x0, x5] ldrb w6, [x1, x5] cmp w4, w6 bne G_M000_IG16 add x4, x3, #3 ldrb w5, [x0, x4] ldrb w6, [x1, x4] cmp w5, w6 bne G_M000_IG17 add x3, x3, #4 b G_M000_IG03 G_M000_IG06: mov x0, x3 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: ldrb w4, [x0] ldrb w5, [x1] cmp w4, w5 beq G_M000_IG10 mov x0, xzr G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG10: cmp x3, #1 bls G_M000_IG03 ldrb w4, [x0, #0x01] ldrb w5, [x1, #0x01] cmp w4, w5 beq G_M000_IG12 mov x0, #1 G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: cmp x3, #2 bls G_M000_IG03 ldrb w4, [x0, #0x02] ldrb w5, [x1, #0x02] cmp w4, w5 beq G_M000_IG03 mov x0, #2 G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG14: b G_M000_IG06 G_M000_IG15: mov x3, x4 b G_M000_IG06 G_M000_IG16: mov x3, x5 b G_M000_IG06 G_M000_IG17: mov x3, x4 b G_M000_IG06 G_M000_IG18: sub x3, x2, #16 mov x4, xzr b G_M000_IG20 G_M000_IG19: ldr q16, [x0, x4] ldr q17, [x1, x4] cmeq v16.16b, v16.16b, v17.16b ldr q17, [@RWD00] and v16.16b, v16.16b, v17.16b ldr q17, [@RWD16] ushl v16.16b, v16.16b, v17.16b mov v17.16b, v16.16b addv b17, v17.8b umov w5, v17.b[0] ext v16.16b, v16.16b, v16.16b, #8 addv b16, v16.8b umov w6, v16.b[0] orr w5, w5, w6, LSL #8 mov w6, #0xD1FFAB1E cmp w5, w6 bne G_M000_IG21 add x4, x4, #16 G_M000_IG20: cmp x4, x3 blo G_M000_IG19 mov x4, x3 ldr q16, [x0, x4] ldr q17, [x1, x4] cmeq v16.16b, v16.16b, v17.16b ldr q17, [@RWD00] and v16.16b, v16.16b, v17.16b ldr q17, [@RWD16] ushl v16.16b, v16.16b, v17.16b mov v17.16b, v16.16b addv b17, v17.8b umov w0, v17.b[0] ext v16.16b, v16.16b, v16.16b, #8 addv b16, v16.8b umov w1, v16.b[0] orr w5, w0, w1, LSL #8 mov w0, #0xD1FFAB1E cmp w5, w0 beq G_M000_IG04 G_M000_IG21: mvn w0, w5 rbit w0, w0 clz w0, w0 add x3, x4, w0, UXTW b G_M000_IG06 RWD00 dq 8080808080808080h, 8080808080808080h RWD16 dq 00FFFEFDFCFBFAF9h, 00FFFEFDFCFBFAF9h ; Total bytes of code 452 2776: JIT compiled System.SpanHelpers:CommonPrefixLength(byref,byref,ulong) [Tier1 with Static PGO, IL size=337, code size=452] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexNode:FirstCharOfOneOrMulti():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov G_M000_IG01: fp, sp mov x19, x0 stp G_M000_IG02: fp, lr, [sp, #-0x10]! ldr w20 mov , [x19, #0x4C] fp, sp sxtw w21, w2 G_M000_IG02: sub w0, w21, #3 ldrb cmp w20, w0 ble w1, [x0, #0x2E] G_M000_IG05 G_M000_IG03: cmp w1, #9 str w21, [x19, #0x4C] beq G_M000_IG05 mov w0, wzr G_M000_IG03: G_M000_IG04: ldr ldr x21, [sp, #0x28] x0, [x0, #0x10] ldp x19, x20, [sp, #0x18] ldr w1 ldp fp, lr, [sp], #0x30 , [x0, #0x08] ret lr cmp w1, #0 G_M000_IG05: cmp w20, w21 bls G_M000_IG07 bhi G_M000_IG07 ldrh ubfiz x0, x20, #1, #32 w0, [x0, #0x0C] add x0, x1, x0 G_M000_IG04: sub w2, w21, w20 ldp mov w1, #124 fp, lr, [sp], #0x10 ret lr movz x3, #0xD1FFAB1E G_M000_IG05: movk x3, #0xD1FFAB1E LSL #16 ldrh w0, [x0, #0x2C] movk x3, #0xD1FFAB1E LSL #32 G_M000_IG06: ldr ldp fp, lr, [spx3, [x3] ], #0x10 blr ret lr x3 G_M000_IG07: tbnz w0, #31, G_M000_IG03 bl CORINFO_HELP_RNGCHKFAIL add w0, w20, w0 brk_windows #0 ; Total bytes of code 68 2777: JIT compiled System.Text.RegularExpressions.RegexNode:FirstCharOfOneOrMulti() [Tier1, IL size=30, code size=68] str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2778: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Math:Max(int,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 66100 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w0, w1 csel w0, w0, w1, ge G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 2779: JIT compiled System.Math:Max(int,int) [Tier1 with Static PGO, IL size=8, code size=24] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BneFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #64 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 2780: JIT compiled System.Text.RegularExpressions.RegexCompiler:BneFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:RemoveRange(int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x20, x0 mov w3, w1 mov w19, w2 G_M000_IG02: tbnz w3, #31, G_M000_IG07 tbnz w19, #31, G_M000_IG08 ldr w4, [x20, #0x10] sub w1, w4, w3 cmp w1, w19 blt G_M000_IG09 cmp w19, #0 ble G_M000_IG06 G_M000_IG03: sub w4, w4, w19 str w4, [x20, #0x10] cmp w3, w4 bge G_M000_IG04 sub w4, w4, w3 add w1, w3, w19 ldr x0, [x20, #0x08] mov x2, x0 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG04: ldr w0, [x20, #0x14] add w0, w0, #1 str w0, [x20, #0x14] ldr x0, [x20, #0x08] ldr w1, [x20, #0x10] mov w2, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG08: mov w0, #27 mov w1, #13 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG09: mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 256 2781: JIT compiled System.Collections.Generic.List`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:RemoveRange(int,int) [Tier1, IL size=136, code size=256] ; Assembly listing for method System.Char:System.IUtfChar.CastFrom(uint):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxth w0, w0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ret ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data lr ; Total bytes of code 20 2782: JIT compiled System.Char:System.IUtfChar.CastFrom(uint) [Tier1, IL size=3, code size=20] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32; Assembly listing for method System.Math:DivRem(uint,uint):System.ValueTuple`2[uint,uint] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] G_M000_IG01: cmp w0, w2 stp bhs G_M000_IG10 fp add , lr, [sp, #-x3, x3, #16 0x20]! str wzr, mov [x3, fp, sp w0, UXTW #2] sub G_M000_IG02: w3, w21 cmp w1, #0, w20 beq G_M000_IG04 ldr udiv w2, w0, w1 x0 str , [x19, #0x28] w2, [fp, #0x18] mov w2, w20 mov w1, wzr msub w0, w2, w1, w0 movz x4, #0xD1FFAB1E str w0, [fp, #0x1C] movk x4, #0xD1FFAB1E LSL #16 ldr x0, [fp, #0x18] movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] G_M000_IG03: ldr wzr, [x0] ldp blr x4 fp, lr, [sp], #0x20 mov w0, #1 ret lr G_M000_IG06: G_M000_IG04: ldp x21, x22, [sp, #0x20] bl ldp x19, x20, [sp, #0x10] CORINFO_HELP_THROWDIVZERO ldp fp, lr, [sp], #0x30 brk_windows ret lr #0 G_M000_IG07: ; Total bytes of code 52 mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] 2783: JIT compiled System.Math:DivRem(uint,uint) [Tier1, IL size=16, code size=52] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2784: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex330_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.Regex:Match(System.String):System.Text.RegularExpressions.Match:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x1, G_M000_IG07 ldr w5, [x1, #0x08] mov x2, x0 mov x3, x1 ldr w2, [x2, #0x40] tbnz w2, #6, G_M000_IG04 G_M000_IG03: mov w6, wzr b G_M000_IG05 G_M000_IG04: mov x3, x1 ldr w6, [x3, #0x08] G_M000_IG05: mov w1, #2 movn w2, #0 mov w4, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x7 G_M000_IG07: mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 112 2785: JIT compiled System.Text.RegularExpressions.Regex:Match(System.String) [Tier1, IL size=43, code size=112] ; Assembly listing for method System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:SwapIfGreater(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,int) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0xA0]! stp x19, x20, [sp, #0x90] mov fp, sp add x9, fp, #104 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] G_M000_IG02: mov x5, x2 cmp w3, w1 bhs G_M000_IG10 mov w2, #40 umull x2, w3, w2 add x19, x0, x2 G_M000_IG03: ldp q16, q17, [x19] stp q16, q17, [fp, #0x40] ldr x2, [x19, #0x20] str x2, [fp, #0x60] G_M000_IG04: cmp w4, w1 bhs G_M000_IG10 mov w1, #40 umull x1, w4, w1 add x20, x0, x1 G_M000_IG05: sub x0, x20, #24 ldr x1, [x0, #0x18] str x1, [fp, #0x18] ldp q16, q17, [x0, #0x20] stp q16, q17, [fp, #0x20] G_M000_IG06: ldr x0, [x5, #0x08] add x1, fp, #64 add x2, fp, #24 ldr x3, [x5, #0x18] blr x3 cmp w0, #0 ble G_M000_IG09 G_M000_IG07: sub x13, x19, #104 ldr x14, [x13, #0x68] str x14, [fp, #0x68] ldp q16, q17, [x13, #0x70] stp q16, q17, [fp, #0x70] G_M000_IG08: mov x14, x19 mov x13, x20 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 mov x14, x20 add x13, fp, #104 bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 G_M000_IG09: ldp x19, x20, [sp, #0x90] ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 232 2786: JIT compiled System.Collections.Generic.ArraySortHelper`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet]:SwapIfGreater(System.Span`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],System.Comparison`1[System.Text.RegularExpressions.RegexFindOptimizations+FixedDistanceSet],int,int) [Tier1, IL size=90, code size=232] ; Assembly listing for method System.Text.RegularExpressions.Regex:CreateRunner():System.Text.RegularExpressions.RegexRunner:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 32 2787: JIT compiled System.Text.RegularExpressions.Regex:CreateRunner() [Tier1, IL size=12, code size=32] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:get_IsNotoneFamily():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x2E] cmp w0, #7 bhi G_M000_IG04 G_M000_IG03: cmp w0, #4 ccmp w0, #7, z, ne beq G_M000_IG05 b G_M000_IG06 G_M000_IG04: mov w1, #44 cmp w0, #10 ccmp w0, w1, z, ne bne G_M000_IG06 G_M000_IG05: mov w0, #1 b G_M000_IG07 G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 72 2788: JIT compiled System.Text.RegularExpressions.RegexNode:get_IsNotoneFamily() [Tier1, IL size=39, code size=72] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG04 ldrh w0, [x0, #0x0C] cmp w0, #1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 48 2789: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsNegated(System.String) [Tier1, IL size=11, code size=48] ; Assembly listing for method System.String:op_Implicit(System.String):System.ReadOnlySpan`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: cbnz x0, G_M000_IG05 G_M000_IG03: mov x0, xzr mov w1, wzr G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: add x1, x0, #12 ldr w0, [x0, #0x08] str w0, [fp, #0x1C] mov x0, x1 ldr w1, [fp, #0x1C] G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 2790: JIT compiled System.String:op_Implicit(System.String) [Tier1, IL size=31, code size=56] ; Assembly listing for method System.Text.RegularExpressions.Regex:Replace(System.String,System.String):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: cbz x1, G_M000_IG07 mov x0, x19 mov x20, x1 mov x21, x2 ldr w0, [x0, #0x40] tbnz w0, #6, G_M000_IG04 G_M000_IG03: mov w22, wzr b G_M000_IG05 G_M000_IG04: mov x20, x1 ldr w22, [x20, #0x08] G_M000_IG05: cbz x21, G_M000_IG08 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w5, [x19, #0x40] ldr x2, [x19, #0x18] ldr w3, [x19, #0x44] ldr x4, [x19, #0x20] mov x1, x21 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 mov x1, x19 mov x2, x20 movn w3, #0 mov w4, w22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x5 G_M000_IG07: mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG08: mov w0, #13 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 236 2791: JIT compiled System.Text.RegularExpressions.Regex:Replace(System.String,System.String) [Tier1, IL size=36, code size=236] ; Assembly listing for method System.Text.RegularExpressions.Regex:Replace(System.String,System.String,int,int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 mov w22, w3 mov w23, w4 G_M000_IG02: cbz x20, G_M000_IG04 cbz x21, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w5, [x19, #0x40] ldr x2, [x19, #0x18] ldr w3, [x19, #0x44] ldr x4, [x19, #0x20] mov x1, x21 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 mov x1, x19 mov x2, x20 mov w3, w22 mov w4, w23 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] G_M000_IG03: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 br x5 G_M000_IG04: mov w0, #7 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG05: mov w0, #13 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 224 2792: JIT compiled System.Text.RegularExpressions.Regex:Replace(System.String,System.String,int,int) [Tier1, IL size=66, code size=224] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:GetZValue(int,int):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x28] str xzr, [fp, #0x20] str w0, [fp, #0x3C] str w1, [fp, #0x38] G_M000_IG02: ldr w0, [fp, #0x38] cmp w0, #1 bgt G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x0, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG04: ldr w0, [fp, #0x3C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 fmov d1, #1.0000 fsub d0, d1, d0 str d0, [fp, #0x18] ldr d0, [fp, #0x18] ldr w0, [fp, #0x38] sub w0, w0, #1 scvtf d1, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 228 2793: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:GetZValue(int,int) [Tier0, IL size=46, code size=228] ; Assembly listing for method System.Text.RegularExpressions.Regex:get_RegexReplacementWeakReference():System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x30] cbnz x0, G_M000_IG04 G_M000_IG03: add x20, x19, #48 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST mov x21, x0 mov x0, xzr mov w1, wzr bl System.Runtime.InteropServices.GCHandle:InternalAlloc(System.Object,int):long str x0, [x21, #0x08] mov x0, x20 mov x1, x21 mov x2, xzr bl System.Threading.Interlocked:CompareExchange(byref,System.Object,System.Object):System.Object cbnz x0, G_M000_IG04 ldr x0, [x19, #0x30] G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2794: JIT compiled System.Text.RegularExpressions.Regex:get_RegexReplacementWeakReference() [Tier1, IL size=39, code size=108] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:ToPercent(int):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str wzr, [fp, #0x28] str wzr, [fp, #0x24] str xzr, [fp, #0x10] str w0, [fp, #0x2C] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #66 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w1, [fp, #0x2C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x18] ldr w0, [fp, #0x18] str w0, [fp, #0x28] ldr w0, [fp, #0x1C] str w0, [fp, #0x24] ldr w0, [fp, #0x24] scvtf d1, w0 fmov d0, #10.0000 bl System.Math:Pow(double,double):double ldr w0, [fp, #0x28] scvtf d16, w0 fdiv d0, d16, d0 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 152 2795: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:ToPercent(int) [Tier0, IL size=44, code size=152] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 2796: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:.cctor() [Tier0, IL size=11, code size=56] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:CreateConfidenceLevelMapping():System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x68] ldr x0, [fp, #0x60] str x0, [fp, #0x58] ldr x0, [fp, #0x68] str x0, [fp, #0x50] ldr x0, [fp, #0x68] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] str x0, [fp, #0x50] G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x48] ldr x0, [fp, #0x58] str x0, [fp, #0x40] ldr x0, [fp, #0x50] str x0, [fp, #0x38] ldr x0, [fp, #0x48] str x0, [fp, #0x30] ldr x0, [fp, #0x48] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #114 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x28] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] str x0, [fp, #0x30] G_M000_IG04: ldr x0, [fp, #0x40] ldr x1, [fp, #0x38] ldr x2, [fp, #0x30] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 556 2797: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions:CreateConfidenceLevelMapping() [Tier0, IL size=88, code size=556] ; Assembly listing for method System.Linq.Enumerable:Cast[int](System.Collections.IEnumerable):System.Collections.Generic.IEnumerable`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbz x0, G_M000_IG04 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG05 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 140 2798: JIT compiled System.Linq.Enumerable:Cast[int](System.Collections.IEnumerable) [Tier0, IL size=29, code size=140] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 2799: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 2800: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](System.Collections.Generic.IEnumerable`1[int],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]]):System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr x2, [fp, #0x18] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 64 2801: JIT compiled System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](System.Collections.Generic.IEnumerable`1[int],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]]) [Tier0, IL size=10, code size=64] ; Assembly listing for method System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](System.Collections.Generic.IEnumerable`1[int],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]],System.Collections.Generic.IEqualityComparer`1[int]):System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x4, sp, #160 str x4, [fp, #0x98] str x0, [fp, #0x90] str x1, [fp, #0x88] str x2, [fp, #0x80] str x3, [fp, #0x78] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x90] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x88] cbnz x0, G_M000_IG04 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x80] cbnz x0, G_M000_IG05 mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: str wzr, [fp, #0x74] ldr x1, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x0, [fp, #0x68] cbz x0, G_M000_IG11 ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x74] ldr w0, [fp, #0x74] cbnz w0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x78] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG07: ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG09 ldr x0, [fp, #0x58] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] ldr x3, [fp, #0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG08: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG09: ldr x1, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x50] ldr x0, [fp, #0x50] cbz x0, G_M000_IG11 ldr x0, [fp, #0x50] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] ldr x3, [fp, #0x78] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG10: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr w1, [fp, #0x74] ldr x2, [fp, #0x78] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] str x0, [fp, #0x60] ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x48] G_M000_IG12: b G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x44] ldr x0, [fp, #0x88] ldr x0, [x0, #0x08] ldr w1, [fp, #0x44] ldr x2, [fp, #0x88] ldr x2, [x2, #0x18] blr x2 str w0, [fp, #0x34] ldr x0, [fp, #0x80] ldr x0, [x0, #0x08] ldr w1, [fp, #0x44] ldr x2, [fp, #0x80] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr w1, [fp, #0x34] ldr x2, [fp, #0x28] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG14: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG16 G_M000_IG15: add x0, fp, #24 mov w1, #150 bl CORINFO_HELP_PATCHPOINT G_M000_IG16: ldr x0, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG13 b G_M000_IG17 G_M000_IG17: ldr x0, [fp, #0x98] bl G_M000_IG21 G_M000_IG18: nop G_M000_IG19: ldr x0, [fp, #0x60] G_M000_IG20: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG21: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG22: ldr x0, [fp, #0x48] cbz x0, G_M000_IG23 ldr x0, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG23: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 844 2802: JIT compiled System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](System.Collections.Generic.IEnumerable`1[int],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]],System.Collections.Generic.IEqualityComparer`1[int]) [Tier0, IL size=175, code size=844] ; Assembly listing for method System.SZArrayHelper:get_Count[int]():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 2803: JIT compiled System.SZArrayHelper:get_Count[int]() [Tier0, IL size=11, code size=40] ; Assembly listing for method System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](int[],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]],System.Collections.Generic.IEqualityComparer`1[int]):System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x28] str x0, [fp, #0x58] str x1, [fp, #0x50] str x2, [fp, #0x48] str x3, [fp, #0x40] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x1, [fp, #0x58] ldr w1, [x1, #0x08] ldr x0, [fp, #0x28] ldr x2, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x38] str wzr, [fp, #0x34] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG04 G_M000_IG03: ldr x1, [fp, #0x58] ldr w0, [fp, #0x34] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG08 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0x50] ldr x0, [x0, #0x08] ldr x2, [fp, #0x50] ldr x2, [x2, #0x18] blr x2 str w0, [fp, #0x24] ldr x1, [fp, #0x58] ldr w0, [fp, #0x34] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG08 add x1, x1, x0, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] ldr x2, [fp, #0x48] ldr x2, [x2, #0x18] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x38] ldr w1, [fp, #0x24] ldr x2, [fp, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG04: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #16 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w1, [fp, #0x34] ldr x0, [fp, #0x58] ldr w0, [x0, #0x08] cmp w1, w0 blt G_M000_IG03 ldr x0, [fp, #0x38] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2804: JIT compiled System.Linq.Enumerable:ToDictionary[int,int,System.ValueTuple`2[int,int]](int[],System.Func`2[int,int],System.Func`2[int,System.ValueTuple`2[int,int]],System.Collections.Generic.IEqualityComparer`1[int]) [Tier0, IL size=58, code size=348] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w0, [fp, #0x24] tbz w0, #31, G_M000_IG03 mov w0, #22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr w0, [fp, #0x24] cmp w0, #0 ble G_M000_IG04 ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: b G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0x18] cbz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x14, [fp, #0x18] cmp x0, x14 beq G_M000_IG06 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 188 2805: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:.ctor(int,System.Collections.Generic.IEqualityComparer`1[int]) [Tier0, IL size=136, code size=188] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:Initialize(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr w0, [fp, #0x24] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x20] ldr w1, [fp, #0x20] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x18] ldr w1, [fp, #0x20] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x10] ldr x0, [fp, #0x28] movn w1, #0 str w1, [x0, #0x3C] ldr w0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] str x0, [x14, #0x30] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #16 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr w0, [fp, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 196 2806: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:Initialize(int) [Tier0, IL size=56, code size=196] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:b__4_0(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr w0, [fp, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 2807: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:b__4_0(int) [Tier0, IL size=2, code size=28] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:b__4_1(int):System.ValueTuple`2[int,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x38] str xzr, [fp, #0x30] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x48] str w1, [fp, #0x44] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr w1, [fp, #0x44] str w1, [x0, #0x08] ldr x0, [fp, #0x30] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x08] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x38] str xzr, [fp, #0x28] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w1, [fp, #0x14] ldr x2, [fp, #0x38] ldr w2, [x2, #0x08] add x0, fp, #40 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 216 2808: JIT compiled Perfolizer.Mathematics.Common.ConfidenceLevelExtensions+<>c:b__4_1(int) [Tier0, IL size=38, code size=216] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:Add(int,System.ValueTuple`2[int,int]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str w1, [fp, #0x24] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] ldr x2, [fp, #0x18] mov w3, #2 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 str w0, [fp, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 2809: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:Add(int,System.ValueTuple`2[int,int]) [Tier0, IL size=11, code size=68] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:TryInsert(int,System.ValueTuple`2[int,int],ubyte):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] str x0, [fp, #0x78] str w1, [fp, #0x74] str x2, [fp, #0x68] str w3, [fp, #0x64] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] b G_M000_IG03 G_M000_IG03: ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x78] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] str x0, [fp, #0x58] ldr x0, [fp, #0x78] ldr x0, [x0, #0x18] str x0, [fp, #0x50] ldr x0, [fp, #0x50] cbz x0, G_M000_IG05 ldr x0, [fp, #0x50] ldr w1, [fp, #0x74] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str w0, [fp, #0x28] b G_M000_IG06 G_M000_IG05: add x0, fp, #116 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x28] G_M000_IG06: ldr w0, [fp, #0x28] str w0, [fp, #0x4C] str wzr, [fp, #0x48] ldr x0, [fp, #0x78] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr w0, [x0] sub w0, w0, #1 str w0, [fp, #0x3C] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG13 G_M000_IG07: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #32 mov w1, #125 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr w0, [fp, #0x3C] ldr x1, [fp, #0x58] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG21 ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0] ldr w1, [fp, #0x4C] cmp w0, w1 bne G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x58] ldr w2, [fp, #0x3C] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG28 mov w3, #24 madd x1, x2, x3, x1 add x1, x1, #16 ldr w1, [x1, #0x08] ldr w2, [fp, #0x74] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 cbz w0, G_M000_IG12 ldr w0, [fp, #0x64] uxtb w0, w0 cmp w0, #1 bne G_M000_IG10 ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr x1, [fp, #0x68] str x1, [x0, #0x10] b G_M000_IG26 G_M000_IG10: ldr w0, [fp, #0x64] uxtb w0, w0 cmp w0, #2 bne G_M000_IG11 ldr w0, [fp, #0x74] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: b G_M000_IG18 G_M000_IG12: ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x04] str w0, [fp, #0x3C] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] ldr x1, [fp, #0x58] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG07 G_M000_IG13: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #32 mov w1, #241 bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr w1, [fp, #0x3C] ldr x0, [fp, #0x58] ldr w0, [x0, #0x08] cmp w1, w0 bhs G_M000_IG21 ldr x1, [fp, #0x58] ldr w0, [fp, #0x3C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG28 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1] ldr w0, [fp, #0x4C] cmp w1, w0 bne G_M000_IG20 ldr x1, [fp, #0x58] ldr w0, [fp, #0x3C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG28 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 ldr w1, [x1, #0x08] ldr x0, [fp, #0x50] ldr w2, [fp, #0x74] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 cbz w0, G_M000_IG20 ldr w0, [fp, #0x64] uxtb w0, w0 cmp w0, #1 bne G_M000_IG16 ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr x1, [fp, #0x68] str x1, [x0, #0x10] b G_M000_IG26 G_M000_IG16: ldr w0, [fp, #0x64] uxtb w0, w0 cmp w0, #2 bne G_M000_IG17 ldr w0, [fp, #0x74] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG17: b G_M000_IG18 G_M000_IG18: mov w0, wzr G_M000_IG19: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x04] str w0, [fp, #0x3C] ldr w0, [fp, #0x48] add w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] ldr x1, [fp, #0x58] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG13 G_M000_IG21: ldr x0, [fp, #0x78] ldr w0, [x0, #0x40] cmp w0, #0 ble G_M000_IG22 ldr x0, [fp, #0x78] ldr w0, [x0, #0x3C] str w0, [fp, #0x38] ldr x0, [fp, #0x58] ldr x1, [fp, #0x78] ldr w1, [x1, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 ldr w0, [x0, #0x04] neg w0, w0 sub w0, w0, #3 ldr x1, [fp, #0x78] str w0, [x1, #0x3C] ldr x0, [fp, #0x78] ldr w0, [x0, #0x40] sub w0, w0, #1 ldr x1, [fp, #0x78] str w0, [x1, #0x40] b G_M000_IG24 G_M000_IG22: ldr x0, [fp, #0x78] ldr w0, [x0, #0x38] str w0, [fp, #0x2C] ldr w0, [fp, #0x2C] ldr x1, [fp, #0x58] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG23 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x78] ldr w1, [fp, #0x4C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] G_M000_IG23: ldr w0, [fp, #0x2C] str w0, [fp, #0x38] ldr w0, [fp, #0x2C] add w0, w0, #1 ldr x1, [fp, #0x78] str w0, [x1, #0x38] ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] str x0, [fp, #0x58] G_M000_IG24: ldr x0, [fp, #0x58] ldr w1, [fp, #0x38] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG28 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr w1, [fp, #0x4C] str w1, [x0] ldr x0, [fp, #0x40] ldr w0, [x0] sub w0, w0, #1 ldr x1, [fp, #0x30] str w0, [x1, #0x04] ldr x0, [fp, #0x30] ldr w1, [fp, #0x74] str w1, [x0, #0x08] ldr x0, [fp, #0x30] ldr x1, [fp, #0x68] str x1, [x0, #0x10] ldr w0, [fp, #0x38] add w0, w0, #1 ldr x1, [fp, #0x40] str w0, [x1] ldr x0, [fp, #0x78] ldr w0, [x0, #0x44] add w0, w0, #1 ldr x1, [fp, #0x78] str w0, [x1, #0x44] b G_M000_IG25 G_M000_IG25: b G_M000_IG26 G_M000_IG26: mov w0, #1 G_M000_IG27: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1428 2810: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:TryInsert(int,System.ValueTuple`2[int,int],ubyte) [Tier0, IL size=569, code size=1428] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:GetBucket(uint):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x2, [fp, #0x28] ldr x2, [x2, #0x08] str x2, [fp, #0x18] ldr x2, [fp, #0x28] ldr x2, [x2, #0x30] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] ldr w0, [fp, #0x24] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x18] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG04 add x0, x1, x0, LSL #2 add x0, x0, #16 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 112 2811: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:GetBucket(uint) [Tier0, IL size=29, code size=112] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:get_Item(int):System.ValueTuple`2[int,int]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] cbz x0, G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr w0, [fp, #0x24] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str xzr, [fp, #0x10] ldr x0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 116 2812: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:get_Item(int) [Tier0, IL size=39, code size=116] ; Assembly listing for method System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:FindValue(int):byref:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x78] str w1, [fp, #0x74] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x20] b G_M000_IG03 G_M000_IG03: str xzr, [fp, #0x68] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] cbz x0, G_M000_IG19 ldr x0, [fp, #0x78] ldr x0, [x0, #0x18] str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbnz x0, G_M000_IG08 add x0, fp, #116 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x54] ldr x0, [fp, #0x78] ldr w1, [fp, #0x54] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0x50] ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] str x0, [fp, #0x48] str wzr, [fp, #0x44] ldr w0, [fp, #0x50] sub w0, w0, #1 str w0, [fp, #0x50] G_M000_IG04: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #32 mov w1, #99 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x50] ldr x1, [fp, #0x48] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG19 ldr x0, [fp, #0x48] ldr w1, [fp, #0x50] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG20 mov w2, #24 madd x0, x1, x2, x0 add x0, x0, #16 str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr w0, [x0] ldr w1, [fp, #0x54] cmp w0, w1 bne G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x68] ldr w1, [x1, #0x08] ldr w2, [fp, #0x74] ldr x3, [fp, #0x18] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 cbnz w0, G_M000_IG14 G_M000_IG07: ldr x0, [fp, #0x68] ldr w0, [x0, #0x04] str w0, [fp, #0x50] ldr w0, [fp, #0x44] add w0, w0, #1 str w0, [fp, #0x44] ldr w0, [fp, #0x44] ldr x1, [fp, #0x48] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG04 b G_M000_IG13 G_M000_IG08: ldr x0, [fp, #0x58] ldr w1, [fp, #0x74] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 str w0, [fp, #0x40] ldr x0, [fp, #0x78] ldr w1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x0] str w0, [fp, #0x3C] ldr x0, [fp, #0x78] ldr x0, [x0, #0x10] str x0, [fp, #0x30] str wzr, [fp, #0x2C] ldr w0, [fp, #0x3C] sub w0, w0, #1 str w0, [fp, #0x3C] G_M000_IG09: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #32 mov w1, #212 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr w1, [fp, #0x3C] ldr x0, [fp, #0x30] ldr w0, [x0, #0x08] cmp w1, w0 bhs G_M000_IG19 ldr x1, [fp, #0x30] ldr w0, [fp, #0x3C] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG20 mov w2, #24 madd x1, x0, x2, x1 add x1, x1, #16 str x1, [fp, #0x68] ldr x1, [fp, #0x68] ldr w1, [x1] ldr w0, [fp, #0x40] cmp w1, w0 bne G_M000_IG12 ldr x1, [fp, #0x68] ldr w1, [x1, #0x08] ldr x0, [fp, #0x58] ldr w2, [fp, #0x74] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x3, [x11] blr x3 cbnz w0, G_M000_IG14 G_M000_IG12: ldr x0, [fp, #0x68] ldr w0, [x0, #0x04] str w0, [fp, #0x3C] ldr w0, [fp, #0x2C] add w0, w0, #1 str w0, [fp, #0x2C] ldr w0, [fp, #0x2C] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] cmp w0, w1 bls G_M000_IG09 G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG14: ldr x0, [fp, #0x68] ldrsb wzr, [x0] ldr x0, [fp, #0x68] add x0, x0, #16 str x0, [fp, #0x60] G_M000_IG15: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr x0, [fp, #0x60] G_M000_IG18: ldp fp, lr, [sp], #0x80 ret lr G_M000_IG19: str xzr, [fp, #0x60] b G_M000_IG15 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 800 2813: JIT compiled System.Collections.Generic.Dictionary`2[int,System.ValueTuple`2[int,int]]:FindValue(int) [Tier0, IL size=299, code size=800] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:get_Default():System.Collections.Generic.EqualityComparer`1[int] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #73 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 2814: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:get_Default() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 2815: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:.cctor() [Tier0, IL size=26, code size=112] ; Assembly listing for method System.Collections.Generic.EnumEqualityComparer`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 2816: JIT compiled System.Collections.Generic.EnumEqualityComparer`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.EqualityComparer`1[int]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 2817: JIT compiled System.Collections.Generic.EqualityComparer`1[int]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Collections.Generic.EnumEqualityComparer`1[int]:Equals(int,int):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr w0, [fp, #0x14] ldr w1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 2818: JIT compiled System.Collections.Generic.EnumEqualityComparer`1[int]:Equals(int,int) [Tier0, IL size=8, code size=56] ; Assembly listing for method System.Runtime.CompilerServices.RuntimeHelpers:EnumEquals[int](int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] str w1, [fp, #0x18] G_M000_IG02: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x18] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 2819: JIT compiled System.Runtime.CompilerServices.RuntimeHelpers:EnumEquals[int](int,int) [Tier0, IL size=5, code size=40] ; Assembly listing for method Perfolizer.Mathematics.Distributions.StudentDistribution:InverseTwoTailStudent(double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str d0, [fp, #0x38] str d1, [fp, #0x30] G_M000_IG02: str xzr, [fp, #0x28] ldr d16, [@RWD00] str d16, [fp, #0x20] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG05 G_M000_IG03: ldr d0, [fp, #0x28] ldr d1, [fp, #0x20] fadd d0, d0, d1 fmov d1, #0.5000 fmul d0, d0, d1 str d0, [fp, #0x18] ldr d0, [fp, #0x18] ldr d1, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d16, [fp, #0x38] fcmp d0, d16 bhs G_M000_IG04 ldr d0, [fp, #0x18] str d0, [fp, #0x20] b G_M000_IG05 G_M000_IG04: ldr d0, [fp, #0x18] str d0, [fp, #0x28] G_M000_IG05: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #16 mov w1, #52 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr d0, [fp, #0x20] ldr d1, [fp, #0x28] fsub d0, d0, d1 ldr d1, [@RWD08] fcmp d0, d1 bgt G_M000_IG03 ldr d0, [fp, #0x28] ldr d16, [fp, #0x20] fadd d0, d0, d16 fmov d16, #0.5000 fmul d0, d0, d16 G_M000_IG08: ldp fp, lr, [sp], #0x40 ret lr RWD00 dq 408F400000000000h ; 1000 RWD08 dq 3E112E0BE826D695h ; 1e-09 ; Total bytes of code 224 2820: JIT compiled Perfolizer.Mathematics.Distributions.StudentDistribution:InverseTwoTailStudent(double,double) [Tier0, IL size=80, code size=224] ; Assembly listing for method Perfolizer.Mathematics.Distributions.StudentDistribution:StudentTwoTail(double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str d0, [fp, #0x98] str d1, [fp, #0x90] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x30] ldr d0, [fp, #0x98] fcmp d0, #0.0 bhs G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] ldr x0, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x38] bl CORINFO_HELP_THROW G_M000_IG04: ldr d0, [fp, #0x90] fmov d16, #1.0000 fcmp d0, d16 bhs G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr x2, [fp, #0x10] ldr x0, [fp, #0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x40] bl CORINFO_HELP_THROW G_M000_IG06: ldr d0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x98] ldr d0, [fp, #0x98] ldr d16, [fp, #0x90] fdiv d0, d0, d16 str d0, [fp, #0x88] ldr d0, [fp, #0x88] fmov d16, #1.0000 fadd d0, d0, d16 str d0, [fp, #0x80] ldr d0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 fcvtzs w0, d0 str w0, [fp, #0x7C] ldr d0, [fp, #0x90] ldr w0, [fp, #0x7C] scvtf d16, w0 fsub d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d16, [@RWD00] fcmp d0, d16 bgt G_M000_IG07 ldr d0, [fp, #0x90] fmov d16, #20.0000 fcmp d0, d16 bge G_M000_IG07 ldr d0, [fp, #0x98] ldr d16, [fp, #0x90] fcmp d0, d16 bhs G_M000_IG10 ldr d0, [fp, #0x90] ldr d16, [@RWD08] fcmp d0, d16 ble G_M000_IG10 G_M000_IG07: ldr d0, [fp, #0x88] ldr d16, [@RWD16] fcmp d0, d16 ble G_M000_IG08 ldr d0, [fp, #0x80] bl System.Math:Log(double):double str d0, [fp, #0x88] G_M000_IG08: ldr d0, [fp, #0x90] fmov d16, #0.5000 fsub d0, d0, d16 str d0, [fp, #0x70] ldr d0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d16, [@RWD24] fmul d0, d0, d16 str d0, [fp, #0x80] ldr d0, [fp, #0x70] ldr d16, [fp, #0x88] fmul d0, d0, d16 str d0, [fp, #0x88] ldr d0, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d16, [@RWD32] fmul d0, d0, d16 ldr d16, [@RWD40] fadd d0, d0, d16 ldr d16, [fp, #0x80] fadd d0, d0, d16 ldr d16, [fp, #0x88] ldr d17, [@RWD48] fmul d16, d16, d17 ldr d17, [@RWD56] fsub d16, d16, d17 ldr d17, [fp, #0x88] fmul d16, d16, d17 fmov d17, #24.0000 fsub d16, d16, d17 ldr d17, [fp, #0x88] fmul d16, d16, d17 ldr d17, [@RWD64] fsub d16, d16, d17 fdiv d0, d16, d0 ldr d16, [fp, #0x88] fadd d0, d0, d16 fmov d16, #3.0000 fadd d0, d0, d16 ldr d16, [fp, #0x80] fdiv d0, d0, d16 fmov d16, #1.0000 fadd d0, d0, d16 str d0, [fp, #0x50] ldr d0, [fp, #0x88] bl System.Math:Sqrt(double):double ldr d16, [fp, #0x50] fmul d0, d0, d16 str d0, [fp, #0x88] ldr d0, [fp, #0x88] fneg d0, d0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 fmov d16, #2.0000 fmul d0, d0, d16 G_M000_IG09: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG10: fmov d0, #1.0000 str d0, [fp, #0x68] ldr d0, [fp, #0x90] fmov d16, #20.0000 fcmp d0, d16 bhs G_M000_IG11 ldr d0, [fp, #0x98] fmov d16, #4.0000 fcmp d0, d16 bhs G_M000_IG11 ldr d0, [fp, #0x88] bl System.Math:Sqrt(double):double str d0, [fp, #0x88] ldr d0, [fp, #0x88] str d0, [fp, #0x60] ldr w0, [fp, #0x7C] cmp w0, #1 bne G_M000_IG16 str xzr, [fp, #0x60] b G_M000_IG16 G_M000_IG11: ldr d0, [fp, #0x80] bl System.Math:Sqrt(double):double str d0, [fp, #0x60] ldr d16, [fp, #0x60] ldr w0, [fp, #0x7C] scvtf d17, w0 fmul d16, d16, d17 str d16, [fp, #0x88] str wzr, [fp, #0x5C] b G_M000_IG13 G_M000_IG12: ldr w0, [fp, #0x5C] add w0, w0, #2 str w0, [fp, #0x5C] ldr d16, [fp, #0x60] str d16, [fp, #0x68] ldr d16, [fp, #0x80] ldr w0, [fp, #0x5C] scvtf d17, w0 fmul d16, d16, d17 ldr w0, [fp, #0x5C] sub w0, w0, #1 scvtf d17, w0 fdiv d16, d17, d16 ldr d17, [fp, #0x88] fmul d16, d16, d17 str d16, [fp, #0x88] ldr w0, [fp, #0x7C] ldr w1, [fp, #0x5C] add w0, w0, w1 scvtf d16, w0 ldr d17, [fp, #0x88] fdiv d16, d17, d16 ldr d17, [fp, #0x60] fadd d16, d16, d17 str d16, [fp, #0x60] G_M000_IG13: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG15 G_M000_IG14: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG15: ldr d0, [fp, #0x60] ldr d16, [fp, #0x68] fsub d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 fcmp d0, #0.0 bgt G_M000_IG12 ldr w0, [fp, #0x7C] add w0, w0, #2 str w0, [fp, #0x7C] str xzr, [fp, #0x68] str xzr, [fp, #0x88] ldr d16, [fp, #0x60] fneg d16, d16 str d16, [fp, #0x60] G_M000_IG16: ldr w0, [fp, #0x30] sub w0, w0, #1 str w0, [fp, #0x30] ldr w0, [fp, #0x30] cmp w0, #0 bgt G_M000_IG18 G_M000_IG17: add x0, fp, #48 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG18: ldr w0, [fp, #0x7C] sub w0, w0, #2 str w0, [fp, #0x7C] ldr w0, [fp, #0x7C] cmp w0, #1 ble G_M000_IG19 ldr d0, [fp, #0x80] ldr w0, [fp, #0x7C] scvtf d16, w0 fmul d0, d0, d16 ldr w0, [fp, #0x7C] sub w0, w0, #1 scvtf d16, w0 fdiv d0, d16, d0 ldr d16, [fp, #0x60] fmul d0, d0, d16 ldr d16, [fp, #0x88] fadd d0, d0, d16 str d0, [fp, #0x60] b G_M000_IG16 G_M000_IG19: ldr w0, [fp, #0x7C] cbz w0, G_M000_IG20 ldr d0, [fp, #0x88] bl System.Math:Atan(double):double ldr d16, [fp, #0x60] ldr d17, [fp, #0x80] fdiv d16, d16, d17 fadd d0, d0, d16 fmov d16, #2.0000 fmul d0, d0, d16 ldr d16, [@RWD72] fdiv d0, d0, d16 str d0, [fp, #0x48] b G_M000_IG21 G_M000_IG20: ldr d0, [fp, #0x80] bl System.Math:Sqrt(double):double ldr d16, [fp, #0x60] fdiv d0, d16, d0 str d0, [fp, #0x48] G_M000_IG21: ldr d0, [fp, #0x48] str d0, [fp, #0x60] ldr d0, [fp, #0x68] ldr d16, [fp, #0x60] fsub d0, d0, d16 G_M000_IG22: ldp fp, lr, [sp], #0xA0 ret lr RWD00 dq 3E112E0BE826D695h ; 1e-09 RWD08 dq 4069000000000000h ; 200 RWD16 dq 3EB0C6F7A0B5ED8Dh ; 1e-06 RWD24 dq 4048000000000000h ; 48 RWD32 dq 3FE999999999999Ah ; 0.8 RWD40 dq 4059000000000000h ; 100 RWD48 dq BFD999999999999Ah ; -0.4 RWD56 dq 400A666666666666h ; 3.3 RWD64 dq 4055600000000000h ; 85.5 RWD72 dq 400921FB54442D18h ; 3.14159265 ; Total bytes of code 1328 2821: JIT compiled Perfolizer.Mathematics.Distributions.StudentDistribution:StudentTwoTail(double,double) [Tier0, IL size=565, code size=1328] ; Assembly listing for method Perfolizer.Mathematics.Common.MathExtensions:Sqr(double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: ldr d0, [fp, #0x18] ldr d16, [fp, #0x18] fmul d0, d0, d16 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 2822: JIT compiled Perfolizer.Mathematics.Common.MathExtensions:Sqr(double) [Tier0, IL size=4, code size=32] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex331_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2823: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex331_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2824: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2825: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex331_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex332_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2826: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex332_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2827: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2828: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex332_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex333_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2829: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex333_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2830: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2831: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex333_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex334_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2832: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex334_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2833: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2834: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex334_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex335_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2835: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex335_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2836: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2837: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex335_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex336_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2838: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex336_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2839: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2840: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex336_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex337_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2841: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex337_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2842: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2843: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex337_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex338_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2844: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex338_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2845: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2846: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex338_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex339_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2847: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex339_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2848: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2849: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex339_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex340_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2850: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex340_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2851: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2852: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex340_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex341_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2853: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex341_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2854: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2855: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex341_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex342_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2856: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex342_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2857: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2858: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex342_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex343_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2859: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex343_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2860: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2861: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex343_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex344_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2862: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex344_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2863: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2864: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex344_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex345_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2865: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex345_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2866: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2867: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex345_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex346_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2868: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex346_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2869: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2870: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex346_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex347_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2871: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex347_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2872: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2873: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex347_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex348_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2874: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex348_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2875: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2876: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex348_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex349_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2877: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex349_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2878: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2879: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex349_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex350_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2880: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex350_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2881: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2882: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex350_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex351_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2883: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex351_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2884: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2885: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex351_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex352_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2886: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex352_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2887: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2888: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex352_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex353_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2889: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex353_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2890: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2891: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex353_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex354_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2892: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex354_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2893: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2894: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex354_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex355_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2895: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex355_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2896: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2897: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex355_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex356_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2898: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex356_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2899: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2900: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex356_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex357_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2901: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex357_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2902: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2903: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex357_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex358_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2904: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex358_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2905: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2906: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex358_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex359_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2907: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex359_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2908: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2909: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex359_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex360_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2910: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex360_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2911: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2912: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex360_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex361_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2913: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex361_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2914: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2915: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex361_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex362_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2916: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex362_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2917: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2918: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex362_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex363_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2919: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex363_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2920: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2921: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex363_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex364_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2922: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex364_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2923: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2924: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex364_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex365_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2925: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex365_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2926: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2927: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex365_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex366_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2928: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex366_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2929: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2930: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex366_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex367_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2931: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex367_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2932: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2933: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex367_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex368_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2934: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex368_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2935: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2936: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex368_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex369_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2937: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex369_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2938: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 2939: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex369_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex370_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2940: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex370_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2941: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2942: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex370_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex371_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2943: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex371_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 2944: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 2945: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex371_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex372_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2946: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex372_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 2947: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2948: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex372_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex373_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2949: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex373_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 2950: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 2951: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex373_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex374_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2952: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex374_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2953: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 2954: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex374_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex375_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2955: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex375_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 2956: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 2957: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex375_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex376_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2958: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex376_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 2959: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 2960: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex376_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex377_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2961: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex377_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2962: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 2963: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex377_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex378_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2964: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex378_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2965: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 2966: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex378_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex379_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2967: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex379_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2968: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 2969: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex379_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex380_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2970: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex380_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2971: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 2972: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex380_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex381_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2973: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex381_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2974: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 2975: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex381_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.WeakReference`1[System.__Canon]:.ctor(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str xzr, [fp, #0x10] mov x20, x0 mov x19, x1 G_M000_IG02: mov x0, x19 mov w1, wzr bl System.Runtime.InteropServices.GCHandle:InternalAlloc(System.Object,int):long str x0, [x20, #0x08] cbz x19, G_M000_IG04 G_M000_IG03: add x0, x19, #8 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w0, [x0, #-0x0C] and w0, w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w0, w1 cset x0, eq str xzr, [fp, #0x10] cbnz w0, G_M000_IG05 G_M000_IG04: mov x21, xzr b G_M000_IG06 G_M000_IG05: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 G_M000_IG06: mov x1, x21 cbz x1, G_M000_IG08 G_M000_IG07: add x0, x20, #8 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG08: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 172 2976: JIT compiled System.WeakReference`1[System.__Canon]:.ctor(System.__Canon) [Tier1, IL size=9, code size=172] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex382_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2977: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex382_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.WeakReference`1[System.__Canon]:Create(System.__Canon,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str xzr, [fp, #0x10] mov x20, x0 mov x19, x1 G_M000_IG02: uxtb w21, w2 cbnz w21, G_M000_IG04 G_M000_IG03: mov w1, wzr b G_M000_IG05 G_M000_IG04: mov w1, #1 G_M000_IG05: mov x0, x19 bl System.Runtime.InteropServices.GCHandle:InternalAlloc(System.Object,int):long cbnz w21, G_M000_IG07 G_M000_IG06: b G_M000_IG08 G_M000_IG07: orr x0, x0, #1 G_M000_IG08: str x0, [x20, #0x08] cbz x19, G_M000_IG10 G_M000_IG09: add x0, x19, #8 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w0, [x0, #-0x0C] and w0, w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w0, w1 cset x0, eq str xzr, [fp, #0x10] cbnz w0, G_M000_IG11 G_M000_IG10: mov x21, xzr b G_M000_IG12 G_M000_IG11: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 G_M000_IG12: mov x1, x21 cbz x1, G_M000_IG14 G_M000_IG13: add x0, x20, #8 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 200 2978: JIT compiled System.WeakReference`1[System.__Canon]:Create(System.__Canon,bool) [Tier1, IL size=63, code size=200] ; Assembly listing for method System.Threading.Interlocked:CompareExchange[System.__Canon](byref,System.__Canon,System.__Canon):System.__Canon ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x0, x1 mov x1, x2 mov x2, x3 G_M000_IG03: ldp fp, lr, [sp], #0x10 b System.Threading.Interlocked:CompareExchange(byref,System.Object,System.Object):System.Object ; Total bytes of code 28 2979: JIT compiled System.Threading.Interlocked:CompareExchange[System.__Canon](byref,System.__Canon,System.__Canon) [Tier1, IL size=9, code size=28] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2980: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:GetOrCreate(System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement],System.String,System.Collections.Hashtable,int,System.Collections.Hashtable,int):System.Text.RegularExpressions.RegexReplacement ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov fp, sp mov x20, x0 mov x19, x1 mov x21, x2 mov w23, w3 mov x22, x4 mov w24, w5 G_M000_IG02: ldr x0, [x20, #0x08] and x25, x0, #-2 cbnz x25, G_M000_IG04 G_M000_IG03: mov x26, xzr b G_M000_IG07 G_M000_IG04: tbz w25, #1, G_M000_IG06 and x0, x25, #-4 ldr x0, [x0] ldr x1, [x0, #0x10] ldr x26, [x1] cbnz x26, G_M000_IG05 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x26, x0 G_M000_IG05: b G_M000_IG07 G_M000_IG06: ldr x26, [x25] G_M000_IG07: cbz x26, G_M000_IG09 G_M000_IG08: ldr x2, [x26, #0x18] ldrsb wzr, [x2] cmp x2, x19 beq G_M000_IG10 cbz x19, G_M000_IG09 ldr w1, [x2, #0x08] ldr w0, [x19, #0x08] cmp w1, w0 bne G_M000_IG09 add x0, x2, #12 lsl w2, w1, #1 mov w2, w2 add x1, x19, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG10 G_M000_IG09: mov x0, x19 mov w1, w24 mov x2, x21 mov w3, w23 mov x4, x22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 mov x26, x0 mov x0, x20 mov x1, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG10: mov x0, x26 G_M000_IG11: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 304 2981: JIT compiled System.Text.RegularExpressions.RegexReplacement:GetOrCreate(System.WeakReference`1[System.Text.RegularExpressions.RegexReplacement],System.String,System.Collections.Hashtable,int,System.Collections.Hashtable,int) [Tier1, IL size=46, code size=304] ; Assembly listing for method System.WeakReference`1[System.__Canon]:TryGetTarget(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x1 G_M000_IG02: ldr x1, [x0, #0x08] and x20, x1, #-2 cbnz x20, G_M000_IG04 G_M000_IG03: mov x21, xzr b G_M000_IG07 G_M000_IG04: tbz w20, #1, G_M000_IG06 and x0, x20, #-4 ldr x0, [x0] ldr x1, [x0, #0x10] ldr x21, [x1] cbnz x21, G_M000_IG05 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 G_M000_IG05: b G_M000_IG07 G_M000_IG06: ldr x21, [x20] G_M000_IG07: mov x14, x19 mov x15, x21 bl CORINFO_HELP_CHECKED_ASSIGN_REF cmp x21, #0 cset x0, ne G_M000_IG08: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 2982: JIT compiled System.WeakReference`1[System.__Canon]:TryGetTarget(byref) [Tier1, IL size=24, code size=132] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 2983: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex382_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ParseReplacement(System.String,int,System.Collections.Hashtable,int,System.Collections.Hashtable):System.Text.RegularExpressions.RegexReplacement ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data G_M000_IG01: sub sp, sp, #240 stp x19, x20, [sp, #0xB8] stp x21, x22, [sp, #0xC8] str x23, [sp, #0xD8] stp fp, lr, [sp, #0xE0] add fp, sp, #224 sub x9, fp, #200 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str xzr, [x9, #0x90] add x5, sp, #240 str x5, [fp, #-0x30] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #-0xD0] mov x19, x0 mov w21, w1 mov x20, x2 mov w23, w3 mov x22, x4 G_M000_IG02: tbnz w21, #9, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x3, x0 b G_M000_IG05 G_M000_IG04: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: add sp, sp, #16 ldr wzr, [sp], #-0x80 sub sp, sp, #16 add x0, sp, #16 mov w1, #32 str x0, [sp] str w1, [sp, #0x08] sub x0, fp, #200 mov x1, x19 mov w2, w21 mov x4, x20 mov w5, w23 mov x6, x22 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG06: sub x0, fp, #200 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov x1, x19 mov x2, x21 mov x3, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG07: ldr x19, [fp, #-0x50] cbz x19, G_M000_IG09 G_M000_IG08: str xzr, [fp, #-0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG09: mov x0, x22 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0xD0] cmp xip0, xip1 beq G_M000_IG10 bl CORINFO_HELP_FAIL_FAST G_M000_IG10: sub sp, fp, #224 ldp fp, lr, [sp, #0xE0] ldr x23, [sp, #0xD8] ldp x21, x22, [sp, #0xC8] ldp x19, x20, [sp, #0xB8] add sp, sp, #240 ret lr G_M000_IG11: sub sp, sp, #80 stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] stp fp, lr, [sp, #0x40] add x3, fp, #16 str x3, [sp, #0x10] G_M000_IG12: ldr x19, [fp, #-0x50] cbz x19, G_M000_IG13 str xzr, [fp, #-0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG13: ldp fp, lr, [sp, #0x40] ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] add sp, sp, #80 ret lr ; Total bytes of code 572 2984: JIT compiled System.Text.RegularExpressions.RegexParser:ParseReplacement(System.String,int,System.Collections.Hashtable,int,System.Collections.Hashtable) [Tier1, IL size=112, code size=572] ; Assembly listing for method System.Span`1[int]:.ctor(ulong,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: tbnz w2, #31, G_M000_IG04 str x1, [x0] str w2, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 52 2985: JIT compiled System.Span`1[int]:.ctor(ulong,int) [Tier1, IL size=46, code size=52] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanReplacement():System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 11 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w14, [x19, #0x70] mov w15, #25 strb w15, [x0, #0x2E] str w14, [x0, #0x28] add x14, x19, #24 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldr x2, [x19, #0x28] ldr w2, [x2, #0x08] ldr w1, [x19, #0x58] sub w20, w2, w1 cbz w20, G_M000_IG11 G_M000_IG04: b G_M000_IG06 align [0 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG05: add w0, w0, #1 str w0, [x19, #0x58] sub w20, w20, #1 G_M000_IG06: cmp w20, #0 ble G_M000_IG08 G_M000_IG07: ldr x2, [x19, #0x28] ldr w0, [x19, #0x58] sxtw w3, w0 ldr w4, [x2, #0x08] cmp w3, w4 bhs G_M000_IG13 add x2, x2, #12 ldrh w2, [x2, w3, UXTW #2] cmp w2, #36 bne G_M000_IG05 G_M000_IG08: ldr w0, [x19, #0x58] sub w2, w0, w1 mov x0, x19 mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cmp w20, #0 ble G_M000_IG03 G_M000_IG09: ldr x0, [x19, #0x28] ldr w1, [x19, #0x58] add w2, w1, #1 str w2, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG13 add x0, x0, #12 ldrh w0, [x0, w1, UXTW #2] cmp w0, #36 bne G_M000_IG10 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 add x14, x19, #32 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG10: ldp x0, x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str xzr, [x19, #0x20] b G_M000_IG03 G_M000_IG11: ldr x0, [x19, #0x18] G_M000_IG12: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 2986: JIT compiled System.Text.RegularExpressions.RegexParser:ScanReplacement() [Tier1, IL size=121, code size=328] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: add x0, x0, #120 ldr x19, [x0] cbz x19, G_M000_IG05 G_M000_IG03: str xzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 2987: JIT compiled System.Text.RegularExpressions.RegexParser:Dispose() [Tier1, IL size=12, code size=116] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[int]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x19, [x0] cbz x19, G_M000_IG05 G_M000_IG03: str xzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 2988: JIT compiled System.Collections.Generic.ValueListBuilder`1[int]:Dispose() [Tier1, IL size=30, code size=112] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex383_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 ; Assembly listing for method System.WeakReference`1[System.__Canon]:SetTarget(System.__Canon):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data bl System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG01: G_M000_IG04: stp ldr x21, [sp, #0x28] fp, lr, [sp, #-0x40]! ldp x19, x20, [sp, #0x18] stp ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 x19, x20, [sp, #0x20] stp x21, x22, [sp, #2989: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex383_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] 0x30] mov fp, sp str xzr, [fp, #0x18] mov x20, x0 mov x19, x1 G_M000_IG02: ldr x0, [x20, #0x08] and x21, x0, #-2 cbz x21, G_M000_IG12 cbz x19, G_M000_IG04 G_M000_IG03: add x0, x19, #8 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w0, [x0, #-0x0C] and w0, w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w0, w1 cset x0, eq str xzr, [fp, #0x18] cbnz w0, G_M000_IG05 G_M000_IG04: mov x22, xzr b G_M000_IG06 G_M000_IG05: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x22, x0 G_M000_IG06: mov x2, x22 tbnz w21, #1, G_M000_IG08 G_M000_IG07: cbz x2, G_M000_IG10 G_M000_IG08: add x0, x20, #8 mov x1, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG09: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: mov x0, x21 mov x1, x19 bl System.Runtime.InteropServices.GCHandle:InternalSet(long,System.Object) G_M000_IG11: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 284 2990: JIT compiled System.WeakReference`1[System.__Canon]:SetTarget(System.__Canon) [Tier1, IL size=84, code size=284] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 2991: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ; Assembly listing for method System.Text.RegularExpressions.RegexReplacement:Replace(System.Text.RegularExpressions.Regex,System.String,int,int):System.String:this ret lr ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 17 single block inlinees; 10 inlinees without PGO data G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 2992: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex383_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] G_M000_IG01: sub sp, sp, #176 stp fp, lr, [sp, #0x10] stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] add fp, sp, #16 add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] mov x22, x0 mov x23, x1 mov x19, x2 mov w20, w3 mov w21, w4 G_M000_IG02: cmn w20, #1 blt G_M000_IG25 ldr w0, [x19, #0x08] cmp w0, w21 blo G_M000_IG26 cbnz w20, G_M000_IG05 G_M000_IG03: mov x0, x19 G_M000_IG04: ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp, #0x10] add sp, sp, #176 ret lr G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x24, [x0] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] str x1, [fp, #0x38] str x22, [fp, #0x40] str x24, [fp, #0x50] str wzr, [fp, #0x58] ldr x0, [fp, #0x30] str x0, [fp, #0x60] ldr w0, [fp, #0x38] str w0, [fp, #0x68] ldr w0, [fp, #0x3C] str w0, [fp, #0x6C] stp wzr, w20, [fp, #0x48] ldr w0, [x23, #0x40] tbnz w0, #6, G_M000_IG12 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x7, [x20] add x24, fp, #64 cbnz x7, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x7, x0 ldr x15, [x20, #-0x08] add x14, x7, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x7, #0x18] mov x14, x20 mov x15, x7 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: mov x0, x23 sxtw w5, w21 mov x6, x24 ldrb w3, [x22, #0x20] cbnz w3, G_M000_IG07 mov w3, #1 b G_M000_IG08 align [0 bytes for IG22] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG07: mov w3, #2 G_M000_IG08: add x4, x19, #12 ldr w2, [x19, #0x08] str w3, [sp] mov w3, #1 str w3, [sp, #0x08] mov x3, x4 mov w4, w2 mov x2, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr w0, [fp, #0x58] cbnz w0, G_M000_IG10 mov x0, x19 G_M000_IG09: ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp, #0x10] add sp, sp, #176 ret lr G_M000_IG10: ldr w14, [fp, #0x48] ldr w15, [fp, #0x6C] cmp w14, w15 bhi G_M000_IG27 ldr x15, [fp, #0x60] ldr w12, [fp, #0x68] add w12, w12, w14 ldr wip0, [fp, #0x6C] sub w14, wip0, w14 str x15, [fp, #0x10] stp w12, w14, [fp, #0x18] ldr x14, [fp, #0x50] ldr w1, [fp, #0x58] ldr w15, [x14, #0x08] cmp w15, w1 bls G_M000_IG11 ubfiz x15, x1, #4, #32 add x15, x15, #16 add x2, x14, x15 ldr x15, [fp, #0x10] mov x14, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w0, [fp, #0x18] str w0, [x2, #0x08] ldr w0, [fp, #0x1C] str w0, [x2, #0x0C] add w1, w1, #1 str w1, [fp, #0x58] b G_M000_IG23 G_M000_IG11: ldp x1, x2, [fp, #0x10] add x0, fp, #80 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG23 G_M000_IG12: ldr w0, [x19, #0x08] str w0, [fp, #0x48] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 ldr x7, [x20, #0x08] add x24, fp, #64 cbnz x7, G_M000_IG13 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x7, x0 ldr x15, [x20, #-0x08] add x14, x7, #8 bl CORINFO_HELP_ASSIGN_REF movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 str x14, [x7, #0x18] add x14, x20, #8 mov x15, x7 bl CORINFO_HELP_ASSIGN_REF G_M000_IG13: mov x0, x23 sxtw w5, w21 mov x6, x24 ldrb w3, [x22, #0x20] cbnz w3, G_M000_IG14 mov w3, #1 b G_M000_IG15 G_M000_IG14: mov w3, #2 G_M000_IG15: add x4, x19, #12 ldr w2, [x19, #0x08] str w3, [sp] mov w3, #1 str w3, [sp, #0x08] mov x3, x4 mov w4, w2 mov x2, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr w0, [fp, #0x58] cbnz w0, G_M000_IG17 mov x0, x19 G_M000_IG16: ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp, #0x10] add sp, sp, #176 ret lr G_M000_IG17: ldr w14, [fp, #0x48] ldr w15, [fp, #0x6C] cmp w14, w15 bhi G_M000_IG27 ldr x15, [fp, #0x60] ldr w12, [fp, #0x68] str x15, [fp, #0x20] stp w12, w14, [fp, #0x28] ldr x14, [fp, #0x50] ldr w1, [fp, #0x58] ldr w15, [x14, #0x08] cmp w15, w1 bls G_M000_IG18 ubfiz x15, x1, #4, #32 add x15, x15, #16 add x2, x14, x15 ldr x15, [fp, #0x20] mov x14, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr w0, [fp, #0x28] str w0, [x2, #0x08] ldr w0, [fp, #0x2C] str w0, [x2, #0x0C] add w1, w1, #1 str w1, [fp, #0x58] b G_M000_IG19 G_M000_IG18: ldp x1, x2, [fp, #0x20] add x0, fp, #80 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG19: ldr x13, [fp, #0x50] ldr w14, [fp, #0x58] cbnz x13, G_M000_IG20 cbnz w14, G_M000_IG28 mov x0, xzr mov w14, wzr b G_M000_IG21 G_M000_IG20: ldr w0, [x13, #0x08] cmp w0, w14 blo G_M000_IG28 add x0, x13, #16 G_M000_IG21: cmp w14, #1 ble G_M000_IG23 mov w13, w14 lsl x13, x13, #4 add x13, x0, x13 sub x1, x13, #16 G_M000_IG22: ldr x2, [x0] ldp w3, w4, [x0, #0x08] mov x14, x0 mov x13, x1 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 mov x14, x1 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF stp w3, w4, [x1, #0x08] add x0, x0, #16 sub x1, x1, #16 cmp x0, x1 blo G_M000_IG22 G_M000_IG23: add x0, fp, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG24: ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp, #0x10] add sp, sp, #176 ret lr G_M000_IG25: mov w0, #3 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG26: mov w0, #14 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG27: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG28: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 1224 2993: JIT compiled System.Text.RegularExpressions.RegexReplacement:Replace(System.Text.RegularExpressions.Regex,System.String,int,int) [Tier1, IL size=320, code size=1224] ; Assembly listing for method System.Text.SegmentStringBuilder:Create():System.Text.SegmentStringBuilder ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 2994: JIT compiled System.Text.SegmentStringBuilder:Create() [Tier1, IL size=22, code size=36] ; Assembly listing for method System.Array:Empty[System.ReadOnlyMemory`1[ushort]]():System.ReadOnlyMemory`1[ushort][] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 2995: JIT compiled System.Array:Empty[System.ReadOnlyMemory`1[ushort]]() [Tier1, IL size=6, code size=32] ; Assembly listing for method System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]:.ctor(System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x5, [fp, #0x10] str x6, [fp, #0x18] G_M000_IG02: mov x14, x0 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x13, x0, #16 mov x14, x13 mov x15, x3 bl CORINFO_HELP_CHECKED_ASSIGN_REF str w4, [x13, #0x08] add x14, x0, #32 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldr x12, [x13], #0x08 str x12, [x14], #0x08 str w7, [x0, #0x08] ldr w1, [fp, #0x20] str w1, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 88 2996: JIT compiled System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]:.ctor(System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int) [Tier1, IL size=38, code size=88] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: sub sp, sp, #112 stp fp, lr, [sp, #0x10] stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] stp x23, x24, [sp, #0x48] stp x25, x26, [sp, #0x58] str x27, [sp, #0x68] add fp, sp, #16 str x1, [fp, #0x10] mov x20, x0 mov x19, x2 mov w23, w3 mov x21, x4 mov x22, x5 mov w24, w6 mov w25, w7 G_M000_IG02: cbnz x19, G_M000_IG04 G_M000_IG03: mov x26, xzr mov w27, wzr b G_M000_IG05 G_M000_IG04: add x26, x19, #12 ldr w27, [x19, #0x08] G_M000_IG05: ldr x0, [x1, #0x10] ldr x2, [x0, #0x10] cbz x2, G_M000_IG07 G_M000_IG06: mov x1, x2 b G_M000_IG08 G_M000_IG07: mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_METHOD mov x1, x0 G_M000_IG08: str w24, [sp] uxtb w3, w25 str w3, [sp, #0x08] mov x3, x26 mov w4, w27 mov x0, x20 mov x2, x19 mov w5, w23 mov x6, x21 mov x7, x22 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 G_M000_IG09: ldr x27, [sp, #0x68] ldp x25, x26, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp, #0x10] add sp, sp, #112 ret lr ; Total bytes of code 224 2997: JIT compiled System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool) [Tier1, IL size=22, code size=224] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex384_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 2998: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex384_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] stp x27, x28, [sp, #0x70] mov fp, sp add x8, sp, #128 str x8, [fp, #0x28] str x0, [fp, #0x20] mov x25, x2 mov x21, x3 mov w20, w4 mov w19, w5 mov x24, x6 mov x22, x7 ldr w23, [fp, #0x80] ldr w26, [fp, #0x88] G_M000_IG02: ldrsb wzr, [x0] add x1, x0, #56 mov x2, xzr swpal x2, x27, [x1] cbnz x27, G_M000_IG04 G_M000_IG03: ldr x1, [x0, #0x10] mov x0, x1 ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 mov x27, x0 ldr x0, [fp, #0x20] G_M000_IG04: str x27, [fp, #0x18] G_M000_IG05: add x14, x27, #8 mov x15, x25 bl CORINFO_HELP_ASSIGN_REF ldr x1, [x0, #0x48] mov x0, x27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w28, w19 G_M000_IG06: mov x2, x21 mov w3, w20 mov x0, x27 ldr x1, [fp, #0x20] mov w4, w19 mov w5, w23 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 str w28, [x27, #0x4C] mov x1, x21 mov w2, w20 mov x0, x27 ldr x3, [x27] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr x19, [x27, #0x28] ldr x14, [x19, #0x50] ldr w15, [x14, #0x08] cmp w15, #0 bls G_M000_IG09 ldr w14, [x14, #0x10] cmp w14, #0 ble G_M000_IG10 G_M000_IG07: tst w26, #255 bne G_M000_IG08 add x14, x19, #8 mov x15, x25 bl CORINFO_HELP_ASSIGN_REF str xzr, [x27, #0x28] G_M000_IG08: ldr w1, [x27, #0x4C] mov x0, x19 mov w3, w23 mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG11 G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG10: str xzr, [x19, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x19, [x0] G_M000_IG11: ldr w0, [x19, #0x30] cbz w0, G_M000_IG18 G_M000_IG12: tst w26, #255 bne G_M000_IG14 G_M000_IG13: str xzr, [x27, #0x28] G_M000_IG14: ldr x0, [x22, #0x08] mov x1, x24 mov x2, x19 ldr x3, [x22, #0x18] blr x3 cbz w0, G_M000_IG18 ldr w14, [x27, #0x4C] sxtw w28, w14 sxtw w14, w28 ldr w15, [x19, #0x14] cbnz w15, G_M000_IG17 G_M000_IG15: sxtw w14, w20 mov w15, #1 ldr x1, [fp, #0x20] ldr w12, [x1, #0x40] tbz w12, #6, G_M000_IG16 mov w14, wzr movn w15, #0 G_M000_IG16: cmp w28, w14 beq G_M000_IG18 add w14, w28, w15 sxtw w19, w14 mov w14, w19 G_M000_IG17: ldr x15, [x27, #0x10] ldr w15, [x15, #0x08] str w15, [x27, #0x50] ldr x15, [x27, #0x18] ldr w15, [x15, #0x08] str w15, [x27, #0x54] ldr x15, [x27, #0x20] ldr w15, [x15, #0x08] str w15, [x27, #0x58] mov w19, w28 mov w28, w14 b G_M000_IG06 G_M000_IG18: str xzr, [x27, #0x08] ldr x1, [fp, #0x20] add ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows x14, ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data x1, #56 mov x15, x27 bl CORINFO_HELP_ASSIGN_REF G_M000_IG19: ldp x27, x28, [sp, #0x70] ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] G_M000_IG01: add x3, fp, #128 str stp x3, [sp, #0x18] fp, lr, [sp, #-0x50]! stp G_M000_IG21: x19, x20, [sp ldr x27, [fp, #0x18] , str xzr, [x27, ##0x18] 0x08] stp x21, x22, [sp, #0x28] ldr x1, [fp, #0x20] stp x23, x24, [sp, #0x38] add x14, x1, #56 str mov x15, x27 x25, [sp, bl CORINFO_HELP_ASSIGN_REF #0x48] mov G_M000_IG22: fp, sp ldp x27, x28, [sp, #0x60] mov x19, x0 ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 G_M000_IG02: ret lr ; Total bytes of code 660 ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr 2999: JIT compiled System.Text.RegularExpressions.Regex:RunAllMatchesWithCallback[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]](System.String,System.ReadOnlySpan`1[ushort],int,byref,System.Text.RegularExpressions.MatchCallback`1[System.ValueTuple`5[System.__Canon,System.Text.SegmentStringBuilder,System.ReadOnlyMemory`1[ushort],int,int]],int,bool) [Tier1, IL size=233, code size=660] sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 ; Assembly listing for method System.Text.SegmentStringBuilder:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] G_M000_IG01: ldp x21, x22, [sp, #0x28] stp ldp x19, x20, [sp, #0x18] fp, lr, [sp, #-0x10]! ldp mov fp, lr, [sp], #0x50 fp, sp ret lr G_M000_IG02: G_M000_IG10: ldr movz x0, #0xD1FFAB1E w0, [x0, #0x08] movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldr ldp fp, lr, [sp], #0x10 x0, [x0] ret lr blr x0 ; Total bytes of code 20 brk_windows #0 G_M000_IG13: 3000: JIT compiled System.Text.SegmentStringBuilder:get_Count() [Tier1, IL size=7, code size=20] bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3001: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.ReadOnlyMemory`1[ushort]:Slice(int):System.ReadOnlyMemory`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: ldr w2, [x0, #0x0C] cmp w1, w2 bhi G_M000_IG04 ldr x3, [x0] ldr w0, [x0, #0x08] add w0, w0, w1 sub w1, w2, w1 str x3, [fp, #0x10] stp w0, w1, [fp, #0x18] ldp x0, x1, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #33 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 88 3002: JIT compiled System.ReadOnlyMemory`1[ushort]:Slice(int) [Tier1, IL size=44, code size=88] ; Assembly listing for method System.Text.SegmentStringBuilder:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] stp x23, x24, [sp, #0x48] str x25, [sp, #0x58] mov fp, sp str xzr, [fp, #0x18] mov x19, x0 G_M000_IG02: G_M000_IG01: ldr x20, [x19] ldr stp w21, [x19, #0x08] cbnz x20, G_M000_IG04 G_M000_IG03: fp, lr, [sp, # cbnz w21, G_M000_IG11 -0x50]! mov x22, xzr mov w21, wzr stp b G_M000_IG05 x19, x20, [sp, #0x38] align str [4 bytes for IG06] x21, [sp, #0x48] align [0 bytes] mov align [0 bytes] fp, sp align [0 bytes] str xzr, [fp, #0x28] str xzr, [fp, #0x30] G_M000_IG04: str xzr, [fp, #0x18] ldr w0, [x20, #0x08] str xzr, [fp, #0x20] mov cmp x19, x0 w0, w21 G_M000_IG02: blo G_M000_IG11 ldr add x22, x20, #16 w20, [x19, #0x4C] cmp G_M000_IG05: w20, w2 bhi G_M000_IG15 mov w23, wzr ubfiz mov w0, wzr x0, x20, #1, cmp w21, #0#32 add x0, x1, x0 ble G_M000_IG07 mov x1, G_M000_IG06: x0 ubfiz x1, x0, #4, #32 sub w3, w2, w20 add cmp w3, #7x1, x22, x1 ldr bls G_M000_IG06 w1, [x1, #0x0C] G_M000_IG03: add w23, w1, w23 str x1, [fp, #0x18] add w0, w0, #1 cmp w0, w21 blt G_M000_IG06 G_M000_IG07: str mov x0, x22 w3, [fp, #0x20] sxtw w1, w21 add str x0, [fp, #0x18] x3, fp, #24 str w1, [fp, #0x20] ldr movz x24, #0xD1FFAB1E x4, movk x24, #0xD1FFAB1E LSL #16 [x3] movk x24, #0xD1FFAB1E LSL #32 ldr ldr w3, [x3x2, [x24] , #0x08] add x25, fp, #24 cmp cbnz x2, G_M000_IG09 w3, #6 blt G_M000_IG06 G_M000_IG04: ldr G_M000_IG08: x3, movz x0, #[x4] 0xD1FFAB1E movz x5, #97 movk x0, #0xD1FFAB1E LSL #16 movk x5, movk x0, #0xD1FFAB1E LSL #32 #103 LSL #16 bl CORINFO_HELP_NEWSFAST movk x5, #103 LSL #32 mov x2, x0 ldr x15, [x24, #-0x08] movk x5, #103 LSL #48 add x14, x2, #8 bl CORINFO_HELP_ASSIGN_REF eor x3, x3, x5 movz x14, #0xD1FFAB1E ldr movk x14, #0xD1FFAB1E LSL #16 w4, [x4, #0x08] movk x14, #0xD1FFAB1E LSL #32 movz w5, #116 str x14, [x2, #0x18] movk w5, #97 LSL #16 mov x14, x24 eor w4, w4 mov x15, x2 , w5 bl CORINFO_HELP_ASSIGN_REF mov w4, w4 G_M000_IG09: orr x3, x3, x4 mov w0, w23 cbnz x3, G_M000_IG06 mov x1, x25 G_M000_IG05: movz x3, #0xD1FFAB1E ldrh movk x3, #0xD1FFAB1E LSL #16 w3, [x1, #0x0C] movk x3, #0xD1FFAB1E LSL #32 orr w4, w3, ldr x3, [x3] #4 blr x3 mov w5, #116 mov x23, x0 cmp w4, #103 ubfiz x1, x21, # ccmp w3, w5, z, ne 1, #32 bne G_M000_IG06 mov x0, x22 ldrh w1, [x1, #0x0E] movz x2, #0xD1FFAB1E cmp w1, #97 movk x2, #0xD1FFAB1E LSL #16 bne G_M000_IG06 movk x2, #0xD1FFAB1E LSL #32 add w0, w20, #8 ldr x2, [x2] blr x2 cmp w0, w2 stp xzr, xzr, [x19] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 bhi G_M000_IG15 movk b G_M000_IG09 x0, #0xD1FFAB1E LSL #32 G_M000_IG06: ldr x0, [x0] sub mov x1, x20 w3, w2, w20 mov w2, wzr mov x1, x0 movz x3, #0xD1FFAB1E cmp w3, #7 movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 bls G_M000_IG13 ldr x3, [x3] ldrh blr x3 w0, [x1] mov x0, x23 cmp w0, #116 G_M000_IG10: bne G_M000_IG13 ldr x25, [sp, #0x58] ldrh ldp w0, [x1, #0x02] x23, x24, [sp, #0x48] orr w4 ldp x21, x22, [sp, #0x38] , w0, ldp x19, x20, [sp, #0x28] #2 ldp fp, lr, [sp], #0x60 mov w5, #103 ret lr cmp w4, #99 G_M000_IG11: movz x0, #0xD1FFAB1E ccmp w0, w5 movk x0, #0xD1FFAB1E LSL #16 , z, ne movk x0, #0xD1FFAB1E LSL #32 bne G_M000_IG13 ldr x0, [x0] cmp w3, #2 blr x0 blo G_M000_IG15 brk_windows # add x0, x1, #4 0 sub w1, w3, #2 ; Total bytes of code 384 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 3003: JIT compiled System.Text.SegmentStringBuilder:ToString() [Tier1, IL size=141, code size=384] eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3004: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex384_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Span`1[System.ReadOnlyMemory`1[ushort]]:.ctor(System.ReadOnlyMemory`1[ushort][],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x1, G_M000_IG05 G_M000_IG03: orr w2, w2, w3 cbnz w2, G_M000_IG07 stp xzr, xzr, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w4, w2 add x4, x4, w3, UXTW ldr w5, [x1, #0x08] cmp x4, x5 bhi G_M000_IG07 add x1, x1, #16 ubfiz x2, x2, #4, #32 add x1, x1, x2 str x1, [x0] str w3, [x0, #0x08] G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 104 3005: JIT compiled System.Span`1[System.ReadOnlyMemory`1[ushort]]:.ctor(System.ReadOnlyMemory`1[ushort][],int,int) [Tier1, IL size=110, code size=104] ; Assembly listing for method System.String:Create[long](int,long,System.Buffers.SpanAction`2[ushort,long]):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov w19, w0 mov x21, x1 mov x20, x2 G_M000_IG02: cbz x20, G_M000_IG07 cmp w19, #0 bgt G_M000_IG05 G_M000_IG03: cbnz w19, G_M000_IG08 movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: mov w0, w19 bl System.String:FastAllocateString(int):System.String mov x22, x0 ldrsb wzr, [x22] add x1, x22, #12 mov w2, w19 ldr x0, [x20, #0x08] mov x3, x21 ldr x4, [x20, #0x18] blr x4 mov x0, x22 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, #28 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG08: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 188 3006: JIT compiled System.String:Create[long](int,long,System.Buffers.SpanAction`2[ushort,long]) [Tier1, IL size=58, code size=188] ; Assembly listing for method System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 5 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x1 mov w20, w2 G_M000_IG02: ldr x21, [x3] ldr w22, [x3, #0x08] mov w23, wzr cmp w22, #0 ble G_M000_IG10 G_M000_IG03: ubfiz x2, x23, #4, #32 add x24, x21, x2 mov x1, xzr mov w25, wzr ldr x0, [x24] cbz x0, G_M000_IG09 G_M000_IG04: ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG07 G_M000_IG05: add x1, x0, #12 G_M000_IG06: ldr w25, [x0, #0x08] b G_M000_IG08 G_M000_IG07: ldr x1, [x0] ldr w2, [x1] tst w2, #0xD1FFAB1E beq G_M000_IG13 add x1, x0, #16 b G_M000_IG06 G_M000_IG08: ldr w2, [x24, #0x08] and w2, w2, #0xD1FFAB1E mov w2, w2 ldr w0, [x24, #0x0C] add x3, x2, w0, UXTW mov w4, w25 cmp x3, x4 bhi G_M000_IG12 lsl x2, x2, #1 add x1, x1, x2 sxtw w25, w0 G_M000_IG09: mov x0, x19 cmp w25, w20 bhi G_M000_IG11 mov w2, w25 lsl x24, x2, #1 mov x2, x24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x19, x19, x24 sub w20, w20, w25 add w23, w23, #1 cmp w23, w22 blt G_M000_IG03 G_M000_IG10: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 mov w25, w1 mov x1, x0 b G_M000_IG08 ; Total bytes of code 344 3007: JIT compiled System.Text.SegmentStringBuilder+<>c:b__8_0(System.Span`1[ushort],long) [Tier1, IL size=64, code size=344] ; Assembly listing for method BenchmarksGame.RegexRedux_1+IUB:.ctor(System.String,System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x14, x0 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x14, x0, #8 mov x15, x2 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 40 3008: JIT compiled BenchmarksGame.RegexRedux_1+IUB:.ctor(System.String,System.String) [Tier1, IL size=15, code size=40] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex385_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3009: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex385_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 329 ; 1 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! str x19, [sp, #0x38] mov fp, sp str xzr, [fp, #0x20] add x1, sp, #64 str x1, [fp, #0x30] str x0, [fp, #0x18] G_M000_IG02: ldr x19, [x0, #0x08] cbz x19, G_M000_IG16 ldr x1, [x19, #0x08] str x1, [fp, #0x10] str wzr, [fp, #0x28] G_M000_IG03: ldrb w2, [fp, #0x28] cbnz w2, G_M000_IG10 add x1, fp, #40 ldr x0, [fp, #0x10] bl System.Threading.Monitor:ReliableEnter(System.Object,byref) ldr x19, [x19, #0x10] dmb ishld cbz x19, G_M000_IG14 ldr x0, [fp, #0x18] ldp w2, w1, [x0, #0x10] cmp w1, w2 bge G_M000_IG14 G_M000_IG04: ldr w1, [x0, #0x14] add w1, w1, #1 str w1, [x0, #0x14] ldr x2, [x19, #0x18] ldr w3, [x2, #0x08] cmp w3, w1 ble G_M000_IG11 G_M000_IG05: ldr w3, [x2, #0x08] cmp w1, w3 bhs G_M000_IG09 ubfiz x1, x1, #4, #32 add x1, x1, #16 ldr x1, [x2, x1] mov x0, x1 add x1, fp, #32 bl System.Runtime.DependentHandle:InternalGetTargetAndDependent(long,byref):System.Object cbz x0, G_M000_IG11 mov x15, x0 ldr x0, [fp, #0x20] mov w14, #1 G_M000_IG06: str xzr, [fp, #0x20] cbnz w14, G_M000_IG12 G_M000_IG07: ldr x0, [fp, #0x18] ldp w14, w15, [x0, #0x10] cmp w15, w14 blt G_M000_IG04 G_M000_IG08: b G_M000_IG14 G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG10: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG11: mov x15, xzr mov x0, xzr mov w14, wzr b G_M000_IG06 G_M000_IG12: ldr x19, [fp, #0x18] add x1, x19, #24 mov x14, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF add x14, x1, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG13: ldrb w0, [fp, #0x28] cbz w0, G_M000_IG18 ldr x0, [fp, #0x10] bl System.Threading.Monitor:Exit(System.Object) b G_M000_IG18 G_M000_IG14: ldr x0, [fp, #0x30] bl G_M000_IG20 G_M000_IG15: nop G_M000_IG16: mov w0, wzr G_M000_IG17: ldr x19, [sp, #0x38] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG18: mov w0, #1 G_M000_IG19: ldr x19, [sp, #0x38] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG20: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] add x3, fp, #64 str x3, [sp, #0x10] G_M000_IG21: ldrb w0, [fp, #0x28] cbz w0, G_M000_IG22 ldr x0, [fp, #0x10] bl System.Threading.Monitor:Exit(System.Object) G_M000_IG22: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 384 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data 3010: JIT compiled System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:MoveNext() [Tier1 with Static PGO, IL size=124, code size=384] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp ; Assembly listing for method System.Collections.Generic.HashSet`1[System.__Canon]:Resize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: G_M000_IG10: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov bl fp, sp CORINFO_HELP_RNGCHKFAIL mov brk_windows x19, x0 #0 G_M000_IG02: ; Total bytes of code 328 ldr w0, [x19, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w1, w0 mov x0, x19 mov w2, wzr movz 3011: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 ; Total bytes of code 80 3012: JIT compiled System.Collections.Generic.HashSet`1[System.__Canon]:Resize() [Tier1, IL size=19, code size=80] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:And():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #95 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 3013: JIT compiled System.Text.RegularExpressions.RegexCompiler:And() [Tier1, IL size=17, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3014: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex385_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBackslash(bool):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 51 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x28] ldr w20, [x19, #0x58] sxtw w2, w20 ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG34 add x0, x0, #12 ldrh w21, [x0, w2, UXTW #2] cmp w21, #90 bhi G_M000_IG06 G_M000_IG03: cmp w21, #80 bhi G_M000_IG05 sub w22, w21, #65 cmp w22, #6 bhi G_M000_IG04 mov w0, w22 adr x2, [@RWD00] ldr w2, [x2, x0, LSL #2] adr x3, [G_M000_IG02] add x2, x2, x3 br x2 G_M000_IG04: cmp w21, #80 beq G_M000_IG27 b G_M000_IG31 G_M000_IG05: cmp w21, #83 beq G_M000_IG18 cmp w21, #87 beq G_M000_IG12 cmp w21, #90 beq G_M000_IG08 b G_M000_IG31 G_M000_IG06: cmp w21, #112 bhi G_M000_IG07 cmp w21, #98 beq G_M000_IG08 cmp w21, #100 beq G_M000_IG21 cmp w21, #112 beq G_M000_IG27 b G_M000_IG31 G_M000_IG07: cmp w21, #115 beq G_M000_IG15 cmp w21, #119 beq G_M000_IG09 cmp w21, #122 bne G_M000_IG31 G_M000_IG08: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 mov x0, x19 mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x19, #0x70] strb w0, [x23, #0x2E] str w1, [x23, #0x28] b G_M000_IG32 G_M000_IG09: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG10 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG11 G_M000_IG10: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] str w23, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x23, x0 b G_M000_IG32 G_M000_IG12: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG13 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG14 G_M000_IG13: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] str w23, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x23, x0 b G_M000_IG32 G_M000_IG15: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG16 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG17 G_M000_IG16: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] str w23, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x23, x0 b G_M000_IG32 G_M000_IG18: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG19 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG20 G_M000_IG19: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG20: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] str w23, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x23, x0 b G_M000_IG32 G_M000_IG21: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w23, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG22 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG23 G_M000_IG22: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov w14, #11 strb w14, [x0, #0x2E] str w23, [x0, #0x28] add x14, x0, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x23, x0 b G_M000_IG32 G_M000_IG24: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 ldr w0, [x19, #0x70] and w19, w0, #0xD1FFAB1E tbnz w0, #8, G_M000_IG25 movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 b G_M000_IG26 G_M000_IG25: movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 mov w14, #11 strb w14, [x23, #0x2E] str w19, [x23, #0x28] add x14, x23, #16 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF b G_M000_IG32 G_M000_IG27: add w0, w20, #1 str w0, [x19, #0x58] tst w1, #255 bne G_M000_IG29 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 ldr w3, [x19, #0x70] and w3, w3, #1 cmp w21, #112 cset x2, ne ldr w5, [x19, #0x58] ldr x4, [x19, #0x28] mov x0, x23 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr w1, [x19, #0x70] tbz w1, #0, G_M000_IG28 ldr x1, [x19, #0x30] mov x0, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG28: ldr w0, [x19, #0x70] and w22, w0, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 mov x0, x23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x15, x0 mov w14, #11 strb w14, [x21, #0x2E] str w22, [x21, #0x28] add x14, x21, #16 bl CORINFO_HELP_ASSIGN_REF mov x23, x21 b G_M000_IG32 G_M000_IG29: mov x0, xzr G_M000_IG30: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG31: uxtb w1, w1 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 cbz x23, G_M000_IG32 ldrb w0, [x23, #0x2E] cmp w0, #13 bne G_M000_IG32 ldr w0, [x23, #0x28] tbz w0, #0, G_M000_IG32 mov w0, #1 strb w0, [x19, #0x74] G_M000_IG32: mov x0, x23 G_M000_IG33: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG34: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG31 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 ; Total bytes of code 1264 3015: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBackslash(bool) [Tier1, IL size=603, code size=1264] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex386_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3016: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex386_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3017: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3018: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex386_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanBasicBackslash(bool):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 39 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr w0, [x19, #0x58] sxtw w21, w0 mov w22, wzr mov w1, wzr ldr x2, [x19, #0x28] mov x3, x2 sxtw w4, w0 ldr w5, [x3, #0x08] cmp w4, w5 bhs G_M000_IG39 add x3, x3, #12 ldrh w3, [x3, w4, UXTW #2] cmp w3, #107 bne G_M000_IG06 G_M000_IG03: ldr w3, [x2, #0x08] sub w2, w3, w0 cmp w2, #2 blt G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x58] ldr x0, [x19, #0x28] ldr w2, [x19, #0x58] add w3, w2, #1 str w3, [x19, #0x58] ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG39 add x0, x0, #12 ldrh w3, [x0, w2, UXTW #2] mov w0, #60 cmp w3, #39 ccmp w3, w0, z, ne bne G_M000_IG04 mov w1, #1 mov w0, #39 mov w2, #62 cmp w3, #39 csel w3, w0, w2, eq uxth w22, w3 G_M000_IG04: cbz w1, G_M000_IG35 ldr x0, [x19, #0x28] ldr w0, [x0, #0x08] ldr w2, [x19, #0x58] sub w0, w0, w2 cmp w0, #0 ble G_M000_IG35 G_M000_IG05: ldr x0, [x19, #0x28] ldr w2, [x19, #0x58] ldr w3, [x0, #0x08] cmp w2, w3 bhs G_M000_IG39 add x0, x0, #12 ldrh w3, [x0, w2, UXTW #2] b G_M000_IG07 G_M000_IG06: mov w4, #39 cmp w3, #60 ccmp w3, w4, z, ne bne G_M000_IG07 ldr w2, [x2, #0x08] sub w2, w2, w0 cmp w2, #1 ble G_M000_IG07 mov w1, #1 mov w2, #39 mov w4, #62 cmp w3, #39 csel w3, w2, w4, eq uxth w22, w3 add w0, w0, #1 str w0, [x19, #0x58] b G_M000_IG05 G_M000_IG07: cbz w1, G_M000_IG12 G_M000_IG08: mov w0, #57 cmp w3, #48 ccmp w3, w0, 0, ge bgt G_M000_IG29 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w23, w0 ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG28 add w1, w2, #1 str w1, [x19, #0x58] ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG39 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, w22 bne G_M000_IG28 tst w20, #255 bne G_M000_IG33 ldr x0, [x19, #0x38] cbz x0, G_M000_IG09 movz x21, #0xD1FFAB1E movk x21, #0xD1FFAB1E LSL #16 movk x21, #0xD1FFAB1E LSL #32 mov x0, x21 bl CORINFO_HELP_NEWSFAST ldr x2, [x19, #0x38] str w23, [x0, #0x08] mov x1, x0 mov x0, x2 ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 b G_M000_IG11 G_M000_IG09: tbnz w23, #31, G_M000_IG36 ldr w0, [x19, #0x6C] cmp w23, w0 bge G_M000_IG36 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x70] mov w2, #13 strb w2, [x0, #0x2E] str w1, [x0, #0x28] str w23, [x0, #0x20] b G_M000_IG32 G_M000_IG11: cbz w0, G_M000_IG36 b G_M000_IG10 G_M000_IG12: mov w0, #57 cmp w3, #49 ccmp w3, w0, 0, ge bgt G_M000_IG28 ldr w0, [x19, #0x70] tbz w0, #8, G_M000_IG23 movn w22, #0 sub w23, w3, #48 ldr w0, [x19, #0x58] sub w24, w0, #1 ldr w0, [x19, #0x68] cmp w23, w0 bgt G_M000_IG22 G_M000_IG13: ldr x25, [x19, #0x38] cbz x25, G_M000_IG15 G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x26, x0 bl CORINFO_HELP_NEWSFAST str w23, [x0, #0x08] mov x1, x0 mov x0, x25 ldr x2, [x25] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 b G_M000_IG16 G_M000_IG15: tbnz w23, #31, G_M000_IG21 ldr w0, [x19, #0x6C] cmp w23, w0 bge G_M000_IG21 b G_M000_IG17 G_M000_IG16: cbz w0, G_M000_IG21 G_M000_IG17: ldr x25, [x19, #0x38] cbz x25, G_M000_IG20 movz x26, #0xD1FFAB1E movk x26, #0xD1FFAB1E LSL #16 movk x26, #0xD1FFAB1E LSL #32 mov x0, x26 bl CORINFO_HELP_NEWSFAST str w23, [x0, #0x08] mov x1, x0 mov x0, x25 ldr x2, [x25] ldr x2, [x2, #0x48] ldr x2, [x2, #0x20] blr x2 mov x25, x0 ldr x1, [x25] cmp x1, x26 beq G_M000_IG19 G_M000_IG18: mov x1, x25 mov x0, x26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldr w0, [x25, #0x08] cmp w0, w24 bge G_M000_IG21 G_M000_IG20: sxtw w22, w23 G_M000_IG21: ldr w0, [x19, #0x58] add w0, w0, #1 str w0, [x19, #0x58] ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cbz w1, G_M000_IG22 ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG39 add x0, x0, #12 ldrh w3, [x0, w2, UXTW #2] mov w0, #57 cmp w3, #48 ccmp w3, w0, 0, ge bgt G_M000_IG22 mov w0, #10 madd w0, w23, w0, w3 sub w23, w0, #48 ldr w0, [x19, #0x68] cmp w23, w0 ble G_M000_IG13 G_M000_IG22: tbnz w22, #31, G_M000_IG28 tst w20, #255 bne G_M000_IG33 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x70] mov w2, #13 strb w2, [x0, #0x2E] str w1, [x0, #0x28] str w22, [x0, #0x20] b G_M000_IG32 G_M000_IG23: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w22, w0 tst w20, #255 bne G_M000_IG33 ldr x0, [x19, #0x38] cbz x0, G_M000_IG24 movz x26, #0xD1FFAB1E movk x26, #0xD1FFAB1E LSL #16 movk x26, #0xD1FFAB1E LSL #32 mov x0, x26 bl CORINFO_HELP_NEWSFAST ldr x2, [x19, #0x38] str w22, [x0, #0x08] mov x1, x0 mov x0, x2 ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 b G_M000_IG25 G_M000_IG24: tbnz w22, #31, G_M000_IG27 ldr w0, [x19, #0x6C] cmp w22, w0 bge G_M000_IG27 b G_M000_IG26 G_M000_IG25: cbz w0, G_M000_IG27 G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x70] mov w2, #13 strb w2, [x0, #0x2E] str w1, [x0, #0x28] str w22, [x0, #0x20] b G_M000_IG32 G_M000_IG27: cmp w22, #9 ble G_M000_IG37 G_M000_IG28: str w21, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 tst w20, #255 bne G_M000_IG33 add x3, x19, #92 ldr w1, [x19, #0x70] ldr x2, [x19, #0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG32 G_M000_IG29: mov w0, w3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG28 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x23, x0 ldr x0, [x19, #0x28] ldr w1, [x0, #0x08] ldr w2, [x19, #0x58] sub w1, w1, w2 cmp w1, #0 ble G_M000_IG28 add w1, w2, #1 str w1, [x19, #0x58] ldr w1, [x0, #0x08] cmp w2, w1 bhs G_M000_IG39 add x0, x0, #12 ldrh w0, [x0, w2, UXTW #2] cmp w0, w22 bne G_M000_IG28 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex387_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows tst w20, #255 ; optimized code bne G_M000_IG33 ; fp based frame ; partially interruptible ; No PGO data ldr x0, [x19, #0x40] cbz x0, G_M000_IG38 mov x1, x23 ldr x2, [x0] ldr x2, [x2, #0x48] ldr x2, [x2] blr x2 cbz w0, G_M000_IG38 ldr w21, [x19, #0x70] ldr x0, [x19, #0x40] mov x1, x23 ldr x2, [x0] ldr x2, [x2, #0x48] G_M000_IG01: ldr x2, [x2, #0x20] stp blr x2 mov x19, x0 fp, lr, [sp, #-0x30]! ldr x1, [x19] stp movz x26, #0xD1FFAB1E x19, x20, [sp, #0x18] movk x26, #0xD1FFAB1E LSL #16 str movk x26, #0xD1FFAB1E LSL #32 x21, [sp, #0x28] cmp x1, x26 mov beq G_M000_IG31 fp, sp G_M000_IG30: mov x19, x0 mov x1, x19 mov x21, x1 mov x0, x26 movz x2, #0xD1FFAB1E mov w20, w2 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG02: movk x2, #0xD1FFAB1E LSL #32 mov x1, x21 ldr mov w2, w20 x2, [x2] mov x0, x19 blr x2 bl G_M000_IG31: movz x0, #0xD1FFAB1ESystem.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 movk x0 G_M000_IG03: , #0xD1FFAB1E LSL #16 mov x1, x21 movk x0, #0xD1FFAB1E LSL #32 mov w2, w20 bl mov x0, x19 CORINFO_HELP_NEWSFAST bl ldr w1, [x19, #0x08] System.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 mov str w2, #13w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: strb ldr x21, [sp, #0x28] w2, [x0, #0x2E] ldp str x19, x20, [sp, #0x18] w21, [x0, #0x28] ldp fp, lr, [sp], #0x30 str w1, [x0, #0x20] ret lr ; Total bytes of code 108 G_M000_IG32: ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG33: mov x0, xzr G_M000_IG34: ldp x25, x26, [sp, #0x40] 3019: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex387_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG35: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x0, x19 mov w1, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 mov w0, w23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #11 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG37: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 mov w0, w22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #11 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG38: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG39: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1896 3020: JIT compiled System.Text.RegularExpressions.RegexParser:ScanBasicBackslash(bool) [Tier1, IL size=659, code size=1896] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:Textto(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str w1, [x0, #0x58] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3021: JIT compiled System.Text.RegularExpressions.RegexParser:Textto(int) [Tier1, IL size=8, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: ; Assembly listing for method System.Text.RegularExpressions.RegexParser:ScanCharEscape():ushort:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x223022: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] , [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x28] ldr w1, [x19, #0x58] add w2, w1, #1 str w2, [x19, #0x58] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG29 add x0, x0, #12 ldrh w20, [x0, w1, UXTW #2] mov w0, #55 cmp w20, #48 ccmp w20, w0, 0, ge bgt G_M000_IG05 G_M000_IG03: ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG04: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x1 G_M000_IG05: sub w0, w20, #97 cmp w0, #5 bhi G_M000_IG06 mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG06: sub w21, w20, #110 cmp w21, #10 bhi G_M000_IG24 mov w0, w21 adr x1, [@RWD24] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG07: mov x0, x19 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x2 G_M000_IG09: mov x0, x19 mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG10: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x2 G_M000_IG11: mov w0, #7 G_M000_IG12: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG13: mov w0, #8 G_M000_IG14: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: mov w0, #27 G_M000_IG16: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG17: mov w22, #12 b G_M000_IG26 G_M000_IG18: mov w22, #10 b G_M000_IG26 G_M000_IG19: mov w22, #13 b G_M000_IG26 G_M000_IG20: mov w22, #9 b G_M000_IG26 G_M000_IG21: mov w22, #11 b G_M000_IG26 G_M000_IG22: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG23: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 br x1 G_M000_IG24: ldr w0, [x19, #0x70] tbnz w0, #8, G_M000_IG25 mov w0, w20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG28 G_M000_IG25: sxtw w22, w20 G_M000_IG26: uxth w0, w22 G_M000_IG27: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG28: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 strh w20, [x21, #0x08] mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 mov x0, x19 mov w1, #5 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 bl CORINFO_HELP_THROW G_M000_IG29: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 RWD24 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG09 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 ; Total bytes of code 580 3023: JIT compiled System.Text.RegularExpressions.RegexParser:ScanCharEscape() [Tier1, IL size=205, code size=580] ; Assembly listing for method System.Text.RegularExpressions.RegexParser:UseOptionE():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x70] tst w0, #0xD1FFAB1E cset x0, ne G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 3024: JIT compiled System.Text.RegularExpressions.RegexParser:UseOptionE() [Tier1, IL size=16, code size=28] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:IsBoundaryWordChar(ushort):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 uxth w19, w0 asr w20, w19, #3 cmp w20, #16 blo G_M000_IG07 G_M000_IG03: mov w0, w19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, #1 lsl w0, w1, w0 movz w1, #0xD1FFAB1E movk w1, #4 LSL #16 tst w0, w1 bne G_M000_IG05 mov w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w19, w0 ccmp w19, w1, z, ne cset x0, eq G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: mov w0, #1 G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: ldrb w0, [x1, w20, UXTW #2] and w1, w19, #7 mov w2, #1 lsl w1, w2, w1 tst w0, w1 cset x0, ne G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 172 3025: JIT compiled System.Text.RegularExpressions.RegexCharClass:IsBoundaryWordChar(ushort) [Tier1, IL size=81, code size=172] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:get_WordCharAsciiLookup():System.ReadOnlySpan`1[ubyte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #16 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 3026: JIT compiled System.Text.RegularExpressions.RegexCharClass:get_WordCharAsciiLookup() [Tier1, IL size=13, code size=32] ; Assembly listing for method System.Number+BigInteger:Compare(byref,byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 20 G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0] ldr w3, [x1] sub w3, w2, w3 cbnz w3, G_M000_IG11 G_M000_IG03: cbz w2, G_M000_IG09 sub w3, w2, #1 tbnz w3, #31, G_M000_IG09 G_M000_IG04: add x0, x0, #4 G_M000_IG05: sbfiz x2, x3, #2, #32 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ldr ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data w4, [x0, x2] add x5, x1, #4 ldr w2, [x5, x2] sub x2, x4, w2, UXTW cbz x2, G_M000_IG08 G_M000_IG06: mov w0, #1 movn w1, #0 cmp x2, #0 csel w0, w0, w1, gt G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: sub w3, w3, #1 tbz w3, #31, G_M000_IG05 G_M000_IG09: mov w0, wzr G_M000_IG10: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG11: mov w0, w3 G_M000_IG12: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 120 3027: JIT compiled System.Number+BigInteger:Compare(byref,byref) [Tier1 with Static PGO, IL size=97, code size=120] G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 ; Assembly listing for method System.Text.StringBuilder:Append(System.String):System.Text.StringBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame 3028: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex387_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 133408 ; 2 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: cbz x1, G_M000_IG11 G_M000_IG03: ldr w20, [x1, #0x08] add x1, x1, #12 cbz w20, G_M000_IG11 G_M000_IG04: ldr x2, [x19, #0x08] ldr w21, [x19, #0x18] add w0, w21, w20 ldr w3, [x2, #0x08] cmp w0, w3 bhi G_M000_IG10 G_M000_IG05: add x2, x2, #16 sbfiz x0, x21, #1, #32 add x0, x2, x0 cmp w20, #2 ble G_M000_IG08 G_M000_IG06: sxtw x2, w20 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG07: add w0, w21, w20 str w0, [x19, #0x18] b G_M000_IG11 G_M000_IG08: ldrh w2, [x1] strh w2, [x0] cmp w20, #2 bne G_M000_IG07 G_M000_IG09: ldrh w2, [x1, #0x02] strh w2, [x0, #0x02] b G_M000_IG07 G_M000_IG10: mov x0, x19 mov w2, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG11: mov x0, x19 G_M000_IG12: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 196 3029: JIT compiled System.Text.StringBuilder:Append(System.String) [Tier1 with Static PGO, IL size=25, code size=196] ; Assembly listing for method System.Text.StringBuilder:Append(byref,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 135716 ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x20, x0 mov w19, w2 G_M000_IG02: cbz w19, G_M000_IG12 G_M000_IG03: ldr x2, [x20, #0x08] ldr w21, [x20, #0x18] add w0, w21, w19 ldr w3, [x2, #0x08] cmp w0, w3 bhi G_M000_IG10 G_M000_IG04: add x2, x2, #16 sbfiz x0, x21, #1, #32 add x0, x2, x0 cmp w19, #2 ble G_M000_IG08 G_M000_IG05: sxtw x2, w19 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: add w0, w21, w19 str w0, [x20, #0x18] G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: ldrh w2, [x1] strh w2, [x0] cmp w19, #2 bne G_M000_IG06 G_M000_IG09: ldrh w2, [x1, #0x02] strh w2, [x0, #0x02] b G_M000_IG06 G_M000_IG10: mov x0, x20 mov w2, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG11: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 br x3 G_M000_IG12: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 208 3030: JIT compiled System.Text.StringBuilder:Append(byref,int) [Tier1 with Static PGO, IL size=96, code size=208] ; Assembly listing for method System.Number+BigInteger:Multiply10():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 8 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0] cbz w1, G_M000_IG06 mov w2, wzr mov x3, xzr add x4, x0, #4 G_M000_IG03: sbfiz x5, x2, #2, #32 ldr w6, [x4, x5] lsl x7, x6, #3 add x6, x7, x6, LSL #1 add x6, x6, x3 lsr x3, x6, #32 str w6, [x4, x5] add w2, w2, #1 cmp w2, w1 blt G_M000_IG03 G_M000_IG04: cbnz x3, G_M000_IG07 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: str w3, [x4, w2, SXTW #2] ldr w1, [x0] add w1, w1, #1 str w1, [x0] b G_M000_IG05 ; Total bytes of code 108 3031: JIT compiled System.Number+BigInteger:Multiply10() [Tier1 with Static PGO, IL size=122, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex388_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3032: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex388_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 12 G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x1] ldr w0, [x19] cmp w0, w20 blt G_M000_IG18 sub w0, w20, #1 add x21, x19, #4 sbfiz x0, x0, #2, #32 ldr w2, [x21, x0] add x22, x1, #4 ldr w0, [x22, x0] add w0, w0, #1 cmp w0, #0 beq G_M000_IG17 udiv w23, w2, w0 cbz w23, G_M000_IG07 G_M000_IG03: mov w0, wzr mov x2, xzr mov x3, xzr mov w4, w23 G_M000_IG04: sbfiz x5, x0, #2, #32 ldr w6, [x22, x5] madd x6, x6, x4, x3 lsr x3, x6, #32 ldr w7, [x21, x5] sub x6, x7, w6, UXTW sub x6, x6, x2 lsr x2, x6, #32 and x2, x2, #1 str w6, [x21, x5] add w0, w0, #1 cmp w0, w20 blt G_M000_IG04 G_M000_IG05: cmp w20, #0 ble G_M000_IG06 sub w0, w20, #1 ldr w0, [x21, w0, SXTW #2] cbz w0, G_M000_IG20 G_M000_IG06: str w20, [x19] G_M000_IG07: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbz w0, #31, G_M000_IG14 G_M000_IG08: mov w0, w23 G_M000_IG09: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: sxtw w20, w0 G_M000_IG11: cmp w20, #0 ble G_M000_IG13 G_M000_IG12: sub w0, w20, #1 ldr w1, [x21, w0, SXTW #2] cbz w1, G_M000_IG10 G_M000_IG13: str w20, [x19] b G_M000_IG08 G_M000_IG14: add w23, w23, #1 mov w0, wzr mov x1, xzr G_M000_IG15: sbfiz x2, x0, #2, #32 ldr w3, [x21, x2] ldr w4, [x22, x2] sub x3, x3, w4, UXTW sub x3, x3, x1 lsr x1, x3, #32 and x1, x1, #1 str w3, [x21, x2] add w0, w0, #1 cmp w0, w20 blt G_M000_IG15 G_M000_IG16: b G_M000_IG11 G_M000_IG17: bl CORINFO_HELP_THROWDIVZERO G_M000_IG18: mov w0, wzr G_M000_IG19: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG20: sub w20, w20, #1 b G_M000_IG05 ; Total bytes of code 356 3033: JIT compiled System.Number+BigInteger:HeuristicDivide(byref,byref) [Tier1 with Static PGO, IL size=363, code size=356] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ; Assembly listing for method System.Diagnostics.Tracing.EtwEventProvider:EventWriteTransfer(byref,long,ulong,ulong,int,ulong):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data brk_windows #0 ; Total bytes of code 296 G_M000_IG01: stp 3034: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x30] mov x2, x3 mov x3, x4 mov w4, w5 mov x5, x6 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 cmp w0, #8 beq G_M000_IG05 G_M000_IG03: mov w1, #0xD1FFAB1E mov w2, #2 cmp w0, #234 ccmp w0, w1, z, ne csel w0, wzr, w2, ne G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 96 3035: JIT compiled System.Diagnostics.Tracing.EtwEventProvider:EventWriteTransfer(byref,long,ulong,ulong,int,ulong) [Tier1, IL size=46, code size=96] ; Assembly listing for method Interop+Advapi32:EventWriteTransfer(long,byref,ulong,ulong,int,ulong):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] mov fp, sp str xzr, [fp, #0x68] str xzr, [fp, #0x60] mov x20, x0 mov x19, x1 mov x21, x2 mov x22, x3 mov w23, w4 mov x24, x5 G_M000_IG02: add x0, fp, #24 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x25, x0 mov x0, sp str x0, [fp, #0x38] mov x0, fp str x0, [fp, #0x48] str x19, [fp, #0x68] str x19, [fp, #0x58] mov x1, x19 mov x0, x20 mov x2, x21 mov x3, x22 mov w4, w23 mov x5, x24 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 str x6, [fp, #0x28] adr x6, [G_M000_IG05] str x6, [fp, #0x40] add x6, fp, #24 str x6, [x25, #0x10] strb wzr, [x25, #0x0C] G_M000_IG03: movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 G_M000_IG04: blr x6 G_M000_IG05: mov w19, w0 mov w0, #1 strb w0, [x25, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x20] str x0, [x25, #0x10] str xzr, [fp, #0x68] sxtw w0, w19 cmp w0, #87 bne G_M000_IG12 G_M000_IG07: cbnz x22, G_M000_IG12 movi v16.4s, #0 str q16, [fp, #0x70] ldr x19, [fp, #0x58] str x19, [fp, #0x60] mov x0, x20 mov x1, x19 add x3, fp, #112 mov x2, x21 mov w4, w23 mov x5, x24 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 str x6, [fp, #0x28] adr x6, [G_M000_IG10] str x6, [fp, #0x40] add x6, fp, #24 str x6, [x25, #0x10] strb wzr, [x25, #0x0C] G_M000_IG08: movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 G_M000_IG09: blr x6 G_M000_IG10: mov w19, w0 mov w0, #1 strb w0, [x25, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG11 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG11: ldr x0, [fp, #0x20] str x0, [x25, #0x10] sxtw w0, w19 str xzr, [fp, #0x60] G_M000_IG12: ldp x27, x28, [sp, #0xC0] ldp x25, x26, [sp, #0xB0] ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp], #0xD0 ret lr ; Total bytes of code 420 3036: JIT compiled Interop+Advapi32:EventWriteTransfer(long,byref,ulong,ulong,int,ulong) [Tier1, IL size=48, code size=420] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.RegexParser:AddConcatenate(bool,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: G_M000_IG10: stp stp fp, lr, [sp, #-0x20]!fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] mov fp, sp stp mov x19, x0 x19, x20, [sp, #0x28] str G_M000_IG02: x21, [sp, ldp x20, x0, [x19, #0x18] #0x38] uxtb mov w1, w1 movz x4, #0xD1FFAB1E fp, movk x4, #0xD1FFAB1E LSL #16 sp movk x4, #0xD1FFAB1E LSL #32 str xzr, [fp, #0x18] ldr str xzr, [fp, #0x20] x4, [x4] mov x19, x0 ldr wzr, [x0] blr x4 G_M000_IG02: mov x1, x0 ldr mov x0, x20 w20, [x19, #0x4C] movz x2, #0xD1FFAB1E cmp movk x2, #0xD1FFAB1E LSL #16 w20, w2 movk x2, bhi G_M000_IG13 #0xD1FFAB1E LSL #32 ubfiz ldr x2, [x2] ldr wzr, [x0] x0, x20, #1, #32 blr x2 add x0, x1, x0 str mov x1, x0xzr, [x19, #0x20] sub w3, w2, w20 G_M000_IG03: cmp w3, #1 ldp x19, x20, [sp, #0x10] bls ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 3037: JIT compiled System.Text.RegularExpressions.RegexParser:AddConcatenate(bool,int,int) [Tier1, IL size=33, code size=96] G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3038: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex388_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Gen2GcCallback:Finalize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp add x1, sp, #32 str x1, [fp, #0x18] str x0, [fp, #0x10] G_M000_IG02: ldr x1, [x0, #0x18] cbz x1, G_M000_IG04 and x1, x1, #-2 ldr x1, [x1] cbnz x1, G_M000_IG03 add x0, x0, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG06 G_M000_IG03: ldr x2, [x0, #0x10] ldr x0, [x2, #0x08] ldr x2, [x2, #0x18] blr x2 cbnz w0, G_M000_IG05 ldr x0, [fp, #0x10] add x0, x0, #24 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG06 G_M000_IG04: ldr x1, [x0, #0x08] ldr x0, [x1, #0x08] ldr x1, [x1, #0x18] blr x1 cbnz w0, G_M000_IG05 b G_M000_IG06 G_M000_IG05: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG06: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: stp fp, lr, [sp, #-0x20]! add x3, fp, #32 str x3, [sp, #0x18] G_M000_IG09: adr x0, [G_M000_IG05] G_M000_IG10: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: stp fp, lr, [sp, #-0x20]! add x3, fp, #32 str x3, [sp, #0x18] G_M000_IG12: adr x0, [G_M000_IG05] G_M000_IG13: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG14: stp fp, lr, [sp, #-0x20]! add x3, fp, #32 str x3, [sp, #0x18] G_M000_IG15: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG16: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 292 3039: JIT compiled System.Gen2GcCallback:Finalize() [Tier1, IL size=111, code size=292] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeQuantifier(bool,int,int):System.Text.RegularExpressions.RegexNode:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 19 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 mov w21, w2 mov w20, w3 G_M000_IG02: cmp w21, w20 bne G_M000_IG07 G_M000_IG03: sxtw w0, w20 cmp w0, #64 bgt G_M000_IG07 cbz w20, G_M000_IG04 cmp w20, #1 beq G_M000_IG05 b G_M000_IG06 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST ldr w1, [x19, #0x28] mov w2, #23 strb w2, [x0, #0x2E] str w1, [x0, #0x28] b G_M000_IG11 G_M000_IG05: mov x0, x19 b G_M000_IG11 G_M000_IG06: ldrb w22, [x19, #0x2E] cmp w22, #9 bne G_M000_IG07 mov w0, #12 strb w0, [x19, #0x2E] ldrh w0, [x19, #0x2C] mov w1, w20 bl System.String:.ctor(ushort,int):this mov x15, x0 add x14, x19, #16 bl CORINFO_HELP_ASSIGN_REF strh wzr, [x19, #0x2C] b G_M000_IG05 G_M000_IG07: ldrb w22, [x19, #0x2E] sxtw w0, w22 sub w0, w0, #9 cmp w0, #2 bhi G_M000_IG10 tst w1, #255 bne G_M000_IG08 mov w1, #3 b G_M000_IG09 G_M000_IG08: mov w1, #6 G_M000_IG09: sub w0, w1, #9 add w0, w22, w0 uxtb w0, w0 strb w0, [x19, #0x2E] stp w21, w20, [x19, #0x20] b G_M000_IG05 G_M000_IG10: mov w0, #26 tst w1, #255 cinc w22, w0, ne movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x23, x0 ldr w0, [x19, #0x28] strb w22, [x23, #0x2E] str w0, [x23, #0x28] stp w21, w20, [x23, #0x20] mov x0, x23 mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x23 G_M000_IG11: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 328 3040: JIT compiled System.Text.RegularExpressions.RegexNode:MakeQuantifier(bool,int,int) [Tier1, IL size=144, code size=328] ; Assembly listing for method System.Buffers.Utilities:GetMemoryPressure():int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x0, #0x18] scvtf d16, x1 ldr x0, [x0, #0x08] scvtf d17, x0 ldr d18, [@RWD00] fmul d18, d17, d18 fcmp d16, d18 blt G_M000_IG05 G_M000_IG03: mov w0, #2 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr d18, [@RWD08] fmul d17, d17, d18 fcmp d16, d17 cset x0, ge G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 3FECCCCCCCCCCCCDh ; 0.9 RWD08 dq 3FE6666666666666h ; 0.7 ; Total bytes of code 100 3041: JIT compiled System.Buffers.Utilities:GetMemoryPressure() [Tier1, IL size=68, code size=100] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeRep(ubyte,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w4, [x0, #0x2E] sub w1, w1, #9 add w1, w4, w1 uxtb w1, w1 strb w1, [x0, #0x2E] stp w2, w3, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 40 3042: JIT compiled System.Text.RegularExpressions.RegexNode:MakeRep(ubyte,int,int) [Tier1, IL size=34, code size=40] ; Assembly listing for method System.GC:GetGCMemoryInfo(int):System.GCMemoryInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov w19, w0 G_M000_IG02: cmp w19, #0 ccmp w19, #3, 0, ge bgt G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 mov w1, w19 bl System.GC:GetMemoryInfo(System.GCMemoryInfoData,int) mov x0, x20 G_M000_IG03: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x20, x0 str wzr, [x19, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x21, x0 mov w0, #3 str w0, [x21, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x23, x0 mov x2, x21 mov x1, x19 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x2, x0 mov x1, x23 mov x0, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 284 3043: JIT compiled System.GC:GetGCMemoryInfo(int) [Tier1, IL size=61, code size=284] ; Assembly listing for method System.Diagnostics.Tracing.EventSource:WriteEvent(int,int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #32 stp fp, lr, [sp, #0x10] add fp, sp, #16 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #-0x10] str w2, [fp, #-0x04] str w3, [fp, #-0x08] G_M000_IG02: ldrb w4, [x0, #0x9D] cbz w4, G_M000_IG04 G_M000_IG03: ldr wzr, [sp], #-0x20 mov x4, sp sub x2, fp, #4 str x2, [x4] mov w2, #4 stp w2, wzr, [x4, #0x08] sub x2, fp, #8 str x2, [x4, #0x10] mov w2, #4 stp w2, wzr, [x4, #0x18] mov x2, xzr mov w3, #2 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG04: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x10] cmp xip0, xip1 beq G_M000_IG05 bl CORINFO_HELP_FAIL_FAST G_M000_IG05: sub sp, fp, #16 ldp fp, lr, [sp, #0x10] add sp, sp, #32 ret lr ; Total bytes of code 156 3044: JIT compiled System.Diagnostics.Tracing.EventSource:WriteEvent(int,int,int) [Tier1, IL size=97, code size=156] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex389_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3045: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex389_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Runtime.CompilerServices.ConditionalWeakTable`2[System.__Canon,System.__Canon]:System.Collections.Generic.IEnumerable>.GetEnumerator():System.Collections.Generic.IEnumerator`1[System.Collections.Generic.KeyValuePair`2[System.__Canon,System.__Canon]]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! str x19, [sp, #0x38] mov fp, sp add x1, sp, #64 str x1, [fp, #0x30] str x0, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG02: ldr x1, [x0, #0x08] str x1, [fp, #0x10] str wzr, [fp, #0x20] G_M000_IG03: ldrb w2, [fp, #0x20] cbnz w2, G_M000_IG07 add x1, fp, #32 ldr x0, [fp, #0x10] bl System.Threading.Monitor:ReliableEnter(System.Object,byref) ldr x0, [fp, #0x18] ldr x1, [x0, #0x10] dmb ishld cbz x1, G_M000_IG09 G_M000_IG04: ldr w1, [x1, #0x28] cbz w1, G_M000_IG09 ldr x1, [x0] ldr x2, [x1, #0x30] ldr x2, [x2] ldr x2, [x2, #0x30] cbz x2, G_M000_IG08 G_M000_IG05: mov x0, x2 bl CORINFO_HELP_NEWFAST mov x19, x0 add x14, x19, #8 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF ldr x15, [fp, #0x18] ldr w0, [x15, #0x18] add w0, w0, #1 str w0, [x15, #0x18] ldr x0, [x15, #0x10] dmb ishld ldr w0, [x0, #0x28] sub w0, w0, #1 str w0, [x19, #0x10] movn w0, #0 str w0, [x19, #0x14] G_M000_IG06: b G_M000_IG13 G_M000_IG07: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG08: mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x2, x0 b G_M000_IG05 G_M000_IG09: ldr x1, [x0] ldr x2, [x1, #0x30] ldr x2, [x2] ldr x2, [x2, #0x28] cbz x2, G_M000_IG11 G_M000_IG10: b G_M000_IG12 G_M000_IG11: mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS mov x2, x0 G_M000_IG12: mov x0, x2 bl CORINFO_HELP_GETGENERICS_GCSTATIC_BASE ldr x19, [x0] ldr x15, [fp, #0x18] b G_M000_IG06 G_M000_IG13: ldrb w0, [fp, #0x20] cbz w0, G_M000_IG15 G_M000_IG14: ldr x0, [fp, #0x10] bl System.Threading.Monitor:Exit(System.Object) ldr x15, [fp, #0x18] G_M000_IG15: mov x0, x19 G_M000_IG16: ldr x19, [sp, #0x38] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG17: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] add x3, fp, #64 str x3, [sp, #0x10] G_M000_IG18: ldrb w0, [fp, #0x20] cbz w0, G_M000_IG19 ldr x0, [fp, #0x10] bl System.Threading.Monitor:Exit(System.Object) G_M000_IG19: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data ; Total bytes of code 376 3046: JIT compiled System.Runtime.CompilerServices.ConditionalWeakTable`2[System.__Canon,System.__Canon]:System.Collections.Generic.IEnumerable>.GetEnumerator() [Tier1, IL size=69, code size=376] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3047: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:.ctor(System.Runtime.CompilerServices.ConditionalWeakTable`2[System.__Canon,System.__Canon]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x14, x0, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF ldr w2, [x1, #0x18] add w2, w2, #1 str w2, [x1, #0x18] ldr x1, [x1, #0x10] dmb ishld ldr w1, [x1, #0x28] sub w1, w1, #1 str w1, [x0, #0x10] movn w1, #0 str w1, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 68 3048: JIT compiled System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:.ctor(System.Runtime.CompilerServices.ConditionalWeakTable`2[System.__Canon,System.__Canon]) [Tier1, IL size=56, code size=68] ; Assembly listing for method System.Runtime.CompilerServices.ConditionalWeakTable`2+Container[System.__Canon,System.__Canon]:TryGetEntry(int,byref,byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp str xzr, [fp, #0x10] mov x19, x0 mov x20, x2 mov x21, x3 G_M000_IG02: ldr x0, [x19, #0x18] ldr w2, [x0, #0x08] cmp w2, w1 ble G_M000_IG05 G_M000_IG03: ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG07 ubfiz x1, x1, #4, #32 add x1, x1, #16 ldr x0, [x0, x1] add x1, fp, #16 bl System.Runtime.DependentHandle:InternalGetTargetAndDependent(long,byref):System.Object cbz x0, G_M000_IG05 mov x14, x20 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x15, [fp, #0x10] mov x14, x21 bl CORINFO_HELP_CHECKED_ASSIGN_REF mov w0, #1 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: str xzr, [x20] str xzr, [x21] mov w0, wzr G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 164 3049: JIT compiled System.Runtime.CompilerServices.ConditionalWeakTable`2+Container[System.__Canon,System.__Canon]:TryGetEntry(int,byref,byref) [Tier1, IL size=87, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 ; Assembly listing for method System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 G_M000_IG01: cmp w0, #0 csel w0, w0, w1, ge stp cmp w0, w22 fp, lr, [sp, #-0x40]! bhi G_M000_IG09 ubfiz x1, x0, #1, #32 str add x21, x21, x1 x19, [sp, #0x38] sub w22, w22, w0 add w0, w20, w0 mov cmp w22, #1 fp, bls G_M000_IG07 sp ldrh add w1x1, , [x21, #0x02] sp, #64 cmp w1, #62 str x1 bne G_M000_IG07 , [fp, #0x30] add w0, w0, #2 str x0, [fp, #0x28] str str x0, [fp, #0x18] w0, [x19, #0x4C] G_M000_IG02: sxtw w21, w0 ldr cmp w21, w20 xzr, bge G_M000_IG04 [x0] mov w0, w20 add x1 mov w20, w21 , x0, #8 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] mov x2, xzr cbnz swpal x2, x19, [x1] w0, G_M000_IG05 cbz x19, G_M000_IG09 mov x0, x19 G_M000_IG03: movz x1, #0xD1FFAB1E stp xzr, xzr, [x0, #0x18] movk x1, #0xD1FFAB1E LSL #16 ldr movk x1, #0xD1FFAB1E LSL #32 x1, ldr x1, [x1] [ blr x1 x19, #0x08] G_M000_IG05: str x1, [fp, #0x10] ldr str wzr, [fp, #0x20] x3, [x19, #0x20] G_M000_IG04: ldr w0, [x19, #0x58] ldrb sub w0, w0, #1 w2, [fp, #0x20] str w0, [x19, #0x58] cbnz w2, G_M000_IG05 ldr w2, [x3, #0x08] add x1, fp, #32 cmp ldr w0, w2 x0, [fp, #0x10] bhs G_M000_IG10 bl add x3, x3, #16 System.Threading.Monitor:ReliableEnter(System.Object,byref) str b G_M000_IG06 wzr, G_M000_IG05: [x3, movz x2, #0xD1FFAB1Ew0, UXTW #2] movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 sub ldr x2, [x2] w3, blr x2 w21, w20 ldr brk_windows x0, [x19, #0x28] #0 mov w2, w20 G_M000_IG06: mov w1, wzr ldr w0, [x19, #0x18] movz x4, #0xD1FFAB1E sub w0, w0, #1 str w0, [x19, #0x18] G_M000_IG07: movk x4, #0xD1FFAB1E LSL #16 ldrb w0, [fp, #0x20] movk x4, #0xD1FFAB1E LSL #32 cbz w0, G_M000_IG08 ldr x4, [x4] ldr x0, [fp, #0x10] ldr wzr, [x0] bl blr System.Threading.Monitor:Exit(System.Object) x4 G_M000_IG08: mov w0, #1 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E G_M000_IG06: movk x1, #0xD1FFAB1E LSL #16 ldp movk x1, #0xD1FFAB1E LSL #32 x21, x22, [sp, #0x20] ldr x1, [x1] ldp x19, x20, [sp, #0x10] blr x1 ldp fp, lr, [sp], #0x30 ldr ret lr x0, [fp G_M000_IG07: , #0x18] mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] G_M000_IG08: ldp x19, x20, [sp, #0x10] ldr x19, [sp, #0x38] ldp fp, lr, [sp], #0x30 ldp ret lr fp, lr, [sp], #0x40 G_M000_IG09: ret lr movz x0, #0xD1FFAB1E G_M000_IG10: movk x0, #0xD1FFAB1E LSL #16 stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] add x3, fp, #64 movk str x3, [sp, #0x10] x0, #0xD1FFAB1E LSL #32 G_M000_IG11: ldr ldrb x0, [x0] w0, [fp, #0x20] blr x0 cbz w0, G_M000_IG12 brk_windows ldr x0, [fp, #0x10] #0 bl G_M000_IG10: System.Threading.Monitor:Exit(System.Object) G_M000_IG12: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr bl CORINFO_HELP_RNGCHKFAIL ; Total bytes of code 224 brk_windows #0 ; Total bytes of code 372 3050: JIT compiled System.Runtime.CompilerServices.ConditionalWeakTable`2+Enumerator[System.__Canon,System.__Canon]:Dispose() [Tier1, IL size=78, code size=224] 3051: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex389_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.GC:SuppressFinalize(System.Object) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 b System.GC:_SuppressFinalize(System.Object) G_M000_IG04: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 64 3052: JIT compiled System.GC:SuppressFinalize(System.Object) [Tier1, IL size=18, code size=64] ; Assembly listing for method System.GC:ReRegisterForFinalize(System.Object) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbz x0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 b System.GC:_ReRegisterForFinalize(System.Object) G_M000_IG04: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 64 3053: JIT compiled System.GC:ReRegisterForFinalize(System.Object) [Tier1, IL size=18, code size=64] ; Assembly listing for method System.Runtime.ConstrainedExecution.CriticalFinalizerObject:Finalize():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 3054: JIT compiled System.Runtime.ConstrainedExecution.CriticalFinalizerObject:Finalize() [Tier1, IL size=10, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex390_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3055: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex390_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3056: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3057: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex390_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:CanBeMadeAtomic(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 110 single block inlinees; 9 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x20, x0 mov x19, x1 mov w21, w2 mov w22, w3 G_M000_IG02: bl System.Runtime.CompilerServices.RuntimeHelpers:TryEnsureSufficientExecutionStack():bool cbnz w0, G_M000_IG13 G_M000_IG03: b G_M000_IG140 G_M000_IG04: ldrb w24, [x19, #0x2E] sub w24, w24, #25 cmp w24, #7 bhi G_M000_IG14 mov w0, w24 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG05: ldr w0, [x19, #0x28] tbz w0, #6, G_M000_IG07 b G_M000_IG14 G_M000_IG06: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG14 G_M000_IG07: ldr x1, [x19, #0x08] mov x19, x1 cbz x19, G_M000_IG09 G_M000_IG08: ldr x0, [x19] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG13 G_M000_IG09: mov x2, x1 cbz x2, G_M000_IG12 G_M000_IG10: ldr x0, [x2] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x0, x3 beq G_M000_IG12 G_M000_IG11: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x2, x0 G_M000_IG12: ldr w0, [x2, #0x10] cmp w0, #0 bls G_M000_IG142 ldr x0, [x2, #0x08] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG143 ldr x19, [x0, #0x10] b G_M000_IG13 G_M000_IG13: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 sxtw w23, w0 cmp w23, #0 bgt G_M000_IG04 G_M000_IG14: ldr w0, [x20, #0x28] ldr w1, [x19, #0x28] cmp w0, w1 bne G_M000_IG140 ldrb w24, [x19, #0x2E] sxtw w0, w24 cmp w0, #34 ccmp w23, #3, 0, eq ccmp w0, #24, z, ne bne G_M000_IG18 G_M000_IG15: mov w24, wzr cmp w23, #0 ble G_M000_IG138 G_M000_IG16: mov x0, x19 mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x1, x0 uxtb w2, w21 mov x0, x20 mov w3, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 cbz w0, G_M000_IG140 add w24, w24, #1 cmp w24, w23 blt G_M000_IG16 G_M000_IG17: b G_M000_IG138 G_M000_IG18: ldrb w0, [x20, #0x2E] sub w25, w0, #3 cmp w25, #5 bhi G_M000_IG140 mov w0, w25 adr x1, [@RWD32] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG19: tst w22, #255 beq G_M000_IG140 G_M000_IG20: sxtw w0, w24 sub w1, w0, #3 cmp w1, #18 bhi G_M000_IG21 mov w0, w1 adr x1, [@RWD56] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG21: sub w23, w0, #41 cmp w23, #4 bhi G_M000_IG140 mov w0, w23 adr x1, [@RWD132] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG22: ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 bne G_M000_IG138 b G_M000_IG140 G_M000_IG23: ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 beq G_M000_IG138 b G_M000_IG140 G_M000_IG24: ldrh w0, [x20, #0x2C] ldr x20, [x19, #0x10] uxth w19, w0 ldr w0, [x20, #0x08] cmp w0, #1 bls G_M000_IG143 ldrh w3, [x20, #0x0E] ldr w0, [x20, #0x08] cmp w0, #2 bls G_M000_IG143 ldrh w4, [x20, #0x10] add w0, w3, w4 add w21, w0, #3 mov w0, w19 mov x1, x20 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldrh w1, [x20, #0x0C] cmp w1, #1 bne G_M000_IG25 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG27 b G_M000_IG26 G_M000_IG25: cbz w0, G_M000_IG27 G_M000_IG26: ldr w1, [x20, #0x08] cmp w1, w21 ble G_M000_IG27 mov w0, w19 mov x1, x20 mov w2, w21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG27: cbz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG28: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG36 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 bne G_M000_IG138 b G_M000_IG36 G_M000_IG29: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG38 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 beq G_M000_IG138 b G_M000_IG38 G_M000_IG30: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG40 ldrh w0, [x20, #0x2C] ldr x24, [x19, #0x10] uxth w25, w0 ldr w0, [x24, #0x08] cmp w0, #1 bls G_M000_IG143 ldrh w3, [x24, #0x0E] ldr w0, [x24, #0x08] cmp w0, #2 bls G_M000_IG143 ldrh w4, [x24, #0x10] add w0, w3, w4 add w27, w0, #3 mov w0, w25 mov x1, x24 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldrh w1, [x24, #0x0C] cmp w1, #1 bne G_M000_IG31 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG33 b G_M000_IG32 G_M000_IG31: cbz w0, G_M000_IG33 G_M000_IG32: ldr w1, [x24, #0x08] cmp w1, w27 ble G_M000_IG33 mov w0, w25 mov x1, x24 mov w2, w27 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG138 b G_M000_IG40 G_M000_IG33: cbz w0, G_M000_IG138 b G_M000_IG40 G_M000_IG34: ldrh w0, [x20, #0x2C] ldr x1, [x19, #0x10] ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG143 ldrh w1, [x1, #0x0C] cmp w0, w1 bne G_M000_IG138 b G_M000_IG140 G_M000_IG35: ldrh w0, [x20, #0x2C] cmp w0, #10 beq G_M000_IG140 b G_M000_IG138 G_M000_IG36: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 bne G_M000_IG126 G_M000_IG37: b G_M000_IG140 G_M000_IG38: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 beq G_M000_IG126 G_M000_IG39: b G_M000_IG140 G_M000_IG40: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldrh w0, [x20, #0x2C] ldr x26, [x19, #0x10] uxth w23, w0 ldr w24, [x26, #0x08] cmp w24, #1 bls G_M000_IG143 ldrh w3, [x26, #0x0E] cmp w24, #2 bls G_M000_IG143 ldrh w4, [x26, #0x10] add w0, w3, w4 add w25, w0, #3 mov w0, w23 mov x1, x26 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldrh w1, [x26, #0x0C] cmp w1, #1 bne G_M000_IG41 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG44 b G_M000_IG42 G_M000_IG41: cbz w0, G_M000_IG44 G_M000_IG42: cmp w24, w25 ble G_M000_IG44 mov w0, w23 mov x1, x26 mov w2, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG126 G_M000_IG43: b G_M000_IG140 G_M000_IG44: cbz w0, G_M000_IG126 G_M000_IG45: b G_M000_IG140 G_M000_IG46: ldr w0, [x20, #0x20] cmp w0, #0 ble G_M000_IG140 ldrh w0, [x20, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG126 G_M000_IG47: b G_M000_IG140 G_M000_IG48: ldr w0, [x20, #0x20] cmp w0, #0 ble G_M000_IG140 ldrh w0, [x20, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG126 G_M000_IG49: b G_M000_IG140 G_M000_IG50: ldr w0, [x20, #0x20] cmp w0, #0 ble G_M000_IG140 ldrh w0, [x20, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG126 G_M000_IG51: b G_M000_IG140 G_M000_IG52: ldr w0, [x20, #0x20] cmp w0, #0 ble G_M000_IG140 ldrh w0, [x20, #0x2C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG126 G_M000_IG53: b G_M000_IG140 G_M000_IG54: tst w22, #255 beq G_M000_IG140 G_M000_IG55: sxtw w1, w24 cmp w1, #9 bhi G_M000_IG57 cmp w1, #3 ccmp w1, #6, z, ne beq G_M000_IG58 G_M000_IG56: cmp w1, #9 bne G_M000_IG140 ldrh w1, [x20, #0x2C] ldrh w0, [x19, #0x2C] cmp w1, w0 beq G_M000_IG138 b G_M000_IG140 G_M000_IG57: cmp w1, #12 beq G_M000_IG59 cmp w1, #21 beq G_M000_IG138 cmp w1, #43 bne G_M000_IG140 G_M000_IG58: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG60 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 beq G_M000_IG138 b G_M000_IG60 G_M000_IG59: ldrh w0, [x20, #0x2C] ldr x1, [x19, #0x10] ldr w4, [x1, #0x08] cmp w4, #0 bls G_M000_IG143 ldrh w1, [x1, #0x0C] cmp w0, w1 bne G_M000_IG140 b G_M000_IG138 G_M000_IG60: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldrh w0, [x20, #0x2C] ldrh w1, [x19, #0x2C] cmp w0, w1 beq G_M000_IG126 G_M000_IG61: b G_M000_IG140 G_M000_IG62: tst w22, #255 beq G_M000_IG140 G_M000_IG63: sxtw w0, w24 sub w24, w0, #3 cmp w24, #18 bhi G_M000_IG64 mov w0, w24 adr x1, [@RWD152] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG64: sub w25, w0, #41 cmp w25, #4 bhi G_M000_IG140 mov w0, w25 adr x1, [@RWD228] ldr w1, [x1, x0, LSL #2] adr x4, [G_M000_IG02] add x1, x1, x4 br x1 G_M000_IG65: ldrh w0, [x19, #0x2C] ldr x20, [x20, #0x10] uxth w19, w0 ldr w0, [x20, #0x08] cmp w0, #1 bls G_M000_IG143 ldrh w3, [x20, #0x0E] ldr w0, [x20, #0x08] cmp w0, #2 bls G_M000_IG143 ldrh w4, [x20, #0x10] add w0, w3, w4 add w21, w0, #3 mov w0, w19 mov x1, x20 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w1, [x20, #0x08] cmp w1, #0 bls G_M000_IG143 ldrh w1, [x20, #0x0C] cmp w1, #1 bne G_M000_IG66 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG68 b G_M000_IG67 G_M000_IG66: cbz w0, G_M000_IG68 G_M000_IG67: ldr w1, [x20, #0x08] cmp w1, w21 ble G_M000_IG68 mov w0, w19 mov x1, x20 mov w2, w21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG68: cbz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG69: ldr x0, [x20, #0x10] ldr x1, [x19, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG70: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG83 ldrh w0, [x19, #0x2C] ldr x23, [x20, #0x10] uxth w24, w0 ldr w0, [x23, #0x08] cmp w0, #1 bls G_M000_IG143 ldrh w3, [x23, #0x0E] ldr w0, [x23, #0x08] cmp w0, #2 bls G_M000_IG143 ldrh w4, [x23, #0x10] add w0, w3, w4 add w25, w0, #3 mov w0, w24 mov x1, x23 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w1, [x23, #0x08] cmp w1, #0 bls G_M000_IG143 ldrh w1, [x23, #0x0C] cmp w1, #1 bne G_M000_IG71 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG73 b G_M000_IG72 G_M000_IG71: cbz w0, G_M000_IG73 G_M000_IG72: ldr w1, [x23, #0x08] cmp w1, w25 ble G_M000_IG73 mov w0, w24 mov x1, x23 mov w2, w25 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG138 b G_M000_IG83 G_M000_IG73: cbz w0, G_M000_IG138 b G_M000_IG83 G_M000_IG74: ldr w0, [x19, #0x20] cmp w0, #0 ble G_M000_IG89 ldr x0, [x20, #0x10] ldr x1, [x19, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG138 b G_M000_IG89 G_M000_IG75: ldr x0, [x19, #0x10] ldr w1, [x0, #0x08] cmp w1, #0 bls G_M000_IG143 ldrh w0, [x0, #0x0C] ldr x20, [x20, #0x10] uxth w19, w0 ldr w0, [x20, #0x08] cmp w0, #1 bls G_M000_IG143 ldrh w3, [x20, #0x0E] ldr w0, [x20, #0x08] cmp w0, #2 bls G_M000_IG143 ldrh w4, [x20, #0x10] add w0, w3, w4 add w22, w0, #3 mov w0, w19 mov x1, x20 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w1, [x20, #0x08] cmp w1, #0 bls G_M000_IG143 ldrh w1, [x20, #0x0C] cmp w1, #1 bne G_M000_IG76 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG78 b G_M000_IG77 G_M000_IG76: cbz w0, G_M000_IG78 G_M000_IG77: ldr w1, [x20, #0x08] cmp w1, w22 ble G_M000_IG78 mov w0, w19 mov x1, x20 mov w2, w22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG78: cbz w0, G_M000_IG138 b G_M000_IG140 G_M000_IG79: ldr x20, [x20, #0x10] ldr w3, [x20, #0x08] cmp w3, #1 bls G_M000_IG143 ldrh w3, [x20, #0x0E] ldr w1, [x20, #0x08] cmp w1, #2 bls G_M000_IG143 ldrh w4, [x20, #0x10] add w1, w3, w4 add w19, w1, #3 mov x1, x20 mov w0, #10 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w2, [x20, #0x08] cmp w2, #0 bls G_M000_IG143 ldrh w2, [x20, #0x0C] cmp w2, #1 bne G_M000_IG80 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG82 b G_M000_IG81 G_M000_IG80: cbz w0, G_M000_IG82 G_M000_IG81: ldr w2, [x20, #0x08] cmp w2, w19 ble G_M000_IG82 mov w2, w19 mov x1, x20 mov w0, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG140 b G_M000_IG138 G_M000_IG82: cbnz w0, G_M000_IG140 b G_M000_IG138 G_M000_IG83: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldrh w0, [x19, #0x2C] ldr x23, [x20, #0x10] uxth w24, w0 ldr w25, [x23, #0x08] cmp w25, #1 bls G_M000_IG143 ldrh w3, [x23, #0x0E] cmp w25, #2 bls G_M000_IG143 ldrh w4, [x23, #0x10] add w0, w3, w4 add w26, w0, #3 mov w0, w24 mov x1, x23 mov w2, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cmp w25, #0 bls G_M000_IG143 ldrh w1, [x23, #0x0C] cmp w1, #1 bne G_M000_IG84 cmp w0, #0 cset x0, eq cbz w0, G_M000_IG87 b G_M000_IG85 G_M000_IG84: cbz w0, G_M000_IG87 G_M000_IG85: cmp w25, w26 ble G_M000_IG87 mov w0, w24 mov x1, x23 mov w2, w26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG126 G_M000_IG86: b G_M000_IG140 G_M000_IG87: cbz w0, G_M000_IG126 G_M000_IG88: b G_M000_IG140 G_M000_IG89: ldr w0, [x19, #0x20] cbnz w0, G_M000_IG140 ldr x0, [x20, #0x10] ldr x1, [x19, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG126 G_M000_IG90: b G_M000_IG140 G_M000_IG91: ldr w0, [x20, #0x20] cmp w0, #0 cset x0, gt cbz w0, G_M000_IG98 ldr x23, [x20, #0x10] cbz x23, G_M000_IG97 G_M000_IG92: ldr w0, [x23, #0x08] cmp w0, #13 bne G_M000_IG94 G_M000_IG93: ldr q16, [x23, #0x0C] ldr q17, [@RWD256] eor v16.2d, v16.2d, v17.2d ldr q17, [x23, #0x16] ldr q18, [@RWD272] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG96 G_M000_IG94: ldr w0, [x23, #0x08] cmp w0, #4 bne G_M000_IG97 G_M000_IG95: ldr x0, [x23, #0x0C] movz x1, #1 LSL #32 movk x1, #9 LSL #48 cmp x0, x1 bne G_M000_IG97 G_M000_IG96: mov w0, #1 b G_M000_IG98 G_M000_IG97: mov w0, wzr G_M000_IG98: cbnz w0, G_M000_IG126 G_M000_IG99: b G_M000_IG140 G_M000_IG100: ldr w0, [x20, #0x20] cmp w0, #0 cset x0, gt cbz w0, G_M000_IG107 ldr x23, [x20, #0x10] cbz x23, G_M000_IG106 G_M000_IG101: ldr w0, [x23, #0x08] cmp w0, #13 bne G_M000_IG103 G_M000_IG102: ldr q16, [x23, #0x0C] ldr q17, [@RWD288] eor v16.2d, v16.2d, v17.2d ldr q17, [x23, #0x16] ldr q18, [@RWD304] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG105 G_M000_IG103: ldr w0, [x23, #0x08] cmp w0, #4 bne G_M000_IG106 G_M000_IG104: ldr x0, [x23, #0x0C] movz x1, #1 LSL #32 movk x1, #0xD1FFAB1E LSL #48 cmp x0, x1 bne G_M000_IG106 G_M000_IG105: mov w0, #1 b G_M000_IG107 G_M000_IG106: mov w0, wzr G_M000_IG107: cbnz w0, G_M000_IG126 G_M000_IG108: b G_M000_IG140 G_M000_IG109: ldr w0, [x20, #0x20] cmp w0, #0 cset x0, gt cbz w0, G_M000_IG116 ldr x23, [x20, #0x10] cbz x23, G_M000_IG115 G_M000_IG110: ldr w0, [x23, #0x08] cmp w0, #13 bne G_M000_IG112 G_M000_IG111: ldr q16, [x23, #0x0C] ldr q17, [@RWD320] eor v16.2d, v16.2d, v17.2d ldr q17, [x23, #0x16] ldr q18, [@RWD336] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG114 G_M000_IG112: ldr w0, [x23, #0x08] cmp w0, #5 bne G_M000_IG115 G_M000_IG113: ldr x0, [x23, #0x0C] movz x1, #2 LSL #16 movk x1, #48 LSL #48 eor x0, x0, x1 ldr w1, [x23, #0x12] movz w2, #48 movk w2, #58 LSL #16 eor w1, w1, w2 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG115 G_M000_IG114: mov w0, #1 b G_M000_IG116 G_M000_IG115: mov w0, wzr G_M000_IG116: cbnz w0, G_M000_IG126 G_M000_IG117: b G_M000_IG140 G_M000_IG118: ldr w0, [x20, #0x20] cmp w0, #0 cset x0, gt cbz w0, G_M000_IG125 ldr x23, [x20, #0x10] cbz x23, G_M000_IG124 G_M000_IG119: ldr w0, [x23, #0x08] cmp w0, #13 bne G_M000_IG121 G_M000_IG120: ldr q16, [x23, #0x0C] ldr q17, [@RWD352] eor v16.2d, v16.2d, v17.2d ldr q17, [x23, #0x16] ldr q18, [@RWD336] eor v17.2d, v17.2d, v18.2d orr v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbnz w0, G_M000_IG123 G_M000_IG121: ldr w0, [x23, #0x08] cmp w0, #4 bne G_M000_IG124 G_M000_IG122: ldr x0, [x23, #0x0C] movz x1, #1 LSL #32 movk x1, #0xD1FFAB1E LSL #48 cmp x0, x1 bne G_M000_IG124 G_M000_IG123: mov w0, #1 b G_M000_IG125 G_M000_IG124: mov w0, wzr G_M000_IG125: cbz w0, G_M000_IG140 G_M000_IG126: tst w21, #255 beq G_M000_IG140 G_M000_IG127: ldr x26, [x19, #0x18] cbnz x26, G_M000_IG129 G_M000_IG128: mov w0, wzr mov w1, wzr b G_M000_IG130 G_M000_IG129: ldrb w1, [x26, #0x2E] mov w0, #1 G_M000_IG130: tst w0, #255 beq G_M000_IG138 uxtb w0, w1 sub w27, w0, #24 cmp w27, #4 bhi G_M000_IG131 mov w0, w27 adr x1, [@RWD368] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG131: cmp w0, #32 bne G_M000_IG140 G_M000_IG132: mov x19, x26 b G_M000_IG127 G_M000_IG133: ldr x1, [x26, #0x08] mov x23, x1 cbz x23, G_M000_IG136 G_M000_IG134: ldr x0, [x23] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x0, x2 beq G_M000_IG136 G_M000_IG135: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x23, x0 G_M000_IG136: ldr w4, [x23, #0x10] ldr x1, [x23, #0x08] mov x2, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w3, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w1, w0, #1 ldr w2, [x23, #0x10] cmp w1, w2 beq G_M000_IG132 G_M000_IG137: add w0, w0, #1 ldr w1, [x23, #0x10] cmp w0, w1 bhs G_M000_IG142 ldr x1, [x23, #0x08] ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG143 add x1, x1, #16 ldr x19, [x1, w0, UXTW #3] b G_M000_IG13 G_M000_IG138: mov w0, #1 G_M000_IG139: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG140: mov w0, wzr G_M000_IG141: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG142: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG143: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG05 - G_M000_IG02 dd G_M000_IG14 - G_M000_IG02 dd G_M000_IG07 - G_M000_IG02 RWD32 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG55 - G_M000_IG02 dd G_M000_IG63 - G_M000_IG02 dd G_M000_IG19 - G_M000_IG02 dd G_M000_IG54 - G_M000_IG02 dd G_M000_IG62 - G_M000_IG02 RWD56 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 dd G_M000_IG22 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG34 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG48 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG35 - G_M000_IG02 dd G_M000_IG138 - G_M000_IG02 RWD132 dd G_M000_IG50 - G_M000_IG02 dd G_M000_IG52 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG29 - G_M000_IG02 dd G_M000_IG30 - G_M000_IG02 RWD152 dd G_M000_IG70 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG74 - G_M000_IG02 dd G_M000_IG70 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG74 - G_M000_IG02 dd G_M000_IG65 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG69 - G_M000_IG02 dd G_M000_IG75 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG79 - G_M000_IG02 dd G_M000_IG91 - G_M000_IG02 dd G_M000_IG100 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG79 - G_M000_IG02 dd G_M000_IG138 - G_M000_IG02 RWD228 dd G_M000_IG109 - G_M000_IG02 dd G_M000_IG118 - G_M000_IG02 dd G_M000_IG70 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG74 - G_M000_IG02 RWD248 dd 00000000h, 00000000h RWD256 dq 0000000A00000000h, 0003000500040002h RWD272 dq 0001000300050004h, 0000001300090006h RWD288 dq 0000000A00000000h, FFFDFFFBFFFCFFFEh RWD304 dq FFFFFFFDFFFBFFFCh, 0000FFEDFFF7FFFAh RWD320 dq 00300000000A0000h, 005F005B0041003Ah RWD336 dq 0060005F005B0041h, 01310130007B0061h RWD352 dq 00300000000A0001h, 005F005B0041003Ah RWD368 dd G_M000_IG132 - G_M000_IG02 dd G_M000_IG133 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG140 - G_M000_IG02 dd G_M000_IG132 - G_M000_IG02 ; Total bytes of code 3760 3058: JIT compiled System.Text.RegularExpressions.RegexNode:CanBeMadeAtomic(System.Text.RegularExpressions.RegexNode,System.Text.RegularExpressions.RegexNode,bool,bool) [Tier1, IL size=1744, code size=3760] ; Assembly listing for method System.Text.RegularExpressions.RegexNode:MakeLoopAtomic():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 20 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldrb w1, [x19, #0x2E] sxtw w0, w1 sub w2, w0, #3 cmp w2, #2 bls G_M000_IG05 G_M000_IG03: sub w0, w0, #6 cmp w0, #2 bls G_M000_IG07 G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: add w1, w1, #40 uxtb w1, w1 strb w1, [x19, #0x2E] G_M000_IG06: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: add w1, w1, #37 uxtb w1, w1 strb w1, [x19, #0x2E] ldr w1, [x19, #0x20] sxtw w0, w1 str w0, [x19, #0x24] cbnz w1, G_M000_IG09 mov w1, #23 strb w1, [x19, #0x2E] str xzr, [x19, #0x10] strh wzr, [x19, #0x2C] G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: ldrb w0, [x19, #0x2E] cmp w0, #43 bne G_M000_IG10 sxtw w0, w1 mov w2, #64 cmp w0, #2 ccmp w0, w2, 0, ge bgt G_M000_IG10 mov w0, #12 strb w0, [x19, #0x2E] ldrh w0, [x19, #0x2C] bl System.String:.ctor(ushort,int):this mov x15, x0 add x14, x19, #16 bl CORINFO_HELP_ASSIGN_REF strh wzr, [x19, #0x2C] str xzr, [x19, #0x20] G_M000_IG10: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 220 3059: JIT compiled System.Text.RegularExpressions.RegexNode:MakeLoopAtomic() [Tier1, IL size=177, code size=220] ; Assembly listing for method System.Span`1[BenchmarkDotNet.Reports.Measurement]:Slice(int,int):System.Span`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] str w2, [fp, #0x20] G_M000_IG02: ldr w0, [fp, #0x24] mov w0, w0 ldr w1, [fp, #0x20] mov w1, w1 add x0, x0, x1 ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] mov w1, w1 cmp x0, x1 bls G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: stp xzr, xzr, [fp, #0x10] ldr x1, [fp, #0x28] ldr x1, [x1] ldr w0, [fp, #0x24] mov w0, w0 lsl x0, x0, #5 add x1, x1, x0 add x0, fp, #16 ldr w2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 156 3060: JIT compiled System.Span`1[BenchmarkDotNet.Reports.Measurement]:Slice(int,int) [Tier0, IL size=39, code size=156] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:InsertionSort(System.Span`1[BenchmarkDotNet.Reports.Measurement]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x60] str x1, [fp, #0x68] G_M000_IG02: str wzr, [fp, #0x5C] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] b G_M000_IG11 G_M000_IG03: ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x5C] add w1, w1, #1 sxtw x1, w1 lsl x1, x1, #5 add x0, x0, x1 ldp x1, x2, [x0] stp x1, x2, [fp, #0x38] ldp x1, x2, [x0, #0x10] stp x1, x2, [fp, #0x48] ldr w0, [fp, #0x5C] str w0, [fp, #0x34] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x34] add w1, w1, #1 sxtw x1, w1 lsl x1, x1, #5 add x0, x0, x1 str x0, [fp, #0x28] ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x34] sxtw x1, w1 lsl x1, x1, #5 add x0, x0, x1 ldr x1, [fp, #0x28] ldp q16, q17, [x0] stp q16, q17, [x1] ldr w0, [fp, #0x34] sub w0, w0, #1 str w0, [fp, #0x34] G_M000_IG05: ldr w0, [fp, #0x34] tbnz w0, #31, G_M000_IG08 ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #32 mov w1, #80 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x34] sxtw x1, w1 lsl x1, x1, #5 add x1, x0, x1 str x1, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #56 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 G_M000_IG08: ldr x0, [fp, #0x60] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [fp, #0x34] add w1, w1, #1 sxtw x1, w1 lsl x1, x1, #5 add x0, x0, x1 G_M000_IG09: add x1, fp, #56 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG10: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] G_M000_IG11: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG13 G_M000_IG12: add x0, fp, #32 mov w1, #125 bl CORINFO_HELP_PATCHPOINT G_M000_IG13: ldr w0, [fp, #0x5C] ldr w1, [fp, #0x68] sub w1, w1, #1 cmp w0, w1 blt G_M000_IG03 G_M000_IG14: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 496 3061: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:InsertionSort(System.Span`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=141, code size=496] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetReference[BenchmarkDotNet.Reports.Measurement](System.Span`1[BenchmarkDotNet.Reports.Measurement]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x10] str x1, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 3062: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetReference[BenchmarkDotNet.Reports.Measurement](System.Span`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=8, code size=28] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:LessThan(byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: b G_M000_IG03 G_M000_IG03: b G_M000_IG04 G_M000_IG04: b G_M000_IG05 G_M000_IG05: b G_M000_IG06 G_M000_IG06: b G_M000_IG07 G_M000_IG07: b G_M000_IG08 G_M000_IG08: b G_M000_IG09 G_M000_IG09: b G_M000_IG10 G_M000_IG10: b G_M000_IG11 G_M000_IG11: b G_M000_IG12 G_M000_IG12: b G_M000_IG13 G_M000_IG13: b G_M000_IG14 G_M000_IG14: b G_M000_IG15 G_M000_IG15: ldr x0, [fp, #0x48] str x0, [fp, #0x18] ldr x0, [fp, #0x40] ldp q16, q17, [x0] stp q16, q17, [fp, #0x20] ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbnz w0, #31, G_M000_IG17 mov w0, wzr G_M000_IG16: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG17: mov w0, #1 G_M000_IG18: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 148 3063: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:LessThan(byref,byref) [Tier0, IL size=834, code size=148] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex391_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3064: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex391_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3065: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleCharAtomicLoop|25(System.Text.RegularExpressions.RegexNode):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 43 single block inlinees; 4 inlinees without PGO data x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3066: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex391_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] add x2, sp, #112 str x2, [fp, #0x28] mov x19, x0 mov x20, x1 G_M000_IG02: ldp w21, w22, [x20, #0x20] cmp w21, w22 bne G_M000_IG05 G_M000_IG03: mov x0, x19 mov x1, x20 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG05: cbnz w21, G_M000_IG07 cmp w22, #1 bne G_M000_IG07 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG07: ldr w0, [x20, #0x28] tst w0, #64 cset x23, ne ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG08: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w24, w0 cbz w23, G_M000_IG14 ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG09 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w25, w0 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w26, w0 ldr x0, [x19, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] mov w1, w26 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG10 ldr x0, [x19, #0x08] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG10: ldrh w1, [x20, #0x2C] ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG11 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG12 G_M000_IG11: ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex392_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting ldr x0, [x0, #0x08] BLENDED_CODE mov for generic ARM64 CPU - Windows w1, w25 ; optimized code ldr x2, [x0] ; fp based frame ; partially interruptible ; No PGO data ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 movn w0, #0xD1FFAB1E LSL #16 cmp w22, w0 beq G_M000_IG13 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] G_M000_IG01: mov w1, w22 movz x2, #0xD1FFAB1E stp movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32fp, lr, [sp, # -0x30]! ldr stp x2, [x2] blr x2 x19, ldr x20, [sp, #0x18] x0, str [x21, [sp, #0x28] x19, #0x08] mov mov w1, w26 fp, sp movz x2, #0xD1FFAB1E mov movk x2, #0xD1FFAB1E LSL #16x19, x0 mov x21, x1 movk x2, #0xD1FFAB1E LSL #32 mov w20, w2 ldr x2, [x2] G_M000_IG02: blr x2 b G_M000_IG29 mov x1, x21 mov w2, w20 G_M000_IG13: mov ldr x0, x19 x0, [x19, #0x08] bl mov w1, w26 movz x2, #0xD1FFAB1ESystem.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x2, #0xD1FFAB1E LSL #32 mov ldr x2, [x2] x1, blr x2 x21 b G_M000_IG29 mov w2, w20 G_M000_IG14: mov x0, x20 movz x1, #0xD1FFAB1E mov x0, x19 movk bl x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 System.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldr x1, [x1] cbnz blr w0, G_M000_IG04 x1 ldr w0, [x19, #0x4C] cmp w0, w20 cbz w0, G_M000_IG19 movn w0, #0xD1FFAB1E LSL #16 beq G_M000_IG04 cmp w22, w0 add bne G_M000_IG19 w0, w0, #1 ldr str w0, [x19, #0x4C] x0, [x20 b , #0x10] cbz x0, G_M000_IG19 G_M000_IG15: ldr w1, [x0, #0x08] cmp w1, #4 bne G_M000_IG19 G_M000_IG16: ldr G_M000_IG02 x0, [x0, #0x0C] cmp G_M000_IG04: x0 ldr , #x21, [sp, #0x28] 16, LSL #12 ldp bne G_M000_IG19 x19, x20, [sp, #0x18 G_M000_IG17: ] ldp fp, lr, [sp], #0x30 ret lr ldr w0, [x19, #0x38] cmp w0, #0 ; Total bytes of code 108 ble G_M000_IG18 ldr 3067: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex392_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldp x0, x1, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG29 G_M000_IG19: movn w1, #0xD1FFAB1E LSL #16 cmp w22, w1 bne G_M000_IG23 add x1, fp, #16 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG23 ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG20 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG21 G_M000_IG20: ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: mov x0, x19 mov x1, x20 mov w2, wzr mov w3, #1 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x19, #0x38] cmp w1, #0 ble G_M000_IG22 ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG29 G_M000_IG23: ldr w0, [x19, #0x38] cmp w0, #0 ble G_M000_IG24 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [x19, #0x38] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG24: ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w25, w0 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] ldr x1, [x0] ldr x1, [x1, #0x58] ldr x1, [x1, #0x38] blr x1 sxtw w26, w0 ldr x0, [x19, #0x08] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] mov w1, w26 ldr x2, [x0] ldr x2, [x2, #0x60] ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [x19, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG25 ldr x0, [x19, #0x08] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG27 G_M000_IG25: ldrh w1, [x20, #0x2C] ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG26 ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG27 G_M000_IG26: ldr x0, [x19, #0x08] mov w1, w24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG27: ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows blr x2 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x0, [x0, #0x08] mov w1, w25 ldr x2, [x0] ldr x2, [x2, #0x60] G_M000_IG01: ldr x2, [x2] stp blr x2 fp, lr, [sp, #-0x50]! movn w0, #0xD1FFAB1E LSL #16 cmp w22, w0 stp beq x19, x20, [sp, #0x18] G_M000_IG28 stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] ldr x0, [x19, #0x08] str x25, [sp, #0x48] mov fp, sp mov x19, x0 ldr G_M000_IG02: x1, [fp, #0x20] ldr w20 movz x2, #0xD1FFAB1E, [ movk x2, #0xD1FFAB1E LSL #16 x19, #0x4C] movk x2, #0xD1FFAB1E LSL #32 sxtw w21, w2 ldr x2, [x2] sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 blr x2 G_M000_IG03: ldr x0, [x19, #0x08] str w21, [x19, #0x4C] mov w1, w22 mov w0, movz x2, #0xD1FFAB1E wzr movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG04: ldr x2, [x2] ldr blr x2 x25, [sp, #0x48] ldr x0, [x19, #0x08] mov w1, w26 ldp movz x2, #0xD1FFAB1E x23, x24, [sp, #0x38] movk x2, #0xD1FFAB1E LSL #16 ldp x21, x22, [sp, #0x28] movk x2, #0xD1FFAB1E LSL #32 ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ldr x2, [x2] ret lr blr x2 G_M000_IG05: b G_M000_IG29 G_M000_IG28: ldr x0, [x19, #0x08] mov w1, w26 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp ldr x2, [x2] w20, w21 blr x2 bhi G_M000_IG12 G_M000_IG29: ubfiz x0, x20, #1, #32 ldr x0, [x19, #0x08] add x22, x1, x0 ldr x0, [x0, #0x08] mov w1, w24 sub w23, w21, w20 mov w24, wzr ldr x2, [x0] sub w25, w23, #7 ldr x2, [x2, #0x60] cmp w25, #0 ldr x2, [x2] blr x2 ble G_M000_IG03 cmp w21, #0 ble G_M000_IG30 G_M000_IG06: ldr x0, [x19, #0x08] add w0, w24, #3 ldr x1, [fp, #0x20] cmp w0, w23 movz x2, #0xD1FFAB1E bhi movk x2, #0xD1FFAB1E LSL #16 G_M000_IG12 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ubfiz x1, blr x2 x0, #1, #32 ldr x0, [x19, #0x08] add x1, x22, x1 sub w3, w23 mov w1, w21 , w0 movz x2, #0xD1FFAB1E mov x0, movk x2, #0xD1FFAB1E LSL #16 x1 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] mov w1, #97 blr x2 mov w2, #103 ldr x0, [x19, #0x08] movz x4, #0xD1FFAB1E ldr w1, [x19, #0x40] movz x2, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 movk x2, #0xD1FFAB1E LSL #16 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 movk x2, add w1, w24, #1 # cmp w1, w23 0xD1FFAB1E LSL #32 bhs G_M000_IG13 ldr x2, [x2] blr x2 G_M000_IG30: cbnz w23, G_M000_IG31 ldrh ldr w0, x0, [x19, #0x08] [x22, ldr x1, [x19, #0x20] w1, UXTW #2] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov w2 ldr x2, [x2] , #116 blr x2 ldr x0, [x19, #0x08] cmp w0, #103 ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E ccmp w0, w2, z, ne movk bne G_M000_IG08 x2, #0xD1FFAB1E LSL #16 G_M000_IG07: movk x2, #0xD1FFAB1E LSL #32 add w0, w24, #2 ldr x2, [x2] blr x2 cmp w0, w23 ldr x0, [x19, #0x08] bhs G_M000_IG13 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ldrh w0, [x22, w0, UXTW #2] movk x1, #0xD1FFAB1E LSL #32 mov w2, #116 ldr cmp w0, #103 ccmp w0, w2, z, ne x1, [x1] beq G_M000_IG10 G_M000_IG08: movz x2, #0xD1FFAB1E sxtw w24, w1 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] cmp w24, w25 blr x2 blt G_M000_IG06 ldr x0, [x19, #0x08] G_M000_IG09: ldr x1, [x19, #0x20] b G_M000_IG03 G_M000_IG10: movz add w0, w20, w24 x2, #0xD1FFAB1E str movk x2, #0xD1FFAB1E LSL #16 w0, [x19, #0x4C] movk x2, #0xD1FFAB1E LSL #32 mov w0, #1 ldr x2, [x2] G_M000_IG11: blr x2 ldr x25, [sp, #0x48] ldr x0, [x19, #0x08] ldp ldr x1, [x19, #0x18] x23, x24, [sp, #0x38] movz x2, #0xD1FFAB1E ldp x21, x22, [sp, #0x28] movk x2, ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 # ret lr 0xD1FFAB1E LSL #16 G_M000_IG12: movk x2, #0xD1FFAB1E LSL #32 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 x2, [x2] ldr x0, [x0] blr x2 blr x0 ldr brk_windows x0, [x19, #0x08] # ldr x1, [fp, #0x20] 0 movz x2, #0xD1FFAB1E G_M000_IG13: movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 bl ldr CORINFO_HELP_RNGCHKFAIL x0, [x19, #0x08] brk_windows movz x1, #0xD1FFAB1E# 0 movk x1, #0xD1FFAB1E LSL #16 ; Total bytes of code 328 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 3068: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] b G_M000_IG32 G_M000_IG31: ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [x19, #0x08] ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG32: ldp x19, x2, [fp, #0x18] ldr x1, [fp, #0x18] ldr w20, [x1, #0x10] ldr x1, [fp, #0x18] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG33 sxtw x1, w20 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] add w0, w20, #1 str w0, [x19, #0x10] b G_M000_IG34 G_M000_IG33: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG34: ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG35: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] add x3, fp, #112 str x3, [sp, #0x18] G_M000_IG36: ldp x19, x2, [fp, #0x18] ldr x1, [fp, #0x18] ldr w20, [x1, #0x10] ldr x1, [fp, #0x18] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG37 sxtw x1, w20 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] add w0, w20, #1 str w0, [x19, #0x10] b G_M000_IG38 G_M000_IG37: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG38: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 3964 3069: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitSingleCharAtomicLoop|25(System.Text.RegularExpressions.RegexNode) [Tier1, IL size=1694, code size=3964] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3070: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex392_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex393_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3071: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex393_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3072: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3073: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex393_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex394_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3074: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex394_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3075: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3076: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex394_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex395_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3077: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex395_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3078: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3079: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex395_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex396_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3080: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex396_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3081: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3082: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex396_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex397_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3083: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex397_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3084: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3085: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex397_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex398_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3086: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex398_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3087: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3088: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex398_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex399_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3089: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex399_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3090: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3091: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex399_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex400_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3092: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex400_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3093: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3094: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex400_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex401_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3095: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex401_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3096: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3097: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex401_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex402_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3098: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex402_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3099: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3100: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex402_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex403_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3101: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex403_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3102: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3103: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex403_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex404_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3104: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex404_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3105: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3106: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex404_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex405_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3107: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex405_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3108: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3109: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex405_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex406_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3110: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex406_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3111: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3112: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex406_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex407_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3113: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex407_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3114: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3115: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex407_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex408_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3116: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex408_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3117: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3118: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex408_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex409_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3119: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex409_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3120: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3121: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex409_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex410_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3122: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex410_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3123: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3124: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex410_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex411_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3125: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex411_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3126: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3127: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex411_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex412_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3128: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex412_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3129: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3130: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex412_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex413_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3131: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex413_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3132: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3133: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex413_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex414_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3134: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex414_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3135: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3136: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex414_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex415_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3137: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex415_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3138: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3139: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex415_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex416_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3140: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex416_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3141: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3142: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex416_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex417_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3143: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex417_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3144: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3145: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex417_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex418_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3146: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex418_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3147: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3148: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex418_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex419_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3149: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex419_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3150: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3151: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex419_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex420_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3152: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex420_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3153: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3154: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex420_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex421_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3155: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex421_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3156: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3157: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex421_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex422_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3158: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex422_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3159: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3160: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex422_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex423_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3161: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex423_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3162: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3163: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex423_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex424_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3164: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex424_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3165: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3166: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex424_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex425_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3167: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex425_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3168: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3169: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex425_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex426_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3170: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex426_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3171: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3172: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex426_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex427_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3173: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex427_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3174: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3175: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex427_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex428_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3176: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex428_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3177: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3178: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex428_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex429_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3179: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex429_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3180: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3181: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex429_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex430_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3182: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex430_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3183: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3184: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex430_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex431_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3185: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex431_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3186: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3187: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex431_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex432_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3188: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex432_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3189: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3190: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex432_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex433_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3191: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex433_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3192: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3193: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex433_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex434_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3194: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex434_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3195: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3196: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex434_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex435_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3197: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex435_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3198: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3199: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex435_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex436_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3200: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex436_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3201: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3202: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex436_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex437_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3203: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex437_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3204: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3205: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex437_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex438_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3206: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex438_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3207: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3208: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex438_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex439_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3209: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex439_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3210: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3211: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex439_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex440_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3212: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex440_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3213: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3214: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex440_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex441_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3215: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex441_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3216: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3217: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex441_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex442_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3218: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex442_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3219: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3220: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex442_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex443_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3221: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex443_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3222: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3223: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex443_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex444_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3224: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex444_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__CanEmitIndexOf|155_29(System.Text.RegularExpressions.RegexNode,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x40] mov fp, sp str xzr, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0x38] mov x19, x0 mov x20, x1 G_M000_IG02: ldrb w0, [x19, #0x2E] cmp w0, #12 bne G_M000_IG04 G_M000_IG03: ldr x0, [x19, #0x10] ldr w0, [x0, #0x08] str w0, [x20] b G_M000_IG07 G_M000_IG04: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG06 G_M000_IG05: mov w0, #1 str w0, [x20] b G_M000_IG07 G_M000_IG06: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG09 add x1, fp, #40 mov w2, #5 ldr x0, [x19, #0x10] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cmp w0, #0 bgt G_M000_IG05 ldr x0, [x19, #0x10] add x1, fp, #32 add x2, fp, #24 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbnz w0, G_M000_IG05 ldr x0, [x19, #0x10] add x1, fp, #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG09 b G_M000_IG05 G_M000_IG07: mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG08 bl CORINFO_HELP_FAIL_FAST G_M000_IG08: ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: str wzr, [x20] mov w0, wzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x38] cmp xip0, xip1 beq G_M000_IG10 bl CORINFO_HELP_FAIL_FAST G_M000_IG10: ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 368 3225: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__CanEmitIndexOf|155_29(System.Text.RegularExpressions.RegexNode,byref) [Tier1, IL size=139, code size=368] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3226: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3227: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex444_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitIndexOf|30(System.Text.RegularExpressions.RegexNode,bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 11 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x58] stp x21, x22, [sp, #0x68] str x23, [sp, #0x78] mov fp, sp str xzr, [fp, #0x30] str xzr, [fp, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #0x50] mov x19, x0 mov x20, x1 mov w21, w2 mov w22, w3 G_M000_IG02: ldrb w0, [x20, #0x2E] cmp w0, #12 bne G_M000_IG06 G_M000_IG03: ldr x0, [x19, #0x08] ldr x1, [x20, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] tst w21, #255 bne G_M000_IG04 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG05 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG34 G_M000_IG06: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG07 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG11 G_M000_IG07: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG08 tst w22, #255 cset x22, eq G_M000_IG08: ldrh w1, [x20, #0x2C] ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] tst w22, #255 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG09: tst w22, #255 bne G_M000_IG10 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG10: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG11: mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG34 ldr x0, [x20, #0x10] mov x1, x0 ldr w2, [x1, #0x08] cmp w2, #0 bls G_M000_IG38 ldrh w1, [x1, #0x0C] cmp w1, #1 cset x1, eq eor w1, w1, w22 uxtb w22, w1 add x1, fp, #64 str x1, [fp, #0x30] mov w1, #5 str w1, [fp, #0x38] ldr x1, [fp, #0x30] ldr w2, [fp, #0x38] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w23, w0 sub w0, w23, #1 cmp w0, #1 bls G_M000_IG17 ldr x0, [x20, #0x10] add x1, fp, #40 add x2, fp, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz w0, G_M000_IG17 ldrh w1, [fp, #0x28] ldrh w0, [fp, #0x20] cmp w1, w0 bne G_M000_IG14 ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG12 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG12: cbnz w22, G_M000_IG13 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG14: ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldrh w1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG15 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG15: cbnz w22, G_M000_IG16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG16: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG17: cmp w23, #0 ble G_M000_IG30 ldr w0, [fp, #0x38] cmp w23, w0 bhi G_M000_IG36 ldr x0, [fp, #0x30] str x0, [fp, #0x30] str w23, [fp, #0x38] ldr w0, [fp, #0x38] sub w23, w0, #1 cmp w23, #2 bhi G_M000_IG27 mov w0, w23 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG18: ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #0 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG19: cbnz w22, G_M000_IG20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG20: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG21: ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #0 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #1 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1, #0x02] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG22: cbnz w22, G_M000_IG23 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG23: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG24: ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #0 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #1 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1, #0x02] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [fp, #0x38] cmp w1, #2 bls G_M000_IG38 ldr x1, [fp, #0x30] ldrh w1, [x1, #0x04] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG25 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG25: cbnz w22, G_M000_IG26 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG26: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG27: ldr x20, [x19, #0x08] add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tst w21, #255 bne G_M000_IG28 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG28: cbnz w22, G_M000_IG29 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG29: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] b G_M000_IG33 G_M000_IG30: ldr x0, [x20, #0x10] add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG34 ldr x0, [x19, #0x08] ldr x1, [fp, #0x18] cbz x1, G_M000_IG37 add x3, x1, #16 ldr w2, [x1, #0x08] G_M000_IG31: mov x1, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tst w21, #255 bne G_M000_IG32 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq b G_M000_IG33 G_M000_IG32: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x0, [x1] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp w22, #0 csel x1, x0, x1, eq G_M000_IG33: ldr x0, [x19, #0x08] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG34: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0x50] cmp xip0, xip1 beq G_M000_IG35 bl CORINFO_HELP_FAIL_FAST G_M000_IG35: ldr x23, [sp, #0x78] ldp x21, x22, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG36: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG37: mov x3, xzr mov w2, wzr b G_M000_IG31 G_M000_IG38: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 ; Total bytes of code 1980 3228: JIT compiled System.Text.RegularExpressions.RegexCompiler+<>c__DisplayClass155_0:g__EmitIndexOf|30(System.Text.RegularExpressions.RegexNode,bool,bool) [Tier1, IL size=951, code size=1980] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:BgeFar(System.Reflection.Emit.Label):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov w2, w1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #60 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 3229: JIT compiled System.Text.RegularExpressions.RegexCompiler:BgeFar(System.Reflection.Emit.Label) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.UInt64:CreateTruncating[uint](uint):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, w0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3230: JIT compiled System.UInt64:CreateTruncating[uint](uint) [Tier1, IL size=74, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex445_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 ; Assembly listing for method System.UInt64:TryConvertFromTruncating[uint](uint,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 G_M000_IG01: bl stp fp, lr, [sp, #-0x10]! mov fp, sp System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool G_M000_IG02: cbz w0, G_M000_IG04 mov w0, w0 str G_M000_IG03: x0, [x1] mov x1, x21 mov w0, #1 mov w2, w20 mov x0, x19 G_M000_IG03: bl ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG043231: JIT compiled System.UInt64:TryConvertFromTruncating[uint](uint,byref) [Tier1, IL size=371, code size=28] ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3232: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex445_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_Nanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3233: JIT compiled BenchmarkDotNet.Reports.Measurement:get_Nanoseconds() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Span`1[System.ReadOnlyMemory`1[ushort]]:op_Implicit(System.Span`1[System.ReadOnlyMemory`1[ushort]]):System.ReadOnlySpan`1[System.ReadOnlyMemory`1[ushort]] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 3234: JIT compiled System.Span`1[System.ReadOnlyMemory`1[ushort]]:op_Implicit(System.Span`1[System.ReadOnlyMemory`1[ushort]]) [Tier1, IL size=19, code size=16] ; Assembly listing for method System.Span`1[System.ReadOnlyMemory`1[ushort]]:Clear():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x08] ubfiz x1, x1, #1, #32 ldr x0, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 3235: JIT compiled System.Span`1[System.ReadOnlyMemory`1[ushort]]:Clear() [Tier1, IL size=77, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3236: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:TryGetDoubleRange(System.String,byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] cmp w3, #2 bls G_M000_IG09 ldrh w4, [x0, #0x10] cbnz w4, G_M000_IG07 G_M000_IG03: ldrh w4, [x0, #0x0E] add w5, w4, #3 cmp w3, w5 bne G_M000_IG07 sub w5, w4, #3 cmp w5, #1 bhi G_M000_IG07 cmp w3, #3 bls G_M000_IG09 ldrh w5, [x0, #0x12] cmp w3, #4 bls G_M000_IG09 ldrh w6, [x0, #0x14] sub w6, w6, #1 uxth w6, w6 strh w5, [x1] strh w6, [x1, #0x02] cmp w3, #5 bls G_M000_IG09 ldrh w1, [x0, #0x16] cmp w4, #3 beq G_M000_IG04 cmp w3, #6 bls G_M000_IG09 ldrh w0, [x0, #0x18] sub w0, w0, #1 uxth w0, w0 b G_M000_IG05 G_M000_IG04: mov w0, #0xD1FFAB1E G_M000_IG05: strh w1, [x2] strh w0, [x2, #0x02] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: strh wzr, [x2] strh wzr, [x2, #0x02] strh wzr, [x1] strh wzr, [x1, #0x02] mov w0, wzr G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 200 3237: JIT compiled System.Text.RegularExpressions.RegexCharClass:TryGetDoubleRange(System.String,byref,byref) [Tier1, IL size=142, code size=200] ; Assembly listing for method System.Text.RegularExpressions.RegexCharClass:Analyze(System.String):System.Text.RegularExpressions.RegexCharClass+CharClassAnalysisResults ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x08] cmp w20, #0 bls G_M000_IG14 ldrh w1, [x19, #0x0C] cmp w1, #1 cset x21, eq add x1, fp, #32 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 G_M000_IG03: ldrb w0, [fp, #0x20] tst w21, w0 beq G_M000_IG06 G_M000_IG04: movi v16.4s, #0 str q16, [fp, #0x10] ldp x0, x1, [fp, #0x10] G_M000_IG05: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: cmp w20, #3 bls G_M000_IG14 ldrh w0, [x19, #0x12] ldrh w1, [x19, #0x0E] add w1, w1, #2 cmp w1, w20 bhs G_M000_IG14 add x2, x19, #12 ldrh w1, [x2, w1, UXTW #2] cbz w21, G_M000_IG10 movi v16.4s, #0 str q16, [fp, #0x10] mov w2, #1 strb w2, [fp, #0x10] cmp w1, #128 cset x2, le strb w2, [fp, #0x14] cmp w0, #128 cset x2, ge strb w2, [fp, #0x13] add x2, fp, #16 cbnz w0, G_M000_IG07 cmp w20, #4 bls G_M000_IG14 ldrh w3, [x19, #0x14] cmp w3, #128 cset x3, ge b G_M000_IG08 G_M000_IG07: mov w3, wzr G_M000_IG08: strb w3, [x2, #0x02] strb wzr, [fp, #0x11] stp w0, w1, [fp, #0x18] ldp x0, x1, [fp, #0x10] G_M000_IG09: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: movi v16.4s, #0 str q16, [fp, #0x10] mov w2, #1 strb w2, [fp, #0x10] strb wzr, [fp, #0x14] add x2, fp, #16 cbnz w0, G_M000_IG11 cmp w20, #4 bls G_M000_IG14 ldrh w3, [x19, #0x14] cmp w3, #128 blt G_M000_IG11 ldrb w3, [fp, #0x20] cmp w3, #0 cset x3, eq b G_M000_IG12 G_M000_IG11: mov w3, wzr G_M000_IG12: strb w3, [x2, #0x03] cmp w1, #128 cset x2, le strb w2, [fp, #0x11] cmp w0, #128 cset x2, ge strb w2, [fp, #0x12] stp w0, w1, [fp, #0x18] ldp x0, x1, [fp, #0x10] G_M000_IG13: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3238: JIT compiled System.Text.RegularExpressions.RegexCharClass:Analyze(System.String) [Tier1, IL size=281, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3239: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex445_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str x1, [fp, #0x18] mov x19, x0 mov x20, x2 G_M000_IG02: ldr w1, [x19, #0x58] add w1, w1, #11 ldr x21, [x19, #0x08] ldr w0, [x21, #0x08] cmp w1, w0 blt G_M000_IG04 G_M000_IG03: ldr w0, [x21, #0x08] lsl w0, w0, #1 cmp w0, w1 csel w1, w0, w1, ge sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC mov x22, x0 ldr w2, [x21, #0x08] mov x0, x21 mov x1, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x14, x19, #8 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: mov x0, x19 ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [x19, #0x08] ldr w1, [x19, #0x58] cbnz x0, G_M000_IG06 G_M000_IG05: cbnz w1, G_M000_IG09 mov x2, xzr mov w3, wzr b G_M000_IG07 G_M000_IG06: ldr w2, [x0, #0x08] cmp w2, w1 blo G_M000_IG09 add x3, x0, #16 mov w0, w1 add x0, x3, x0 sub w3, w2, w1 mov x2, x0 G_M000_IG07: cmp w3, #8 blo G_M000_IG10 str x20, [x2] ldr w0, [x19, #0x58] add w0, w0, #8 str w0, [x19, #0x58] G_M000_IG08: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: mov w0, #40 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 316 3240: JIT compiled System.Reflection.Emit.ILGenerator:Emit(System.Reflection.Emit.OpCode,long) [Tier1, IL size=53, code size=316] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:Shl():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #98 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x2, [x0] ldr x2, [x2, #0x40] ldr x2, [x2, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 44 3241: JIT compiled System.Text.RegularExpressions.RegexCompiler:Shl() [Tier1, IL size=17, code size=44] ; Assembly listing for method Perfolizer.Horology.TimeUnit:get_NanosecondAmount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3242: JIT compiled Perfolizer.Horology.TimeUnit:get_NanosecondAmount() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Char:System.IUtfChar.CastFrom(ushort):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: uxth w0, w0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3243: JIT compiled System.Char:System.IUtfChar.CastFrom(ushort) [Tier1, IL size=2, code size=20] ; Assembly listing for method System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned():bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3244: JIT compiled System.Int32:System.IBinaryIntegerParseAndFormatInfo.get_IsSigned() [Tier1, IL size=2, code size=20] ; Assembly listing for method System.Math:Round(double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x0, v0.d[0] lsr x1, x0, #52 and w1, w1, #0xD1FFAB1E cmp w1, #0xD1FFAB1E bgt G_M000_IG10 G_M000_IG03: lsl x2, x0, #1 cbnz x2, G_M000_IG05 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: cmp w1, #0xD1FFAB1E bne G_M000_IG06 tst x0, #0xD1FFAB1E bne G_M000_IG07 G_M000_IG06: movi v16.16b, #0 b G_M000_IG08 G_M000_IG07: fmov d16, #1.0000 G_M000_IG08: ldr q17, [@RWD00] bif v0.2d, v16.2d, v17.2d G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG10: cmp w1, #0xD1FFAB1E blt G_M000_IG12 G_M000_IG11: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG12: neg w1, w1 add w1, w1, #0xD1FFAB1E mov x2, #1 lsl x1, x2, x1 sub x2, x1, #1 add x0, x0, x1, LSR #1 bic x3, x0, x2 bic x1, x0, x1 tst x0, x2 csel x0, x3, x1, ne fmov d0, x0 G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr RWD00 dq 8000000000000000h, 8000000000000000h ; Total bytes of code 156 3245: JIT compiled System.Math:Round(double) [Tier1, IL size=135, code size=156] ; Assembly listing for method System.String:FillStringChecked(System.String,int,System.String) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr w3, [x2, #0x08] ldr w4, [x0, #0x08] sub w4, w4, w1 cmp w3, w4 bgt G_M000_IG04 add x0, x0, #12 sbfiz x1, x1, #1, #32 add x0, x0, x1 add x1, x2, #12 mov w2, w3 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 140 3246: JIT compiled System.String:FillStringChecked(System.String,int,System.String) [Tier1, IL size=53, code size=140] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x1, [x0] mov x2, x1 ldr w3, [x0, #0x0C] ldr w4, [x2, #0x14] cmp w3, w4 bne G_M000_IG07 G_M000_IG03: ldr w3, [x0, #0x08] ldr w4, [x2, #0x10] cmp w3, w4 bhs G_M000_IG05 ldr x1, [x2, #0x08] ldr w2, [x1, #0x08] cmp w3, w2 bhs G_M000_IG08 ubfiz x2, x3, #5, #32 add x2, x2, #16 add x1, x1, x2 ldp q16, q17, [x1] stp q16, q17, [x0, #0x10] ldr w1, [x0, #0x08] add w1, w1, #1 str w1, [x0, #0x08] mov w0, #1 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr w1, [x1, #0x10] add w1, w1, #1 str w1, [x0, #0x08] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 172 3247: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:MoveNext() [Tier1, IL size=81, code size=172] ; Assembly listing for method System.Math:Abs(double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex446_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) mov ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data fp, sp G_M000_IG02: mov x0, v0.d[0] and x0, x0, #0xD1FFAB1E fmov d0, x0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 3248: JIT compiled System.Math:Abs(double) [Tier1, IL size=24, code size=28] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3249: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex446_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method Perfolizer.Mathematics.Distributions.StudentDistribution:StudentTwoTail(double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp d8, d9, [sp, #0x10] stp d10, d11, [sp, #0x20] stp x19, x20, [sp, #0x30] mov fp, sp fmov d8, d1 G_M000_IG02: fcmp d0, #0.0 blo G_M000_IG16 G_M000_IG01: fmov stpd16, # 1.0000 fcmp d8, d16 fp, lr, [sp, #-0x30 blo G_M000_IG17 ]! fmul d0, d0, d0 stp fdiv d16, d0, d8 x19, x20, [sp, #0x18] fmov d17, #1.0000 str fadd d9, d16x21, [sp, #0x28] , d17 mov frintn d17, d8 fp, sp mov x19, x0 fcvtzs w19, d17 G_M000_IG02: scvtf d10, w19 ldr fsub d17, d8, d10 w20, [x19, #0x4C] fabs d17, d17 sxtw w21, w2 ldr d18, [@RWD00] sub w0, w21, #4 fcmp cmp w20, w0 d17, d18 bgt G_M000_IG04 ble G_M000_IG05 G_M000_IG03: G_M000_IG02: str w21, [x19, #0x4C] fmov mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp d17, #20.0000 x19, x20, [sp, #0x18] fcmp ldp fp, lr, [sp], #0x30 d8, d17 ret bge G_M000_IG04 lr fcmp d0, d8 G_M000_IG05: bhs G_M000_IG07 cmp w20, w21 ldr d17, [@RWD08] bhi G_M000_IG07 fcmp d8, d17 ubfiz x0, x20, #1 , #32 ble G_M000_IG07 G_M000_IG04: ldr d0, [@RWD16] fcmp d16, d0 ble G_M000_IG05 add fmov d0, d9 x0, x1, x0 bl sub w1, w21, w20 movz x2, #0xD1FFAB1ESystem.Math:Log(double):double fmov d16, d0 movk x2, #0xD1FFAB1E LSL # G_M000_IG05: 16 fmov d0, #0.5000 movk x2, #0xD1FFAB1E LSL #32 fsub d0, d8, d0 ldr fmul d17, d0, d0 x2, [x2] ldr d18, [@RWD24] fmul d9, d17, d18 add x2, x2, #12 fmul d16, d0, d16 ldr d0, [@RWD32]mov w3, #3 movz x4, #0xD1FFAB1E movk x4, fmul d0, d16, d0 #0xD1FFAB1E LSL #16 ldr d17, [@RWD40] movk x4, #0xD1FFAB1E LSL #32 fsub d0, d0, d17 ldr x4, [x4] fmul d0, d0, d16 blr x4 fmov d17, #24.0000 fsub d0, d0, d17 tbnz w0, #31, G_M000_IG03 fmul d0, d0, d16 add w0, w20, w0 ldr d17, [@RWD48] fsub d0, d0, d17 fmul d17, d16, d16 str ldr d18, [@RWD56]w0, [x19, #0x4C] mov w0, #1 fmul d17, d17, d18 ldr d18, [@RWD64] G_M000_IG06: fadd d17, d17, d18 ldr fadd d17, d17, x21, [sp, #0x28] d9 ldp fdiv d0, d0, d17 x19, x20, [sp, #0x18] fadd d0, d0, d16 ldp fp, lr, [sp], #0x30 fmov d17, #3.0000 ret lr fadd d0, d0, d17 G_M000_IG07: fdiv d0, d0, d9 movz x0, #0xD1FFAB1E fmov d17, #1.0000 fadd d0, d0, d17 movk x0, #0xD1FFAB1E LSL #16 fsqrt movk x0, #0xD1FFAB1E LSL #32 d16, d16 ldr x0, [x0] fmul d16, d0, d16 blr x0 fneg d0, d16 brk_windows #0 movz x0, #0xD1FFAB1E ; Total bytes of code 184 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 fmov d16, #2.0000 fmul d0, d0, d16 G_M000_IG06: ldp x19, x20, [sp, #0x30] ldp d10, d11, [sp, #0x20] 3250: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ldp d8, d9, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: fmov d11, #1.0000 fmov d17, #20.0000 fcmp d8, d17 bhs G_M000_IG08 fmov d17, #4.0000 fcmp d0, d17 bhs G_M000_IG08 fsqrt d16, d16 fmov d8, d16 cmp w19, #1 bne G_M000_IG11 movi v8.16b, #0 b G_M000_IG11 align [4 bytes for IG09] align [4 bytes] align [0 bytes] align [0 bytes] G_M000_IG08: fsqrt d8, d9 fmul d16, d8, d10 mov w0, wzr fmov d0, #1.0000 fsub d0, d8, d0 fabs d0, d0 fcmp d0, #0.0 ble G_M000_IG10 G_M000_IG09: add w0, w0, #2 fmov d11, d8 scvtf d0, w0 fmul d0, d9, d0 sub w1, w0, #1 scvtf d17, w1 fdiv d0, d17, d0 fmul d16, d0, d16 add w1, w19, w0 scvtf d0, w1 fdiv d0, d16, d0 fadd d8, d0, d11 fsub d0, d8, d11 fabs d0, d0 fcmp d0, #0.0 bgt G_M000_IG09 G_M000_IG10: add w19, w19, #2 movi v11.16b, #0 movi v16.16b, #0 fneg d8, d8 G_M000_IG11: sub w19, w19, #2 cmp w19, #1 ble G_M000_IG12 scvtf d0, w19 fmul d0, d9, d0 sub w0, w19, #1 scvtf d17, w0 fdiv d0, d17, d0 fmul d0, d0, d8 fadd d8, d0, d16 b G_M000_IG11 G_M000_IG12: cbz w19, G_M000_IG13 fmov d0, d16 bl System.Math:Atan(double):double fdiv d16, d8, d9 fadd d0, d0, d16 fmov d16, #2.0000 fmul d0, d0, d16 ldr d16, [@RWD72] fdiv d0, d0, d16 b G_M000_IG14 G_M000_IG13: fsqrt d0, d9 fdiv d0, d8, d0 G_M000_IG14: fsub d0, d11, d0 G_M000_IG15: ldp x19, x20, [sp, #0x30] ldp d10, d11, [sp, #0x20] ldp d8, d9, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 RWD00 dq 3E112E0BE826D695h ; 1e-09 RWD08 dq 4069000000000000h ; 200 RWD16 dq 3EB0C6F7A0B5ED8Dh ; 1e-06 RWD24 dq 4048000000000000h ; 48 RWD32 dq BFD999999999999Ah ; -0.4 RWD40 dq 400A666666666666h ; 3.3 RWD48 dq 4055600000000000h ; 85.5 RWD56 dq 3FE999999999999Ah ; 0.8 RWD64 dq 4059000000000000h ; 100 RWD72 dq 400921FB54442D18h ; 3.14159265 ; Total bytes of code 824 3251: JIT compiled Perfolizer.Mathematics.Distributions.StudentDistribution:StudentTwoTail(double,double) [Tier1, IL size=565, code size=824] ; Assembly listing for method Perfolizer.Mathematics.Common.MathExtensions:Sqr(double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: fmul d0, d0, d0 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3252: JIT compiled Perfolizer.Mathematics.Common.MathExtensions:Sqr(double) [Tier1, IL size=4, code size=20] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:get_Current():BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp q16, q17, [x0, #0x10] stp q16, q17, [x8] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 24 3253: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:get_Current() [Tier1, IL size=7, code size=24] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1+<>c[System.ReadOnlyMemory`1[ushort]]:b__13_0(System.Object):bool:this blr x4 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] G_M000_IG01: ldp fp, lr, [sp], #0x40 ret lr stp G_M000_IG11: movz x0, #0xD1FFAB1E fp, lr, [sp, #-0x10]! movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: mov fp, sp G_M000_IG02: mov x0, x1 bl cbz CORINFO_HELP_RNGCHKFAIL x0, G_M000_IG04 G_M000_IG03: ldr x2, [x0] movz x3, #0xD1FFAB1E brk_windows #0 movk x3, #0xD1FFAB1E LSL #16 ; Total bytes of code 360 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG06 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr3254: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex446_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] , [x0] G_M000_IG05: ldp fp, lr, [sp], #0x10 br x1 G_M000_IG06: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 96 3255: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1+<>c[System.ReadOnlyMemory`1[ushort]]:b__13_0(System.Object) [Tier1, IL size=12, code size=96] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex447_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3256: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex447_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3257: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Trim():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 15 ; 0 inlinees with PGO data; 20 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp x25, x26, [sp, #0x70] stp x27, x28, [sp, #0x80] mov fp, sp add x1, sp, #144 str x1, [fp, #0x38] mov x19, x0 G_M000_IG02: bl System.Environment:get_TickCount():int sxtw w20, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw w21, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x22, [x0] ldrb w0, [x22, #0x9D] cbnz w0, G_M000_IG38 G_M000_IG03: ldr x23, [x19, #0x10] mov w24, wzr ldr w25, [x23, #0x08] cmp w25, #0 ble G_M000_IG06 G_M000_IG04: add x0, x23, #16 ldr x26, [x0, w24, UXTW #3] cbnz x26, G_M000_IG39 G_M000_IG05: add w24, w24, #1 cmp w25, w24 bgt G_M000_IG04 G_M000_IG06: cmp w21, #2 beq G_M000_IG42 mov w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E cmp w21, #1 csel w27, w0, w1, ne ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] b G_M000_IG21 G_M000_IG07: b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x28] add x11, x28, #8 ldr x1, [x11] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x0, [fp, #0x28] movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 mov x11, x28 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG08 G_M000_IG10: ldr x0, [fp, #0x38] bl G_M000_IG43 G_M000_IG11: b G_M000_IG36 G_M000_IG12: ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] G_M000_IG13: b G_M000_IG18 G_M000_IG14: ldr x0, [fp, #0x20] sub x11, x28, #24 ldr x1, [x11] blr x1 mov x20, x0 mov w28, wzr b G_M000_IG17 G_M000_IG15: ubfiz x0, x28, #4, #32 add x0, x0, #16 add x0, x20, x0 mov x1, xzr swpal x1, x21, [x0] cbz x21, G_M000_IG16 mov x0, x21 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w23, w0 ldr w24, [x21, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w4, w0 mov x0, x22 mov w2, w23 mov w3, w24 mov w1, #4 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG16: add w28, w28, #1 G_M000_IG17: ldr w0, [x20, #0x08] cmp w0, w28 bgt G_M000_IG15 G_M000_IG18: ldr x0, [fp, #0x20] movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 sub x11, x28, #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG14 G_M000_IG19: ldr x0, [fp, #0x38] bl G_M000_IG46 G_M000_IG20: b G_M000_IG36 G_M000_IG21: movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 sub x11, x28, #64 ldr x1, [x11] blr x1 cbz w0, G_M000_IG35 G_M000_IG22: ldr x0, [fp, #0x18] ldr x11, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x11, x1 bne G_M000_IG33 G_M000_IG23: mov x11, x0 ldr w1, [x11, #0x14] tbnz w1, #31, G_M000_IG30 add x11, x11, #24 ldr x23, [x11] G_M000_IG24: mov w25, wzr ldr w26, [x23, #0x08] cmp w26, #0 ble G_M000_IG27 G_M000_IG25: ubfiz x11, x25, #4, #32 add x11, x11, #16 ldr x11, [x23, x11] cbnz x11, G_M000_IG31 G_M000_IG26: add w25, w25, #1 cmp w26, w25 bgt G_M000_IG25 G_M000_IG27: sub x11, x28, #64 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG22 G_M000_IG28: b G_M000_IG35 G_M000_IG29: ubfiz x1, x25, #4, #32 add x1, x1, #16 add x1, x23, x1 mov x2, xzr swpal x2, x21, [x1] cbz x21, G_M000_IG26 ldrb w1, [x22, #0x9D] cbz w1, G_M000_IG26 mov x0, x21 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w24, w0 ldr w21, [x21, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w4, w0 mov x0, x22 mov w2, w24 mov w3, w21 mov w1, #4 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x18] b G_M000_IG26 G_M000_IG30: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG31: ubfiz x11, x25, #4, #32 add x11, x11, #16 add x11, x23, x11 ldr w11, [x11, #0x08] cbnz w11, G_M000_IG34 G_M000_IG32: ubfiz x11, x25, #4, #32 add x11, x11, #16 add x11, x23, x11 str w20, [x11, #0x08] b G_M000_IG26 G_M000_IG33: sub x11, x28, #56 ldr x1, [x11] blr x1 mov x23, x0 ldr x0, [fp, #0x18] b G_M000_IG24 G_M000_IG34: sub w11, w20, w11 sxtw x11, w11 mov w1, w27 cmp x11, x1 bge G_M000_IG29 b G_M000_IG26 G_M000_IG35: ldr x0, [fp, #0x18] sub x11, x28, #48 ldr x1, [x11] blr x1 G_M000_IG36: mov w0, #1 G_M000_IG37: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG38: mov x0, x22 mov w3, w21 mov w2, w20 mov w1, #5 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG03 G_M000_IG39: mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w28, w0 mov w0, #16 lsl w27, w0, w24 ldr x26, [x26, #0x08] mov w5, wzr b G_M000_IG41 G_M000_IG40: add x0, x26, #16 str w5, [fp, #0x34] ldr x0, [x0, w5, UXTW #3] mov w1, w20 mov w2, w28 mov w3, w21 mov w4, w27 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] ldr wzr, [x0] blr x6 ldr w0, [fp, #0x34] add w0, w0, #1 mov w5, w0 G_M000_IG41: ldr w0, [x26, #0x08] cmp w0, w5 bgt G_M000_IG40 b G_M000_IG05 G_M000_IG42: ldrb w0, [x22, #0x9D] cbnz w0, G_M000_IG12 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] b G_M000_IG07 G_M000_IG43: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG44: ldr x0, [fp, #0x28] cbz x0, G_M000_IG45 movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 add x11, x28, #16 ldr x1, [x11] blr x1 G_M000_IG45: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG46: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG47: ldr x0, [fp, #0x20] cbz x0, G_M000_IG48 movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 sub x11, x28, #16 ldr x1, [x11] blr x1 G_M000_IG48: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG49: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG50: ldr x0, [fp, #0x18] cbz x0, G_M000_IG51 movz x28, #0xD1FFAB1E movk x28, #0xD1FFAB1E LSL #16 movk x28, #0xD1FFAB1E LSL #32 sub x11, x28, #48 ldr x1, [x11] blr x1 G_M000_IG51: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 1372 3258: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[System.ReadOnlyMemory`1[ushort]]:Trim() [Tier1 with Static PGO, IL size=523, code size=1372] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1+<>c[ushort]:b__13_0(System.Object):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x0, x1 cbz x0, G_M000_IG04 G_M000_IG03: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG06 G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x10 br x1 G_M000_IG06: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 96 3259: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1+<>c[ushort]:b__13_0(System.Object) [Tier1, IL size=12, code size=96] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3260: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex447_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex448_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3261: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex448_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Trim():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 19 ; 1 inlinees with PGO data; 20 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp x25, x26, [sp, #0x70] stp x27, x28, [sp, #0x80] mov fp, sp add x1, sp, #144 str x1, [fp, #0x38] mov x19, x0 G_M000_IG02: bl System.Environment:get_TickCount():int sxtw w20, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw w21, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x22, [x0] ldrb w0, [x22, #0x9D] cbnz w0, G_M000_IG42 G_M000_IG03: ldr x23, [x19, #0x10] mov w24, wzr ldr w25, [x23, #0x08] cmp w25, #0 ble G_M000_IG10 G_M000_IG04: add x0, x23, #16 ldr x26, [x0, w24, UXTW #3] cbnz x26, G_M000_IG07 G_M000_IG05: add w24, w24, #1 cmp w25, w24 bgt G_M000_IG04 G_M000_IG06: b G_M000_IG10 G_M000_IG07: mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w27, w0 mov w0, #16 lsl w28, w0, w24 ldr x0, [x26, #0x08] mov w26, wzr ldr w5, [x0, #0x08] str w5, [fp, #0x34] cmp w5, #0 ble G_M000_IG05 G_M000_IG08: add x6, x0, #16 str x6, [fp, #0x10] G_M000_IG09: ldr x0, [x6, w26, UXTW #3] mov w1, w20 mov w2, w27 mov w3, w21 mov w4, w28 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] ldr wzr, [x0] blr x7 add w26, w26, #1 ldr w0, [fp, #0x34] cmp w0, w26 ldr x6, [fp, #0x10] bgt G_M000_IG09 b G_M000_IG05 G_M000_IG10: cmp w21, #2 beq G_M000_IG43 mov w0, #0xD1FFAB1E mov w1, #0xD1FFAB1E; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting cmp BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data w21, #1 csel w26, w0, w1, ne ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x18] b G_M000_IG25 G_M000_IG11: b G_M000_IG13 G_M000_IG12: ldr x0, [fp, #0x28] add x11, x27, G_M000_IG01: #8 stp fp, lr, [sp, #-0x50]!ldr x1, [x11] stp blr x1 x19 movz x1, #0xD1FFAB1E, x20, [sp, #0x18] stp x21, x22, [sp, movk x1, #0xD1FFAB1E LSL #16 #0x28] movk x1, #0xD1FFAB1E LSL #32 stp x23, x24, [sp, #0x38] ldr x1, [x1] str blr x1 x25, [sp, #0x48] G_M000_IG13: mov ldr fp, sp x0, [fp, #0x28] mov movz x27, #0xD1FFAB1E x19, x0 movk x27, #0xD1FFAB1E LSL #16 movk G_M000_IG02: x27, #0xD1FFAB1E LSL #32 ldr mov x11, x27 w20, [x19, ldr x1, [x11] #0x4C] blr x1 sxtw w21, w2 cbnz w0, G_M000_IG12 sub G_M000_IG14: w0, w21, #2 ldr cmp x0, [fp, #w20, w0 0x38] ble G_M000_IG05 bl G_M000_IG44 G_M000_IG03: G_M000_IG15: str w21, [ b G_M000_IG40 x19, #0x4C] G_M000_IG16: mov w0, wzr ldr x0, [x19, #0x08] G_M000_IG04: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 ldr movk x1, #0xD1FFAB1E LSL #32 x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldr ldp x21, x22, [sp, #0x28] x1 , [x1] ldp ldr wzr, [x0]x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 blr x1 ret lr str x0, [fp, #0x20] G_M000_IG05: cmp G_M000_IG17: w20, w21 b G_M000_IG22 bhi G_M000_IG10 G_M000_IG18: ubfiz x0, x20, #1, #32 ldr x0, [fp, #0x20] add x22, x1, x0 sub x11 sub w23, w21, w20 , x27, #24 mov w24, wzr sub w25, w23, #1 ldr x1, [x11] cmp w25, #0 blr x1 mov x27, x0 ble G_M000_IG03 mov w28, wzr G_M000_IG06: b G_M000_IG21 cmp w24, w23 G_M000_IG19: bhi ubfiz x0, x28, #4, #32 add x0, x0, #16 G_M000_IG10 add x0, x27, x0 ubfiz x0, x24, #1, #32 mov x1, xzr add x0, x22, x0 swpal sub w3, w23, w24 x1, x20, [x0] cbz x20, G_M000_IG20 mov w1, #66 mov x0, x20 mov w2, #97 bl movz x4, #0xD1FFAB1E System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int movk sxtw w23, w0 x4, ldr #0xD1FFAB1E LSL #16 w26, [x20, #0x08] movk x4, #0xD1FFAB1E LSL #32 mov x0, x19 ldr bl x4, [x4] System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int blr x4 sxtw w4, w0 add w24, w24, w0 mov x0, x22 tbnz mov w2, w23 mov w3, w26 w0, #31, G_M000_IG03 mov w1, #4 add w1, w24, #1 movz x5, #0xD1FFAB1E cmp w1, w23 movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 ldr x5, [x5] mov w0, w0 blr x5 movz x2, #0xD1FFAB1E LSL #16 G_M000_IG20: movk x2, #0xD1FFAB1E add w28, w28, #1 LSL #48 G_M000_IG21: lsl x2, x2, x0 ldr sub x0, x0, #64 w0, [x27, #0x08] and x0, x2, x0 cmp w0, w28 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 bgt G_M000_IG19 cmp w24, w25 G_M000_IG22: blt G_M000_IG06 G_M000_IG07: ldr x0 b , [fp, #0x20] G_M000_IG03 movz x27, #0xD1FFAB1E G_M000_IG08: movk x27, #0xD1FFAB1E LSL #16 movk x27, #0xD1FFAB1E LSL #32 add sub x11, x27, #32 w0, w20, w24 ldr x1, [x11] str blr x1 w0, [x19, #0x4C] cbnz w0, G_M000_IG18 mov G_M000_IG23: w0, #1 ldr x0, [fp, #0x38] G_M000_IG09: ldr bl G_M000_IG47 x25, [sp, #0x48] G_M000_IG24: ldp b G_M000_IG40 x23, G_M000_IG25: x24, [sp, #0x38] movz ldp x21, x22, [sp, #0x28] x27, #0xD1FFAB1E ldp x19, x20, [sp, #0x18] movk x27, #0xD1FFAB1E LSL #16 ldp fp, lr, [sp], #0x50 movk x27, #0xD1FFAB1E LSL #32 ret lr sub x11, x27, #64 ldr G_M000_IG10: x1 movz x0, #0xD1FFAB1E , [x11] blr x1 movk x0, #0xD1FFAB1E LSL #16 cbz w0, G_M000_IG39 G_M000_IG26: movk x0, #0xD1FFAB1E LSL #32 ldr ldr x0, [x0] x0, [fp, #0x18] ldr x11, [x0] blr x0 movz x1, #0xD1FFAB1E brk_windows # movk x1, #0xD1FFAB1E LSL #16 0 movk x1, #0xD1FFAB1E LSL #32 ; Total bytes of code 296 cmp x11, x1 bne G_M000_IG38 G_M000_IG27: mov x11, x0 ldr w1, [x11, #0x14] tbnz w1, #31, G_M000_IG34 add x11, x11, #24 ldr x28, [x11] G_M000_IG28: mov w21, wzr ldr w23, [x28, #0x08] cmp w23, #3262: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] 0 ble G_M000_IG31 G_M000_IG29: ubfiz x11, x21, #4, #32 add x11, x11, #16 ldr x11, [x28, x11] cbnz x11, G_M000_IG35 G_M000_IG30: add w21, w21, #1 cmp w23, w21 bgt G_M000_IG29 G_M000_IG31: sub x11, x27, #64 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG26 G_M000_IG32: b G_M000_IG39 G_M000_IG33: ubfiz x1, x21, #4, #32 add x1, x1, #16 add x1, x28, x1 mov x2, xzr swpal x2, x24, [x1] cbz x24, G_M000_IG30 ldrb w1, [x22, #0x9D] cbz w1, G_M000_IG30 mov x0, x24 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w25, w0 ldr w24, [x24, #0x08] mov x0, x19 bl System.Runtime.CompilerServices.RuntimeHelpers:GetHashCode(System.Object):int sxtw w4, w0 mov x0, x22 mov w2, w25 mov w3, w24 mov w1, #4 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x18] b G_M000_IG30 G_M000_IG34: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG35: ubfiz x11, x21, #4, #32 add x11, x11, #16 add x11, x28, x11 ldr w11, [x11, #0x08] cbnz w11, G_M000_IG37 G_M000_IG36: ubfiz x11, x21, #4, #32 add x11, x11, #16 add x11, x28, x11 str w20, [x11, #0x08] b G_M000_IG30 G_M000_IG37: sub w11, w20, w11 sxtw x11, w11 mov w1, w26 cmp x11, x1 bge G_M000_IG33 b G_M000_IG30 G_M000_IG38: sub x11, x27, #56 ldr x1, [x11] blr x1 mov x28, x0 ldr x0, [fp, #0x18] b G_M000_IG28 G_M000_IG39: ldr x0, [fp, #0x18] sub x11, x27, #48 ldr x1, [x11] blr x1 G_M000_IG40: mov w0, #1 G_M000_IG41: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG42: mov x0, x22 mov w3, w21 mov w2, w20 mov w1, #5 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG03 G_M000_IG43: ldrb w0, [x22, #0x9D] cbnz w0, G_M000_IG16 ldr x0, [x19, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x28] b G_M000_IG11 G_M000_IG44: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG45: ldr x0, [fp, #0x28] cbz x0, G_M000_IG46 movz x27, #0xD1FFAB1E movk x27, #0xD1FFAB1E LSL #16 movk x27, #0xD1FFAB1E LSL #32 add x11, x27, #16 ldr x1, [x11] blr x1 G_M000_IG46: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG47: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG48: ldr x0, [fp, #0x20] cbz x0, G_M000_IG49 movz x27, #0xD1FFAB1E movk x27, #0xD1FFAB1E LSL #16 movk x27, #0xD1FFAB1E LSL #32 sub x11, x27, #16 ldr x1, [x11] blr x1 G_M000_IG49: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG50: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG51: ldr x0, [fp, #0x18] cbz x0, G_M000_IG52 movz x27, #0xD1FFAB1E movk x27, #0xD1FFAB1E LSL #16 movk x27, #0xD1FFAB1E LSL #32 sub x11, x27, #48 ldr x1, [x11] blr x1 G_M000_IG52: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 1384 3263: JIT compiled System.Buffers.TlsOverPerCoreLockedStacksArrayPool`1[ushort]:Trim() [Tier1 with Static PGO, IL size=523, code size=1384] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3264: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex448_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex449_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3265: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex449_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3266: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3267: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex449_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex450_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3268: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex450_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3269: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3270: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex450_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex451_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3271: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex451_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3272: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3273: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex451_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex452_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3274: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex452_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3275: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3276: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex452_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex453_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3277: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex453_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3278: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3279: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex453_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex454_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3280: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex454_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3281: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3282: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex454_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex455_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3283: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex455_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3284: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3285: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex455_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex456_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3286: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex456_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3287: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3288: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex456_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex457_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3289: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex457_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3290: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3291: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex457_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex458_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3292: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex458_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3293: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3294: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex458_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex459_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3295: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex459_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3296: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3297: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex459_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex460_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3298: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex460_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3299: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3300: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex460_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex461_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3301: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex461_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3302: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3303: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex461_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex462_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3304: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex462_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3305: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3306: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex462_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex463_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3307: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex463_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3308: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3309: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex463_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex464_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3310: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex464_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3311: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3312: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex464_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex465_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3313: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex465_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3314: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3315: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex465_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex466_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3316: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex466_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3317: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3318: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex466_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex467_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3319: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex467_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3320: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3321: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex467_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex468_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3322: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex468_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3323: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3324: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex468_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex469_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3325: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex469_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3326: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3327: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex469_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex470_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3328: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex470_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3329: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3330: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex470_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex471_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3331: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex471_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3332: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3333: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex471_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex472_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3334: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex472_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3335: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3336: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex472_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex473_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3337: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex473_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3338: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3339: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex473_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex474_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3340: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex474_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3341: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3342: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex474_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex475_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3343: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex475_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3344: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3345: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex475_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex476_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3346: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex476_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3347: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3348: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex476_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex477_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3349: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex477_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3350: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3351: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex477_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex478_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3352: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex478_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3353: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3354: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex478_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex479_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3355: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex479_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3356: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3357: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex479_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex480_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3358: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex480_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3359: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3360: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex480_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex481_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3361: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex481_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3362: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3363: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex481_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex482_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3364: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex482_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3365: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3366: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex482_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex483_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3367: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex483_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3368: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3369: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex483_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex484_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3370: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex484_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3371: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3372: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex484_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex485_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3373: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex485_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3374: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3375: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex485_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex486_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3376: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex486_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3377: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3378: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex486_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex487_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3379: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex487_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3380: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3381: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex487_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex488_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3382: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex488_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3383: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3384: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex488_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex489_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3385: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex489_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3386: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3387: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex489_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex490_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3388: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex490_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3389: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3390: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex490_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex491_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3391: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex491_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3392: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3393: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex491_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex492_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3394: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex492_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3395: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3396: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex492_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex493_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3397: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex493_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3398: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3399: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex493_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex494_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3400: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex494_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3401: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3402: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex494_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex495_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3403: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex495_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3404: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3405: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex495_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex496_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3406: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex496_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3407: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3408: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex496_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex497_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3409: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex497_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3410: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3411: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex497_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex498_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3412: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex498_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3413: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3414: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex498_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex499_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3415: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex499_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3416: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3417: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex499_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex500_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3418: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex500_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3419: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3420: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex500_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex501_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3421: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex501_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3422: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3423: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex501_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex502_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3424: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex502_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3425: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3426: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex502_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex503_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3427: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex503_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3428: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3429: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex503_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex504_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3430: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex504_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3431: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3432: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex504_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex505_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3433: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex505_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3434: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3435: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex505_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex506_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3436: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex506_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3437: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3438: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex506_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex507_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3439: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex507_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:g__EmitIndexOf_LeftToRight|154_1(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 G_M000_IG01: ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 stp movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: fp, lr, [sp, #-0x50 bl CORINFO_HELP_RNGCHKFAIL ] !brk_windows #0 ; Total bytes of code 348 stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x403440: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] add x2, sp, #80 str x2, [fp, #0x28] mov x19, x0 mov x20, x1 G_M000_IG02: ldr x0, [x19, #0x10] ldr x21, [x0, #0x10] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] str x1, [fp, #0x20] G_M000_IG03: ldr x1, [x20, #0x10] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x21, #0x20] cmp w0, #16 bne G_M000_IG05 G_M000_IG04: add x0, x21, #56 ldr w1, [x0, #0x08] cmp w1, #0 ble G_M000_IG05 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 ldr x1, [x22, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [x21, #0x20] cmp w0, #10 beq G_M000_IG07 G_M000_IG06: ldr x1, [x21, #0x38] b G_M000_IG08 G_M000_IG07: ldr x1, [x21, #0x10] G_M000_IG08: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x22, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x1, [x22, #0xD1FFAB1E] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w1, [x20, #0x20] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x20, #0x08] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x22] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp x19, x2, [fp, #0x18] ldr x1, [fp, #0x18] ldr w20, [x1, #0x10] ldr x1, [fp, #0x18] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG11 G_M000_IG10: sxtw x1, w20 bl CORINFO_HELP_ARRADDR_ST ldr w0, [x19, #0x14] add w0, w0, #1 str w0, [x19, #0x14] add w0, w20, #1 str w0, [x19, #0x10] b G_M000_IG12 G_M000_IG11: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG12: ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] add x3, fp, #80 str x3, [sp, #0x18] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows G_M000_IG14:; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data ldp x19, x2, [fp, #0x18] ldr x1, [fp, #0x18] ldr w20, [x1, #0x10] ldr x1, [fp, #0x18] ldr x0, [x1, #0x08] ldr w1, [x0, #0x08] cmp w1, w20 bls G_M000_IG15 G_M000_IG01: stp fp, lr, [sp, #-0x80]!sxtw stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] x1 mov , fp, w20sp add x9, fp, #16 blmovi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov CORINFO_HELP_ARRADDR_STx19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] ldr cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add w0x21, x1, x0 , mov x0, x21 [ sub w22, w2, w20 x19 sxtw w1, w22 , str #x0, [fp, #0x40] 0x14 str] w1, [fp, #0x48] add x0, fp, #64 ldr addx1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 w0 , w0 G_M000_IG03: , # mov x0, x21 1 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] str add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 w0 , [ G_M000_IG04: x19 , b G_M000_IG09 # 0x14 G_M000_IG05: ] ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 add ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] w0 str w0, [fp, #0x18] , add x0, fp, #16 w20 ldr x24, [x0] , ldr w0, [x0, #0x08] # cmp w0, #2 1 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] str movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 w0 eor w1, w1, w3 , orr w0, w0, w1 [x19 , cbnz w0, G_M000_IG07 # G_M000_IG10: 0x10 add w0, w20, #3 ] cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: b ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] G_M000_IG16 mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 mov G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] x0 cmp w0, #3 , blt G_M000_IG20 x19 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 mov eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 x1 eor w1, w1, w3 , orr w0, w0, w1 x2 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 movz cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x2x19, #0x4C] , sxtw w23, w0 # cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 0xD1FFAB1E G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movk movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] x2 blr x1 , G_M000_IG18: # ldr x3, [x19, #0x20] 0xD1FFAB1E ldr w0, [x19, #0x58] LSL # sub w0, w0, #1 16 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 movkbhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] x2 mov w2, w20 , mov w1, wzr # movz x4, #0xD1FFAB1E 0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 LSL movk # x4, #0xD1FFAB1E LSL #3232 ldr x4, [x4] ldr wzr, [x0] ldr blr x4 mov w0, #1 G_M000_IG19: ldp x2x23, x24, [sp, #0x70] , ldp x21, x22, [sp, #0x60] [ ldp x19, x20, [sp, #0x50] x2 ldp fp, lr, [sp], #0x80 ] ret lr G_M000_IG20: mov w0 , wzr G_M000_IG21: blr ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 x2 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E G_M000_IG16: movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldp brk_windows #0 G_M000_IG23: x21, x22, [sp, #0x30 bl ]CORINFO_HELP_RNGCHKFAIL brk_windows #0 ldp ; Total bytes of code 652 x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x40 ret3441: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex507_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] lr ; Total bytes of code 888 3442: JIT compiled System.Text.RegularExpressions.RegexCompiler:g__EmitIndexOf_LeftToRight|154_1(byref) [Tier1, IL size=275, code size=888] ; Assembly listing for method System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingPrefix():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3443: JIT compiled System.Text.RegularExpressions.RegexFindOptimizations:get_LeadingPrefix() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.RegexCompiler:LdcI8(long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x2, x1 G_M000_IG02: ldr x0, [x0, #0x08] movz x1, #33 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #48 ldr x3, [x0] ldr x3, [x3, #0x50] ldr x3, [x3, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 48 3444: JIT compiled System.Text.RegularExpressions.RegexCompiler:LdcI8(long) [Tier1, IL size=18, code size=48] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex508_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3445: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex508_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3446: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3447: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex508_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex509_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3448: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex509_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3449: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3450: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex509_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex510_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3451: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex510_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3452: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3453: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex510_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.GC:Collect() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0xB0]! stp x19, x20, [sp, #0x60] stp x21, x22, [sp, #0x70] stp x23, x24, [sp, #0x80] stp x25, x26, [sp, #0x90] stp x27, x28, [sp, #0xA0] mov fp, sp G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x19, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] movn w0, #0 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0x30] adr x2, [G_M000_IG05] str x2, [fp, #0x48] add x2, fp, #32 str x2, [x19, #0x10] strb wzr, [x19, #0x0C] G_M000_IG03: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG04: blr x2 G_M000_IG05: mov w0, #1 strb w0, [x19, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x28] str x0, [x19, #0x10] G_M000_IG07: ldp x27, x28, [sp, #0xA0] ldp x25, x26, [sp, #0x90] ldp x23, x24, [sp, #0x80] ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 192 3454: JIT compiled System.GC:Collect() [Tier1, IL size=8, code size=192] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_IterationMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3455: JIT compiled BenchmarkDotNet.Engines.IterationData:get_IterationMode() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex511_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[ushort]:Append(ushort):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3456: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex511_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x08] add x3, x0, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 bhs G_M000_IG05 G_M000_IG03: strh w1, [x4, w2, UXTW #2] add w1, w2, #1 str w1, [x0, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: uxth w1, w1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 84 3457: JIT compiled System.Collections.Generic.ValueListBuilder`1[ushort]:Append(ushort) [Tier1, IL size=56, code size=84] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetReference[BenchmarkDotNet.Reports.Measurement](System.Span`1[BenchmarkDotNet.Reports.Measurement]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 3458: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetReference[BenchmarkDotNet.Reports.Measurement](System.Span`1[BenchmarkDotNet.Reports.Measurement]) [Tier1, IL size=8, code size=16] ; Assembly listing for method BenchmarkDotNet.Mathematics.MeasurementsStatistics:IsOutlier(int,double,double,double):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov w19, w0 G_M000_IG02: cmp w19, #3 bhi G_M000_IG11 mov w0, w19 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: mov w0, wzr G_M000_IG04: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: fcmp d0, d2 cset x1, gt b G_M000_IG09 G_M000_IG06: fcmp d0, d1 cset x1, lo b G_M000_IG09 G_M000_IG07: fcmp d0, d1 bhs G_M000_IG05 mov w0, #1 G_M000_IG08: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: uxtb w0, w1 G_M000_IG10: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 str w19, [x20, #0x08] movz x0, #0xD1FFAB1E ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x0, #0xD1FFAB1E LSL #16 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x1, #0xD1FFAB1E LSL #32 stp bl fp, lr, [sp, #-0x30]!CORINFO_HELP_STRCNS mov x1, x0 stp mov x2, x20 x19 mov x0, x19 , x20, [sp, #0x18] mov str x3, xzr x21, movz x4, #0xD1FFAB1E[sp, #0x28] mov movkfp, sp x4, #0xD1FFAB1E LSL #16 mov x19, x0 movk x4, #0xD1FFAB1E LSL #32 ldr G_M000_IG02: x4, [x4] blr x4 ldr w20 mov x0, x19 , [x19, #0x4C] bl CORINFO_HELP_THROW sxtw w21, w2 brk_windows sub #0 w0, w21, #1 cmp w20, w0 RWD00 ble G_M000_IG05 dd G_M000_IG03 - G_M000_IG02 G_M000_IG03: dd G_M000_IG05 - G_M000_IG02 str dd G_M000_IG06 - G_M000_IG02 w21, [x19, #0x4C] dd G_M000_IG07 - G_M000_IG02 mov w0, wzr ; Total bytes of code 240 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 3459: JIT compiled BenchmarkDotNet.Mathematics.MeasurementsStatistics:IsOutlier(int,double,double,double) [Tier1, IL size=65, code size=240] add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3460: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3461: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex511_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex512_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3462: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex512_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method BenchmarksGame.RegexRedux_1:RunBench():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 22 single block inlinees; 12 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] stp x25, x26, [sp, #0x60] stp x27, x28, [sp, #0x70] mov fp, sp G_M000_IG02: ldr x19, [x0, #0x08] movz x20, #0xD1FFAB1E movk x20, #0xD1FFAB1E LSL #16 movk x20, #0xD1FFAB1E LSL #32 mov x0, x20 bl CORINFO_HELP_NEWSFAST mov x21, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz x19, G_M000_IG31 mov x22, x19 ldr w0, [x21, #0x40] tbnz w0, #6, G_M000_IG04 G_M000_IG03: mov w23, wzr b G_M000_IG05 G_M000_IG04: mov x22, x19 ldr w23, [x22, #0x08] G_M000_IG05: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w5, [x21, #0x40] ldr x2, [x21, #0x18] ldr w3, [x21, #0x44] ldr x4, [x21, #0x20] movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 mov x1, x21 mov x2, x22 movn w3, #0 mov w4, w23 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] ldr wzr, [x0] blr x5 mov x19, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #9 bl CORINFO_HELP_NEWARR_1_OBJ mov x21, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [x21, #0x50] mov w22, wzr G_M000_IG06: add x0, x21, #16 ldr x23, [x0, w22, UXTW #3] mov w24, wzr mov x0, x20 bl CORINFO_HELP_NEWSFAST mov x25, x0 mov x1, x23 mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz x19, G_M000_IG31 ldr w5, [x19, #0x08] mov x0, x25 ldr w1, [x0, #0x40] tbnz w1, #6, G_M000_IG08 G_M000_IG07: mov w6, wzr b G_M000_IG09 G_M000_IG08: mov x6, x19 ldr w6, [x6, #0x08] G_M000_IG09: mov w1, #2 movn w2, #0 mov x3, x19 mov w4, wzr movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr w1, [x0, #0x30] cbz w1, G_M000_IG11 G_M000_IG10: add w24, w24, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w1, [x0, #0x30] cbnz w1, G_M000_IG10 G_M000_IG11: add w22, w22, #1 cmp w22, #9 blt G_M000_IG06 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #5 bl CORINFO_HELP_NEWARR_1_VC mov x21, x0 add x0, x21, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] add x0, x21, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] add x0, x21, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] add x0, x21, #64 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] add x0, x21, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str x1, [x0, #0x08] mov w22, wzr G_M000_IG13: ubfiz x0, x22, #4, #32 add x0, x0, #16 add x0, x21, x0 ldp x25, x23, [x0] mov x0, x20 bl CORINFO_HELP_NEWSFAST mov x24, x0 mov x1, x25 mov w2, #8 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cbz x19, G_M000_IG31 mov x25, x19 ldr w0, [x24, #0x40] tbnz w0, #6, G_M000_IG15 G_M000_IG14: mov w26, wzr b G_M000_IG16 G_M000_IG15: ldr w26, [x25, #0x08] G_M000_IG16: cbz x23, G_M000_IG32 ldr x27, [x24, #0x30] cbnz x27, G_M000_IG18 G_M000_IG17: add x27, x24, #48 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWFAST mov x19, x0 mov x0, xzr mov w1, wzr bl System.Runtime.InteropServices.GCHandle:InternalAlloc(System.Object,int):long str x0, [x19, #0x08] mov x0, x27 mov x1, x19 mov x2, xzr bl System.Threading.Interlocked:CompareExchange(byref,System.Object,System.Object):System.Object mov x27, x0 cbnz x27, G_M000_IG18 ldr x27, [x24, #0x30] G_M000_IG18: ldr x19, [x24, #0x18] ldr w28, [x24, #0x44] ldr x1, [x24, #0x20] str x1, [fp, #0x18] ldr w2, [x24, #0x40] str w2, [fp, #0x2C] ldr x0, [x27, #0x08] and x3, x0, #-2 cbnz x3, G_M000_IG20 G_M000_IG19: ldr w2, [fp, #0x2C] mov x4, xzr b G_M000_IG23 G_M000_IG20: ldr w2, [fp, #0x2C] tbz w3, #1, G_M000_IG22 and x0, x3, #-4 ldr x0, [x0] ldr x3, [x0, #0x10] ldr x4, [x3] cbnz x4, G_M000_IG21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows x3, [x3] ; optimized code blr ; fp based frame ; partially interruptible ; No PGO data x3 ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data mov x4, x0 ldr w2, [fp, #0x2C] G_M000_IG21: mov x5, x4 b G_M000_IG23 G_M000_IG22: ldr x5, [x3] mov x4, x5 G_M000_IG23: mov x5, x4 cbz x5, G_M000_IG27 G_M000_IG24: ldr x6, [x5, #0x18] ldrsb wzr, [x6] cmp x6, x23 beq G_M000_IG28 G_M000_IG25: ldr w0, [x6, #0x08] ldr w3, [x23, #0x08] cmp w0, w3 str x5, [fp, #0x20] bne G_M000_IG27 G_M000_IG26: add x0, x6, #12 ldr w3, [x6, #0x08] lsl w3, w3, #1 mov w2, w3 add x1, x23, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG01: ldr x3, [x3] stp blr x3 fp ldr , lr, [w2, [fp, #0x2C] sp, # ldr x5, [fp, #0x20] - cbnz w0, G_M000_IG28 0x50]! G_M000_IG27: mov x0, x23 stp mov w1, w2 x19, x20, [sp, #0x18] mov stp x21, x22, [sp, #0x28] x2, x19 stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov mov fp, sp w3, w28 ldr mov x4, [fp, #0x18] x19, movz x0 x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 G_M000_IG02: movk x5, #0xD1FFAB1E LSL #32 ldr ldr x5, [x5] w20, [x19 blr x5 , #0x4C] mov x19, x0 sxtw w21, w2 mov x0, x27 sub mov x1, x19w0, w21, #8 cmp w20, w0 movz x2 ble G_M000_IG05 , #0xD1FFAB1E G_M000_IG03: movk x2, #0xD1FFAB1E LSL #16 str w21, [x19, #0x4C] movk x2, #0xD1FFAB1E LSL #32 mov w0, wzr ldr x2, [x2] blr x2 G_M000_IG04: mov x5, x19 ldr x25, [sp, #0x48] G_M000_IG28: ldp mov x0, x5 x23, x24, [sp, #0x38] mov x1, x24 mov x2, x25 ldp x21, x22, [sp, #0x28] movn w3, #0 ldp x19, x20, [sp, #0x18] mov w4, w26 ldp fp, movz x5, #0xD1FFAB1E lr, [sp], #0x50 movk x5, #0xD1FFAB1E LSL #16 ret lr movk x5, #0xD1FFAB1E LSL #32 G_M000_IG05: ldr x5, [x5 cmp w20, w21 ] bhi G_M000_IG12 ldr wzr, [x0] blr x5 mov x23, x0 ubfiz x0 add w22, w22, #1 , x20, #1, #32 cmp w22, #5 add x22, x1, x0 sub w23, w21, w20 mov x19, x23 blt G_M000_IG13 mov w24, wzr G_M000_IG29: sub w25, w23, #7 ldr cmp w25, #0 w0, [x19, #0x08] G_M000_IG30: ble G_M000_IG03 ldp x27, x28, [sp G_M000_IG06: , #0x70] add w0, w24, #3 ldp x25, x26, [sp, #0x60] ldp x23, x24, [sp, #0x50] cmp w0, w23 ldp bhi G_M000_IG12 x21, x22, [sp, #0x40] ubfiz x1, x0, #1, #32 ldp x19, x20, [sp, #0x30] add x1, x22, x1 ldp fp, lr, [sp sub w3, w23, w0 ] mov x0, x1 , #0x80 mov w1, #97 ret lr mov w2, #103 G_M000_IG31: movz x4, #0xD1FFAB1E mov w0, #7 movk x4, #0xD1FFAB1E LSL #16 movz x1, #0xD1FFAB1E movk x1movk x4, #0xD1FFAB1E LSL #32 , #0xD1FFAB1E LSL #16 ldr movk x4, [x4] x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x4 blr x1 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 brk_windows #0 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] G_M000_IG32: mov w0, #13 mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne movz x1, #0xD1FFAB1E bne G_M000_IG08 movk x1, #0xD1FFAB1E LSL #16 G_M000_IG07: movk x1, #0xD1FFAB1E LSL #32 add w0, w24, #2 ldr x1, [x1] blr x1 cmp w0, w23 brk_windows # bhs G_M000_IG13 0 ldrh ; Total bytes of code 1408 w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr 3463: JIT compiled BenchmarksGame.RegexRedux_1:RunBench() [Tier1, IL size=373, code size=1408] G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3464: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3465: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex512_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex513_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3466: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex513_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3467: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3468: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex513_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex514_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3469: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex514_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3470: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3471: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex514_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex515_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3472: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex515_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3473: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3474: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex515_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex516_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3475: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex516_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3476: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3477: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex516_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex517_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3478: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex517_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3479: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3480: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex517_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex518_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3481: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex518_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3482: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3483: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex518_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex519_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3484: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex519_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3485: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3486: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex519_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex520_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3487: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex520_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3488: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3489: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex520_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex521_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3490: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex521_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3491: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3492: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex521_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex522_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3493: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex522_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3494: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3495: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex522_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex523_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3496: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex523_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3497: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3498: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex523_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex524_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3499: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex524_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3500: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3501: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex524_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex525_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3502: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex525_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3503: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3504: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex525_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex526_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3505: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex526_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3506: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3507: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex526_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex527_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3508: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex527_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3509: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3510: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex527_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex528_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3511: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex528_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3512: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3513: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex528_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex529_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3514: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex529_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3515: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3516: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex529_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex530_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3517: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex530_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3518: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3519: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex530_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex531_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3520: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex531_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3521: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3522: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex531_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex532_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3523: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex532_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3524: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3525: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex532_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex533_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3526: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex533_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3527: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3528: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex533_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex534_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3529: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex534_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3530: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3531: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex534_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex535_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3532: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex535_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3533: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3534: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex535_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex536_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3535: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex536_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3536: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3537: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex536_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex537_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3538: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex537_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3539: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3540: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex537_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex538_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3541: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex538_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3542: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3543: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex538_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex539_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3544: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex539_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3545: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3546: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex539_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex540_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3547: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex540_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3548: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3549: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex540_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex541_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3550: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex541_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3551: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3552: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex541_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex542_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3553: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex542_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3554: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3555: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex542_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex543_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3556: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex543_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3557: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3558: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex543_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex544_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3559: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex544_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3560: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3561: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex544_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex545_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3562: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex545_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3563: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3564: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex545_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex546_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3565: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex546_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3566: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3567: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex546_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex547_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3568: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex547_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3569: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3570: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex547_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex548_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3571: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex548_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3572: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3573: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex548_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex549_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3574: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex549_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3575: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3576: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex549_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex550_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3577: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex550_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3578: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3579: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex550_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex551_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3580: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex551_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3581: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3582: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex551_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex552_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3583: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex552_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3584: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3585: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex552_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex553_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3586: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex553_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3587: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3588: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex553_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex554_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3589: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex554_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3590: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3591: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex554_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex555_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3592: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex555_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3593: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3594: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex555_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex556_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3595: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex556_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3596: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3597: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex556_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex557_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3598: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex557_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3599: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3600: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex557_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex558_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3601: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex558_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3602: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3603: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex558_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex559_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3604: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex559_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3605: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3606: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex559_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex560_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3607: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex560_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3608: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3609: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex560_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex561_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3610: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex561_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3611: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3612: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex561_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex562_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3613: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex562_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3614: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3615: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex562_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex563_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3616: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex563_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3617: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3618: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex563_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex564_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3619: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex564_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3620: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3621: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex564_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex565_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3622: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex565_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3623: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3624: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex565_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex566_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3625: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex566_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3626: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3627: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex566_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex567_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3628: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex567_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3629: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3630: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex567_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex568_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3631: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex568_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3632: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3633: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex568_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex569_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3634: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex569_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3635: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3636: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex569_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex570_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3637: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex570_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3638: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3639: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex570_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex571_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3640: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex571_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3641: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3642: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex571_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex572_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3643: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex572_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3644: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3645: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex572_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Enum:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 21 single block inlinees; 23 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: mov x0, x19 bl System.Object:GetType():System.Type:this mov x20, x0 add x21, x19, #8 ldr x0, [x19] bl System.Enum:InternalGetCorElementType(ulong):ubyte sub w19, w0, #4 cmp w19, #7 bhi G_M000_IG48 mov w0, w19 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG04: ldrb w19, [x21] ldr x22, [x20, #0x10] cbz x22, G_M000_IG05 ldr x0, [x22] b G_M000_IG06 G_M000_IG05: mov x0, xzr G_M000_IG06: cbnz x0, G_M000_IG07 mov x2, xzr b G_M000_IG08 G_M000_IG07: ldr x2, [x0, #0x78] G_M000_IG08: cbz x2, G_M000_IG11 G_M000_IG09: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG11 G_M000_IG10: ldr x0, [x2, #0x10] cbnz x0, G_M000_IG12 G_M000_IG11: mov x0, x20 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG13 G_M000_IG12: mov x0, x2 G_M000_IG13: ldrb w1, [x0, #0x18] cbnz w1, G_M000_IG20 ldr x23, [x0, #0x10] ldrb w1, [x0, #0x19] cbz w1, G_M000_IG14 ldr w20, [x23, #0x08] cmp w20, w19 bls G_M000_IG18 add x0, x23, #16 ldr x0, [x0, w19, UXTW #3] b G_M000_IG19 G_M000_IG14: ldr x24, [x0, #0x08] cbz x24, G_M000_IG50 add x0, x24, #16 ldr w2, [x24, #0x08] G_M000_IG15: ldr w1, [x24, #0x08] cmp w1, #32 ble G_M000_IG16 mov w1, w2 mov w2, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG17 G_M000_IG16: mov w1, w19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG17: ldr w20, [x23, #0x08] cmp w20, w0 bls G_M000_IG18 add x1, x23, #16 ldr x0, [x1, w0, UXTW #3] b G_M000_IG19 G_M000_IG18: mov x0, xzr G_M000_IG19: b G_M000_IG21 G_M000_IG20: mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: cbnz x0, G_M000_IG22 mov w0, w19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: b G_M000_IG49 G_M000_IG23: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG24: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG25: ldr w21, [x21] ldr x22, [x20, #0x10] cbz x22, G_M000_IG26 ldr x0, [x22] b G_M000_IG27 G_M000_IG26: mov x0, xzr G_M000_IG27: cbnz x0, G_M000_IG28 mov x2, xzr b G_M000_IG29 G_M000_IG28: ldr x2, [x0, #0x78] G_M000_IG29: cbz x2, G_M000_IG32 G_M000_IG30: ldr x0, [x2] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x0, x1 bne G_M000_IG32 G_M000_IG31: ldr x0, [x2, #0x10] cbnz x0, G_M000_IG33 G_M000_IG32: mov x0, x20 mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG34 G_M000_IG33: mov x0, x2 G_M000_IG34: ldrb w1, [x0, #0x18] cbnz w1, G_M000_IG42 ldr x20, [x0, #0x10] ldrb w1, [x0, #0x19] cbz w1, G_M000_IG35 sxtw w0, w21 ldr w19, [x20, #0x08] cmp w19, w0 bls G_M000_IG40 add x0, x20, #16 ldr x0, [x0, w21, UXTW #3] b G_M000_IG41 G_M000_IG35: ldr x0, [x0, #0x08] cbnz x0, G_M000_IG36 mov x3, xzr mov w2, wzr b G_M000_IG37 G_M000_IG36: add x3, x0, #16 ldr w2, [x0, #0x08] G_M000_IG37: ldr w0, [x0, #0x08] cmp w0, #32 ble G_M000_IG38 mov x0, x3 mov w1, w2 mov w2, w21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG39 G_M000_IG38: mov x0, x3 mov w1, w21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG39: ldr w19, [x20, #0x08] cmp w19, w0 bls G_M000_IG40 add x1, x20, #16 ldr x0, [x1, w0, UXTW #3] b G_M000_IG41 G_M000_IG40: mov x0, xzr G_M000_IG41: b G_M000_IG43 G_M000_IG42: mov w1, w21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG43: cbnz x0, G_M000_IG44 mov w0, w21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG44: b G_M000_IG49 G_M000_IG45: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG46: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG47: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG49 G_M000_IG48: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG49: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG50: mov x0, xzr mov w2, wzr b G_M000_IG15 RWD00 dd G_M000_IG03 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG23 - G_M000_IG02 dd G_M000_IG24 - G_M000_IG02 dd G_M000_IG25 - G_M000_IG02 dd G_M000_IG45 - G_M000_IG02 dd G_M000_IG46 - G_M000_IG02 dd G_M000_IG47 - G_M000_IG02 ; Total bytes of code 1016 3646: JIT compiled System.Enum:ToString() [Tier1, IL size=158, code size=1016] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:CompareTo(BenchmarkDotNet.Reports.Measurement):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d16, [x0, #0x18] ldr d17, [x1, #0x18] fcmp d16, d17 bhs G_M000_IG04 G_M000_IG03: movn w0, #0 b G_M000_IG08 G_M000_IG04: fcmp d16, d17 bgt G_M000_IG07 fcmp d16, d17 bne G_M000_IG06 G_M000_IG05: mov w0, wzr b G_M000_IG08 G_M000_IG06: fcmp d16, d16 beq G_M000_IG07 fcmp d17, d17 bne G_M000_IG05 b G_M000_IG03 G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 3647: JIT compiled BenchmarkDotNet.Reports.Measurement:CompareTo(BenchmarkDotNet.Reports.Measurement) [Tier1, IL size=22, code size=88] ; Assembly listing for method System.Double:CompareTo(double):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d16, [x0] fcmp d16, d0 blo G_M000_IG04 G_M000_IG03: fcmp d16, d0 bgt G_M000_IG08 fcmp d16, d0 beq G_M000_IG06 fcmp d16, d16 beq G_M000_IG08 fcmp d0, d0 bne G_M000_IG06 G_M000_IG04: movn w0, #0 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: mov w0, #1 G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 88 3648: JIT compiled System.Double:CompareTo(double) [Tier1, IL size=44, code size=88] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3649: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Count() [Tier1, IL size=7, code size=20] ; Assembly listing for method Perfolizer.Mathematics.Common.ConfidenceInterval:get_Margin():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3650: JIT compiled Perfolizer.Mathematics.Common.ConfidenceInterval:get_Margin() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex573_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3651: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex573_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3652: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3653: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex573_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex574_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3654: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex574_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3655: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3656: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex574_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex575_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3657: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex575_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3658: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3659: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex575_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex576_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3660: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex576_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3661: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3662: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex576_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex577_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3663: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex577_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3664: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3665: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex577_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex578_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3666: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex578_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3667: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3668: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex578_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex579_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3669: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex579_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3670: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3671: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex579_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex580_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3672: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex580_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3673: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3674: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex580_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex581_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3675: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex581_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3676: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3677: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex581_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex582_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3678: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex582_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3679: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3680: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex582_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex583_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3681: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex583_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3682: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3683: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex583_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex584_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3684: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex584_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3685: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3686: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex584_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex585_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3687: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex585_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3688: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3689: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex585_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex586_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3690: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex586_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3691: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3692: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex586_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex587_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3693: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex587_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3694: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3695: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex587_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex588_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3696: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex588_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3697: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3698: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex588_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex589_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3699: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex589_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3700: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3701: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex589_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex590_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3702: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex590_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3703: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3704: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex590_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex591_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3705: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex591_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3706: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3707: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex591_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex592_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3708: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex592_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3709: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3710: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex592_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex593_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3711: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex593_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3712: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3713: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex593_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex594_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3714: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex594_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3715: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3716: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex594_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex595_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3717: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex595_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3718: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3719: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex595_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex596_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3720: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex596_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3721: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3722: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex596_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex597_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3723: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex597_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3724: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3725: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex597_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex598_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3726: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex598_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3727: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3728: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex598_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex599_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3729: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex599_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3730: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3731: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex599_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex600_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3732: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex600_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3733: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3734: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex600_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex601_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3735: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex601_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3736: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3737: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex601_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex602_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3738: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex602_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3739: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3740: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex602_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex603_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3741: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex603_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3742: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3743: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex603_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex604_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3744: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex604_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3745: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3746: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex604_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex605_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3747: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex605_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3748: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3749: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex605_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex606_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3750: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex606_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3751: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3752: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex606_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex607_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3753: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex607_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3754: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3755: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex607_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex608_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3756: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex608_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3757: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3758: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex608_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex609_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3759: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex609_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3760: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3761: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex609_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex610_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3762: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex610_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3763: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3764: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex610_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex611_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3765: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex611_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3766: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3767: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex611_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex612_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3768: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex612_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3769: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3770: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex612_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex613_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3771: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex613_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3772: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3773: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex613_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex614_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3774: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex614_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3775: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3776: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex614_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex615_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3777: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex615_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3778: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3779: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex615_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex616_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3780: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex616_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3781: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3782: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex616_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex617_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3783: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex617_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3784: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3785: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex617_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex618_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3786: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex618_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3787: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3788: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex618_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex619_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3789: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex619_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3790: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3791: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex619_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex620_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3792: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex620_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3793: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3794: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex620_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex621_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3795: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex621_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3796: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3797: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex621_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex622_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3798: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex622_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3799: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3800: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex622_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex623_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3801: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex623_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3802: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3803: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex623_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex624_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3804: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex624_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3805: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3806: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex624_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex625_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3807: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex625_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3808: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3809: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex625_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex626_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3810: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex626_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3811: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3812: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex626_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex627_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3813: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex627_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3814: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3815: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex627_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex628_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3816: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex628_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3817: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3818: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex628_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex629_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3819: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex629_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3820: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3821: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex629_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex630_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3822: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex630_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3823: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3824: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex630_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.StringBuilder:Append(ushort):System.Text.StringBuilder:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 432 G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x18] sxtw w2, w0 ldr x3, [x19, #0x08] ldr w4, [x3, #0x08] cmp w4, w2 bls G_M000_IG06 G_M000_IG03: add x3, x3, #16 strh w1, [x3, w2, UXTW #2] add w1, w0, #1 str w1, [x19, #0x18] G_M000_IG04: mov x0, x19 G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: uxth w1, w1 mov x0, x19 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG04 ; Total bytes of code 108 3825: JIT compiled System.Text.StringBuilder:Append(ushort) [Tier1 with Static PGO, IL size=51, code size=108] ; Assembly listing for method Perfolizer.Horology.TimeInterval:get_Nanoseconds():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3826: JIT compiled Perfolizer.Horology.TimeInterval:get_Nanoseconds() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex631_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3827: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex631_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:LessThan(byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp G_M000_IG02: ldp q16, q17, [x1] stp q16, q17, [fp, #0x10] ldr d16, [x0, #0x18] ldr d17, [fp, #0x28] fcmp d16, d17 blo G_M000_IG06 G_M000_IG03: fcmp d16, d17 bgt G_M000_IG04 fcmp d16, d17 beq G_M000_IG04 fcmp d16, d16 beq G_M000_IG04 fcmp d17, d17 beq G_M000_IG06 G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 88 3828: JIT compiled System.Collections.Generic.GenericArraySortHelper`1[BenchmarkDotNet.Reports.Measurement]:LessThan(byref,byref) [Tier1, IL size=834, code size=88] ; Assembly listing for method BenchmarkDotNet.Engines.IterationData:get_IterationStage():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 3829: JIT compiled BenchmarkDotNet.Engines.IterationData:get_IterationStage() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3830: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3831: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex631_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex632_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3832: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex632_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3833: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3834: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex632_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex633_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3835: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex633_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3836: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3837: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex633_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex634_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3838: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex634_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3839: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3840: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex634_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex635_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3841: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex635_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3842: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3843: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex635_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex636_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3844: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex636_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3845: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3846: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex636_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex637_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3847: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex637_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3848: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3849: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex637_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex638_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3850: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex638_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3851: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3852: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex638_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex639_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3853: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex639_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3854: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3855: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex639_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex640_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3856: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex640_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3857: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3858: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex640_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex641_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3859: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex641_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3860: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3861: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex641_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex642_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3862: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex642_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3863: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3864: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex642_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex643_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3865: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex643_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3866: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3867: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex643_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex644_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3868: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex644_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3869: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3870: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex644_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex645_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3871: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex645_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3872: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3873: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex645_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex646_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3874: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex646_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3875: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3876: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex646_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex647_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3877: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex647_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3878: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3879: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex647_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex648_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3880: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex648_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3881: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3882: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex648_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex649_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3883: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex649_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3884: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3885: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex649_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex650_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3886: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex650_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3887: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3888: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex650_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex651_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3889: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex651_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3890: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3891: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex651_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex652_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3892: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex652_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3893: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3894: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex652_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex653_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3895: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex653_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3896: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3897: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex653_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex654_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3898: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex654_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3899: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3900: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex654_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex655_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3901: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex655_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3902: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3903: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex655_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex656_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3904: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex656_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3905: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3906: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex656_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex657_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3907: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex657_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3908: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3909: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex657_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex658_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3910: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex658_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3911: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3912: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex658_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex659_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3913: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex659_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3914: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3915: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex659_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex660_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3916: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex660_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3917: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3918: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex660_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex661_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3919: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex661_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3920: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3921: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex661_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex662_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3922: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex662_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3923: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3924: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex662_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex663_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3925: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex663_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3926: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3927: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex663_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex664_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3928: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex664_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3929: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3930: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex664_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex665_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3931: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex665_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3932: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3933: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex665_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex666_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3934: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex666_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3935: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3936: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex666_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex667_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3937: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex667_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3938: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3939: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex667_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex668_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3940: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex668_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3941: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3942: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex668_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex669_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3943: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex669_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3944: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3945: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex669_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex670_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3946: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex670_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3947: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3948: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex670_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex671_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3949: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex671_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3950: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3951: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex671_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex672_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3952: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex672_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3953: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3954: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex672_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex673_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3955: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex673_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 3956: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 3957: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex673_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex674_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3958: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex674_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3959: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 3960: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex674_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex675_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3961: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex675_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 3962: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 3963: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex675_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex676_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3964: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex676_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 3965: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 3966: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex676_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex677_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3967: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex677_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3968: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 3969: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex677_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex678_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3970: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex678_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3971: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3972: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex678_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex679_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3973: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex679_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3974: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 3975: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex679_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex680_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3976: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex680_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3977: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 3978: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex680_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex681_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3979: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex681_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3980: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3981: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex681_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex682_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3982: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex682_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3983: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 3984: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex682_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex683_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3985: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex683_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3986: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 3987: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex683_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex684_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3988: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex684_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 3989: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 3990: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex684_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex685_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3991: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex685_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 3992: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 3993: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex685_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex686_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3994: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex686_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 3995: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 3996: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex686_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex687_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 3997: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex687_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 3998: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 3999: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex687_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex688_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4000: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex688_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4001: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4002: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex688_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex689_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4003: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex689_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4004: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4005: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex689_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex690_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4006: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex690_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4007: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4008: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex690_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:GetEnumerator():System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] G_M000_IG02: str x0, [fp, #0x10] ldr w14, [x0, #0x14] str w14, [fp, #0x1C] stp xzr, xzr, [fp, #0x20] stp xzr, xzr, [fp, #0x30] mov x14, x8 add x13, fp, #16 bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x12, [x13], #0x08 str x12, [x14], #0x08 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 88 4009: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:GetEnumerator() [Tier1, IL size=7, code size=88] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex691_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4010: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex691_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x14, x0 mov x15, x1 bl CORINFO_HELP_CHECKED_ASSIGN_REF str wzr, [x0, #0x08] ldr w1, [x1, #0x14] str w1, [x0, #0x0C] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 48 4011: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]) [Tier1, IL size=39, code size=48] ; Assembly listing for method System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 4012: JIT compiled System.Collections.Generic.List`1+Enumerator[BenchmarkDotNet.Reports.Measurement]:Dispose() [Tier1, IL size=1, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4013: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4014: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex691_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex692_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4015: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex692_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4016: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4017: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex692_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex693_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4018: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex693_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4019: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4020: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex693_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex694_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4021: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex694_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4022: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4023: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex694_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex695_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4024: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex695_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4025: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4026: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex695_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex696_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4027: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex696_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4028: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4029: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex696_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex697_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4030: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex697_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4031: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4032: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex697_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex698_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4033: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex698_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4034: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4035: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex698_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex699_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4036: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex699_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4037: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4038: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex699_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex700_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4039: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex700_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4040: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4041: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex700_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex701_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4042: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex701_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4043: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4044: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex701_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex702_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4045: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex702_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4046: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4047: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex702_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex703_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4048: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex703_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4049: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4050: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex703_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex704_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4051: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex704_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4052: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4053: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex704_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex705_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4054: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex705_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4055: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4056: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex705_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex706_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4057: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex706_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4058: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4059: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex706_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex707_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4060: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex707_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4061: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4062: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex707_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex708_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4063: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex708_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4064: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4065: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex708_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex709_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4066: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex709_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4067: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4068: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex709_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex710_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4069: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex710_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4070: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4071: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex710_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex711_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4072: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex711_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4073: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4074: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex711_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex712_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4075: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex712_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4076: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4077: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex712_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex713_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4078: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex713_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4079: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4080: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex713_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex714_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4081: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex714_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4082: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4083: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex714_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex715_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4084: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex715_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4085: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4086: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex715_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex716_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4087: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex716_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4088: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4089: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex716_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex717_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4090: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex717_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4091: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4092: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex717_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex718_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4093: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex718_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4094: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4095: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex718_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex719_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4096: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex719_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4097: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4098: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex719_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex720_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4099: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex720_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4100: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4101: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex720_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex721_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4102: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex721_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4103: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4104: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex721_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex722_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4105: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex722_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4106: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4107: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex722_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex723_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4108: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex723_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4109: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4110: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex723_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex724_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4111: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex724_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4112: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4113: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex724_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex725_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4114: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex725_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4115: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4116: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex725_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex726_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4117: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex726_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4118: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4119: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex726_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex727_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4120: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex727_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4121: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4122: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex727_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex728_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4123: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex728_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4124: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4125: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex728_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex729_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4126: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex729_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4127: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4128: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex729_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex730_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4129: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex730_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4130: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4131: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex730_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex731_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4132: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex731_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4133: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4134: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex731_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex732_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4135: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex732_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4136: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4137: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex732_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex733_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4138: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex733_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4139: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4140: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex733_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex734_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4141: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex734_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4142: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4143: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex734_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex735_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4144: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex735_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4145: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4146: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex735_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex736_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4147: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex736_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4148: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4149: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex736_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex737_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4150: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex737_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4151: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4152: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex737_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex738_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4153: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex738_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4154: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4155: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex738_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex739_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4156: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex739_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4157: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4158: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex739_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex740_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4159: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex740_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4160: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4161: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex740_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex741_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4162: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex741_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4163: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4164: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex741_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex742_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4165: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex742_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4166: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4167: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex742_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex743_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4168: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex743_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4169: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4170: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex743_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex744_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4171: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex744_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4172: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4173: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex744_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex745_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4174: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex745_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4175: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4176: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex745_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex746_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4177: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex746_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4178: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4179: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex746_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex747_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4180: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex747_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4181: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4182: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex747_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex748_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4183: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex748_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4184: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4185: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex748_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex749_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4186: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex749_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4187: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4188: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex749_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex750_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4189: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex750_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4190: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4191: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex750_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Number:ExtractFractionAndBiasedExponent(double,byref):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x1, v0.d[0] and x2, x1, #0xD1FFAB1E lsr x1, x1, #52 and w1, w1, #0xD1FFAB1E str w1, [x0] ldr w1, [x0] cbz w1, G_M000_IG04 G_M000_IG03: orr x2, x2, #0xD1FFAB1E sub w1, w1, #0xD1FFAB1E str w1, [x0] b G_M000_IG05 G_M000_IG04: movn w1, #0xD1FFAB1E str w1, [x0] G_M000_IG05: mov x0, x2 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 72 4192: JIT compiled System.Number:ExtractFractionAndBiasedExponent(double,byref) [Tier1, IL size=69, code size=72] ; Assembly listing for method System.Collections.HashHelpers:FastMod(uint,uint,ulong):uint ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex751_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Emitting ; optimized code ; fp based frame ; partially interruptible ; No PGO data BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! G_M000_IG01: stp x19, x20, [sp, #0x18] str stpx21, [sp, #0x28] mov fp, sp mov x19, x0 fp mov x21, x1 , mov lrw20, w2 , [sp G_M000_IG02: , mov x1, x21 # mov w2, w20 - mov x0, x19 0x10 ]bl ! mov fp, spSystem.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG02: G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 mov bl w0, System.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool w0 cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] mul cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] x0 , b x2 G_M000_IG02 , G_M000_IG04:x0 ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 lsr ret lr ; Total bytes of code 108 x0, x0, #32 add x0, x0, #1 4193: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex751_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] mov w1, w1 mul x0, x0, x1 lsr x0, x0, #32 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 44 4194: JIT compiled System.Collections.HashHelpers:FastMod(uint,uint,ulong) [Tier1, IL size=20, code size=44] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4195: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4196: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex751_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex752_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4197: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex752_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4198: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4199: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex752_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex753_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4200: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex753_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4201: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4202: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex753_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex754_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4203: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex754_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4204: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4205: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex754_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex755_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4206: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex755_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4207: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4208: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex755_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex756_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4209: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex756_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4210: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4211: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex756_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex757_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4212: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex757_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4213: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4214: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex757_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex758_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4215: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex758_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4216: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4217: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex758_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex759_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4218: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex759_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4219: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4220: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex759_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex760_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4221: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex760_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4222: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4223: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex760_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex761_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4224: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex761_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4225: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4226: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex761_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex762_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4227: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex762_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4228: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4229: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex762_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex763_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4230: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex763_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4231: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4232: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex763_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex764_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4233: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex764_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4234: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4235: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex764_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex765_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4236: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex765_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4237: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4238: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex765_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex766_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4239: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex766_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4240: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4241: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex766_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex767_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4242: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex767_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4243: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4244: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex767_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex768_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4245: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex768_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4246: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4247: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex768_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex769_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4248: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex769_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4249: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4250: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex769_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex770_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4251: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex770_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4252: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4253: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex770_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex771_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4254: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex771_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4255: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4256: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex771_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex772_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4257: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex772_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4258: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4259: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex772_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex773_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4260: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex773_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4261: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4262: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex773_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex774_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4263: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex774_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4264: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4265: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex774_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex775_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4266: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex775_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4267: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4268: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex775_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex776_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4269: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex776_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4270: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4271: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex776_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex777_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4272: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex777_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4273: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4274: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex777_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex778_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4275: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex778_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4276: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4277: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex778_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex779_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4278: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex779_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4279: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4280: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex779_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex780_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4281: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex780_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4282: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4283: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex780_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex781_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4284: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex781_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4285: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4286: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex781_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex782_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4287: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex782_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4288: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4289: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex782_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex783_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4290: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex783_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4291: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4292: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex783_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex784_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4293: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex784_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4294: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4295: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex784_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex785_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4296: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex785_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4297: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4298: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex785_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex786_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4299: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex786_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4300: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4301: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex786_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex787_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4302: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex787_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4303: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4304: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex787_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex788_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4305: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex788_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4306: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4307: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex788_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex789_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4308: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex789_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4309: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4310: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex789_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex790_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4311: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex790_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4312: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4313: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex790_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex791_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4314: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex791_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4315: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4316: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex791_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex792_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4317: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex792_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4318: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4319: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex792_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex793_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4320: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex793_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4321: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4322: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex793_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex794_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4323: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex794_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4324: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4325: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex794_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex795_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4326: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex795_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4327: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4328: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex795_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex796_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4329: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex796_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4330: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4331: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex796_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex797_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4332: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex797_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4333: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4334: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex797_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex798_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4335: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex798_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4336: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4337: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex798_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex799_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4338: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex799_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4339: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4340: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex799_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex800_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4341: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex800_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4342: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4343: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex800_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex801_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4344: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex801_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4345: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4346: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex801_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex802_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4347: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex802_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4348: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4349: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex802_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex803_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4350: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex803_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4351: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4352: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex803_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex804_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4353: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex804_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4354: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4355: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex804_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex805_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4356: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex805_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4357: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4358: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex805_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex806_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4359: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex806_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4360: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4361: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex806_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex807_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4362: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex807_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4363: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4364: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex807_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex808_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4365: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex808_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4366: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4367: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex808_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex809_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4368: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex809_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4369: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4370: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex809_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex810_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4371: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex810_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4372: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4373: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex810_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex811_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4374: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex811_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4375: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4376: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex811_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex812_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4377: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex812_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4378: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4379: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex812_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex813_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4380: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex813_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4381: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4382: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex813_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex814_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4383: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex814_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4384: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4385: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex814_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex815_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4386: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex815_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4387: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4388: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex815_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex816_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4389: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex816_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4390: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4391: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex816_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex817_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4392: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex817_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4393: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4394: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex817_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex818_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4395: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex818_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4396: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4397: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex818_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex819_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4398: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex819_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4399: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4400: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex819_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex820_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4401: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex820_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4402: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4403: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex820_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex821_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4404: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex821_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4405: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4406: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex821_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex822_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4407: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex822_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4408: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4409: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex822_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex823_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4410: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex823_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4411: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4412: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex823_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex824_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4413: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex824_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4414: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4415: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex824_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex825_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4416: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex825_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4417: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4418: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex825_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex826_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4419: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex826_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4420: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4421: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex826_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex827_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4422: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex827_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4423: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4424: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex827_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex828_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4425: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex828_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4426: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4427: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex828_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex829_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4428: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex829_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4429: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4430: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex829_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex830_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4431: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex830_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4432: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4433: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex830_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex831_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4434: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex831_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4435: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4436: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex831_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex832_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4437: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex832_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4438: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4439: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex832_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex833_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4440: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex833_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4441: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4442: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex833_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex834_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4443: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex834_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4444: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4445: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex834_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex835_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4446: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex835_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4447: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4448: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex835_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex836_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4449: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex836_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4450: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4451: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex836_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex837_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4452: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex837_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4453: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4454: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex837_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex838_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4455: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex838_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4456: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4457: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex838_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex839_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4458: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex839_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4459: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4460: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex839_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex840_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4461: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex840_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4462: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4463: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex840_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex841_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4464: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex841_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4465: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4466: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex841_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex842_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4467: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex842_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4468: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4469: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex842_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex843_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4470: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex843_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4471: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4472: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex843_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex844_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4473: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex844_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4474: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4475: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex844_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex845_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4476: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex845_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4477: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4478: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex845_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex846_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4479: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex846_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4480: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4481: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex846_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex847_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4482: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex847_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4483: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4484: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex847_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex848_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4485: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex848_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4486: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4487: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex848_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex849_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4488: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex849_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4489: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4490: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex849_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex850_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4491: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex850_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4492: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4493: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex850_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex851_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4494: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex851_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4495: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4496: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex851_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex852_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4497: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex852_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4498: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4499: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex852_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex853_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4500: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex853_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4501: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4502: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex853_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex854_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4503: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex854_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4504: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4505: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex854_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex855_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4506: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex855_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4507: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4508: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex855_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex856_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4509: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex856_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4510: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4511: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex856_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex857_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4512: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex857_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4513: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4514: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex857_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex858_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4515: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex858_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4516: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4517: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex858_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex859_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4518: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex859_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4519: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4520: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex859_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex860_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4521: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex860_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4522: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4523: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex860_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex861_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4524: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex861_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4525: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4526: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex861_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex862_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4527: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex862_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4528: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4529: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex862_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex863_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4530: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex863_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4531: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4532: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex863_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex864_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4533: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex864_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4534: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4535: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex864_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex865_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4536: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex865_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4537: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4538: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex865_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex866_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4539: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex866_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4540: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4541: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex866_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex867_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4542: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex867_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4543: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4544: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex867_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex868_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4545: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex868_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4546: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4547: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex868_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex869_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4548: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex869_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4549: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4550: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex869_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex870_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4551: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex870_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4552: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4553: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex870_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.RuntimeType:get_UnderlyingSystemType():System.Type:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 4554: JIT compiled System.RuntimeType:get_UnderlyingSystemType() [Tier1, IL size=2, code size=16] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex871_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4555: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex871_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4556: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Enum:g__InitializeEnumInfo|7_0[uint](System.RuntimeType,bool):System.Enum+EnumInfo`1[uint] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] mov fp, sp str xzr, [fp, #0x70] str xzr, [fp, #0x68] str x0, [fp, #0x78] mov w19, w1 G_M000_IG02: add x0, fp, #24 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x20, x0 mov x0, sp str x0, [fp, #0x38] mov x0, fp str x0, [fp, #0x48] movi v16.4s, #0 str q16, [fp, #0x58] add x0, fp, #120 str x0, [fp, #0x58] ldr x0, [fp, #0x78] add x1, fp, #88 cbnz x0, G_M000_IG04 G_M000_IG03: mov x2, xzr b G_M000_IG05 G_M000_IG04: ldr x2, [x0, #0x18] G_M000_IG05: str x2, [x1, #0x08] ldp x0, x1, [fp, #0x58] add x2, fp, #112 add x3, fp, #104 tst w19, #255 bne G_M000_IG07 G_M000_IG06: mov w4, wzr b G_M000_IG08 G_M000_IG07: mov w4, #1 G_M000_IG08: movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #0x28] adr x5, [G_M000_IG11] str x5, [fp, #0x40] add x5, fp, #24 str x5, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG09: movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 G_M000_IG10: blr x5 G_M000_IG11: mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG12 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG12: ldr x0, [fp, #0x20] str x0, [x20, #0x10] ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 sxtw w19, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 ldp x22, x21, [fp, #0x68] strb w19, [x20, #0x18] add x14, x20, #8 mov x15, x21 bl CORINFO_HELP_ASSIGN_REF add x14, x20, #16 mov x15, x22 bl CORINFO_HELP_ASSIGN_REF mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG14 G_M000_IG13: cbz x21, G_M000_IG20 ldr w4, [x21, #0x08] mov x1, x21 mov x2, x22 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w3, wzr mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 G_M000_IG14: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 strb w0, [x20, #0x19] ldr x0, [fp, #0x78] ldr x1, [x0, #0x10] cbz x1, G_M000_IG17 G_M000_IG15: ldr x1, [x0, #0x10] ldr x1, [x1] cbz x1, G_M000_IG17 G_M000_IG16: b G_M000_IG18 G_M000_IG17: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG18: add x14, x1, #120 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x0, x20 G_M000_IG19: ldp x27, x28, [sp, #0xC0] ldp x25, x26, [sp, #0xB0] ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG20: mov w0, #75 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 584 4557: JIT compiled System.Enum:g__InitializeEnumInfo|7_0[uint](System.RuntimeType,bool) [Tier1, IL size=73, code size=584] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data ; Assembly listing for method System.RuntimeType:IsDefined(System.Type,bool):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, G_M000_IG01: x0 mov x23, x22 sub w24, stp w20, fp, lr, w21[sp , cmp w24, #0#-0x20]! bls stp x19, x20, [sp, #0x10] G_M000_IG04 mov G_M000_IG03: fp, sp ldrh mov w0, [x23] x19, x0 cmp w0, #62 mov w20, w2 bne G_M000_IG04 G_M000_IG02: cbz x1cmp w24, #1 , G_M000_IG06 blo G_M000_IG11 mov x0, x1 add x0, x23, #2 ldr sub w2, w24, #1 x1, [x1] mov w1, #10 ldr movz x3, #0xD1FFAB1E x1, [x1, #0x58] movk x3, #0xD1FFAB1E LSL #16 ldr x1, [x1] movk x3, #0xD1FFAB1E LSL #32 blr x1 ldr x3, [x3] blr x3 mov x1, x0 sub w1, w24 cbz x1, G_M000_IG07 , #1 cmp w0, #0 G_M000_IG03: csel w0, w0, w1, ge ldr x2, [x1] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 cmp movk x0, #0xD1FFAB1E LSL #32 w0 cmp x2, x0 , w24 bne G_M000_IG07 bhi G_M000_IG11 G_M000_IG04: ubfiz x1, x0, uxtb w2, w20 #1, #32 mov x0, x19 add x23, x23, x1 movz x3, #0xD1FFAB1E sub w24, w24, w0 movk x3, #0xD1FFAB1E LSL #16 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] movk cmp w1, #10 x3, #0xD1FFAB1E LSL #32 bne G_M000_IG04 add w0, w0, #2 ldr cmp w0, w20 x3, [ bhi G_M000_IG11 x3] b G_M000_IG05 G_M000_IG04: G_M000_IG02: sub w24, w20, w21 ldp x19, x20, [sp, #0x10] mov x23, x22 ldp fp, lr, [sp], #0x20 cmp w24, #0 br x3 bls G_M000_IG09 ldrh w0, [x23] G_M000_IG06: cmp w0, #10 mov w0, #233 bne G_M000_IG09 movz x1, #0xD1FFAB1E add w0, w21, #1 movk cmp w0, w20 bhi G_M000_IG11 x1, #0xD1FFAB1E LSL #16 G_M000_IG05: movk x1, #0xD1FFAB1E LSL #32 str w0, [x19, #0x4C] bl sxtw w20, w0 CORINFO_HELP_STRCNS cmp w20, w21 movz bge x1, #0xD1FFAB1E G_M000_IG06 movk x1, #0xD1FFAB1E LSL #16 mov w0, w20 movk x1, #0xD1FFAB1E LSL #32 mov w20, w21 ldr x1, [x1] mov w21, w0 blr G_M000_IG06: x1 ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 brk_windows # mov x0, x19 0 movz x1, #0xD1FFAB1E G_M000_IG07: movk x1, #0xD1FFAB1E LSL #16 movz x0, #40 movk x1, #0xD1FFAB1E LSL #32 movk x0, #0xD1FFAB1E LSL #16 ldr x1, [x1] movk x0, #0xD1FFAB1E LSL #32 blr bl CORINFO_HELP_NEWSFAST x1 mov x19, x0 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 ldr movk x0, #0xD1FFAB1E LSL #32 x3, ldr x0, [x0] [x19, #0x20] blr x0 ldr w0, [x19, #0x58] mov x20, x0 mov w0, #233 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 sub mov x0, x19 w0, w0, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 str movk x3, #0xD1FFAB1Ew0, [x19, #0x58] LSL #32 ldr w2, [x3, #0x08] ldr x3, [x3] cmp w0, w2 blr x3 mov bhs G_M000_IG12 x0, x19 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] bl CORINFO_HELP_THROW sub brk_windows #0 w3, w20, w21 ; Total bytes of code 264 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 4558: JIT compiled System.RuntimeType:IsDefined(System.Type,bool) [Tier1, IL size=51, code size=264] ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4559: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex871_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Reflection.CustomAttribute:IsDefined(System.RuntimeType,System.RuntimeType,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 3827 ; 0 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 mov x20, x1 mov w21, w2 G_M000_IG02: ldrsb wzr, [x19] mov x0, x19 bl System.RuntimeTypeHandle:GetElementType(System.RuntimeType):System.RuntimeType cbnz x0, G_M000_IG09 mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG11 mov x0, x19 bl System.RuntimeTypeHandle:GetModule(System.RuntimeType):System.Reflection.RuntimeModule mov x22, x0 mov x0, x19 bl System.RuntimeTypeHandle:GetToken(System.RuntimeType):int sxtw w1, w0 mov x0, x22 mov x2, x20 mov w3, wzr mov w4, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbnz w0, G_M000_IG11 G_M000_IG03: uxtb w21, w21 cbz w21, G_M000_IG09 G_M000_IG04: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 cbz x19, G_M000_IG09 G_M000_IG05: ldr x0, [x19] movz x22, #0xD1FFAB1E movk x22, #0xD1FFAB1E LSL #16 movk x22, #0xD1FFAB1E LSL #32 cmp x0, x22 bne G_M000_IG09 G_M000_IG06: ldrsb wzr, [x19] mov x0, x19 bl System.RuntimeTypeHandle:GetModule(System.RuntimeType):System.Reflection.RuntimeModule mov x23, x0 mov x0, x19 bl System.RuntimeTypeHandle:GetToken(System.RuntimeType):int sxtw w1, w0 mov w4, w21 mov x0, x23 mov x2, x20 mov w3, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbnz w0, G_M000_IG11 G_M000_IG07: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x19, x0 cbz x19, G_M000_IG09 G_M000_IG08: ldr x0, [x19] cmp x0, x22 beq G_M000_IG06 G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, #1 G_M000_IG12: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 368 4560: JIT compiled System.Reflection.CustomAttribute:IsDefined(System.RuntimeType,System.RuntimeType,bool) [Tier1 with Static PGO, IL size=105, code size=368] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex872_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4561: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex872_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Reflection.PseudoCustomAttribute:IsDefined(System.RuntimeType,System.RuntimeType):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x19, x0 beq G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x19, x0 cset x0, eq b G_M000_IG05 G_M000_IG04: mov w0, #1 G_M000_IG05: uxtb w21, w0 cbnz w21, G_M000_IG09 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbz w0, #31, G_M000_IG08 mov w0, wzr G_M000_IG07: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x19, x0 bne G_M000_IG12 G_M000_IG09: ldrsb wzr, [x20] mov x0, x20 bl System.RuntimeTypeHandle:GetAttributes(System.RuntimeType):int tbz w0, #13, G_M000_IG11 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: cbnz w21, G_M000_IG13 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x19, x0 bne G_M000_IG15 G_M000_IG13: ldrsb wzr, [x20] mov x0, x20 bl System.RuntimeTypeHandle:GetAttributes(System.RuntimeType):int tbz w0, #12, G_M000_IG15 mov w0, #1 G_M000_IG14: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: mov w0, wzr G_M000_IG16: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 280 4562: JIT compiled System.Reflection.PseudoCustomAttribute:IsDefined(System.RuntimeType,System.RuntimeType) [Tier1, IL size=132, code size=280] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4563: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Reflection.CustomAttribute:IsCustomAttributeDefined(System.Reflection.RuntimeModule,int,System.RuntimeType,int,bool):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 51201 ; 1 inlinees with PGO data; 13 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp, #0x10] stp x19, x20, [sp, #0xD8] stp x21, x22, [sp, #0xE8] str x23, [sp, #0xF8] add fp, sp, #16 add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp q16, q16, [x9, #0x80] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #0xC0] mov x19, x0 mov w20, w1 mov x21, x2 mov w23, w3 mov w22, w4 G_M000_IG02: ldrsb wzr, [x19] mov x0, x19 bl System.ModuleHandle:_GetMetadataImport(System.Reflection.RuntimeModule):long str x19, [fp, #0x60] str x0, [fp, #0x68] add x3, fp, #112 ldr x0, [fp, #0x68] mov w2, w20 mov w1, #0xD1FFAB1E bl System.Reflection.MetadataImport:_Enum(long,int,int,byref) ldr w0, [fp, #0x78] cbnz w0, G_M000_IG09 G_M000_IG03: mov w0, wzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xC0] cmp xip0, xip1 beq G_M000_IG04 bl CORINFO_HELP_FAIL_FAST G_M000_IG04: ldr x23, [sp, #0xF8] ldp x21, x22, [sp, #0xE8] ldp x19, x20, [sp, #0xD8] ldp fp, lr, [sp, #0x10] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG05: add x1, fp, #124 ldr w1, [x1, w23, SXTW #2] G_M000_IG06: add x2, fp, #88 add x3, fp, #72 ldr x0, [fp, #0x68] bl System.Reflection.MetadataImport:_GetCustomAttributeProps(long,int,byref,byref) ldr w0, [fp, #0x58] add x5, fp, #32 str x5, [sp] add x5, fp, #24 str x5, [sp, #0x08] uxtb w5, w22 add x1, fp, #96 add x7, fp, #40 add x6, fp, #48 mov x2, x19 mov w3, w20 mov x4, x21 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 cbnz w0, G_M000_IG14 G_M000_IG07: add w23, w23, #1 ldr w0, [fp, #0x78] cmp w23, w0 blt G_M000_IG10 G_M000_IG08: b G_M000_IG12 G_M000_IG09: stp xzr, xzr, [fp, #0x48] str xzr, [fp, #0x58] cbz x21, G_M000_IG16 stp xzr, xzr, [fp, #0x30] str xzr, [fp, #0x40] mov w23, wzr ldr w2, [fp, #0x78] cmp w2, #0 ble G_M000_IG12 G_M000_IG10: ldr x2, [fp, #0x70] cbz x2, G_M000_IG05 G_M000_IG11: ldr x2, [fp, #0x70] ldr w3, [x2, #0x08] cmp w23, w3 bhs G_M000_IG21 add x2, x2, #16 ldr w1, [x2, w23, UXTW #2] b G_M000_IG06 G_M000_IG12: mov w0, wzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xC0] cmp xip0, xip1 beq G_M000_IG13 bl CORINFO_HELP_FAIL_FAST G_M000_IG13: ldr x23, [sp, #0xF8] ldp x21, x22, [sp, #0xE8] ldp x19, x20, [sp, #0xD8] ldp fp, lr, [sp, #0x10] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG14: mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xC0] cmp xip0, xip1 beq G_M000_IG15 bl CORINFO_HELP_FAIL_FAST G_M000_IG15: ldr x23, [sp, #0xF8] ldp x21, x22, [sp, #0xE8] ldp x19, x20, [sp, #0xD8] ldp fp, lr, [sp, #0x10] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG16: mov w19, wzr b G_M000_IG20 G_M000_IG17: add x0, fp, #112 mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w1, w0 add x2, fp, #88 add x3, fp, #72 ldr x0, [fp, #0x68] bl System.Reflection.MetadataImport:_GetCustomAttributeProps(long,int,byref,byref) ldr w0, [fp, #0x58] cmp w0, w23 bne G_M000_IG19 mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xC0] cmp xip0, xip1 beq G_M000_IG18 bl CORINFO_HELP_FAIL_FAST G_M000_IG18: ldr x23, [sp, #0xF8] ldp x21, x22, [sp, #0xE8] ldp x19, x20, [sp, #0xD8] ldp fp, lr, [sp, #0x10] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG19: add w19, w19, #1 G_M000_IG20: ldr w0, [fp, #0x78] cmp w19, w0 blt G_M000_IG17 b G_M000_IG12 G_M000_IG21: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 644 4564: JIT compiled System.Reflection.CustomAttribute:IsCustomAttributeDefined(System.Reflection.RuntimeModule,int,System.RuntimeType,int,bool) [Tier1 with Static PGO, IL size=216, code size=644] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 ; Assembly listing for method System.Enum+EnumInfo`1[uint]:.ctor(bool,uint[],System.String[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16. G_M000_IG01: 4s, v16.4s, v16.4s umov stp x1, fp, lr, [sp, #-0x30]!v16 .d[0] stp x19, x20, [sp, #0x18] cmp x1, #0 str x21, [sp, #0x28] mov fp, sp mov x20, x0 mov x19, x2 mov x21, x3 G_M000_IG02: strb w1, [x20, #0x18] cset add x1, x14, x20, #8eq mov x15, x19 cbz w1, G_M000_IG04 bl CORINFO_HELP_ASSIGN_REF add w1, w20, #8 add x14, x20, #16 cmp w1, w2 mov x15, x21 bhi G_M000_IG11 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 b G_M000_IG05 movk x1, #0xD1FFAB1E LSL #32 ldr G_M000_IG04: sub x1, [x1] w1, w2, w20 blr str x1 x0, [fp, #0x18] cbnz w0, G_M000_IG04 str w1, [fp, #0x20] G_M000_IG03: cbz x19, G_M000_IG06 add x0, fp, #24 ldr ldr x1, [x0] w4, [x19, #0x08] mov x1, x19 ldr w0, [x0, #0x08] mov x2, x21 cmp w0, #8 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 blt G_M000_IG09 movk x0, #0xD1FFAB1E LSL #32 mov w3, wzr ldr q16, [x1] mov x5, xzr ldr q17, [@RWD16] movz eor v16.2d, v16.2d, v17.2d x6, #0xD1FFAB1E umaxp movk x6, #0xD1FFAB1E LSL #16v16.4s, v16. 4s, v16.4s movk umov x6, #0xD1FFAB1E LSL #32 x0, v16.d[0] ldr x6, [x6] cmp x0, #0 cset x0, eq blr cbz w0, G_M000_IG09 x6 add w1, w20, #8 cmp w1, w2 G_M000_IG04: bhi G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E G_M000_IG05: movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 str ldr x1, [x1] w1, [x19, #0x4C] blr x1 sxtw w21, w1 strb cmp w21, w20 w0, [x20, #0x19] bge G_M000_IG06 mov w0, w20 G_M000_IG05: ldr mov w20, w21 x21, [sp, #0x28] mov w21, w0 ldp G_M000_IG06: x19, x20, [sp, #0x18] ldr w0, [x19, #0x58] ldp fp, lr, [sp], #0x30 cbnz w0, G_M000_IG07 ret lr mov x0, x19 G_M000_IG06: movz x1, #0xD1FFAB1E mov w0, #75 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x1] G_M000_IG07: blr x1 ldr x3, [x19, #0x20] brk_windows ldr w0, [x19, #0x58] # sub w0, w0, #1 0 str w0, [x19, #0x58] ; Total bytes of code 212 ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 4565: JIT compiled System.Enum+EnumInfo`1[uint]:.ctor(bool,uint[],System.String[]) [Tier1, IL size=55, code size=212] ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4566: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex872_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Enum:AreSorted[uint](uint[]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 190 ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, #1 ldr w2, [x0, #0x08] cmp w2, #1 ble G_M000_IG07 G_M000_IG03: add x0, x0, #16 align [4 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: sub w3, w1, #1 cmp w3, w2 bhs G_M000_IG11 ubfiz x3, x3, #2, #32 add x3, x0, x3 ldr w4, [x0, w1, UXTW #2] ldr w3, [x3] cmp w3, w4 blo G_M000_IG06 G_M000_IG05: cmp w3, w4 bhi G_M000_IG09 G_M000_IG06: add w1, w1, #1 cmp w2, w1 bgt G_M000_IG04 G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG11: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 120 4567: JIT compiled System.Enum:AreSorted[uint](uint[]) [Tier1 with Static PGO, IL size=50, code size=120] ; Assembly listing for method System.Enum:AreSequentialFromZero[uint](uint[]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 190 ; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr ldr w2, [x0, #0x08] cmp w2, #0 ble G_M000_IG06 G_M000_IG03: add x0, x0, #16 align [4 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: ldr w3, [x0, w1, UXTW #2] sxtw x4, w1 cmp x3, x4 bne G_M000_IG08 G_M000_IG05: add w1, w1, #1 cmp w2, w1 bgt G_M000_IG04 G_M000_IG06: mov w0, #1 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: mov w0, wzr G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 84 4568: JIT compiled System.Enum:AreSequentialFromZero[uint](uint[]) [Tier1 with Static PGO, IL size=34, code size=84] ; Assembly listing for method System.RuntimeType:InitializeCache():System.RuntimeType+RuntimeTypeCache:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 11 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] mov fp, sp str xzr, [fp, #0x78] str xzr, [fp, #0x70] mov x19, x0 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x20, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldr x0, [x19, #0x10] cbnz x0, G_M000_IG16 G_M000_IG03: str x19, [fp, #0x60] str x19, [fp, #0x68] str x19, [fp, #0x78] add x0, fp, #120 ldr x1, [fp, #0x78] cbz x1, G_M000_IG26 G_M000_IG04: ldr x2, [x1, #0x18] G_M000_IG05: mov x1, x2 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #0x30] adr x3, [G_M000_IG08] str x3, [fp, #0x48] add x3, fp, #32 str x3, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG06: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG07: blr x3 G_M000_IG08: mov x19, x0 mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG09 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG09: ldr x0, [fp, #0x28] str x0, [x20, #0x10] mov x2, x19 ldr x21, [fp, #0x60] add x0, x21, #16 mov x1, xzr casal x1, x2, [x0] cbz x1, G_M000_IG24 ldr x19, [fp, #0x68]; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex873_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data str x19, [fp, #0x70] add x0, fp, #112 ldr x1, [fp, #0x70] cbz x1, G_M000_IG25 G_M000_IG10: ldr x3, [x1, #0x18] G_M000_IG11: mov x1, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG01: str x3, [fp, #0x30] adr x3, [stp G_M000_IG14] fp, lr, [sp, #-0x30]! str x3, [fp, #0x48] add x3, fp, stp #32 x19, x20, [sp, #0x18] str x3, [x20, #0x10] str x21, [sp, #0x28] strb mov wzr, [x20, #0x0C] fp, sp G_M000_IG12: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] mov G_M000_IG13: x19, x0 blr x3 mov x21, x1 G_M000_IG14: mov w20, w2 mov w0, #1 strb w0 G_M000_IG02: , [x20, #0x0C] mov x1, x21 movz x0, #0xD1FFAB1E mov w2, w20 movk x0, #0xD1FFAB1E LSL #16 mov x0, x19 movk x0, #0xD1FFAB1E LSL #32 bl ldr w0, [x0] cmp w0, #0 beq G_M000_IG15 System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool bl CORINFO_HELP_STOP_FOR_GC G_M000_IG15: cbz w0, G_M000_IG04 ldr x0, [fp, #0x28] G_M000_IG03: str x0, [x20, #0x10] mov x1, x21 ldr x19, [fp, #0x68] mov w2, w20 G_M000_IG16: mov x0, x19 ldr x0, [x19, #0x10] bl ldr x1, [x0] mov x20, x1 System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz x20, G_M000_IG18 cbnz w0, G_M000_IG04 G_M000_IG17: ldr w0, [x19, #0x4C] ldr x0, [x20] movz x2, #0xD1FFAB1E cmp movk x2, #0xD1FFAB1E LSL #16 w0, w20 movk x2, #0xD1FFAB1E LSL #32 beq G_M000_IG04 cmp add x0, x2 w0, w0, #1 bne G_M000_IG29 G_M000_IG18: str w0, [x19, #0x4C] cbnz x20, G_M000_IG23 b G_M000_IG02 G_M000_IG19: movz x0, #0xD1FFAB1E G_M000_IG04: movk x0, #0xD1FFAB1E LSL #16 ldr x21 movk x0, #0xD1FFAB1E LSL #32 , [sp, #0x28] bl ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 CORINFO_HELP_NEWSFAST ret lr ; Total bytes of code 108 mov x20, x0 str 4569: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex873_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] wzr, [x20, #0x90] add x14, x20, #8 mov x15, x19 bl CORINFO_HELP_ASSIGN_REF mov x0, x19 bl System.RuntimeTypeHandle:GetModule(System.RuntimeType):System.Reflection.RuntimeModule mov x21, x0 ldr x1, [x21, #0x08] cbnz x1, G_M000_IG20 mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 add x14, x21, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG20: cmp x1, x19 cset x0, eq strb w0, [x20, #0x94] ldr x0, [x19, #0x10] mov x1, x20 mov x2, xzr bl System.Runtime.InteropServices.GCHandle:InternalCompareExchange(long,System.Object,System.Object):System.Object mov x1, x0 cbz x0, G_M000_IG22 G_M000_IG21: ldr x2, [x0] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 cmp x2, x3 bne G_M000_IG30 G_M000_IG22: cmp x0, #0 csel x20, x20, x0, eq G_M000_IG23: b G_M000_IG27 G_M000_IG24: ldr x19, [fp, #0x68] b G_M000_IG16 G_M000_IG25: mov x3, xzr b G_M000_IG11 G_M000_IG26: mov x2, xzr b G_M000_IG05 G_M000_IG27: mov x0, x20 G_M000_IG28: ldp x27, x28, [sp, #0xC0] ldp x25, x26, [sp, #0xB0] ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG29: mov x0, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG30: mov x0, x3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 696 4570: JIT compiled System.RuntimeType:InitializeCache() [Tier1, IL size=121, code size=696] ; Assembly listing for method System.RuntimeType+RuntimeTypeCache:.ctor(System.RuntimeType):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x20, x1 G_M000_IG02: str wzr, [x19, #0x90] add x14, x19, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF mov x0, x20 bl System.RuntimeTypeHandle:GetModule(System.RuntimeType):System.Reflection.RuntimeModule mov x21, x0 ldr x1, [x21, #0x08] cbnz x1, G_M000_IG04 G_M000_IG03: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 add x14, x21, #8 mov x15, x1 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: cmp x1, x20 cset x0, eq strb w0, [x19, #0x94] G_M000_IG05: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 128 4571: JIT compiled System.RuntimeType+RuntimeTypeCache:.ctor(System.RuntimeType) [Tier1, IL size=44, code size=128] ; Assembly listing for method System.Reflection.RuntimeModule:get_RuntimeType():System.RuntimeType:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x08] cbnz x0, G_M000_IG04 G_M000_IG03: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG04: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ret lr ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data ; Total bytes of code 72 4572: JIT compiled System.Reflection.RuntimeModule:get_RuntimeType() [Tier1, IL size=26, code size=72] G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4573: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.ModuleHandle:GetModuleType(System.Reflection.RuntimeModule):System.RuntimeType ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xC0]! stp x19, x20, [sp, #0x70] stp x21, x22, [sp, #0x80] stp x23, x24, [sp, #0x90] stp x25, x26, [sp, #0xA0] stp x27, x28, [sp, #0xB0] mov fp, sp str xzr, [fp, #0x60] str x0, [fp, #0x68] G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x19, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] add x0, fp, #104 ldr x1, [fp, #0x68] ldr x1, [x1, #0x20] add x2, fp, #96 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #0x30] adr x3, [G_M000_IG05] str x3, [fp, #0x48] add x3, fp, #32 str x3, [x19, #0x10] strb wzr, [x19, #0x0C] G_M000_IG03: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 G_M000_IG04: blr x3 G_M000_IG05: mov w0, #1 strb w0, [x19, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x28] str x0, [x19, #0x10] ldr x0, [fp, #0x60] G_M000_IG07: ldp x27, x28, [sp, #0xB0] ldp x25, x26, [sp, #0xA0] ldp x23, x24, [sp, #0x90] ldp x21, x22, [sp, #0x80] ldp x19, x20, [sp, #0x70] ldp fp, lr, [sp], #0xC0 ret lr ; Total bytes of code 212 4574: JIT compiled System.ModuleHandle:GetModuleType(System.Reflection.RuntimeModule) [Tier1, IL size=23, code size=212] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Item(int):BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w2, [x0, #0x10] cmp w1, w2 bhs G_M000_IG04 ldr x0, [x0, #0x08] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 ubfiz x1, x1, #5, #32 add x1, x1, #16 add x0, x0, x1 ldp q16, q17, [x0] stp q16, q17, [x8] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 96 4575: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:get_Item(int) [Tier1, IL size=27, code size=96] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4576: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex873_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex874_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4577: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex874_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4578: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4579: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex874_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex875_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4580: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex875_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4581: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4582: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex875_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex876_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4583: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex876_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4584: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4585: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex876_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex877_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4586: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex877_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4587: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4588: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex877_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex878_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4589: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex878_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4590: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4591: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex878_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex879_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4592: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex879_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4593: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4594: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex879_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex880_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4595: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex880_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4596: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4597: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex880_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex881_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4598: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex881_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4599: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4600: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex881_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex882_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4601: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex882_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4602: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4603: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex882_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex883_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4604: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex883_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4605: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4606: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex883_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex884_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4607: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex884_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4608: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4609: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex884_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex885_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4610: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex885_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4611: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4612: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex885_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex886_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4613: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex886_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4614: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4615: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex886_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex887_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4616: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex887_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4617: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4618: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex887_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex888_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4619: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex888_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4620: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4621: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex888_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex889_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4622: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex889_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4623: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4624: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex889_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex890_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4625: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex890_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4626: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4627: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex890_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex891_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4628: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex891_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4629: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4630: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex891_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex892_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4631: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex892_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4632: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4633: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex892_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex893_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4634: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex893_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4635: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4636: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex893_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex894_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4637: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex894_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4638: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4639: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex894_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex895_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4640: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex895_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4641: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4642: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex895_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex896_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4643: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex896_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4644: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4645: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex896_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex897_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4646: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex897_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4647: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4648: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex897_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex898_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4649: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex898_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4650: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4651: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex898_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex899_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4652: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex899_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4653: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4654: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex899_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex900_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4655: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex900_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4656: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4657: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex900_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex901_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4658: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex901_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4659: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4660: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex901_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex902_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4661: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex902_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4662: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4663: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex902_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex903_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4664: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex903_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4665: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4666: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex903_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex904_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4667: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex904_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4668: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4669: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex904_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex905_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4670: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex905_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4671: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4672: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex905_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex906_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4673: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex906_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4674: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4675: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex906_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex907_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4676: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex907_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4677: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4678: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex907_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex908_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4679: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex908_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4680: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4681: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex908_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex909_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4682: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex909_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4683: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4684: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex909_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex910_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4685: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex910_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4686: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4687: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex910_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex911_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4688: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex911_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4689: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4690: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex911_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex912_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4691: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex912_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4692: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4693: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex912_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex913_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4694: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex913_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4695: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4696: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex913_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex914_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4697: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex914_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4698: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4699: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex914_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex915_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4700: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex915_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4701: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4702: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex915_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex916_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4703: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex916_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4704: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4705: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex916_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex917_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4706: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex917_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4707: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4708: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex917_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex918_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4709: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex918_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4710: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4711: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex918_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex919_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4712: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex919_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4713: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4714: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex919_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex920_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4715: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex920_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4716: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4717: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex920_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex921_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4718: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex921_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4719: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4720: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex921_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex922_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4721: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex922_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4722: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4723: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex922_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex923_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4724: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex923_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4725: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4726: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex923_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex924_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4727: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex924_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4728: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4729: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex924_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex925_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4730: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex925_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4731: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4732: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex925_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex926_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4733: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex926_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4734: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4735: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex926_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex927_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4736: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex927_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4737: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4738: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex927_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex928_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4739: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex928_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4740: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4741: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex928_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex929_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4742: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex929_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4743: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4744: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex929_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex930_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4745: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex930_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4746: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4747: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex930_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method Perfolizer.Horology.Frequency:.ctor(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4748: JIT compiled Perfolizer.Horology.Frequency:.ctor(double) [Tier1, IL size=8, code size=20] ; Assembly listing for method Perfolizer.Horology.Frequency:get_Hertz():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4749: JIT compiled Perfolizer.Horology.Frequency:get_Hertz() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex931_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; Assembly listing for method System.Number:UInt32ToDecStrForKnownSmallNumber(uint):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str G_M000_IG01: x21, [sp, #0x28] stpmov fp, lr, [sp, #-0x10]! fp, sp mov mov fp, x19, sp x0 G_M000_IG02: mov x21, x1 mov movz x1, #0xD1FFAB1Ew20, w2 movk x1, G_M000_IG02: #0xD1FFAB1E LSL #16 mov x1, x21 movk x1, #0xD1FFAB1E LSL #32 mov w2, w20 ldr mov x0, x19 x1, [x1] bl cmp w0, #0xD1FFAB1E bhs G_M000_IG07 add x1, x1, #16 System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ldr cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl x1, [x1, System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool w0, UXTW #3cbnz w0, G_M000_IG04 ] ldr cbnz x1, G_M000_IG05 w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 G_M000_IG03: str w0, [x19, #0x4C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG04: ldp b G_M000_IG02 fp, lr, [sp], # 0x10 G_M000_IG04: br x1 ldr G_M000_IG05: x21, [sp, #0x28] mov ldp x0, x1 x19, x20, [sp, #0x18] G_M000_IG06: ldp fp, lr, [sp], #0x10 ldp ret lr fp, lr, [sp], #0x30 G_M000_IG07: ret lr bl CORINFO_HELP_RNGCHKFAIL ; Total bytes of code 108 brk_windows #0 ; Total bytes of code 88 4751: JIT compiled System.Number:UInt32ToDecStrForKnownSmallNumber(uint) [Tier1, IL size=18, code size=88] 4750: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex931_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4752: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.StringBuilder:AppendWithExpansion(byref,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 7 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: ldp w3, w2, [x19, #0x18] add w2, w2, w3 add w2, w2, w20 ldr w0, [x19, #0x20] cmp w2, w0 bgt G_M000_IG08 cmp w2, w20 blt G_M000_IG08 ldr x2, [x19, #0x08] ldr w2, [x2, #0x08] sub w22, w2, w3 cmp w22, #0 ble G_M000_IG05 G_M000_IG03: ldr x2, [x19, #0x08] cbz x2, G_M000_IG09 ldr w0, [x2, #0x08] cmp w0, w3 blo G_M000_IG10 add x2, x2, #16 ubfiz x1, x3, #1, #32 add x4, x2, x1 sub w5, w0, w3 mov x0, x4 G_M000_IG04: cmp w22, w5 bhi G_M000_IG12 mov w2, w22 lsl x2, x2, #1 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [x19, #0x08] ldr w0, [x0, #0x08] str w0, [x19, #0x18] G_M000_IG05: sub w23, w20, w22 mov x0, x19 mov w1, w23 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sbfiz x2, x22, #1, #32 add x1, x21, x2 ldr x2, [x19, #0x08] cbz x2, G_M000_IG11 add x0, x2, #16 ldr w24, [x2, #0x08] cmp w23, w24 bhi G_M000_IG12 G_M000_IG06: mov w2, w23 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str w23, [x19, #0x18] G_M000_IG07: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG09: cbnz w3, G_M000_IG10 mov x0, xzr mov w5, wzr b G_M000_IG04 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG11: mov x0, xzr mov w24, wzr cmp w23, w24 bls G_M000_IG06 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 480 4753: JIT compiled System.Text.StringBuilder:AppendWithExpansion(byref,int) [Tier1, IL size=155, code size=480] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add ; Assembly listing for method System.Text.StringBuilder:ExpandByABlock(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows w0, w0, #2 ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 3 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: G_M000_IG03: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 stp mov x0, x19 fp, lr, [sp, #-0x20]! movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 stp movk x1, #0xD1FFAB1E LSL #32 x19, x20, [sp, #0x10] ldr x1, [x1] mov blr x1 fp, sp mov G_M000_IG07: x19, x0 ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] G_M000_IG02: sub w0, w0, #1 ldr str w0, [x19, #0x58] w0, [x19, #0x1C] ldr w2, [x3, #0x08] cmp w0, add w2, w1, w0 w2 ldr w3, [x19, #0x18] bhs G_M000_IG12 add w2, w2, w3 add x3, x3, #16 ldr w4, [x19, #0x20] str wzr, [cmp w2, w4 x3, bgt G_M000_IG07 w0, UXTW #2] cmp w2, w1 sub w3, w20, w21 blt G_M000_IG07 ldr add w0, w0, w3 x0, [x19, #0x28] mov w2, w21 sxtw w2, w0 mov w1, wzr mov w3, #0xD1FFAB1E movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 mov w4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #32 cmp ldr x4, [x4] w2, w3 ldr wzr, [x0] blr x4 csel w2, w2, w4, le mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp cmp x21, x22, [sp, #0x20] w1, w2 ldp x19, x20, [sp, #0x10] csel w1, w1, w2, ge ldp fp, lr, [sp], #0x40 add w0, w0, w1 ret lr cmp w0, w1 G_M000_IG09: blt G_M000_IG08 mov w0, wzr G_M000_IG10: cmp w1, #0xD1FFAB1E ldp x23, x24, [sp, #0x30] bge G_M000_IG04 ldp x21, x22, [sp, #0x20] ldp G_M000_IG03: x19, x20, [sp, #0x10] sxtw x1, w1 ldp fp, lr, [sp], #0x40 movz x0, #0xD1FFAB1E ret lr movk x0, #0xD1FFAB1E LSL #16 G_M000_IG11: movk x0, #0xD1FFAB1E LSL #32 movz bl x0, #0xD1FFAB1E CORINFO_HELP_NEWARR_1_VC movk mov x20, x0 x0, #0xD1FFAB1E LSL #16 b G_M000_IG05 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG04: ldr x0, [x0] mov w0, w1 blr x0 mov w1, brk_windows wzr # movz x2, #0xD1FFAB1E 0 movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG12: ldr x2, [x2] blr x2 mov x20, x0 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 bl movk x0, #0xD1FFAB1E LSL #32 CORINFO_HELP_RNGCHKFAIL brk_windows bl CORINFO_HELP_NEWSFAST #0 ldr w14, [x19, #0x18] ; Total bytes of code 444 str w14, [x0, #0x18] ldr w14, [x19, #0x1C] str w14, [x0, #0x1C] ldr x15, [x19, #0x08] add x14, x0, #8 bl CORINFO_HELP_ASSIGN_REF ldr x15, [x19, #0x10] add x14, x0, #16 bl CORINFO_HELP_ASSIGN_REF ldr w14, [x19, #0x20] str w14, [x0, #0x20] 4754: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex931_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] add x14, x19, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldp w15, w14, [x19, #0x18] add w14, w14, w15 stp wzr, w14, [x19, #0x18] add x14, x19, #8 mov x15, x20 bl CORINFO_HELP_ASSIGN_REF G_M000_IG06: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 436 4755: JIT compiled System.Text.StringBuilder:ExpandByABlock(int) [Tier1, IL size=144, code size=436] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_Operations():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4756: JIT compiled BenchmarkDotNet.Reports.Measurement:get_Operations() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex932_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4757: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex932_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.String:PadLeft(int,ushort):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x20, x0 mov w19, w1 mov w21, w2 G_M000_IG02: tbnz w19, #31, G_M000_IG07 ldr w22, [x20, #0x08] sub w23, w19, w22 cmp w23, #0 bgt G_M000_IG05 G_M000_IG03: mov x0, x20 G_M000_IG04: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: mov w0, w19 bl System.String:FastAllocateString(int):System.String mov x19, x0 ldrsb wzr, [x19] add x24, x19, #12 mov x0, x24 uxth w2, w21 mov w1, w23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sbfiz x2, x23, #1, #32 add x0, x24, x2 add x1, x20, #12 sxtw x2, w22 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 G_M000_IG06: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 240 4758: JIT compiled System.String:PadLeft(int,ushort) [Tier1, IL size=83, code size=240] ; Assembly listing for method System.Double:ToString(System.String,System.IFormatProvider):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str d8, [sp, #0x10] str x19, [sp, #0x18] mov fp, sp mov x19, x1 G_M000_IG02: ldr d8, [x0] cbz x2, G_M000_IG06 G_M000_IG03: mov x0, x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG04: fmov d0, d8 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG05: ldr x19, [sp, #0x18] ldr d8, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 b G_M000_IG04 ; Total bytes of code 124 4759: JIT compiled System.Double:ToString(System.String,System.IFormatProvider) [Tier1, IL size=15, code size=124] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne ; Assembly listing for method System.Globalization.NumberFormatInfo:g__GetProviderNonNull|58_0(System.IFormatProvider):System.Globalization.NumberFormatInfo ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 40344 bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] G_M000_IG01: mov w0, #1 stp G_M000_IG11: fp, lr, [sp, #-0x20]! ldr x25, [sp, #0x48] ldp str x23, x24, [sp, #0x38] x19, [sp, #0x18] ldp x21, x22, [sp, #0x28] mov ldp x19, x20, [sp, #0x18] fp, sp mov ldp fp, lr, [sp], #0x50 x19, x0 ret lr G_M000_IG02: G_M000_IG10: movz x0, #0xD1FFAB1E mov x0, x19 movk x0, #0xD1FFAB1E LSL #16 cbz x0, G_M000_IG05 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG03: ldr x0, [x0] ldr blr x0 x1, [x0] brk_windows movz x2, #0xD1FFAB1E #0 movk x2, #0xD1FFAB1E LSL #16 G_M000_IG13: movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 beq G_M000_IG05 G_M000_IG04: mov x1, x19 bl movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 CORINFO_HELP_RNGCHKFAIL movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 brk_windows movk x2, #0xD1FFAB1E LSL #32 #0 ldr x2, ; Total bytes of code 328 [x2] blr x2 G_M000_IG05: cbz x0, G_M000_IG07 ldrb w1, [x0, #0x61] cbnz w1, G_M000_IG07 ldr x1, [x0, #0x18] cbz x1, G_M000_IG10 mov x0, x1 G_M000_IG06: ldr x19, [sp, #0x18] 4760: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG07: mov x1, x19 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG09 mov x0, x19 movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 mov x1, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz x0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG08: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x0 G_M000_IG09: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG10: ldr x1, [x0] ldr x1, [x1, #0x50] ldr x1, [x1, #0x10] G_M000_IG11: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 ; Total bytes of code 300 4761: JIT compiled System.Globalization.NumberFormatInfo:g__GetProviderNonNull|58_0(System.IFormatProvider) [Tier1 with Static PGO, IL size=76, code size=300] ; Assembly listing for method System.Number:FormatDouble(double,System.String,System.Globalization.NumberFormatInfo):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 4 inlinees without PGO data G_M000_IG01: sub sp, sp, #80 str ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool x19, [sp, #0x38] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data stp fp, lr, [sp, #0x40] add fp, sp, #64 sub x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #-0x40] mov x3, x1 G_M000_IG02: ldr wzr, [sp], #-0x40 mov x1, sp str x1, [fp, #-0x18] mov w1, #32 str w1, [fp, #-0x10] str xzr, [fp, #-0x28] str wzr, [fp, #-0x20] cbnz x0, G_M000_IG04 G_M000_IG03: mov x1, xzr mov w2, wzr b G_M000_IG05 G_M000_IG01: stp G_M000_IG04: fp, add lr, [sp, #-0x50]!x1, x0, #12 ldr w2, [ stp x0, #0x08] x19, x20, [sp, #0x38] G_M000_IG05: str sub x0, fp, #40 x21, [sp, #0x48] movz x4, #0xD1FFAB1E mov movk x4, #0xD1FFAB1E LSL #16 fp, sp movk x4, #0xD1FFAB1E LSL #32 str xzr, [fp, #0x28] ldr x4, [x4] str xzr, [fp, #0x30] str xzr, [fp, #0x18] blr x4 str xzr, [fp, #0x20] mov x19, x0 mov cbnz x19, G_M000_IG07 x19, G_M000_IG06: x0 ldr G_M000_IG02: w0, [fp, #-0x20] ldr ldr w1, [fp, #-0x10] cmp w0, w1 w20, [x19, #0x4C] bhi G_M000_IG11 cmp ldr x1, [fp, #-0x18] w20, w2 bhi G_M000_IG11 str x1, [fp, #-0x38] str w0, [fp, #-0x30] ubfiz sub x0, x20, #1, #32 x0, fp add x0, x1, x0 , #56 mov x1 movz x1, #0xD1FFAB1E , x0 movk x1, #0xD1FFAB1E LSL #16 sub w3, w2, w20 movk x1, #0xD1FFAB1E LSL #32 str ldr x1, [x1] x1, [fp, #0x28] blr x1 str w3, [fp, #0x30] mov x19, x0 add G_M000_IG07: x1, fp, #40 ldr x1, [fp, #-0x28] ldr cbz x1, G_M000_IG09 x3, [x1 G_M000_IG08: ] str xzr, [fp, #-0x28] ldr w1, [x1, #0x08] movz x0, #0xD1FFAB1E cmp w1 movk x0, #0xD1FFAB1E LSL #16 , movk x0, #0xD1FFAB1E LSL #32 #8 ldr x0, [x0] mov w2, wzr blt G_M000_IG04 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 G_M000_IG03: movk x3, #0xD1FFAB1E LSL #32 ldr ldr x3, [x3] q16, [x3] blr x3 ldr q17, [@RWD00] G_M000_IG09: eor v16.2d, v16.2d, v17.2d mov x0, x19 movz xip0, #0xD1FFAB1E umaxp movk xip0, #0xD1FFAB1E LSL #16 v16.4s, v16.4s, v16.4s movk xip0, #0xD1FFAB1E LSL #32 umov x1, ldr xip1, [fp, #-0x40] v16.d[0] cmp xip0, xip1 beq G_M000_IG10 cmp x1, #0 bl cset x1, eq CORINFO_HELP_FAIL_FAST cbz w1, G_M000_IG04 G_M000_IG10: add w1, w20, #8 sub sp, fp, #64 cmp w1, w2 ldp bhi G_M000_IG11 fp, lr, [sp, #0x40] b G_M000_IG05 ldr x19, [sp, #0x38] G_M000_IG04: add sp, sp, #80 sub w1, w2, w20 ret lr str G_M000_IG11: x0, movz x0, #0xD1FFAB1E [fp, #0x18] movk x0, #0xD1FFAB1E LSL #16 str w1, [fp, #0x20] movk x0, #0xD1FFAB1E LSL #32 add x0, fp, #24 ldr x1, [x0] ldr ldr w0, [x0, #0x08] x0, [x0] cmp w0, #8 blr x0 blt G_M000_IG09 ldr q16, [x1] brk_windows # ldr q17, [@RWD16] 0 eor v16.2d, v16.2d, v17.2d ; Total bytes of code 320 umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 4762: JIT compiled System.Number:FormatDouble(double,System.String,System.Globalization.NumberFormatInfo) [Tier1, IL size=71, code size=320] add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4763: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex932_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Number:FormatDouble[ushort](byref,double,System.ReadOnlySpan`1[ushort],System.Globalization.NumberFormatInfo):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 10 single block inlinees; 1 inlinees without PGO data G_M000_IG01: sub sp, sp, #128 str d8, [sp, #0x38] stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp fp, lr, [sp, #0x70] add fp, sp, #112 str xzr, [fp, #-0x50] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 str x4, [fp, #-0x70] mov x20, x0 mov x21, x1 mov w22, w2 mov x19, x3 fmov d8, d0 G_M000_IG02: mov x0, v8.d[0] and x0, x0, #0xD1FFAB1E mov x1, #0xD1FFAB1E cmp x0, x1 blt G_M000_IG09 G_M000_IG03: fcmp d8, d8 beq G_M000_IG05 ldr x0, [x19, #0x58] movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x70] cmp xip0, xip1 beq G_M000_IG04 bl CORINFO_HELP_FAIL_FAST G_M000_IG04: sub sp, fp, #112 ldp fp, lr, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldr d8, [sp, #0x38] add sp, sp, #128 ret lr G_M000_IG05: mov x0, v8.d[0] tbnz x0, #63, G_M000_IG07 ldr x0, [x19, #0x60] movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x70] cmp xip0, xip1 beq G_M000_IG06 bl CORINFO_HELP_FAIL_FAST G_M000_IG06: sub sp, fp, #112 ldp fp, lr, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldr d8, [sp, #0x38] add sp, sp, #128 ret lr G_M000_IG07: ldr x0, [x19, #0x68] movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x70] cmp xip0, xip1 beq G_M000_IG08 bl CORINFO_HELP_FAIL_FAST G_M000_IG08: sub sp, fp, #112 ldp fp, lr, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldr d8, [sp, #0x38] add sp, sp, #128 ret lr G_M000_IG09: mov x0, x21 mov w1, w22 sub x2, fp, #64 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w23, w0 ldr wzr, [sp] sub sp, sp, #0xD1FFAB1E mov x3, sp ldr w1, [fp, #-0x40] mov w0, #15 cmp w23, #0 csel w1, w1, w0, ne str w1, [fp, #-0x40] str wzr, [fp, #-0x60] str wzr, [fp, #-0x5C] strb wzr, [fp, #-0x58] strb wzr, [fp, #-0x57] mov w1, #3 strb w1, [fp, #-0x56] str x3, [fp, #-0x50] mov w3, #0xD1FFAB1E str w3, [fp, #-0x48] ldr w3, [fp, #-0x48] cmp w3, #0 bls G_M000_IG16 ldr x3, [fp, #-0x50] strb wzr, [x3] mov x3, v8.d[0] lsr x3, x3, #63 strb w3, [fp, #-0x58] sub x3, fp, #104 sub x1, fp, #64 mov w0, w23 mov x2, x19 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 sxtw w24, w0 fcmp d8, #0.0 beq G_M000_IG11 ldrb w1, [fp, #-0x68] cbz w1, G_M000_IG10 sub x1, fp, #96 fmov d0, d8 ldr w0, [fp, #-0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG11 G_M000_IG10: ldrb w1, [fp, #-0x68] sub x2, fp, #96 fmov d0, d8 ldr w0, [fp, #-0x40] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG11: cbz w23, G_M000_IG13 ldr w1, [fp, #-0x40] cmn w1, #1 bne G_M000_IG12 ldr w1, [fp, #-0x60] mov w0, #17 cmp w1, #17 csel w24, w1, w0, ge G_M000_IG12: sub x1, fp, #96 mov x0, x20 mov w2, w23 mov w3, w24 mov x4, x19 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG14 G_M000_IG13: mov x2, x21 mov w3, w22 sub x1, fp, #96 mov x0, x20 mov x4, x19 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG14: mov x0, xzr movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x70] cmp xip0, xip1 beq G_M000_IG15 bl CORINFO_HELP_FAIL_FAST G_M000_IG15: sub sp, fp, #112 ldp fp, lr, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldr d8, [sp, #0x38] add sp, sp, #128 ret lr G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 748 4764: JIT compiled System.Number:FormatDouble[ushort](byref,double,System.ReadOnlySpan`1[ushort],System.Globalization.NumberFormatInfo) [Tier1, IL size=296, code size=748] ; Assembly listing for method System.Number:ParseFormatSpecifier(System.ReadOnlySpan`1[ushort],byref):ushort ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 699 ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: mov w3, wzr cmp w1, #0 ble G_M000_IG08 G_M000_IG03: ldrh w3, [x0] orr w4, w3, #32 sub w4, w4, #97 cmp w4, #25 bhi G_M000_IG08 G_M000_IG04: cmp w1, #1 bne G_M000_IG11 G_M000_IG05: movn w1, #0 str w1, [x2] G_M000_IG06: uxth w0, w3 G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: movn w0, #0 str w0, [x2] cbz w1, G_M000_IG12 G_M000_IG09: cbz w3, G_M000_IG12 mov w0, wzr G_M000_IG10: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: cmp w1, #2 bne G_M000_IG14 ldrh w4, [x0, #0x02] sub w4, w4, #48 cmp w4, #10 bhs G_M000_IG15 str w4, [x2] b G_M000_IG06 G_M000_IG12: mov w0, #71 G_M000_IG13: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG14: cmp w1, #3 bne G_M000_IG15 ldrh w4, [x0, #0x02] sub w4, w4, #48 ldrh w5, [x0, #0x04] sub w5, w5, #48 cmp w4, #10 ccmp w5, #10, c, lo bhs G_M000_IG15 mov w1, #10 madd w0, w4, w1, w5 str w0, [x2] b G_M000_IG06 G_M000_IG15: mov w4, wzr mov w19, #1 b G_M000_IG18 G_M000_IG16: movz w5, #0xD1FFAB1E movk w5, #0xD1FFAB1E LSL #16 cmp w4, w5 blt G_M000_IG17 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG17: add w5, w19, #1 ldrh w6, [x0, w19, UXTW #2] mov w7, #10 madd w4, w4, w7, w6 sub w4, w4, #48 mov w19, w5 G_M000_IG18: cmp w19, w1 bhs G_M000_IG19 ldrh w5, [x0, w19, UXTW #2] sub w5, w5, #48 cmp w5, #9 bls G_M000_IG16 G_M000_IG19: cmp w19, w1 bhs G_M000_IG20 ldrh w0, [x0, w19, UXTW #2] cbnz w0, G_M000_IG08 G_M000_IG20: str w4, [x2] b G_M000_IG06 ; Total bytes of code 332 4765: JIT compiled System.Number:ParseFormatSpecifier(System.ReadOnlySpan`1[ushort],byref) [Tier1 with Static PGO, IL size=259, code size=332] ; Assembly listing for method System.Number:GetFloatingPointMaxDigitsAndPrecision(ushort,byref,System.Globalization.NumberFormatInfo,byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 82 ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex933_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows G_M000_IG01: ; optimized code stp ; fp based frame ; partially interruptible ; No PGO data fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp G_M000_IG02: uxth w4, w0 cbz w4, G_M000_IG09 G_M000_IG03: ldr w19, [x1] sxtw w0, w19 cmp w4, #82 bhi G_M000_IG11 sub w5, w4, #67 G_M000_IG01: cmp w5, #4 bne G_M000_IG07 stp G_M000_IG04: cbz w19, G_M000_IG21 fp, lr, [sp, #-0x30]! G_M000_IG05: mov w5, #1 stp x19, x20, [sp, #0x18] strb w5, [x3] G_M000_IG06: str ldr x21, [sp, #0x28] x21, [sp, #0x28] mov ldp fp, sp mov x19, x0 x19, x20, [sp, #0x18] mov x21, x1 mov w20, w2 ldp fp, lr, [sp], #0x30 G_M000_IG02: ret lr mov x1, x21 mov w2, w20 G_M000_IG07: mov x0, x19 bl cmp w5, #4 bhi G_M000_IG08 System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 mov G_M000_IG03: w4, w5 mov x1, x21 adr x5, [@RWD00] ldr mov w2, w20 w5, [x5, x4, LSL #2] mov x0, x19 adr x6, [ bl G_M000_IG02] add x5, x5, x6 System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool br x5 cbnz w0, G_M000_IG04 G_M000_IG08: ldr sub w4, w4, #78 w0, [x19, #0x4C] cmp w4, #4 cmp bhi G_M000_IG20 w0, w20 mov w4, w4 beq G_M000_IG04 adr x5, [@RWD20] add w0, w0, #1 ldr w5, [x5, x4, LSL #2] str w0, [x19, #0x4C] adr x6, [G_M000_IG02] b G_M000_IG02 add x5, x5, x6 G_M000_IG04: br x5 ldr x21, [sp, #0x28] G_M000_IG09: ldp mov w0, #1 x19, x20, [sp, #0x18] strb ldp fp, lr, [sp], #0x30 w0, [x3] ret lr ldr w0, [x1] G_M000_IG10: ldr ; Total bytes of code 108 x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: sub w20, w4, #4766: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex933_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] 99 cmp w20, #4 bhi G_M000_IG12 mov w4, w20 adr x5, [@RWD40] ldr w5, [x5, x4, LSL #2] adr x6, [G_M000_IG02] add x5, x5, x6 br x5 G_M000_IG12: sub w21, w4, #110 cmp w21, #4 bhi G_M000_IG20 mov w4, w21 adr x5, [@RWD60] ldr w5, [x5, x4, LSL #2] adr x6, [G_M000_IG02] add x5, x5, x6 br x5 G_M000_IG13: cmn w19, #1 bne G_M000_IG14 ldr w2, [x2, #0xD1FFAB1E] str w2, [x1] G_M000_IG14: strb wzr, [x3] b G_M000_IG06 G_M000_IG15: cmn w19, #1 bne G_M000_IG16 mov w2, #6 str w2, [x1] G_M000_IG16: ldr w2, [x1] add w2, w2, #1 str w2, [x1] b G_M000_IG05 G_M000_IG17: cmn w19, #1 bne G_M000_IG14 ldr w2, [x2, #0xD1FFAB1E] str w2, [x1] b G_M000_IG14 G_M000_IG18: cmn w19, #1 bne G_M000_IG19 ldr w2, [x2, #0xD1FFAB1E] str w2, [x1] G_M000_IG19: ldr w2, [x1] add w2, w2, #2 str w2, [x1] b G_M000_IG14 G_M000_IG20: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG21: movn w2, #0 str w2, [x1] b G_M000_IG05 RWD00 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 RWD20 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 RWD40 dd G_M000_IG13 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG15 - G_M000_IG02 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG04 - G_M000_IG02 RWD60 dd G_M000_IG17 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG20 - G_M000_IG02 dd G_M000_IG21 - G_M000_IG02 ; Total bytes of code 392 4767: JIT compiled System.Number:GetFloatingPointMaxDigitsAndPrecision(ushort,byref,System.Globalization.NumberFormatInfo,byref) [Tier1 with Static PGO, IL size=248, code size=392] ; Assembly listing for method System.Number:RoundNumber(byref,int,bool) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 179 ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x3, [x0, #0x10] mov w4, wzr b G_M000_IG04 align [4 bytes for IG03] align [4 bytes] align [4 bytes] align [0 bytes] G_M000_IG03: add w4, w4, #1 G_M000_IG04: cmp w4, w1 bge G_M000_IG06 G_M000_IG05: ldrb w5, [x3, w4, SXTW #2] cbnz w5, G_M000_IG03 G_M000_IG06: cmp w4, w1 bne G_M000_IG08 G_M000_IG07: ldrb w1, [x3, w4, SXTW #2] cmp w1, #0 cset x5, eq uxtb w2, w2 orr w2, w5, w2 cbnz w2, G_M000_IG08 cmp w1, #53 bge G_M000_IG17 G_M000_IG08: cmp w4, #0 ble G_M000_IG10 G_M000_IG09: sub w1, w4, #1 ldrb w1, [x3, w1, SXTW #2] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows cmp w1, #48 ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data beq G_M000_IG13 G_M000_IG10: cbz w4, G_M000_IG14 G_M000_IG11: strb wzr, [x3, w4, SXTW #2] str w4, [x0] G_M000_IG12: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG13: sub w4, w4, #1 b G_M000_IG08 G_M000_IG14: ldrb w1, [x0, #0x0A] cmp w1, #3 bne G_M000_IG20 G_M000_IG15: str wzr, [x0, #0x04] b G_M000_IG11 G_M000_IG16: sub w4, w4, #1 G_M000_IG17: cmp w4, #0 ble G_M000_IG18 sub w1, w4, #1 ldrb w1, [x3, w1, SXTW #2] G_M000_IG01: cmp w1, #57 stp beq G_M000_IG16 G_M000_IG18: fp, lr, [sp cmp w4, #0 , ble G_M000_IG19 #-0x50]! sub w1, w4, #1 stp add x1, x3, w1, SXTW x19, x20, [sp, #0x18] stp x21, x22, [sp, # ldrb 0x28] w2, [x1] stp x23, x24, [sp, #0x38] add w2, w2, #1 str strb w2, [x1] x25 b G_M000_IG10 G_M000_IG19: add x4, x0, #4 ldr w1, [x4] add w1, w1, #1 , str w1, [x4] [ mov w1, #49sp, #0x48] mov strb w1, [x3] fp, sp mov w4, #1 mov b G_M000_IG10 x19, x0 G_M000_IG20: strb G_M000_IG02: ldr wzr, [x0, #0x08] w20, [x19, #0x4C] b G_M000_IG15 sxtw w21, w2 ; Total bytes of code 264 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr 4768: JIT compiled System.Number:RoundNumber(byref,int,bool) [Tier1 with Static PGO, IL size=158, code size=264] G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4769: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.ReadOnlySpan`1[ushort]:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: ldr x1, [x0] ldr w0, [x0, #0x08] str w0, [fp, #0x1C] mov x0, x1 ldr w1, [fp, #0x1C] bl System.String:.ctor(System.ReadOnlySpan`1[ushort]):this G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 4770: JIT compiled System.ReadOnlySpan`1[ushort]:ToString() [Tier1, IL size=144, code size=40] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationStage():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4771: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationStage() [Tier1, IL size=7, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:GcCollect():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xB0]! stp x19, x20, [sp, #0x60] stp x21, x22, [sp, #0x70] stp x23, x24, [sp, #0x80] stp x25, x26, [sp, #0x90] stp x27, x28, [sp, #0xA0] mov fp, sp mov x19, x0 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x20, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] ldrb w0, [x19, #0xB8] cbz w0, G_M000_IG16 G_M000_IG03: movn w0, #0 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0x30] adr x2, [G_M000_IG06] str x2, [fp, #0x48] add x2, fp, #32 str x2, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG04: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG05: blr x2 G_M000_IG06: mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG07 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG07: ldr x0, [fp, #0x28] str x0, [x20, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x30] adr x0, [G_M000_IG10] str x0, [fp, #0x48] add x0, fp, #32 str x0, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG09: blr x0 G_M000_IG10: mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG11 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG11: ldr x0, [fp, #0x28] str x0, [x20, #0x10] movn w0, #0 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 str x2, [fp, #0x30] adr x2, [G_M000_IG14] str x2, [fp, #0x48] add x2, fp, #32 str x2, [x20, #0x10] strb wzr, [x20, #0x0C] G_M000_IG12: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG13: blr x2 G_M000_IG14: mov w0, #1 strb w0, [x20, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG15 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG15: ldr x0, [fp, #0x28] str x0, [x20, #0x10] G_M000_IG16: ldp x27, x28, [sp, #0xA0] ldp x25, x26, [sp, #0x90] ldp x23, x24, [sp, #0x80] ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 404 4772: JIT compiled BenchmarkDotNet.Engines.Engine:GcCollect() [Tier1, IL size=15, code size=404] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_ForceGcCleanups():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0xB8] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4773: JIT compiled BenchmarkDotNet.Engines.Engine:get_ForceGcCleanups() [Tier1, IL size=7, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:ForceGcCollect() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xB0]! stp x19, x20, [sp, #0x60] stp x21, x22, [sp, #0x70] stp x23, x24, [sp, #0x80] stp x25, x26, [sp, #0x90] stp x27, x28, [sp, #0xA0] mov fp, sp G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x19, x0 mov x0, sp str x0, [fp, #0x40] mov x0, fp str x0, [fp, #0x50] movn w0, #0 mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool movk x2, #0xD1FFAB1E LSL #32 ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows str x2, [fp, #0x30] ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data adr x2, [G_M000_IG05] str x2, [fp, #0x48] add x2, fp, #32 str x2, [x19, #0x10] strb wzr, [x19, #0x0C] G_M000_IG03: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG04: blr x2 G_M000_IG05: mov w0, #1 strb w0, [x19, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x28] str x0, [x19, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 str x0, [fp, #0x30] adr x0, [G_M000_IG09] str x0, [fp, #0x48] add x0, fp, #32 str x0, [x19, #0x10] strb wzr, [x19, #0x0C] G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x0, #0xD1FFAB1E LSL #32 G_M000_IG08: stp blr x0 G_M000_IG09: mov w0, #1 strb w0, [x19, #0x0C] movz x0, fp, lr, [sp, ##0xD1FFAB1E -0x50]! movk stp x0, #0xD1FFAB1E LSL #16 x19, x20, [sp movk x0, #0xD1FFAB1E LSL #32 , #0x38] ldr w0, [x0] cmp w0, #0 str beq G_M000_IG10 x21, [sp, #0x48] bl CORINFO_HELP_STOP_FOR_GC mov G_M000_IG10: fp, sp ldr x0, [fp, #0x28] str xzr, [fp, #0x28] str x0, [x19, #0x10] str xzr, movn w0, #[fp, #0x30] 0 str xzr, [fp, #0x18] mov w1, #2 str xzr, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 mov x19, x0 str x2, [fp , #0x30] adr x2, [G_M000_IG13] G_M000_IG02: str x2, [fp, #0x48] ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 add x2, fp, #32 str x2, [x19, #0x10] ubfiz strb wzr, [x19, #0x0C] x0, x20, #1, G_M000_IG11: #32 movz x2, #0xD1FFAB1E add x0, x1 movk x2, #0xD1FFAB1E LSL #16 , x0 movk x2, #0xD1FFAB1E LSL #32 G_M000_IG12: mov x1, x0 blr x2 sub w3, w2, w20 G_M000_IG13: mov w0, #1 cmp w3, #7 strb w0, [x19, #0x0C] bls G_M000_IG06 movz x0, #0xD1FFAB1E G_M000_IG03: movk x0, #0xD1FFAB1E LSL #16 ldrh movk x0, #0xD1FFAB1E LSL #32 w4, ldr w0, [x0] [x1] cmp w0, #0 orr beq G_M000_IG14 w5, w4, bl CORINFO_HELP_STOP_FOR_GC #4 G_M000_IG14: mov w6, #116 ldr cmp w5, x0, [fp, #0x28] #103 str x0, [x19, #0x10] ccmp w4, w6, z, ne G_M000_IG15: bne G_M000_IG06 ldp cmp w3, #1 blo G_M000_IG15 add x27x1, , x28, [sp, #0xA0] x1, #2 ldp sub w3, w3, #1 x25, x26, [sp, #0x90] ldp x23, x24, [sp, #0x80] str ldp x21, x22, [sp, #0x70] x1, ldp x19, x20, [sp, #0x60] [fp ldp fp, lr, [sp], #0xB0 , ret lr #0x18] ; Total bytes of code 392 str w3, [fp, #0x20] add x4, fp, #24 4774: JIT compiled BenchmarkDotNet.Engines.Engine:ForceGcCollect() [Tier1, IL size=16, code size=392] ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] ; Assembly listing for method System.GC:WaitForPendingFinalizers() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 G_M000_IG01: movk x1, #0xD1FFAB1E LSL #32 stp fp, lr, [sp, #-0xB0]! stp x19, x20, [sp, #0x60] ldr x1, [x1] stp x21, x22, [sp, #0x70] stp blr x1 x23, x24, [sp, #0x80] stp x25, x26, [sp, #0x90] G_M000_IG11: stp ldr x3, [x19, #0x20] x27, x28, [ ldr w0, [x19, sp, #0xA0]#0x58] sub mov w0, w0, #1 fp, str sp w0, [x19, #0x58] ldr G_M000_IG02: w2, [x3, #0x08] add cmp w0, w2 x0, fp, #32 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 mov ldr x0, [x19, #0x28] x1, x12 mov w2, w20 mov w1, wzr bl movz x4, #0xD1FFAB1E CORINFO_HELP_INIT_PINVOKE_FRAME mov x19, movk x4x0 , #0xD1FFAB1E LSL #16 mov x0, sp movk str x0, [fp, #0x40] mov x0, fp x4, #0xD1FFAB1E LSL #32 ldr str x0, [fp, #0x50] x4, [x4] movz x0, #0xD1FFAB1E ldr wzr, [x0] movk x0, #0xD1FFAB1E LSL #16 blr x4 movk x0 mov w0, #1 , #0xD1FFAB1E LSL #32 str x0, [fp, #0x30] G_M000_IG12: adr x0, [ ldr G_M000_IG05] x21, [sp, #0x48] str x0, [fp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] add x0 ldp x19, x20, [sp, #0x38] , fp, #32 ldp fp, lr, [sp], #0x50 str ret lr G_M000_IG15: movz x0, #0xD1FFAB1E x0, [x19, #0x10] movk x0, #0xD1FFAB1E LSL #16 strb movk wzr, [x19, #0x0C] x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 brk_windows #0 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG16: G_M000_IG04: blr x0 G_M000_IG05: mov w0, #1 strb w0, [x19, #0x0C] movz x0, #0xD1FFAB1E bl movk x0, #0xD1FFAB1E LSL #16 CORINFO_HELP_RNGCHKFAIL movk x0, #0xD1FFAB1E LSL #32 brk_windows #0 ldr w0, [x0] ; Total bytes of code 556 cmp w0, #0 beq G_M000_IG06 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG06: ldr x0, [fp, #0x28] str x0, [x19, #0x10] G_M000_IG07: ldp x27, x28, [sp, #0xA0] ldp x25, x26, [sp, #0x90] ldp x23, x24, [sp, #0x80] 4775: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex933_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 184 4776: JIT compiled System.GC:WaitForPendingFinalizers() [Tier1, IL size=6, code size=184] ; Assembly listing for method System.Diagnostics.Tracing.EventSource:IsEnabled():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x9D] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 4777: JIT compiled System.Diagnostics.Tracing.EventSource:IsEnabled() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Diagnostics.Tracing.EventSource:WriteEvent(int,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 5 single block inlinees; 0 inlinees without PGO data G_M000_IG01: sub sp, sp, #32 stp fp, lr, [sp, #0x10] add fp, sp, #16 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #-0x10] str x2, [fp, #-0x08] G_M000_IG02: ldrb w4, [x0, #0x9D] cbz w4, G_M000_IG04 G_M000_IG03: ldr wzr, [sp], #-0x10 mov x4, sp sub x2, fp, #8 str x2, [x4] mov w2, #8 stp w2, wzr, [x4, #0x08] mov x2, xzr mov w3, #1 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG04: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x10] cmp xip0, xip1 beq G_M000_IG05 bl CORINFO_HELP_FAIL_FAST G_M000_IG05: sub sp, fp, #16 ldp fp, lr, [sp, #0x10] add sp, sp, #32 ret lr ; Total bytes of code 136 4778: JIT compiled System.Diagnostics.Tracing.EventSource:WriteEvent(int,long) [Tier1, IL size=53, code size=136] ; Assembly listing for method Perfolizer.Horology.WindowsClock:GetTimestamp():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: add x0, fp, #24 bl Perfolizer.Horology.WindowsClock:QueryPerformanceCounter(byref):bool ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 4779: JIT compiled Perfolizer.Horology.WindowsClock:GetTimestamp() [Tier1, IL size=10, code size=32] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex934_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4780: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex934_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4781: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4782: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex934_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex935_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4783: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex935_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4784: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4785: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex935_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex936_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4786: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex936_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4787: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4788: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex936_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex937_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4789: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex937_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4790: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4791: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex937_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex938_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4792: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex938_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4793: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4794: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex938_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex939_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4795: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex939_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4796: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4797: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex939_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex940_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4798: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex940_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4799: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4800: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex940_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex941_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4801: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex941_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4802: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4803: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex941_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex942_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4804: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex942_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4805: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4806: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex942_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex943_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4807: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex943_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4808: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4809: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex943_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex944_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4810: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex944_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4811: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4812: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex944_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex945_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4813: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex945_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4814: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4815: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex945_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex946_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4816: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex946_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4817: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4818: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex946_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex947_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4819: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex947_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4820: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4821: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex947_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex948_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4822: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex948_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4823: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4824: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex948_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex949_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4825: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex949_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4826: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4827: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex949_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex950_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4828: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex950_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4829: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4830: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex950_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex951_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4831: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex951_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4832: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4833: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex951_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex952_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4834: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex952_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4835: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4836: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex952_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex953_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4837: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex953_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4838: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4839: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex953_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex954_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4840: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex954_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4841: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4842: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex954_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex955_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4843: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex955_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4844: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4845: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex955_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex956_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4846: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex956_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4847: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4848: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex956_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex957_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4849: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex957_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4850: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4851: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex957_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex958_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4852: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex958_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4853: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4854: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex958_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex959_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4855: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex959_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4856: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4857: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex959_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex960_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4858: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex960_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4859: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4860: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex960_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex961_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4861: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex961_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4862: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4863: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex961_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex962_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4864: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex962_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4865: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4866: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex962_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex963_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4867: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex963_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4868: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4869: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex963_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex964_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4870: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex964_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4871: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4872: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex964_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex965_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4873: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex965_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4874: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4875: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex965_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex966_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4876: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex966_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4877: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4878: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex966_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex967_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4879: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex967_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4880: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4881: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex967_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex968_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4882: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex968_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4883: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4884: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex968_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex969_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4885: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex969_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4886: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4887: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex969_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex970_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4888: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex970_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4889: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4890: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex970_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex971_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4891: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex971_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4892: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4893: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex971_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex972_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4894: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex972_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4895: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4896: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex972_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex973_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4897: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex973_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4898: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4899: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex973_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex974_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4900: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex974_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4901: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4902: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex974_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex975_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4903: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex975_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4904: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4905: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex975_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex976_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4906: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex976_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4907: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4908: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex976_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex977_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4909: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex977_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4910: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4911: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex977_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex978_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4912: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex978_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4913: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4914: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex978_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex979_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4915: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex979_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4916: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4917: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex979_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex980_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4918: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex980_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4919: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4920: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex980_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex981_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4921: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex981_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4922: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4923: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex981_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex982_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4924: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex982_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4925: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4926: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex982_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex983_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4927: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex983_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4928: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4929: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex983_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex984_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4930: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex984_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4931: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4932: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex984_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex985_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4933: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex985_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4934: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4935: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex985_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex986_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4936: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex986_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4937: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4938: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex986_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex987_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4939: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex987_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4940: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4941: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex987_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex988_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4942: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex988_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4943: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4944: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex988_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex989_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4945: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex989_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4946: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4947: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex989_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex990_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4948: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex990_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4949: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4950: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex990_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Number+BigInteger:SetUInt64(byref,ulong) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov x2, #0xD1FFAB1E cmp x1, x2 bhi G_M000_IG06 G_M000_IG03: cbnz w1, G_M000_IG04 str wzr, [x0] b G_M000_IG05 G_M000_IG04: str w1, [x0, #0x04] mov w1, #1 str w1, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: str w1, [x0, #0x04] lsr x1, x1, #32 str w1, [x0, #0x08] mov w1, #2 str w1, [x0] G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 80 4951: JIT compiled System.Number+BigInteger:SetUInt64(byref,ulong) [Tier1, IL size=55, code size=80] ; Assembly listing for method System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex991_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) fp, lr, ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows [; optimized code sp, #-0x10]!; fp based frame ; partially interruptible ; No PGO data mov fp, sp G_M000_IG02: ldr w2, [x0, #0x14] add w2, w2, #1 str w2, [x0, #0x14] ldr x2, [x0, #0x08] ldr w3, [x0, #0x10] ldr w4, [x2, #0x08] cmp w4, w3 bls G_M000_IG05 G_M000_IG03: add w4, w3, #1 str w4, [x0, #0x10] ubfiz x0, x3, #5, #32 add x0, x0, #16 add x0, x2, x0 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 100 4952: JIT compiled System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement) [Tier1, IL size=60, code size=100] G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4953: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex991_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4954: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 4955: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex991_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex992_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4956: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex992_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4957: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 4958: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex992_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex993_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4959: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex993_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4960: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4961: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex993_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex994_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4962: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex994_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4963: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 4964: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex994_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex995_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4965: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex995_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4966: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 4967: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex995_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex996_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4968: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex996_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4969: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4970: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex996_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex997_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4971: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex997_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4972: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 4973: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex997_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex998_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4974: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex998_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4975: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 4976: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex998_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex999_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4977: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex999_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 4978: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 4979: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex999_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4980: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 4981: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 4982: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1000_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4983: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 4984: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 4985: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1001_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4986: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 4987: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 4988: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1002_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4989: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 4990: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 4991: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1003_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4992: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4993: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 4994: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1004_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4995: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 4996: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 4997: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1005_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 4998: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 4999: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5000: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1006_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5001: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5002: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5003: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1007_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5004: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5005: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5006: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1008_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5007: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5008: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5009: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1009_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5010: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5011: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5012: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1010_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5013: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5014: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5015: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1011_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5016: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5017: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5018: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1012_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5019: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5020: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5021: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1013_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5022: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5023: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5024: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1014_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5025: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5026: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5027: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1015_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5028: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5029: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5030: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1016_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5031: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5032: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5033: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1017_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5034: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5035: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5036: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1018_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5037: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5038: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5039: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1019_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5040: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5041: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5042: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1020_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5043: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5044: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5045: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1021_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5046: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5047: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5048: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1022_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5049: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5050: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5051: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1023_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5052: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5053: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5054: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1024_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5055: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5056: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5057: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1025_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5058: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5059: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5060: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1026_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5061: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5062: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5063: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1027_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5064: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5065: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5066: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1028_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5067: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5068: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5069: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1029_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5070: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5071: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5072: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1030_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5073: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5074: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5075: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1031_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5076: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5077: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5078: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1032_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5079: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5080: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5081: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1033_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5082: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5083: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5084: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1034_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5085: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5086: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5087: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1035_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5088: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5089: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5090: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1036_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5091: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5092: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5093: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1037_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5094: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5095: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5096: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1038_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5097: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5098: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5099: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1039_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5100: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5101: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5102: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1040_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5103: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5104: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5105: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1041_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5106: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5107: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5108: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1042_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5109: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5110: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5111: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1043_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5112: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5113: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5114: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1044_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5115: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5116: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5117: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1045_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5118: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5119: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5120: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1046_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5121: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5122: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5123: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1047_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5124: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5125: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5126: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1048_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5127: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5128: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5129: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1049_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5130: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5131: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5132: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1050_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Engines.HostExtensions:AfterMainRun(BenchmarkDotNet.Engines.IHost) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov w1, #3 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5133: JIT compiled BenchmarkDotNet.Engines.HostExtensions:AfterMainRun(BenchmarkDotNet.Engines.IHost) [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:GetExtraStats(BenchmarkDotNet.Engines.IterationData):System.ValueTuple`3[BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: sub sp, sp, #0xD1FFAB1E stp fp, lr, [sp] mov fp, sp movi v16.16b, #0 add x9, fp, #80 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] str x8, [fp, #0xD1FFAB1E] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] blr x1 add x8, fp, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x8, fp, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw x1, w0 ldr x0, [fp, #0xD1FFAB1E] cmp x1, #0 beq G_M000_IG12 cmn x1, #1 bne G_M000_IG03 cmp x0, #1 bvs G_M000_IG11 G_M000_IG03: sdiv x1, x0, x1 str x1, [fp, #0xD8] ldr x1, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] ldr x2, [fp, #0xD1FFAB1E] ldr x2, [x2, #0x18] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 add x8, fp, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 add x8, fp, #0xD1FFAB1E movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] mul x0, x0, x1 str x0, [fp, #0xD1FFAB1E] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0xB8] ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0xC8] G_M000_IG04: add x0, fp, #0xD1FFAB1E ldp x1, x8, [x0, #0x98] stp x1, x8, [fp, #0x98] ldp x1, x8, [x0, #0xA8] stp x1, x8, [fp, #0xA8] G_M000_IG05: add x0, fp, #184 add x1, fp, #152 add x8, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E add x8, fp, #0xD1FFAB1E ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x80] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x90] G_M000_IG06: add x0, fp, #0xD1FFAB1E ldp x1, x8, [x0, #0x68] stp x1, x8, [fp, #0x68] ldr x1, [x0, #0x78] str x1, [fp, #0x78] G_M000_IG07: add x0, fp, #128 add x1, fp, #104 add x8, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0xD1FFAB1E] mul x1, x0, x1 str x1, [fp, #0x60] ldr x1, [fp, #0x60] add x8, fp, #0xD1FFAB1E add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movi v16.16b, #0 stp q16, q16, [fp, #0xE0] stp q16, q16, [fp, #0xD1FFAB1E] G_M000_IG08: add x0, fp, #232 ldp q16, q17, [x0, #0x40] stp q16, q17, [fp, #0x40] G_M000_IG09: ldp x0, x1, [fp, #0xD1FFAB1E] stp x0, x1, [fp, #0x28] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x38] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 scvtf d0, x0 ldr x1, [fp, #0xD1FFAB1E] scvtf d16, x1 fdiv d0, d0, d16 str d0, [fp, #0x20] ldr d0, [fp, #0x20] add x1, fp, #64 add x2, fp, #40 add x0, fp, #224 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldp q16, q17, [fp, #0xE0] stp q16, q17, [x0] ldp q16, q17, [fp, #0xD1FFAB1E] stp q16, q17, [x0, #0x20] G_M000_IG10: ldp fp, lr, [sp] add sp, sp, #0xD1FFAB1E ret lr G_M000_IG11: bl CORINFO_HELP_OVERFLOW G_M000_IG12: bl CORINFO_HELP_THROWDIVZERO brk_windows #0 ; Total bytes of code 1032 5134: JIT compiled BenchmarkDotNet.Engines.Engine:GetExtraStats(BenchmarkDotNet.Engines.IterationData) [Tier0, IL size=179, code size=1032] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:EnableMonitoring() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG05 mov w0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 96 5135: JIT compiled BenchmarkDotNet.Engines.Engine:EnableMonitoring() [Tier0, IL size=22, code size=96] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:ReadInitial():BenchmarkDotNet.Engines.ThreadingStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x8, [fp, #0x48] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] blr x1 str x0, [fp, #0x40] stp xzr, xzr, [fp, #0x28] str xzr, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #40 ldr x2, [fp, #0x40] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x48] ldp x1, x2, [fp, #0x28] stp x1, x2, [x0] ldr x1, [fp, #0x38] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 224 5136: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:ReadInitial() [Tier0, IL size=30, code size=224] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 144 5137: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:.cctor() [Tier0, IL size=51, code size=144] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:CreateGetterDelegate(System.Type,System.String):System.Func`1[long] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] ldr x1, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] mov x1, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x38] ldr x0, [fp, #0x38] str x0, [fp, #0x40] ldr x0, [fp, #0x38] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0x30] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x30] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x30] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [fp, #0x20] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x10] blr x2 str x0, [fp, #0x18] ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] G_M000_IG05: ldr x0, [fp, #0x40] G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 436 5138: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:CreateGetterDelegate(System.Type,System.String) [Tier0, IL size=76, code size=436] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:.ctor(long,long,long):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str x3, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] str x1, [x0] ldr x0, [fp, #0x28] ldr x1, [fp, #0x18] str x1, [x0, #0x08] ldr x0, [fp, #0x28] ldr x1, [fp, #0x10] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 5139: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:.ctor(long,long,long) [Tier0, IL size=22, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.ExceptionsStats:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5140: JIT compiled BenchmarkDotNet.Engines.ExceptionsStats:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.ExceptionsStats:StartListening():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 144 5141: JIT compiled BenchmarkDotNet.Engines.ExceptionsStats:StartListening() [Tier0, IL size=23, code size=144] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:ReadInitial():BenchmarkDotNet.Engines.GcStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x40] str x8, [fp, #0x48] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x40] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x3C] mov w0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x38] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x14] ldr w3, [fp, #0x14] add x0, fp, #24 ldr w1, [fp, #0x3C] ldr w2, [fp, #0x38] ldr x4, [fp, #0x40] mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x48] G_M000_IG03: add x1, fp, #24 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 200 5142: JIT compiled BenchmarkDotNet.Engines.GcStats:ReadInitial() [Tier0, IL size=33, code size=200] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:GetAllocatedBytes():long ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG04 mov x0, xzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG06 mov x0, xzr G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG08: mov w0, #1 bl System.GC:GetTotalAllocatedBytes(bool):long G_M000_IG09: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 192 5143: JIT compiled BenchmarkDotNet.Engines.GcStats:GetAllocatedBytes() [Tier0, IL size=50, code size=192] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5144: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5145: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5146: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1051_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5147: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5148: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5149: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1052_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5150: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5151: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5152: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1053_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5153: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5154: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5155: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1054_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5156: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5157: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5158: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1055_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5159: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5160: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5161: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1056_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5162: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5163: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5164: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1057_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5165: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5166: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5167: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1058_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5168: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5169: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5170: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1059_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5171: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5172: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5173: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1060_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5174: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5175: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5176: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1061_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5177: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5178: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5179: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1062_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5180: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5181: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5182: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1063_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5183: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5184: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5185: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1064_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5186: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5187: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5188: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1065_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5189: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5190: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5191: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1066_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5192: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5193: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5194: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1067_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5195: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5196: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5197: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1068_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5198: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5199: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5200: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1069_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5201: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5202: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5203: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1070_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5204: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5205: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5206: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1071_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5207: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5208: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5209: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1072_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5210: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5211: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5212: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1073_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5213: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5214: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5215: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1074_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5216: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5217: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5218: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1075_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5219: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5220: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5221: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1076_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5222: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5223: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5224: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1077_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5225: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5226: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5227: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1078_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5228: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5229: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5230: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1079_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5231: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5232: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5233: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1080_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5234: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5235: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5236: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1081_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5237: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5238: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5239: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1082_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5240: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5241: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5242: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1083_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5243: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5244: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5245: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1084_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5246: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5247: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5248: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1085_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5249: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5250: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5251: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1086_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5252: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5253: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5254: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1087_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5255: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5256: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5257: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1088_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5258: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5259: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5260: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1089_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5261: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5262: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5263: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1090_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5264: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5265: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5266: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1091_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5267: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5268: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5269: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1092_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5270: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5271: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5272: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1093_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5273: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5274: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5275: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1094_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5276: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5277: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5278: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1095_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5279: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #1 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w3, w21, w20 mov w1, #10 mov w2, #62 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 168 5280: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=74, code size=168] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 7 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x19, x0 G_M000_IG02: sxtw w20, w2 ldr w21, [x19, #0x4C] cmp w21, w20 bhi G_M000_IG11 ubfiz x0, x21, #1, #32 add x22, x1, x0 mov x23, x22 sub w24, w20, w21 cmp w24, #0 bls G_M000_IG04 G_M000_IG03: ldrh w0, [x23] cmp w0, #62 bne G_M000_IG04 cmp w24, #1 blo G_M000_IG11 add x0, x23, #2 sub w2, w24, #1 mov w1, #10 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w24, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w24 bhi G_M000_IG11 ubfiz x1, x0, #1, #32 add x23, x23, x1 sub w24, w24, w0 add w0, w21, w0 cmp w24, #1 bls G_M000_IG04 ldrh w1, [x23, #0x02] cmp w1, #10 bne G_M000_IG04 add w0, w0, #2 cmp w0, w20 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w24, w20, w21 mov x23, x22 cmp w24, #0 bls G_M000_IG09 ldrh w0, [x23] cmp w0, #10 bne G_M000_IG09 add w0, w21, #1 cmp w0, w20 bhi G_M000_IG11 G_M000_IG05: str w0, [x19, #0x4C] sxtw w20, w0 cmp w20, w21 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w20, w21 ldr x0, [x19, #0x28] mov w2, w21 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 444 5281: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1096_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=232, code size=444] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5282: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5283: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 str x1, [fp, #0x28] str w3, [fp, #0x30] add x1, fp, #40 ldr x3, [x1] ldr w1, [x1, #0x08] cmp w1, #8 blt G_M000_IG04 G_M000_IG03: ldr q16, [x3] ldr q17, [@RWD00] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x1, v16.d[0] cmp x1, #0 cset x1, eq cbz w1, G_M000_IG04 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 b G_M000_IG05 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #8 blt G_M000_IG09 ldr q16, [x1] ldr q17, [@RWD16] eor v16.2d, v16.2d, v17.2d umaxp v16.4s, v16.4s, v16.4s umov x0, v16.d[0] cmp x0, #0 cset x0, eq cbz w0, G_M000_IG09 add w1, w20, #8 cmp w1, w2 bhi G_M000_IG11 G_M000_IG05: str w1, [x19, #0x4C] sxtw w21, w1 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 0067006700670061h, 0061006100610074h RWD16 dq 0061007400740074h, 0074006300630063h ; Total bytes of code 424 5284: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1097_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=150, code size=424] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5285: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5286: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #1 blo G_M000_IG15 add x1, x1, #2 sub w3, w3, #1 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #103 LSL #32 movk x4, #116 LSL #48 eor x3, x3, x4 ldr x1, [x1, #0x06] movz x4, #116 movk x4, #97 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x1, x1, x4 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr x3, [x3, #0x06] movz x4, #97 movk x4, #99 LSL #16 movk x4, #99 LSL #32 movk x4, #99 LSL #48 eor x3, x3, x4 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0E] orr w0, w4, #2 mov w1, #103 cmp w0, #99 ccmp w4, w1, z, ne bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5287: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1098_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5288: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5289: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: ldrh w4, [x1] cmp w4, #97 bne G_M000_IG06 ldrh w4, [x1, #0x02] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG06 cmp w3, #2 blo G_M000_IG15 add x1, x1, #4 sub w3, w3, #2 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x1] movz x4, #103 movk x4, #103 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x08] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG06 G_M000_IG05: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 str x1, [fp, #0x28] str w3, [fp, #0x30] add x0, fp, #40 ldr x3, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x3] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 eor x0, x0, x4 ldr w3, [x3, #0x08] movz w4, #99 movk w4, #99 LSL #16 eor w3, w3, w4 mov w3, w3 orr x0, x0, x3 cbnz x0, G_M000_IG13 G_M000_IG08: ldrh w4, [x1, #0x0C] mov w0, #103 mov w3, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w3, z, ne bne G_M000_IG13 ldrh w0, [x1, #0x0E] cmp w0, #116 bne G_M000_IG13 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 576 5290: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1099_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=275, code size=576] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5291: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5292: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #2 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w5, #97 movk w5, #103 LSL #16 cmp w4, w5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x04] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #3 blo G_M000_IG19 add x1, x1, #6 sub w3, w3, #3 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #5 blt G_M000_IG08 G_M000_IG06: ldr x3, [x1] movz x4, #103 movk x4, #116 LSL #16 movk x4, #97 LSL #32 movk x4, #97 LSL #48 eor x3, x3, x4 ldr w1, [x1, #0x06] movz w4, #97 movk w4, #97 LSL #16 eor w1, w1, w4 mov w1, w1 orr x1, x3, x1 cbnz x1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x5, #116 movk x5, #116 LSL #16 movk x5, #116 LSL #32 movk x5, #97 LSL #48 eor x0, x0, x5 ldr w4, [x4, #0x06] movz w5, #97 movk w5, #99 LSL #16 eor w4, w4, w5 mov w4, w4 orr x0, x0, x4 cbnz x0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x0A] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #6 blo G_M000_IG19 add x0, x1, #12 sub w1, w3, #6 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w1, #99 movk w1, #116 LSL #16 cmp w0, w1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 664 5293: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1100_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=664] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5294: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5295: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #3 blt G_M000_IG08 G_M000_IG04: ldr w4, [x5] movz w6, #97 movk w6, #103 LSL #16 eor w4, w4, w6 ldr w5, [x5, #0x02] add w6, w6, #6 eor w5, w5, w6 orr w4, w4, w5 cbnz w4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x06] orr w5, w4, #2 mov w6, #116 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #4 blo G_M000_IG19 add x1, x1, #8 sub w3, w3, #4 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #4 blt G_M000_IG08 G_M000_IG06: ldr x1, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #97 LSL #32 movk x3, #97 LSL #48 cmp x1, x3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG09: ldr x0, [x4] movz x4, #116 movk x4, #116 LSL #16 movk x4, #116 LSL #32 movk x4, #97 LSL #48 cmp x0, x4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x08] mov w0, #103 mov w5, #116 cmp w4, #97 ccmp w4, w0, z, ne ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #5 blo G_M000_IG19 add x0, x1, #10 sub w1, w3, #5 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG11: ldr w0, [x1] movz w3, #99 movk w3, #99 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5296: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1101_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=299, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5297: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #1 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #103 mov w2, #116 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5298: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #4 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 cmp x4, x5 bne G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x08] orr w5, w4, #2 mov w6, #103 cmp w5, #99 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #5 blo G_M000_IG19 add x1, x1, #10 sub w3, w3, #5 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #3 blt G_M000_IG08 G_M000_IG06: ldr w3, [x1] movz w4, #97 movk w4, #97 LSL #16 eor w3, w3, w4 ldr w1, [x1, #0x02] eor w1, w1, w4 orr w1, w3, w1 cbnz w1, G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w5, #116 movk w5, #116 LSL #16 eor w0, w0, w5 ldr w4, [x4, #0x02] eor w4, w4, w5 orr w0, w0, w4 cbnz w0, G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x06] orr w0, w4, #4 mov w5, #116 cmp w0, #103 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #4 blo G_M000_IG19 add x0, x1, #8 sub w1, w3, #4 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #4 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x1, #99 movk x1, #99 LSL #16 movk x1, #99 LSL #32 movk x1, #116 LSL #48 cmp x0, x1 bne G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 636 5299: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1102_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=636] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5300: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #6 cmp w1, w23 bhs G_M000_IG03 add w2, w24, #1 cmp w2, w23 bhs G_M000_IG13 ldrh w0, [x22, w2, UXTW #2] mov w3, #116 cmp w0, #103 ccmp w0, w3, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: sxtw w24, w2 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5301: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 8 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x58] str x21, [sp, #0x68] mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG19 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG08 G_M000_IG03: str x1, [fp, #0x28] str w3, [fp, #0x30] add x4, fp, #40 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w4, #5 blt G_M000_IG08 G_M000_IG04: ldr x4, [x5] movz x6, #97 movk x6, #103 LSL #16 movk x6, #103 LSL #32 movk x6, #103 LSL #48 eor x4, x4, x6 ldr w5, [x5, #0x06] movz w6, #103 movk w6, #116 LSL #16 eor w6, w5, w6 mov w5, w6 orr x4, x4, x5 cbnz x4, G_M000_IG08 G_M000_IG05: ldrh w4, [x1, #0x0A] orr w5, w4, #4 mov w6, #116 cmp w5, #103 ccmp w4, w6, z, ne bne G_M000_IG08 cmp w3, #6 blo G_M000_IG19 add x1, x1, #12 sub w3, w3, #6 str x1, [fp, #0x18] str w3, [fp, #0x20] add x4, fp, #24 ldr x1, [x4] ldr w3, [x4, #0x08] cmp w3, #2 blt G_M000_IG08 G_M000_IG06: ldr w1, [x1] movz w3, #97 movk w3, #97 LSL #16 cmp w1, w3 bne G_M000_IG08 G_M000_IG07: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 b G_M000_IG13 G_M000_IG08: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG17 str x1, [fp, #0x48] str w3, [fp, #0x50] add x0, fp, #72 ldr x4, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG17 G_M000_IG09: ldr w0, [x4] movz w6, #103 movk w6, #116 LSL #16 add w4, w6, #13 cmp w0, w4 bne G_M000_IG17 G_M000_IG10: ldrh w4, [x1, #0x04] orr w0, w4, #2 mov w5, #103 cmp w0, #99 ccmp w4, w5, z, ne bne G_M000_IG17 cmp w3, #3 blo G_M000_IG19 add x0, x1, #6 sub w1, w3, #3 str x0, [fp, #0x38] str w1, [fp, #0x40] add x0, fp, #56 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #5 blt G_M000_IG17 G_M000_IG11: ldr x0, [x1] movz x3, #97 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x06] sub w3, w6, #4 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG17 G_M000_IG12: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG19 G_M000_IG13: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG14 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG14: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG15 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG20 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG16: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG17: mov w0, wzr G_M000_IG18: ldr x21, [sp, #0x68] ldp x19, x20, [sp, #0x58] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG20: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 660 5302: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1103_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=294, code size=660] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5303: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #5 cmp w1, w23 bhs G_M000_IG03 add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: ldrh w0, [x22, w1, UXTW #2] orr w0, w0, #2 cmp w0, #99 beq G_M000_IG10 G_M000_IG08: add w24, w24, #1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 324 5304: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=193, code size=324] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #6 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr w4, [x4, #0x08] movz w5, #116 movk w5, #97 LSL #16 eor w4, w4, w5 mov w4, w4 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0C] orr w4, w3, #4 mov w5, #116 cmp w4, #103 ccmp w3, w5, z, ne bne G_M000_IG06 ldrh w1, [x1, #0x0E] cmp w1, #97 bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] cmp w0, #116 bne G_M000_IG13 ldrh w0, [x1, #0x02] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #2 blo G_M000_IG15 add x0, x1, #4 sub w1, w3, #2 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #6 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #97 LSL #16 movk x3, #99 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr w1, [x1, #0x08] movz w3, #99 movk w3, #116 LSL #16 eor w1, w1, w3 mov w1, w1 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 572 5305: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1104_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=270, code size=572] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5306: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #8 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #7 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #3 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w3, w23, w0 mov x0, x1 mov w1, #97 mov w2, #103 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: add w0, w24, #2 cmp w0, w23 bhs G_M000_IG13 ldrh w0, [x22, w0, UXTW #2] mov w2, #116 cmp w0, #103 ccmp w0, w2, z, ne beq G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 328 5307: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=183, code size=328] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 6 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x38] str x21, [sp, #0x48] mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x30] str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG15 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #7 bls G_M000_IG06 G_M000_IG03: str x1, [fp, #0x18] str w3, [fp, #0x20] add x3, fp, #24 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w3, #7 blt G_M000_IG06 G_M000_IG04: ldr x3, [x4] movz x5, #97 movk x5, #103 LSL #16 movk x5, #103 LSL #32 movk x5, #103 LSL #48 eor x3, x3, x5 ldr x4, [x4, #0x06] movz x5, #103 movk x5, #116 LSL #16 movk x5, #97 LSL #32 movk x5, #97 LSL #48 eor x4, x4, x5 orr x3, x3, x4 cbnz x3, G_M000_IG06 G_M000_IG05: ldrh w3, [x1, #0x0E] orr w1, w3, #4 mov w4, #116 cmp w1, #103 ccmp w3, w4, z, ne bne G_M000_IG06 add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 b G_M000_IG09 G_M000_IG06: sub w3, w2, w20 mov x1, x0 cmp w3, #7 bls G_M000_IG13 ldrh w0, [x1] orr w4, w0, #2 mov w5, #103 cmp w4, #99 ccmp w0, w5, z, ne bne G_M000_IG13 cmp w3, #1 blo G_M000_IG15 add x0, x1, #2 sub w1, w3, #1 str x0, [fp, #0x28] str w1, [fp, #0x30] add x0, fp, #40 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #7 blt G_M000_IG13 G_M000_IG07: ldr x0, [x1] movz x3, #116 movk x3, #116 LSL #16 movk x3, #97 LSL #32 movk x3, #99 LSL #48 eor x0, x0, x3 ldr x1, [x1, #0x06] movz x3, #99 movk x3, #99 LSL #16 movk x3, #99 LSL #32 movk x3, #116 LSL #48 eor x1, x1, x3 orr x0, x0, x1 cbnz x0, G_M000_IG13 G_M000_IG08: add w0, w20, #8 cmp w0, w2 bhi G_M000_IG15 G_M000_IG09: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG10 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG10: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG11 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG16 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG12: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG13: mov w0, wzr G_M000_IG14: ldr x21, [sp, #0x48] ldp x19, x20, [sp, #0x38] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG15: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG16: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 556 5308: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1105_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=238, code size=556] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5309: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #4 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w21, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #12 mov w3, #3 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 184 5310: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=78, code size=184] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG11 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w1, w2, w20 cmp w1, #3 bls G_M000_IG09 G_M000_IG03: str x0, [fp, #0x18] str w1, [fp, #0x20] add x1, fp, #24 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w1, #3 blt G_M000_IG09 G_M000_IG04: ldr w1, [x2] movz w3, #116 movk w3, #72 LSL #16 eor w1, w1, w3 ldr w2, [x2, #0x02] movz w3, #72 movk w3, #97 LSL #16 eor w2, w2, w3 orr w1, w1, w2 cbnz w1, G_M000_IG09 G_M000_IG05: ldrh w0, [x0, #0x06] mov w1, #116 cmp w0, #78 ccmp w0, w1, z, ne bne G_M000_IG09 add w0, w20, #4 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG06 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG06: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG07 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG12 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG08: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG09: mov w0, wzr G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 360 5311: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1106_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=117, code size=360] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5312: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG12 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #2 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: add w0, w24, #2 cmp w0, w23 bhi G_M000_IG12 ubfiz x1, x0, #1, #32 add x1, x22, x1 sub w4, w23, w0 mov x0, x1 mov w1, #68 mov w2, #78 mov w3, #83 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG13 ldrh w0, [x22, w1, UXTW #2] mov w2, #97 cmp w0, #78 ccmp w0, w2, z, ne bne G_M000_IG08 G_M000_IG07: cmp w24, w23 bhs G_M000_IG13 ldrh w0, [x22, w24, UXTW #2] sub w0, w0, #72 uxth w0, w0 sxth w2, w0 movz w3, #80 movk w3, #0xD1FFAB1E LSL #16 lsl w2, w3, w2 sub w0, w0, #32 and w0, w2, w0 tbnz w0, #31, G_M000_IG10 G_M000_IG08: sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG09: b G_M000_IG03 G_M000_IG10: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG11: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG13: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 348 5313: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=205, code size=348] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 12 inlinees with PGO data; 12 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x50] stp x21, x22, [sp, #0x60] stp x23, x24, [sp, #0x70] mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG22 ubfiz x0, x20, #1, #32 add x21, x1, x0 mov x0, x21 sub w22, w2, w20 sxtw w1, w22 str x0, [fp, #0x40] str w1, [fp, #0x48] add x0, fp, #64 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 bge G_M000_IG05 G_M000_IG03: mov x0, x21 sxtw w1, w22 str x0, [fp, #0x30] str w1, [fp, #0x38] add x0, fp, #48 ldr x23, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG07 G_M000_IG04: b G_M000_IG09 G_M000_IG05: ldr w0, [x1] movz w3, #97 movk w3, #78 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #78 movk w3, #68 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG03 G_M000_IG06: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG07: mov x1, x21 sxtw w0, w22 cmp w0, #2 bls G_M000_IG13 str x1, [fp, #0x10] str w0, [fp, #0x18] add x0, fp, #16 ldr x24, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG13 G_M000_IG08: b G_M000_IG11 G_M000_IG09: ldr w0, [x23] movz w1, #99 movk w1, #97 LSL #16 eor w0, w0, w1 ldr w1, [x23, #0x02] movz w3, #97 movk w3, #78 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG07 G_M000_IG10: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG11: ldr w0, [x24] movz w3, #72 movk w3, #97 LSL #16 cmp w0, w3 bne G_M000_IG13 G_M000_IG12: ldrh w0, [x1, #0x04] mov w1, #83 cmp w0, #68 ccmp w0, w1, z, ne bne G_M000_IG13 add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 b G_M000_IG16 G_M000_IG13: str x21, [fp, #0x20] str w22, [fp, #0x28] add x0, fp, #32 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #3 blt G_M000_IG20 G_M000_IG14: ldr w0, [x1] movz w3, #87 movk w3, #97 LSL #16 eor w0, w0, w3 ldr w1, [x1, #0x02] movz w3, #97 movk w3, #83 LSL #16 eor w1, w1, w3 orr w0, w0, w1 cbnz w0, G_M000_IG20 G_M000_IG15: add w0, w20, #3 cmp w0, w2 bhi G_M000_IG22 G_M000_IG16: str w0, [x19, #0x4C] sxtw w23, w0 cmp w23, w20 bge G_M000_IG17 mov w0, w20 mov w20, w23 mov w23, w0 G_M000_IG17: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG18 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG18: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG23 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w23, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG19: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG20: mov w0, wzr G_M000_IG21: ldp x23, x24, [sp, #0x70] ldp x21, x22, [sp, #0x60] ldp x19, x20, [sp, #0x50] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 652 5314: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1107_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=308, code size=652] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5315: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG10 ubfiz x0, x20, #1, #32 add x22, x1, x0 sub w23, w21, w20 mov w24, wzr sub w25, w23, #1 cmp w25, #0 ble G_M000_IG03 G_M000_IG06: cmp w24, w23 bhi G_M000_IG10 ubfiz x0, x24, #1, #32 add x0, x22, x0 sub w3, w23, w24 mov w1, #66 mov w2, #97 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 add w24, w24, w0 tbnz w0, #31, G_M000_IG03 add w1, w24, #1 cmp w1, w23 bhs G_M000_IG03 ldrh w0, [x22, w1, UXTW #2] sub w0, w0, #78 mov w0, w0 movz x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #48 lsl x2, x2, x0 sub x0, x0, #64 and x0, x2, x0 tbnz x0, #63, G_M000_IG08 sxtw w24, w1 cmp w24, w25 blt G_M000_IG06 G_M000_IG07: b G_M000_IG03 G_M000_IG08: add w0, w20, w24 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG09: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 296 5316: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=296] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 5 inlinees with PGO data; 5 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x20] mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG13 ubfiz x0, x20, #1, #32 add x0, x1, x0 mov x1, x0 sub w3, w2, w20 cmp w3, #1 bls G_M000_IG04 G_M000_IG03: ldrh w3, [x1] cmp w3, #97 bne G_M000_IG04 ldrh w1, [x1, #0x02] mov w3, #83 mov w4, #116 cmp w1, #78 ccmp w1, w3, z, ne ccmp w1, w4, z, ne bne G_M000_IG04 add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 b G_M000_IG07 G_M000_IG04: sub w1, w2, w20 str x0, [fp, #0x18] str w1, [fp, #0x20] add x0, fp, #24 ldr x1, [x0] ldr w0, [x0, #0x08] cmp w0, #2 blt G_M000_IG11 G_M000_IG05: ldr w0, [x1] movz w1, #66 movk w1, #89 LSL #16 cmp w0, w1 bne G_M000_IG11 G_M000_IG06: add w0, w20, #2 cmp w0, w2 bhi G_M000_IG13 G_M000_IG07: str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG08 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG08: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG09 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG14 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG10: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: mov w0, wzr G_M000_IG12: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG14: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 392 5317: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1108_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=187, code size=392] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5318: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #2 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #60 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5319: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #60 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #62 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #62 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 372 5320: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1109_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=156, code size=372] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 mov x21, x1 mov w20, w2 G_M000_IG02: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbz w0, G_M000_IG04 G_M000_IG03: mov x1, x21 mov w2, w20 mov x0, x19 bl System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool cbnz w0, G_M000_IG04 ldr w0, [x19, #0x4C] cmp w0, w20 beq G_M000_IG04 add w0, w0, #1 str w0, [x19, #0x4C] b G_M000_IG02 G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 108 5321: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_Scan(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=67, code size=108] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] sxtw w21, w2 sub w0, w21, #3 cmp w20, w0 ble G_M000_IG05 G_M000_IG03: str w21, [x19, #0x4C] mov w0, wzr G_M000_IG04: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: cmp w20, w21 bhi G_M000_IG07 ubfiz x0, x20, #1, #32 add x0, x1, x0 sub w2, w21, w20 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG03 add w0, w20, w0 str w0, [x19, #0x4C] mov w0, #1 G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 164 5322: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryFindNextPossibleStartingPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=72, code size=164] ; Assembly listing for method System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 4 inlinees with PGO data; 7 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w20, [x19, #0x4C] cmp w20, w2 bhi G_M000_IG09 ubfiz x0, x20, #1, #32 add x21, x1, x0 sub w22, w2, w20 cmp w22, #0 bls G_M000_IG07 G_M000_IG03: ldrh w0, [x21] cmp w0, #124 bne G_M000_IG07 cmp w22, #1 blo G_M000_IG09 add x0, x21, #2 sub w2, w22, #1 mov w1, #124 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w1, w22, #1 cmp w0, #0 csel w0, w0, w1, ge cmp w0, #0 ble G_M000_IG07 cmp w0, w22 bhi G_M000_IG09 ubfiz x1, x0, #1, #32 add x21, x21, x1 sub w22, w22, w0 add w0, w20, w0 cmp w22, #1 bls G_M000_IG07 ldrh w1, [x21, #0x02] cmp w1, #124 bne G_M000_IG07 add w0, w0, #2 str w0, [x19, #0x4C] sxtw w21, w0 cmp w21, w20 bge G_M000_IG04 mov w0, w20 mov w20, w21 mov w21, w0 G_M000_IG04: ldr w0, [x19, #0x58] cbnz w0, G_M000_IG05 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr x3, [x19, #0x20] ldr w0, [x19, #0x58] sub w0, w0, #1 str w0, [x19, #0x58] ldr w2, [x3, #0x08] cmp w0, w2 bhs G_M000_IG10 add x3, x3, #16 str wzr, [x3, w0, UXTW #2] sub w3, w21, w20 ldr x0, [x19, #0x28] mov w2, w20 mov w1, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr wzr, [x0] blr x4 mov w0, #1 G_M000_IG06: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov w0, wzr G_M000_IG08: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 380 5323: JIT compiled System.Text.RegularExpressions.CompiledRegexRunner:Regex1110_TryMatchAtCurrentPosition(System.Text.RegularExpressions.RegexRunner,System.ReadOnlySpan`1[ushort]) [FullOpts, IL size=164, code size=380] ; Assembly listing for method BenchmarkDotNet.Engines.ExceptionsStats:Stop():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 144 5324: JIT compiled BenchmarkDotNet.Engines.ExceptionsStats:Stop() [Tier0, IL size=23, code size=144] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:ReadFinal():BenchmarkDotNet.Engines.GcStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x8, [fp, #0x48] G_M000_IG02: mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x44] mov w0, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x40] mov w0, #2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x3C] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x4, [fp, #0x10] add x0, fp, #24 ldr w1, [fp, #0x44] ldr w2, [fp, #0x40] ldr w3, [fp, #0x3C] mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x48] G_M000_IG03: add x1, fp, #24 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 196 5325: JIT compiled BenchmarkDotNet.Engines.GcStats:ReadFinal() [Tier0, IL size=31, code size=196] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:ReadFinal():BenchmarkDotNet.Engines.ThreadingStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x8, [fp, #0x48] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr x1, [fp, #0x18] ldr x1, [x1, #0x18] blr x1 str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 str x0, [fp, #0x40] stp xzr, xzr, [fp, #0x20] str xzr, [fp, #0x30] add x0, fp, #32 ldr x1, [fp, #0x38] ldr x2, [fp, #0x40] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x48] ldp x1, x2, [fp, #0x20] stp x1, x2, [x0] ldr x1, [fp, #0x30] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 184 5326: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:ReadFinal() [Tier0, IL size=30, code size=184] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:op_Subtraction(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.GcStats):BenchmarkDotNet.Engines.GcStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp str x0, [fp, #0x90] str x1, [fp, #0x88] str x8, [fp, #0x98] G_M000_IG02: ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x84] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x84] sub w1, w1, w0 str w1, [fp, #0x34] ldr w1, [fp, #0x34] mov w0, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x80] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x7C] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x7C] sub w1, w1, w0 str w1, [fp, #0x30] ldr w1, [fp, #0x30] mov w0, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x78] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x74] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x74] sub w1, w1, w0 str w1, [fp, #0x2C] ldr w1, [fp, #0x2C] mov w0, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x70] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x68] sub x1, x1, x0 str x1, [fp, #0x20] ldr x1, [fp, #0x20] mov x0, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x0, [fp, #0x90] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x58] stp xzr, xzr, [fp, #0x38] stp xzr, xzr, [fp, #0x48] ldr x0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x58] sub x1, x1, x0 str x1, [fp, #0x18] ldr x1, [fp, #0x18] mov x0, xzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x5, [fp, #0x10] add x0, fp, #56 ldr w1, [fp, #0x80] ldr w2, [fp, #0x78] ldr w3, [fp, #0x70] ldr x4, [fp, #0x60] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x98] G_M000_IG03: add x1, fp, #56 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG04: ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 576 5327: JIT compiled BenchmarkDotNet.Engines.GcStats:op_Subtraction(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.GcStats) [Tier0, IL size=113, code size=576] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:get_Gen0Collections():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5328: JIT compiled BenchmarkDotNet.Engines.GcStats:get_Gen0Collections() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:get_Gen1Collections():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x04] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5329: JIT compiled BenchmarkDotNet.Engines.GcStats:get_Gen1Collections() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:get_Gen2Collections():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5330: JIT compiled BenchmarkDotNet.Engines.GcStats:get_Gen2Collections() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:get_AllocatedBytes():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5331: JIT compiled BenchmarkDotNet.Engines.GcStats:get_AllocatedBytes() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:get_TotalOperations():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5332: JIT compiled BenchmarkDotNet.Engines.GcStats:get_TotalOperations() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:WithTotalOperations(long):BenchmarkDotNet.Engines.GcStats:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xB0]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0xA8] str x1, [fp, #0x98] str x8, [fp, #0xA0] G_M000_IG02: stp xzr, xzr, [fp, #0x78] stp xzr, xzr, [fp, #0x88] ldr x0, [fp, #0xA8] ldp x1, x5, [x0] stp x1, x5, [fp, #0x58] ldp x1, x5, [x0, #0x10] stp x1, x5, [fp, #0x68] add x0, fp, #120 ldr x5, [fp, #0x98] mov w1, wzr mov w2, wzr mov w3, wzr mov x4, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x8, [fp, #0xA0] str x8, [fp, #0x10] ldp x0, x1, [fp, #0x58] stp x0, x1, [fp, #0x38] ldp x0, x1, [fp, #0x68] stp x0, x1, [fp, #0x48] ldp x0, x1, [fp, #0x78] stp x0, x1, [fp, #0x18] ldp x0, x1, [fp, #0x88] stp x0, x1, [fp, #0x28] ldr x8, [fp, #0x10] add x0, fp, #56 add x1, fp, #24 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0xB0 ret lr ; Total bytes of code 176 5333: JIT compiled BenchmarkDotNet.Engines.GcStats:WithTotalOperations(long) [Tier0, IL size=23, code size=176] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:op_Addition(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.GcStats):BenchmarkDotNet.Engines.GcStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp str x0, [fp, #0x70] str x1, [fp, #0x68] str x8, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x64] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x64] add w0, w0, w1 str w0, [fp, #0x60] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x5C] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x5C] add w0, w0, w1 str w0, [fp, #0x58] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x54] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x54] add w0, w0, w1 str w0, [fp, #0x50] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x48] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x48] add x0, x0, x1 str x0, [fp, #0x40] ldr x0, [fp, #0x70] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x5, [fp, #0x38] add x5, x0, x5 str x5, [fp, #0x10] ldr x5, [fp, #0x10] add x0, fp, #24 ldr w1, [fp, #0x60] ldr w2, [fp, #0x58] ldr w3, [fp, #0x50] ldr x4, [fp, #0x40] movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x78] G_M000_IG03: add x1, fp, #24 ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 416 5334: JIT compiled BenchmarkDotNet.Engines.GcStats:op_Addition(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.GcStats) [Tier0, IL size=81, code size=416] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:op_Subtraction(BenchmarkDotNet.Engines.ThreadingStats,BenchmarkDotNet.Engines.ThreadingStats):BenchmarkDotNet.Engines.ThreadingStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp str x0, [fp, #0x60] str x1, [fp, #0x58] str x8, [fp, #0x68] G_M000_IG02: ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x50] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x50] sub x0, x1, x0 str x0, [fp, #0x48] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x40] sub x0, x1, x0 str x0, [fp, #0x38] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] stp xzr, xzr, [fp, #0x18] str xzr, [fp, #0x28] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x3, [fp, #0x30] sub x3, x3, x0 str x3, [fp, #0x10] ldr x3, [fp, #0x10] add x0, fp, #24 ldr x1, [fp, #0x48] ldr x2, [fp, #0x38] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x68] ldp x1, x2, [fp, #0x18] stp x1, x2, [x0] ldr x1, [fp, #0x28] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 284 5335: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:op_Subtraction(BenchmarkDotNet.Engines.ThreadingStats,BenchmarkDotNet.Engines.ThreadingStats) [Tier0, IL size=51, code size=284] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:get_CompletedWorkItemCount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5336: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:get_CompletedWorkItemCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:get_LockContentionCount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5337: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:get_LockContentionCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:get_TotalOperations():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5338: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:get_TotalOperations() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:WithTotalOperations(long):BenchmarkDotNet.Engines.ThreadingStats:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x1, [fp, #0x38] str x8, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x30] stp xzr, xzr, [fp, #0x18] str xzr, [fp, #0x28] ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x2, [fp, #0x10] add x0, fp, #24 ldr x1, [fp, #0x30] ldr x3, [fp, #0x38] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x40] ldp x1, x2, [fp, #0x18] stp x1, x2, [x0] ldr x1, [fp, #0x28] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 148 5339: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:WithTotalOperations(long) [Tier0, IL size=19, code size=148] ; Assembly listing for method BenchmarkDotNet.Engines.ExceptionsStats:get_ExceptionsCount():long:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5340: JIT compiled BenchmarkDotNet.Engines.ExceptionsStats:get_ExceptionsCount() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.ValueTuple`3[BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double]:.ctor(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x20] ldr x1, [fp, #0x28] ldp x2, x3, [x0] stp x2, x3, [x1, #0x08] ldp x2, x3, [x0, #0x10] stp x2, x3, [x1, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldp x2, x3, [x0] stp x2, x3, [x1, #0x28] ldr x2, [x0, #0x10] str x2, [x1, #0x38] ldr x0, [fp, #0x28] ldr d16, [fp, #0x10] str d16, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 92 5341: JIT compiled System.ValueTuple`3[BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double]:.ctor(BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double) [Tier0, IL size=22, code size=92] ; Assembly listing for method BenchmarkDotNet.Engines.EngineEventSource:BenchmarkStop(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x2, [fp, #0x10] mov w1, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 5342: JIT compiled BenchmarkDotNet.Engines.EngineEventSource:BenchmarkStop(System.String) [Tier0, IL size=9, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:.ctor(System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement],int,BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] str x3, [fp, #0x20] str x4, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x38] ldr w15, [fp, #0x2C] str w15, [x14, #0x10] ldr x14, [fp, #0x38] ldr x15, [fp, #0x30] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldp x2, x3, [x0] stp x2, x3, [x1, #0x18] ldp x2, x3, [x0, #0x10] stp x2, x3, [x1, #0x28] ldr x0, [fp, #0x18] ldr x1, [fp, #0x38] ldp x2, x3, [x0] stp x2, x3, [x1, #0x38] ldr x2, [x0, #0x10] str x2, [x1, #0x48] ldr x0, [fp, #0x38] ldr d16, [fp, #0x10] str d16, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 124 5343: JIT compiled BenchmarkDotNet.Engines.RunResults:.ctor(System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement],int,BenchmarkDotNet.Engines.GcStats,BenchmarkDotNet.Engines.ThreadingStats,double) [Tier0, IL size=38, code size=124] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:ReportResults(BenchmarkDotNet.Engines.RunResults):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x1, [fp, #0x18] ldr x1, [x1, #0x08] ldr x0, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 5344: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:ReportResults(BenchmarkDotNet.Engines.RunResults) [Tier0, IL size=14, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:Print(System.IO.TextWriter):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 sub x9, fp, #16 mov x10, #168 stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40]! subs x10, x10, #64 bge pc-16 (-4 instructions) stp q16, q16, [x9, #0x20] str xzr, [x9, #0x40] add x2, sp, #0xD1FFAB1E str x2, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xF8] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x70] ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0xF0] mov w0, #0xD1FFAB1E str w0, [fp, #0x78] G_M000_IG03: b G_M000_IG05 G_M000_IG04: add x8, fp, #208 ldr x0, [fp, #0xF0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 add x0, fp, #208 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x1, [fp, #0x68] ldr x0, [fp, #0xF8] ldr x2, [fp, #0xF8] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x30] blr x2 G_M000_IG05: ldr w0, [fp, #0x78] sub w0, w0, #1 str w0, [fp, #0x78] ldr w0, [fp, #0x78] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #120 mov w1, #40 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xF0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0xD1FFAB1E] bl G_M000_IG15 G_M000_IG09: nop G_M000_IG10: add x8, fp, #176 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldp x0, x2, [x1] stp x0, x2, [fp, #0x48] ldp x0, x2, [x1, #0x10] stp x0, x2, [fp, #0x58] add x1, fp, #72 add x0, fp, #176 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG11 add x8, fp, #176 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #176 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0xF8] ldr x2, [fp, #0xF8] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x30] blr x2 G_M000_IG11: add x8, fp, #152 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x8, fp, #128 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x28] ldr x0, [fp, #0x90] str x0, [fp, #0x38] add x1, fp, #40 add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG12 add x8, fp, #152 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0xF8] ldr x2, [fp, #0xF8] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x30] blr x2 G_M000_IG12: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 fcmp d0, #0.0 ble G_M000_IG13 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0xF8] ldr x2, [fp, #0xF8] ldr x2, [x2] ldr x2, [x2, #0x68] ldr x2, [x2, #0x30] blr x2 G_M000_IG13: ldr x0, [fp, #0xF8] ldr x1, [fp, #0xF8] ldr x1, [x1] ldr x1, [x1, #0x60] ldr x1, [x1, #0x08] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG15: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG16: ldr x0, [fp, #0xF0] cbz x0, G_M000_IG17 ldr x0, [fp, #0xF0] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG17: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 848 5345: JIT compiled BenchmarkDotNet.Engines.RunResults:Print(System.IO.TextWriter) [Tier0, IL size=183, code size=848] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:GetWorkloadResultMeasurements():System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] movn w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x13, [fp, #0x18] ldr x14, [fp, #0x10] add x14, x14, #160 bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 132 5346: JIT compiled BenchmarkDotNet.Engines.RunResults:GetWorkloadResultMeasurements() [Tier0, IL size=20, code size=132] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x18] ldr w1, [fp, #0x14] str w1, [x0, #0x20] bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 5347: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:.ctor(int) [Tier0, IL size=25, code size=72] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:System.Collections.Generic.IEnumerable.GetEnumerator():System.Collections.Generic.IEnumerator`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x20] cmn w0, #2 bne G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x24] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 bne G_M000_IG03 ldr x0, [fp, #0x28] str wzr, [x0, #0x20] ldr x0, [fp, #0x28] str x0, [fp, #0x20] b G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x13, [fp, #0x18] str x13, [fp, #0x20] G_M000_IG04: ldr x13, [fp, #0x28] add x13, x13, #160 ldr x14, [fp, #0x20] add x14, x14, #80 bl CORINFO_HELP_ASSIGN_BYREF ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldp x12, x15, [x13], #0x10 stp x12, x15, [x14], #0x10 ldr x12, [x13], #0x08 str x12, [x14], #0x08 ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 212 5348: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:System.Collections.Generic.IEnumerable.GetEnumerator() [Tier0, IL size=55, code size=212] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #104 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] add x1, sp, #0xD1FFAB1E str x1, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x20] str w0, [fp, #0xD1FFAB1E] mov w0, #0xD1FFAB1E str w0, [fp, #0x48] ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG03 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #1 beq G_M000_IG14 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG18 G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] movn w1, #0 str w1, [x0, #0x20] ldr x0, [fp, #0xD1FFAB1E] ldrsb wzr, [x0] ldr x0, [fp, #0xD1FFAB1E] add x0, x0, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0xF8] G_M000_IG04: ldr x0, [fp, #0xF8] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldrsb wzr, [x0] ldr x0, [fp, #0xD1FFAB1E] add x0, x0, #80 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG05 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG18 G_M000_IG05: ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x78] ldr x0, [fp, #0xF0] str x0, [fp, #0x70] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x68] ldr x0, [fp, #0x78] str x0, [fp, #0x60] ldr x0, [fp, #0x78] cbnz x0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x40] ldr x1, [fp, #0x40] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x50] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x50] str x0, [fp, #0x60] G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] ldr x0, [fp, #0x68] ldr x1, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x1, [fp, #0x38] ldr x0, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x70] str x0, [fp, #0xE8] ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xE0] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0xF0] str x0, [fp, #0xE8] str xzr, [fp, #0xE0] G_M000_IG08: ldr x0, [fp, #0xE8] ldr d16, [fp, #0xE0] str d16, [x0, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD0] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xC8] ldr x0, [fp, #0xD8] str x0, [fp, #0xC0] ldr x0, [fp, #0xD8] cbnz x0, G_M000_IG09 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x80] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x30] ldr x1, [fp, #0x30] ldr x0, [fp, #0x80] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x80] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x80] str x0, [fp, #0xC0] G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xB8] ldr x0, [fp, #0xC8] ldr x1, [fp, #0xC0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x0, [fp, #0xB8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD0] add x14, x14, #8 ldr x15, [fp, #0xB8] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] str wzr, [x0, #0x28] ldr x0, [fp, #0xD1FFAB1E] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] movn w1, #2 str w1, [x0, #0x20] b G_M000_IG15 G_M000_IG10: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] add x8, fp, #0xD1FFAB1E movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x08] str x0, [fp, #0xB0] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x20] ldr d0, [fp, #0x20] ldr x1, [fp, #0xD1FFAB1E] add x1, x1, #80 ldr w1, [x1, #0x10] ldr x0, [fp, #0xB0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 cbnz w0, G_M000_IG15 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] ldr d1, [x0, #0x18] fsub d1, d0, d1 str d1, [fp, #0x18] ldr d1, [fp, #0x18] movi v0.16b, #0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0xD1FFAB1E] ldr d0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cbz w0, G_M000_IG11 str xzr, [fp, #0xD1FFAB1E] G_M000_IG11: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0xAC] ldr x0, [fp, #0xD1FFAB1E] ldr w0, [x0, #0x28] add w0, w0, #1 str w0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr w1, [fp, #0xD1FFAB1E] str w1, [x0, #0x28] stp xzr, xzr, [fp, #0x88] stp xzr, xzr, [fp, #0x98] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x5, [fp, #0x10] add x0, fp, #136 ldr w1, [fp, #0xAC] ldr d0, [fp, #0xD1FFAB1E] ldr w4, [fp, #0xD1FFAB1E] mov w2, #1 mov w3, #4 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG12: add x1, fp, #88 ldp q16, q17, [x1, #0x30] stp q16, q17, [x0, #0x30] G_M000_IG13: ldr x0, [fp, #0xD1FFAB1E] mov w1, #1 str w1, [x0, #0x20] mov w1, #1 str w1, [fp, #0xD1FFAB1E] b G_M000_IG18 G_M000_IG14: ldr x0, [fp, #0xD1FFAB1E] movn w1, #2 str w1, [x0, #0x20] G_M000_IG15: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG17 G_M000_IG16: add x0, fp, #72 mov w1, #0xD1FFAB1E bl CORINFO_HELP_PATCHPOINT G_M000_IG17: ldr x0, [fp, #0xD1FFAB1E] ldr x0, [x0, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG10 ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str xzr, [x0, #0x10] str wzr, [fp, #0xD1FFAB1E] b G_M000_IG18 G_M000_IG18: ldr w0, [fp, #0xD1FFAB1E] G_M000_IG19: ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG20: stp fp, lr, [sp, #-0x20]! add x3, fp, #0xD1FFAB1E str x3, [sp, #0x18] G_M000_IG21: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG22: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 1652 5349: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:MoveNext() [Tier0, IL size=435, code size=1652] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_Overhead():System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] G_M000_IG02: ldr x0, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x40] ldr x0, [fp, #0x38] str x0, [fp, #0x30] ldr x0, [fp, #0x40] str x0, [fp, #0x28] ldr x0, [fp, #0x40] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x20] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x20] str x0, [fp, #0x28] G_M000_IG03: ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 324 5350: JIT compiled BenchmarkDotNet.Engines.RunResults:get_Overhead() [Tier0, IL size=48, code size=324] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_EngineMeasurements():System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5351: JIT compiled BenchmarkDotNet.Engines.RunResults:get_EngineMeasurements() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 5352: JIT compiled BenchmarkDotNet.Engines.RunResults+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5353: JIT compiled BenchmarkDotNet.Engines.RunResults+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Where[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,bool]):System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x50] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG05 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] ldr x2, [fp, #0x48] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x10] blr x2 str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG05: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x0, [fp, #0x40] cbz x0, G_M000_IG07 ldr x0, [fp, #0x40] ldr w0, [x0, #0x08] cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG07: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] cbz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x58] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG09: ldr x0, [fp, #0x10] G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 528 5354: JIT compiled System.Linq.Enumerable:Where[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,bool]) [Tier0, IL size=94, code size=528] ; Assembly listing for method System.Linq.Enumerable+WhereListIterator`1[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,bool]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #48 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #56 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5355: JIT compiled System.Linq.Enumerable+WhereListIterator`1[BenchmarkDotNet.Reports.Measurement]:.ctor(System.Collections.Generic.List`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,bool]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[BenchmarkDotNet.Reports.Measurement]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 5356: JIT compiled System.Linq.Enumerable+Iterator`1[BenchmarkDotNet.Reports.Measurement]:.ctor() [Tier0, IL size=18, code size=56] ; Assembly listing for method System.Linq.Enumerable:ToArray[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement]):BenchmarkDotNet.Reports.Measurement[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbnz x0, G_M000_IG05 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 160 5357: JIT compiled System.Linq.Enumerable:ToArray[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=34, code size=160] ; Assembly listing for method System.Linq.Enumerable+WhereListIterator`1[BenchmarkDotNet.Reports.Measurement]:ToArray():BenchmarkDotNet.Reports.Measurement[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xD0]! mov fp, sp add x9, fp, #56 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] stp xzr, xzr, [x9, #0x80] str x0, [fp, #0xC8] G_M000_IG02: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 str w0, [fp, #0x64] ldr w1, [fp, #0x64] add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str wzr, [fp, #0x94] mov w0, #0xD1FFAB1E str w0, [fp, #0x68] b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x30] add x8, fp, #112 ldr w1, [fp, #0x94] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0xC8] ldr x0, [x0, #0x38] str x0, [fp, #0x38] ldp q16, q17, [fp, #0x70] stp q16, q17, [fp, #0x40] ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] add x1, fp, #64 ldr x2, [fp, #0x38] ldr x2, [x2, #0x18] blr x2 cbz w0, G_M000_IG04 ldp x0, x1, [fp, #0x70] stp x0, x1, [fp, #0x18] ldp x0, x1, [fp, #0x80] stp x0, x1, [fp, #0x28] add x1, fp, #24 add x0, fp, #152 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0x94] add w0, w0, #1 str w0, [fp, #0x94] G_M000_IG05: ldr w0, [fp, #0x68] sub w0, w0, #1 str w0, [fp, #0x68] ldr w0, [fp, #0x68] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #104 mov w1, #61 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0xC8] ldr x0, [x0, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr w8, [fp, #0x94] cmp w0, w8 bgt G_M000_IG03 add x0, fp, #152 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG08: ldp fp, lr, [sp], #0xD0 ret lr ; Total bytes of code 376 5358: JIT compiled System.Linq.Enumerable+WhereListIterator`1[BenchmarkDotNet.Reports.Measurement]:ToArray() [Tier0, IL size=83, code size=376] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x14, [fp, #0x10] str x14, [fp, #0x18] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] str w1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 5359: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:.ctor(int) [Tier0, IL size=35, code size=120] ; Assembly listing for method System.Array:Empty[BenchmarkDotNet.Reports.Measurement]():BenchmarkDotNet.Reports.Measurement[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #75 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 5360: JIT compiled System.Array:Empty[BenchmarkDotNet.Reports.Measurement]() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Array+EmptyArray`1[BenchmarkDotNet.Reports.Measurement]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, xzr bl CORINFO_HELP_NEWARR_1_VC movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 56 5361: JIT compiled System.Array+EmptyArray`1[BenchmarkDotNet.Reports.Measurement]:.cctor() [Tier0, IL size=12, code size=56] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+<>c:b__5_0(BenchmarkDotNet.Reports.Measurement):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldp q16, q17, [x0] stp q16, q17, [fp, #0x10] add x0, fp, #16 mov w1, wzr mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 68 5362: JIT compiled BenchmarkDotNet.Engines.RunResults+<>c:b__5_0(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=9, code size=68] ; Assembly listing for method BenchmarkDotNet.Reports.MeasurementExtensions:Is(BenchmarkDotNet.Reports.Measurement,int,int):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] str w2, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x14] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x10] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 5363: JIT compiled BenchmarkDotNet.Reports.MeasurementExtensions:Is(BenchmarkDotNet.Reports.Measurement,int,int) [Tier0, IL size=23, code size=112] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:ToArray():BenchmarkDotNet.Reports.Measurement[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x1, [fp, #0x18] ldr w1, [x1, #0x18] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x10] ldr x3, [fp, #0x18] ldr w3, [x3, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 144 5364: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:ToArray() [Tier0, IL size=40, code size=144] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:TryMove(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] ldr x15, [x14] ldr x14, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x18] ldr w0, [x0, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr w1, [x1, #0x08] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 5365: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:TryMove(byref) [Tier0, IL size=25, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_Workload():System.Collections.Generic.IReadOnlyList`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x30] ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x30] str x0, [fp, #0x18] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr x0, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x10] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG03: ldr x0, [fp, #0x20] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 256 5366: JIT compiled BenchmarkDotNet.Engines.RunResults:get_Workload() [Tier0, IL size=48, code size=256] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+<>c:b__7_0(BenchmarkDotNet.Reports.Measurement):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x30] ldp q16, q17, [x0] stp q16, q17, [fp, #0x10] add x0, fp, #16 mov w1, #1 mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 68 5367: JIT compiled BenchmarkDotNet.Engines.RunResults+<>c:b__7_0(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=9, code size=68] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x40] str xzr, [fp, #0x18] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] ldr w0, [x0, #0x14] str w0, [fp, #0x4C] ldr x0, [fp, #0x58] ldr x0, [x0, #0x08] str x0, [fp, #0x40] ldr w0, [fp, #0x4C] ldr x1, [fp, #0x40] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr x0, [fp, #0x58] str x0, [fp, #0x18] ldr x0, [fp, #0x50] ldp q16, q17, [x0] stp q16, q17, [fp, #0x20] ldr x0, [fp, #0x18] add x1, fp, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x40] ldr w1, [fp, #0x4C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x50] ldp q16, q17, [x1] stp q16, q17, [x0] ldr w0, [fp, #0x4C] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x14] G_M000_IG04: ldr x0, [fp, #0x58] ldr w0, [x0, #0x18] add w0, w0, #1 ldr x1, [fp, #0x58] str w0, [x1, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 212 5368: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:Add(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=61, code size=212] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:AddWithBufferAllocation(BenchmarkDotNet.Reports.Measurement):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x20] ldp q16, q17, [x1] stp q16, q17, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 140 5369: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:AddWithBufferAllocation(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=36, code size=140] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:AllocateBuffer():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] cmp w1, #8 bhs G_M000_IG06 ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] cbz w1, G_M000_IG03 ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] lsl w1, w1, #1 str w1, [fp, #0x1C] b G_M000_IG04 G_M000_IG03: mov w1, #4 str w1, [fp, #0x1C] G_M000_IG04: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x24] ldr w1, [fp, #0x24] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x28] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr x0, [x0] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] ldr x2, [fp, #0x28] ldr w2, [x2, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x28] ldr x15, [x14, #0x08] ldr x14, [fp, #0x28] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] cmp w0, #8 bne G_M000_IG07 mov w0, #8 str w0, [fp, #0x20] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x28] ldrsb wzr, [x0] ldr x0, [fp, #0x28] add x0, x0, #32 ldr x2, [fp, #0x28] ldr x2, [x2, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] sub w1, w1, w0 ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x20] G_M000_IG08: ldr w1, [fp, #0x20] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x28] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] str wzr, [x0, #0x14] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 404 5370: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:AllocateBuffer() [Tier0, IL size=163, code size=404] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:CopyTo(BenchmarkDotNet.Reports.Measurement[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] str w3, [fp, #0x38] G_M000_IG02: str wzr, [fp, #0x34] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x48] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] ldr w0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x24] ldr x0, [fp, #0x28] ldr w4, [fp, #0x24] ldr x2, [fp, #0x40] ldr w3, [fp, #0x3C] mov w1, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w0, [fp, #0x38] ldr w1, [fp, #0x24] sub w0, w0, w1 str w0, [fp, #0x38] ldr w0, [fp, #0x3C] ldr w1, [fp, #0x24] add w0, w0, w1 str w0, [fp, #0x3C] ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #46 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG03 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 252 5371: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:CopyTo(BenchmarkDotNet.Reports.Measurement[],int,int) [Tier0, IL size=51, code size=252] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:GetBuffer(int):BenchmarkDotNet.Reports.Measurement[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr w0, [fp, #0x14] cbz w0, G_M000_IG06 ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] add x0, x0, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w2, [fp, #0x14] cmp w0, w2 bge G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] add x0, x0, #32 ldr w2, [fp, #0x14] sub w2, w2, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 180 5372: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[BenchmarkDotNet.Reports.Measurement]:GetBuffer(int) [Tier0, IL size=46, code size=180] ; Assembly listing for method System.Collections.Generic.ArrayBuilder`1[System.__Canon]:get_Count():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 32 5373: JIT compiled System.Collections.Generic.ArrayBuilder`1[System.__Canon]:get_Count() [Tier0, IL size=7, code size=32] ; Assembly listing for method BenchmarkDotNet.Extensions.CommonExtensions:IsEmpty[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IReadOnlyCollection`1[BenchmarkDotNet.Reports.Measurement]):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5374: JIT compiled BenchmarkDotNet.Extensions.CommonExtensions:IsEmpty[BenchmarkDotNet.Reports.Measurement](System.Collections.Generic.IReadOnlyCollection`1[BenchmarkDotNet.Reports.Measurement]) [Tier0, IL size=10, code size=52] ; Assembly listing for method System.SZArrayHelper:get_Count[BenchmarkDotNet.Reports.Measurement]():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 5375: JIT compiled System.SZArrayHelper:get_Count[BenchmarkDotNet.Reports.Measurement]() [Tier0, IL size=11, code size=40] ; Assembly listing for method System.Linq.Enumerable:Select[BenchmarkDotNet.Reports.Measurement,double](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,double]):System.Collections.Generic.IEnumerable`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] str xzr, [x9, #0x60] str x0, [fp, #0x88] str x1, [fp, #0x80] G_M000_IG02: ldr x0, [fp, #0x88] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x80] cbnz x0, G_M000_IG04 mov w0, #15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x78] ldr x0, [fp, #0x78] cbz x0, G_M000_IG05 ldr x0, [fp, #0x78] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x20] ldr x0, [fp, #0x78] ldr x1, [fp, #0x80] ldr x2, [fp, #0x20] blr x2 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG05: ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x70] ldr x1, [fp, #0x70] cbz x1, G_M000_IG09 ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x60] ldr x0, [fp, #0x60] cbz x0, G_M000_IG07 ldr x0, [fp, #0x60] ldr w0, [x0, #0x08] cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x60] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x50] ldr x0, [fp, #0x50] str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG07: ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x58] ldr x0, [fp, #0x58] cbz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] ldr x0, [fp, #0x30] ldr x1, [fp, #0x58] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x30] str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr x1, [fp, #0x70] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x38] str x1, [fp, #0x18] b G_M000_IG11 G_M000_IG09: ldr x1, [fp, #0x88] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x68] ldr x2, [fp, #0x68] cbz x2, G_M000_IG10 str xzr, [fp, #0x48] add x2, fp, #72 ldr x0, [fp, #0x80] ldr x1, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x48] cbz x0, G_M000_IG10 ldr x0, [fp, #0x48] str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x40] ldr x0, [fp, #0x40] ldr x1, [fp, #0x88] ldr x2, [fp, #0x80] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x40] str x0, [fp, #0x18] b G_M000_IG11 G_M000_IG11: ldr x0, [fp, #0x18] G_M000_IG12: ldp fp, lr, [sp], #0x90 ret lr ; Total bytes of code 776 5376: JIT compiled System.Linq.Enumerable:Select[BenchmarkDotNet.Reports.Measurement,double](System.Collections.Generic.IEnumerable`1[BenchmarkDotNet.Reports.Measurement],System.Func`2[BenchmarkDotNet.Reports.Measurement,double]) [Tier0, IL size=146, code size=776] ; Assembly listing for method System.Linq.Enumerable+SelectArrayIterator`2[BenchmarkDotNet.Reports.Measurement,double]:.ctor(BenchmarkDotNet.Reports.Measurement[],System.Func`2[BenchmarkDotNet.Reports.Measurement,double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5377: JIT compiled System.Linq.Enumerable+SelectArrayIterator`2[BenchmarkDotNet.Reports.Measurement,double]:.ctor(BenchmarkDotNet.Reports.Measurement[],System.Func`2[BenchmarkDotNet.Reports.Measurement,double]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 bl System.Environment:get_CurrentManagedThreadId():int ldr x1, [fp, #0x18] str w0, [x1, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 5378: JIT compiled System.Linq.Enumerable+Iterator`1[double]:.ctor() [Tier0, IL size=18, code size=56] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:.ctor(System.Collections.Generic.IEnumerable`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! mov fp, sp movi v16.16b, #0 add x9, fp, #88 add x10, fp, #0xD1FFAB1E stp q16, q16, [x9, #-0x40] stp q16, q16, [x9, #-0x20] bfm x9, xzr, #0, #5 dczva x9 add x9, x9, #64 cmp x9, x10 blo pc-16 (-4 instructions) stp q16, q16, [x10] stp q16, q16, [x10, #0x20] str x0, [fp, #0xD1FFAB1E] str x1, [fp, #0xD1FFAB1E] G_M000_IG02: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x88] ldr x1, [fp, #0x88] ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x90] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x90] str x0, [fp, #0xD1FFAB1E] G_M000_IG03: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] cbnz x0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x98] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x80] ldr x1, [fp, #0x80] ldr x0, [fp, #0x98] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #0xD1FFAB1E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ldr x15, [fp, #0x98] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x98] str x0, [fp, #0xD1FFAB1E] G_M000_IG04: ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #16 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x78] ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr x1, [fp, #0xD1FFAB1E] str w0, [x1, #0xB0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbnz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA0] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x70] ldr x1, [fp, #0x70] ldr x0, [fp, #0xA0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0xA0] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x68] ldr x0, [fp, #0x68] add x8, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x40] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x50] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x58] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x68] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x78] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x80] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x60] ldr x0, [fp, #0x60] add x8, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x60] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x98] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x90] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0xA0] add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0xA8] ldr x0, [fp, #0xD1FFAB1E] str x0, [fp, #0x38] ldp q0, q16, [fp, #0xD1FFAB1E] stp q0, q16, [fp, #0x40] add x0, fp, #56 fmov d0, #1.5000 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x48] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0xD1FFAB1E] str d0, [x0, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #40 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST G_M000_IG07: str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x30] ldr x2, [fp, #0x30] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #24 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x28] ldr x2, [fp, #0x28] ldr x1, [fp, #0xD1FFAB1E] ldr x0, [fp, #0xD1FFAB1E] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] ldr x1, [fp, #0xD1FFAB1E] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #56 ldr x15, [fp, #0xD1FFAB1E] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xF8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 scvtf d0, w0 bl System.Math:Sqrt(double):double ldr d16, [fp, #0xF8] fdiv d16, d16, d0 ldr x0, [fp, #0xD1FFAB1E] str d16, [x0, #0x88] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xF0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0xE8] stp xzr, xzr, [fp, #0xB0] stp xzr, xzr, [fp, #0xC0] stp xzr, xzr, [fp, #0xD0] str xzr, [fp, #0xE0] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] add x0, fp, #176 ldr d0, [fp, #0xF0] ldr d1, [fp, #0xE8] mov w2, #12 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0xD1FFAB1E] G_M000_IG08: sub x1, fp, #8 ldr x2, [x1, #0xB8] str x2, [x0, #0xB8] ldp q16, q17, [x1, #0xC0] stp q16, q17, [x0, #0xC0] ldr q16, [x1, #0xE0] str q16, [x0, #0xE0] G_M000_IG09: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0xA8] ldr x0, [fp, #0xD1FFAB1E] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0xA8] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0xD1FFAB1E] add x14, x14, #48 ldr x15, [fp, #0xA8] bl CORINFO_HELP_ASSIGN_REF G_M000_IG10: ldp fp, lr, [sp], #0xD1FFAB1E ret lr ; Total bytes of code 2312 5379: JIT compiled BenchmarkDotNet.Mathematics.Statistics:.ctor(System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=535, code size=2312] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics+<>c:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 5380: JIT compiled BenchmarkDotNet.Mathematics.Statistics+<>c:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics+<>c:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5381: JIT compiled BenchmarkDotNet.Mathematics.Statistics+<>c:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Where[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,bool]):System.Collections.Generic.IEnumerable`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x58] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x50] cbnz x0, G_M000_IG04 mov w0, #12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x48] ldr x0, [fp, #0x48] cbz x0, G_M000_IG05 ldr x0, [fp, #0x48] ldr x1, [fp, #0x50] ldr x2, [fp, #0x48] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x10] blr x2 str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG05: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x40] ldr x0, [fp, #0x40] cbz x0, G_M000_IG07 ldr x0, [fp, #0x40] ldr w0, [x0, #0x08] cbz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x40] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG07: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x38] ldr x0, [fp, #0x38] cbz x0, G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x38] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x58] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x10] b G_M000_IG09 G_M000_IG09: ldr x0, [fp, #0x10] G_M000_IG10: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 528 5382: JIT compiled System.Linq.Enumerable:Where[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,bool]) [Tier0, IL size=94, code size=528] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[double]:Where(System.Func`2[double,bool]):System.Collections.Generic.IEnumerable`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5383: JIT compiled System.Linq.Enumerable+Iterator`1[double]:Where(System.Func`2[double,bool]) [Tier0, IL size=8, code size=84] ; Assembly listing for method System.Linq.Enumerable+WhereEnumerableIterator`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,bool]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5384: JIT compiled System.Linq.Enumerable+WhereEnumerableIterator`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,bool]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable:ToArray[double](System.Collections.Generic.IEnumerable`1[double]):double[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x1, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] ldr x0, [fp, #0x10] cbnz x0, G_M000_IG05 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr x0, [fp, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 160 5385: JIT compiled System.Linq.Enumerable:ToArray[double](System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=34, code size=160] ; Assembly listing for method System.Linq.Enumerable+WhereEnumerableIterator`1[double]:ToArray():double[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] add x1, sp, #112 str x1, [fp, #0x68] str x0, [fp, #0x60] G_M000_IG02: add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x28] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] G_M000_IG03: b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x20] ldr x0, [fp, #0x60] ldr x0, [x0, #0x20] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr d0, [fp, #0x20] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 cbz w0, G_M000_IG05 add x0, fp, #48 ldr d0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG04 b G_M000_IG08 G_M000_IG08: ldr x0, [fp, #0x68] bl G_M000_IG12 G_M000_IG09: nop G_M000_IG10: add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG12: stp fp, lr, [sp, #-0x20]! add x3, fp, #112 str x3, [sp, #0x18] G_M000_IG13: ldr x0, [fp, #0x28] cbz x0, G_M000_IG14 ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG14: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 368 5386: JIT compiled System.Linq.Enumerable+WhereEnumerableIterator`1[double]:ToArray() [Tier0, IL size=78, code size=368] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movn w1, #0xD1FFAB1E LSL #16 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5387: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:.ctor() [Tier0, IL size=12, code size=48] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:.ctor(int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] stp xzr, xzr, [x0, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] ldr x14, [fp, #0x10] str x14, [fp, #0x18] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x14, [fp, #0x28] ldr x15, [fp, #0x18] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr w1, [fp, #0x24] str w1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 120 5388: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:.ctor(int) [Tier0, IL size=35, code size=120] ; Assembly listing for method System.Array:Empty[double]():double[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #76 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 5389: JIT compiled System.Array:Empty[double]() [Tier0, IL size=6, code size=52] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[double]:GetEnumerator():System.Collections.Generic.IEnumerator`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] cbnz w0, G_M000_IG03 ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] str w0, [fp, #0x14] bl System.Environment:get_CurrentManagedThreadId():int ldr w1, [fp, #0x14] cmp w0, w1 beq G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 str x0, [fp, #0x18] b G_M000_IG05 G_M000_IG04: ldr x0, [fp, #0x28] str x0, [fp, #0x18] G_M000_IG05: ldr x0, [fp, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x20] mov w1, #1 str w1, [x0, #0x14] ldr x0, [fp, #0x20] G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 132 5390: JIT compiled System.Linq.Enumerable+Iterator`1[double]:GetEnumerator() [Tier0, IL size=40, code size=132] ; Assembly listing for method System.Linq.Enumerable+SelectArrayIterator`2[BenchmarkDotNet.Reports.Measurement,double]:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! str x19, [sp, #0x48] mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x40] G_M000_IG02: ldr x0, [fp, #0x40] ldr w0, [x0, #0x14] cmp w0, #0 cset x0, le ldr x1, [fp, #0x40] ldr w1, [x1, #0x14] ldr x2, [fp, #0x40] ldr x2, [x2, #0x18] ldr w2, [x2, #0x08] add w2, w2, #1 cmp w1, w2 cset x1, eq orr w0, w0, w1 cbz w0, G_M000_IG04 ldr x0, [fp, #0x40] ldr x1, [fp, #0x40] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 mov w0, wzr G_M000_IG03: ldr x19, [sp, #0x48] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x40] ldr w0, [x0, #0x14] str w0, [fp, #0x38] ldr w0, [fp, #0x38] add w0, w0, #1 ldr x1, [fp, #0x40] str w0, [x1, #0x14] ldr w0, [fp, #0x38] sub w0, w0, #1 str w0, [fp, #0x3C] ldr x19, [fp, #0x40] ldr x0, [fp, #0x40] ldr x0, [x0, #0x20] str x0, [fp, #0x10] ldr x0, [fp, #0x40] ldr x0, [x0, #0x18] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #5 add x0, x0, #16 ldp x1, x2, [x0] stp x1, x2, [fp, #0x18] ldp x1, x2, [x0, #0x10] stp x1, x2, [fp, #0x28] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] add x1, fp, #24 ldr x2, [fp, #0x10] ldr x2, [x2, #0x18] blr x2 str d0, [x19, #0x08] mov w0, #1 G_M000_IG05: ldr x19, [sp, #0x48] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 272 5391: JIT compiled System.Linq.Enumerable+SelectArrayIterator`2[BenchmarkDotNet.Reports.Measurement,double]:MoveNext() [Tier0, IL size=89, code size=272] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+<>c:b__18_1(BenchmarkDotNet.Reports.Measurement):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5392: JIT compiled BenchmarkDotNet.Engines.RunResults+<>c:b__18_1(BenchmarkDotNet.Reports.Measurement) [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[double]:get_Current():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5393: JIT compiled System.Linq.Enumerable+Iterator`1[double]:get_Current() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics+<>c:<.ctor>b__69_0(double):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 56 5394: JIT compiled BenchmarkDotNet.Mathematics.Statistics+<>c:<.ctor>b__69_0(double) [Tier0, IL size=10, code size=56] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:Add(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str d0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] str w0, [fp, #0x1C] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr w0, [fp, #0x1C] ldr x1, [fp, #0x10] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr x0, [fp, #0x28] ldr d0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x20] str d16, [x0] ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] G_M000_IG04: ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x18] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 184 5395: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:Add(double) [Tier0, IL size=61, code size=184] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:AddWithBufferAllocation(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str d0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x28] ldr w0, [x0, #0x14] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] add w0, w0, #1 ldr x1, [fp, #0x28] str w0, [x1, #0x14] ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG04 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x20] str d16, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 136 5396: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:AddWithBufferAllocation(double) [Tier0, IL size=36, code size=136] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:AllocateBuffer():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] G_M000_IG02: ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] cmp w1, #8 bhs G_M000_IG06 ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] cbz w1, G_M000_IG03 ldr x1, [fp, #0x28] ldr w1, [x1, #0x18] lsl w1, w1, #1 str w1, [fp, #0x1C] b G_M000_IG04 G_M000_IG03: mov w1, #4 str w1, [fp, #0x1C] G_M000_IG04: ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x24] ldr w1, [fp, #0x24] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x28] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] ldr x0, [x0] ldr x1, [fp, #0x28] ldr x1, [x1, #0x08] ldr x2, [fp, #0x28] ldr w2, [x2, #0x18] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x14, [fp, #0x28] ldr x15, [x14, #0x08] ldr x14, [fp, #0x28] bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] cmp w0, #8 bne G_M000_IG07 mov w0, #8 str w0, [fp, #0x20] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x28] ldrsb wzr, [x0] ldr x0, [fp, #0x28] add x0, x0, #32 ldr x2, [fp, #0x28] ldr x2, [x2, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x1, [fp, #0x28] ldr w1, [x1, #0x10] ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] sub w1, w1, w0 ldr x0, [fp, #0x28] ldr w0, [x0, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x20] G_M000_IG08: ldr w1, [fp, #0x20] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC ldr x14, [fp, #0x28] add x14, x14, #8 mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x28] str wzr, [x0, #0x14] G_M000_IG09: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 404 5397: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:AllocateBuffer() [Tier0, IL size=163, code size=404] ; Assembly listing for method System.Linq.Enumerable+Iterator`1[double]:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] str xzr, [x0, #0x08] ldr x0, [fp, #0x18] movn w1, #0 str w1, [x0, #0x14] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 5398: JIT compiled System.Linq.Enumerable+Iterator`1[double]:Dispose() [Tier0, IL size=20, code size=40] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:ToArray():double[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG04 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x1, [fp, #0x18] ldr w1, [x1, #0x18] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x10] ldr x3, [fp, #0x18] ldr w3, [x3, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] mov w2, wzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 144 5399: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:ToArray() [Tier0, IL size=40, code size=144] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:TryMove(byref):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x14, [fp, #0x18] ldr x15, [x14] ldr x14, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x0, [fp, #0x18] ldr w0, [x0, #0x18] ldr x1, [fp, #0x18] ldr x1, [x1] ldr w1, [x1, #0x08] cmp w0, w1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 5400: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:TryMove(byref) [Tier0, IL size=25, code size=68] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:CopyTo(double[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x48] str x1, [fp, #0x40] str w2, [fp, #0x3C] str w3, [fp, #0x38] G_M000_IG02: str wzr, [fp, #0x34] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x48] ldr w1, [fp, #0x34] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x28] ldr x1, [fp, #0x28] ldr w1, [x1, #0x08] ldr w0, [fp, #0x38] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str w0, [fp, #0x24] ldr x0, [fp, #0x28] ldr w4, [fp, #0x24] ldr x2, [fp, #0x40] ldr w3, [fp, #0x3C] mov w1, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr w0, [fp, #0x38] ldr w1, [fp, #0x24] sub w0, w0, w1 str w0, [fp, #0x38] ldr w0, [fp, #0x3C] ldr w1, [fp, #0x24] add w0, w0, w1 str w0, [fp, #0x3C] ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #46 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x38] cmp w0, #0 bgt G_M000_IG03 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 252 5401: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:CopyTo(double[],int,int) [Tier0, IL size=51, code size=252] ; Assembly listing for method System.Collections.Generic.LargeArrayBuilder`1[double]:GetBuffer(int):double[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str w1, [fp, #0x14] G_M000_IG02: ldr w0, [fp, #0x14] cbz w0, G_M000_IG06 ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] add x0, x0, #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w2, [fp, #0x14] cmp w0, w2 bge G_M000_IG04 ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: ldr x0, [fp, #0x18] ldrsb wzr, [x0] ldr x0, [fp, #0x18] add x0, x0, #32 ldr w2, [fp, #0x14] sub w2, w2, #1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: ldr x0, [fp, #0x18] ldr x0, [x0] G_M000_IG07: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 180 5402: JIT compiled System.Collections.Generic.LargeArrayBuilder`1[double]:GetBuffer(int) [Tier0, IL size=46, code size=180] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_OriginalValues():System.Collections.Generic.IReadOnlyList`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5403: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_OriginalValues() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable:OrderBy[double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]):System.Linq.IOrderedEnumerable`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr x2, [fp, #0x20] mov x3, xzr mov w4, wzr mov x5, xzr movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 5404: JIT compiled System.Linq.Enumerable:OrderBy[double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]) [Tier0, IL size=11, code size=96] ; Assembly listing for method System.Linq.OrderedEnumerable`2[double,double]:.ctor(System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double],System.Collections.Generic.IComparer`1[double],bool,System.Linq.OrderedEnumerable`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x48] str x1, [fp, #0x40] str x2, [fp, #0x38] str x3, [fp, #0x30] str w4, [fp, #0x2C] str x5, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x48] ldr x1, [fp, #0x40] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x40] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x38] cbnz x0, G_M000_IG04 mov w0, #9 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x14, [fp, #0x48] add x14, x14, #16 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x48] add x14, x14, #24 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] str x0, [fp, #0x18] ldr x0, [fp, #0x30] str x0, [fp, #0x10] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG05 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x10] G_M000_IG05: ldr x14, [fp, #0x18] add x14, x14, #32 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x48] ldr w1, [fp, #0x2C] strb w1, [x0, #0x28] G_M000_IG06: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 248 5405: JIT compiled System.Linq.OrderedEnumerable`2[double,double]:.ctor(System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double],System.Collections.Generic.IComparer`1[double],bool,System.Linq.OrderedEnumerable`1[double]) [Tier0, IL size=67, code size=248] ; Assembly listing for method System.Linq.OrderedEnumerable`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 64 5406: JIT compiled System.Linq.OrderedEnumerable`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=14, code size=64] ; Assembly listing for method System.Linq.OrderedEnumerable`1[double]:ToArray():double[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: ldr x1, [fp, #0x58] ldr x1, [x1, #0x08] add x0, fp, #72 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x50] str w0, [fp, #0x44] ldr w0, [fp, #0x44] cbnz w0, G_M000_IG04 ldr x0, [fp, #0x48] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG04: ldr w1, [fp, #0x44] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x38] G_M000_IG05: ldp x0, x1, [fp, #0x48] stp x0, x1, [fp, #0x18] G_M000_IG06: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] str x1, [fp, #0x30] ldr x3, [fp, #0x28] ldr x4, [fp, #0x30] ldr x1, [fp, #0x18] ldr x2, [fp, #0x20] ldr x0, [fp, #0x58] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x38] G_M000_IG07: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 208 5407: JIT compiled System.Linq.OrderedEnumerable`1[double]:ToArray() [Tier0, IL size=52, code size=208] ; Assembly listing for method System.Linq.Buffer`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] G_M000_IG02: ldr x1, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x18] ldr x0, [fp, #0x18] cbz x0, G_M000_IG04 ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x10] ldr x14, [fp, #0x28] ldr x15, [fp, #0x10] bl CORINFO_HELP_CHECKED_ASSIGN_REF ldr x1, [fp, #0x10] ldr w1, [x1, #0x08] ldr x0, [fp, #0x28] str w1, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x1, [fp, #0x28] ldrsb wzr, [x1] ldr x1, [fp, #0x28] add x1, x1, #8 ldr x0, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x28] mov x15, x0 bl CORINFO_HELP_CHECKED_ASSIGN_REF G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 196 5408: JIT compiled System.Linq.Buffer`1[double]:.ctor(System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=53, code size=196] ; Assembly listing for method System.Collections.Generic.EnumerableHelpers:ToArray[double](System.Collections.Generic.IEnumerable`1[double],byref):double[] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] add x2, sp, #160 str x2, [fp, #0x98] str x0, [fp, #0x90] str x1, [fp, #0x88] G_M000_IG02: ldr x1, [fp, #0x90] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x80] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x80] cbz x0, G_M000_IG04 ldr x0, [fp, #0x80] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x7C] ldr w1, [fp, #0x7C] cbz w1, G_M000_IG20 ldr w1, [fp, #0x7C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x70] ldr x0, [fp, #0x80] ldr x1, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov w2, wzr ldr x3, [x11] blr x3 ldr x0, [fp, #0x88] ldr w11, [fp, #0x7C] str w11, [x0] ldr x0, [fp, #0x70] G_M000_IG03: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG04: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x68] G_M000_IG05: ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbz w0, G_M000_IG15 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #4 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x60] ldr x0, [fp, #0x60] str x0, [fp, #0x48] ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x40] ldr x0, [fp, #0x48] mov w1, wzr ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG06 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x40] str d16, [x0] mov w0, #1 str w0, [fp, #0x5C] b G_M000_IG12 G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL G_M000_IG07: ldr w0, [fp, #0x5C] ldr x1, [fp, #0x60] ldr w1, [x1, #0x08] cmp w0, w1 bne G_M000_IG11 ldr w0, [fp, #0x5C] lsl w0, w0, #1 str w0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 sxtw x0, w0 ldr w1, [fp, #0x58] mov w1, w1 cmp x0, x1 bge G_M000_IG10 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr w1, [fp, #0x5C] cmp w0, w1 ble G_M000_IG08 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str w0, [fp, #0x24] b G_M000_IG09 G_M000_IG08: ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x24] G_M000_IG09: ldr w0, [fp, #0x24] str w0, [fp, #0x58] G_M000_IG10: add x0, fp, #96 ldr w1, [fp, #0x58] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: ldr w0, [fp, #0x5C] str w0, [fp, #0x3C] ldr w0, [fp, #0x5C] add w0, w0, #1 str w0, [fp, #0x5C] ldr x0, [fp, #0x60] str x0, [fp, #0x30] ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x28] ldr x0, [fp, #0x30] ldr w11, [fp, #0x3C] ldr w1, [x0, #0x08] cmp w11, w1 bhs G_M000_IG06 add x0, x0, x11, LSL #3 add x0, x0, #16 ldr d16, [fp, #0x28] str d16, [x0] G_M000_IG12: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG14 G_M000_IG13: add x0, fp, #24 mov w1, #161 bl CORINFO_HELP_PATCHPOINT G_M000_IG14: ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG07 ldr x0, [fp, #0x88] ldr w11, [fp, #0x5C] str w11, [x0] ldr x0, [fp, #0x60] str x0, [fp, #0x50] b G_M000_IG16 G_M000_IG15: b G_M000_IG18 G_M000_IG16: ldr x0, [fp, #0x98] bl G_M000_IG24 G_M000_IG17: b G_M000_IG22 G_M000_IG18: ldr x0, [fp, #0x98] bl G_M000_IG24 G_M000_IG19: nop G_M000_IG20: ldr x0, [fp, #0x88] str wzr, [x0] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG21: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG22: ldr x0, [fp, #0x50] G_M000_IG23: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG24: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG25: ldr x0, [fp, #0x68] cbz x0, G_M000_IG26 ldr x0, [fp, #0x68] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG26: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 880 5409: JIT compiled System.Collections.Generic.EnumerableHelpers:ToArray[double](System.Collections.Generic.IEnumerable`1[double],byref) [Tier0, IL size=203, code size=880] ; Assembly listing for method System.SZArrayHelper:get_Count[double]():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 5410: JIT compiled System.SZArrayHelper:get_Count[double]() [Tier0, IL size=11, code size=40] ; Assembly listing for method System.SZArrayHelper:CopyTo[double](double[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x4, [fp, #0x28] str x4, [fp, #0x10] ldr x4, [fp, #0x10] ldr w4, [x4, #0x08] ldr x0, [fp, #0x10] ldr x2, [fp, #0x20] ldr w3, [fp, #0x1C] mov w1, wzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5411: JIT compiled System.SZArrayHelper:CopyTo[double](double[],int) [Tier0, IL size=20, code size=84] ; Assembly listing for method System.Linq.OrderedEnumerable`1[double]:Fill(System.Linq.Buffer`1[double],System.Span`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x48] str x1, [fp, #0x38] str x2, [fp, #0x40] str x3, [fp, #0x28] str x4, [fp, #0x30] G_M000_IG02: ldr x1, [fp, #0x38] ldr x2, [fp, #0x40] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x20] str wzr, [fp, #0x1C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG04 G_M000_IG03: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x30] cmp w0, w1 bhs G_M000_IG08 ldr x0, [fp, #0x28] ldr w1, [fp, #0x1C] mov w1, w1 lsl x1, x1, #3 add x0, x0, x1 ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG08 add x1, x1, x2, LSL #2 add x1, x1, #16 ldr w1, [x1] ldr x2, [fp, #0x38] ldr w3, [x2, #0x08] cmp w1, w3 bhs G_M000_IG08 add x1, x2, x1, LSL #3 add x1, x1, #16 ldr d16, [x1] str d16, [x0] ldr w0, [fp, #0x1C] add w0, w0, #1 str w0, [fp, #0x1C] G_M000_IG04: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #16 mov w1, #43 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x1C] ldr w1, [fp, #0x30] cmp w0, w1 blt G_M000_IG03 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 264 5412: JIT compiled System.Linq.OrderedEnumerable`1[double]:Fill(System.Linq.Buffer`1[double],System.Span`1[double]) [Tier0, IL size=54, code size=264] ; Assembly listing for method System.Linq.OrderedEnumerable`1[double]:SortedMap(System.Linq.Buffer`1[double]):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x18] str x2, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr w2, [fp, #0x20] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 96 5413: JIT compiled System.Linq.OrderedEnumerable`1[double]:SortedMap(System.Linq.Buffer`1[double]) [Tier0, IL size=24, code size=96] ; Assembly listing for method System.Linq.OrderedEnumerable`1[double]:GetEnumerableSorter():System.Linq.EnumerableSorter`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] mov x1, xzr ldr x2, [fp, #0x18] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x28] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5414: JIT compiled System.Linq.OrderedEnumerable`1[double]:GetEnumerableSorter() [Tier0, IL size=8, code size=48] ; Assembly listing for method System.Linq.OrderedEnumerable`2[double,double]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[double]):System.Linq.EnumerableSorter`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] str x0, [fp, #0x28] b G_M000_IG03 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x3, [fp, #0x38] ldrb w3, [x3, #0x28] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] ldr x0, [fp, #0x18] ldr x2, [fp, #0x28] ldr x4, [fp, #0x30] movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 ldr x0, [fp, #0x18] str x0, [fp, #0x20] ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] cbz x0, G_M000_IG04 ldr x0, [fp, #0x38] ldr x0, [x0, #0x10] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x1, [fp, #0x20] ldr x2, [fp, #0x10] ldr x2, [x2] ldr x2, [x2, #0x48] ldr x2, [x2, #0x28] blr x2 str x0, [fp, #0x20] G_M000_IG04: ldr x0, [fp, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 192 5415: JIT compiled System.Linq.OrderedEnumerable`2[double,double]:GetEnumerableSorter(System.Linq.EnumerableSorter`1[double]) [Tier0, IL size=96, code size=192] ; Assembly listing for method System.Linq.EnumerableSorter`2[double,double]:.ctor(System.Func`2[double,double],System.Collections.Generic.IComparer`1[double],bool,System.Linq.EnumerableSorter`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str x2, [fp, #0x28] str w3, [fp, #0x24] str x4, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x38] add x14, x14, #8 ldr x15, [fp, #0x30] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] add x14, x14, #16 ldr x15, [fp, #0x28] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x38] ldr w15, [fp, #0x24] strb w15, [x14, #0x28] ldr x14, [fp, #0x38] add x14, x14, #24 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 120 5416: JIT compiled System.Linq.EnumerableSorter`2[double,double]:.ctor(System.Func`2[double,double],System.Collections.Generic.IComparer`1[double],bool,System.Linq.EnumerableSorter`1[double]) [Tier0, IL size=36, code size=120] ; Assembly listing for method System.Linq.EnumerableSorter`1[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5417: JIT compiled System.Linq.EnumerableSorter`1[double]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.EnumerableSorter`1[double]:Sort(double[],int):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x1, [fp, #0x20] str w2, [fp, #0x1C] G_M000_IG02: ldr x0, [fp, #0x28] ldr x1, [fp, #0x20] ldr w2, [fp, #0x1C] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x10] ldr w3, [fp, #0x1C] sub w3, w3, #1 ldr x0, [fp, #0x28] ldr x1, [fp, #0x10] mov w2, wzr ldr x4, [fp, #0x28] ldr x4, [x4] ldr x4, [x4, #0x40] ldr x4, [x4, #0x30] blr x4 ldr x0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 112 5418: JIT compiled System.Linq.EnumerableSorter`1[double]:Sort(double[],int) [Tier0, IL size=22, code size=112] ; Assembly listing for method System.Linq.EnumerableSorter`1[double]:ComputeMap(double[],int):int[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str x0, [fp, #0x38] str x1, [fp, #0x30] str w2, [fp, #0x2C] G_M000_IG02: ldr x0, [fp, #0x38] ldr x1, [fp, #0x30] ldr w2, [fp, #0x2C] ldr x3, [fp, #0x38] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 ldr w1, [fp, #0x2C] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x20] str wzr, [fp, #0x1C] mov w0, #0xD1FFAB1E str w0, [fp, #0x10] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x20] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG08 add x0, x0, x1, LSL #2 add x0, x0, #16 ldr w1, [fp, #0x1C] str w1, [x0] ldr w0, [fp, #0x1C] add w0, w0, #1 str w0, [fp, #0x1C] G_M000_IG04: ldr w0, [fp, #0x10] sub w0, w0, #1 str w0, [fp, #0x10] ldr w0, [fp, #0x10] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #16 mov w1, #27 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x1C] ldr x1, [fp, #0x20] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 ldr x0, [fp, #0x20] G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 224 5419: JIT compiled System.Linq.EnumerableSorter`1[double]:ComputeMap(double[],int) [Tier0, IL size=35, code size=224] ; Assembly listing for method System.Linq.EnumerableSorter`2[double,double]:ComputeKeys(double[],int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! str x19, [sp, #0x68] mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x40] str xzr, [fp, #0x30] str xzr, [fp, #0x28] str x0, [fp, #0x60] str x1, [fp, #0x58] str w2, [fp, #0x54] G_M000_IG02: ldr x0, [fp, #0x60] ldr x0, [x0, #0x08] str x0, [fp, #0x48] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x19, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #4 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] cmp x19, x1 beq G_M000_IG07 ldr w1, [fp, #0x54] sxtw x1, w1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC str x0, [fp, #0x40] str wzr, [fp, #0x3C] b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x58] ldr w1, [fp, #0x3C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG12 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d0, [x0] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] ldr x1, [fp, #0x48] ldr x1, [x1, #0x18] blr x1 str d0, [fp, #0x20] ldr x14, [fp, #0x40] ldr w15, [fp, #0x3C] ldr w12, [x14, #0x08] cmp w15, w12 bhs G_M000_IG12 add x14, x14, x15, LSL #3 add x14, x14, #16 ldr d16, [fp, #0x20] str d16, [x14] ldr w14, [fp, #0x3C] add w14, w14, #1 str w14, [fp, #0x3C] G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #50 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr w0, [fp, #0x3C] ldr x1, [fp, #0x40] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 ldr x14, [fp, #0x60] add x14, x14, #32 ldr x15, [fp, #0x40] bl CORINFO_HELP_ASSIGN_REF b G_M000_IG08 G_M000_IG07: ldr x1, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x14, [fp, #0x60] add x14, x14, #32 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG08: ldr x0, [fp, #0x60] ldr x0, [x0, #0x18] str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x28] ldr x0, [fp, #0x30] cbnz x0, G_M000_IG10 G_M000_IG09: ldr x19, [sp, #0x68] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: ldr x0, [fp, #0x28] ldr x1, [fp, #0x58] ldr w2, [fp, #0x54] ldr x3, [fp, #0x28] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x20] blr x3 G_M000_IG11: ldr x19, [sp, #0x68] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG12: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 468 5420: JIT compiled System.Linq.EnumerableSorter`2[double,double]:ComputeKeys(double[],int) [Tier0, IL size=96, code size=468] ; Assembly listing for method System.Linq.EnumerableSorter`1[double]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #5 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] str x1, [fp, #0x10] ldr x1, [fp, #0x10] ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 144 5421: JIT compiled System.Linq.EnumerableSorter`1[double]:.cctor() [Tier0, IL size=22, code size=144] ; Assembly listing for method System.Linq.EnumerableSorter`1+<>c[double]:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 5422: JIT compiled System.Linq.EnumerableSorter`1+<>c[double]:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method System.Linq.EnumerableSorter`1+<>c[double]:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5423: JIT compiled System.Linq.EnumerableSorter`1+<>c[double]:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics+<>c:<.ctor>b__69_1(double):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5424: JIT compiled BenchmarkDotNet.Mathematics.Statistics+<>c:<.ctor>b__69_1(double) [Tier0, IL size=2, code size=28] ; Assembly listing for method System.Linq.EnumerableSorter`2[double,double]:QuickSort(int[],int,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #32 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] str x0, [fp, #0x68] str x1, [fp, #0x60] str w2, [fp, #0x5C] str w3, [fp, #0x58] G_M000_IG02: ldr x0, [fp, #0x68] ldr x0, [x0, #0x18] cbnz x0, G_M000_IG04 ldr x0, [fp, #0x68] ldr x0, [x0, #0x10] str x0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr x1, [fp, #0x30] cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x68] ldrb w0, [x0, #0x28] cbnz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x20] str x0, [fp, #0x50] b G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] ldr x0, [fp, #0x28] ldr x1, [fp, #0x68] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x28] str x0, [fp, #0x50] b G_M000_IG05 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_VIRTUAL_FUNC_PTR str x0, [fp, #0x18] ldr x2, [fp, #0x18] ldr x1, [fp, #0x68] ldr x0, [fp, #0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x3, [fp, #0x48] str x3, [fp, #0x50] G_M000_IG05: stp xzr, xzr, [fp, #0x38] ldr w3, [fp, #0x58] ldr w0, [fp, #0x5C] sub w3, w3, w0 add w3, w3, #1 add x0, fp, #56 ldr x1, [fp, #0x60] ldr w2, [fp, #0x5C] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x50] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 444 5425: JIT compiled System.Linq.EnumerableSorter`2[double,double]:QuickSort(int[],int,int) [Tier0, IL size=109, code size=444] ; Assembly listing for method System.Linq.EnumerableSorter`2[double,double]:CompareAnyKeys_DefaultComparer_NoNext_Ascending(int,int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x18] str x0, [fp, #0x38] str w1, [fp, #0x34] str w2, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] ldr x0, [x0, #0x20] str x0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] ldr w2, [fp, #0x34] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG06 add x1, x1, x2, LSL #3 add x1, x1, #16 ldr d0, [x1] ldr x1, [fp, #0x28] ldr w2, [fp, #0x30] ldr w3, [x1, #0x08] cmp w2, w3 bhs G_M000_IG06 add x1, x1, x2, LSL #3 add x1, x1, #16 ldr d1, [x1] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 str w0, [fp, #0x24] ldr w0, [fp, #0x24] cbz w0, G_M000_IG04 ldr w0, [fp, #0x24] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: ldr w0, [fp, #0x34] ldr w1, [fp, #0x30] sub w0, w0, w1 G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 204 5426: JIT compiled System.Linq.EnumerableSorter`2[double,double]:CompareAnyKeys_DefaultComparer_NoNext_Ascending(int,int) [Tier0, IL size=41, code size=204] ; Assembly listing for method System.Collections.Generic.GenericComparer`1[double]:Compare(double,double):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str d0, [fp, #0x20] str d1, [fp, #0x18] G_M000_IG02: add x0, fp, #32 ldr d0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 56 5427: JIT compiled System.Collections.Generic.GenericComparer`1[double]:Compare(double,double) [Tier0, IL size=45, code size=56] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_SortedValues():System.Collections.Generic.IReadOnlyList`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5428: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_SortedValues() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_N():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0xB0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5429: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_N() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:FromSorted(System.Collections.Generic.IReadOnlyList`1[double]):Perfolizer.Mathematics.QuantileEstimators.Quartiles ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #72 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x70] str x8, [fp, #0x78] G_M000_IG02: ldr x0, [fp, #0x70] str x0, [fp, #0x68] movi v0.16b, #0 ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #104 movi v0.16b, #0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x40] add x0, fp, #104 fmov d0, #0.2500 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x60] add x0, fp, #104 fmov d0, #0.5000 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x58] add x0, fp, #104 fmov d0, #0.7500 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x50] add x0, fp, #104 fmov d0, #1.0000 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x48] stp xzr, xzr, [fp, #0x18] stp xzr, xzr, [fp, #0x28] str xzr, [fp, #0x38] add x0, fp, #24 ldr d0, [fp, #0x40] ldr d1, [fp, #0x60] ldr d2, [fp, #0x58] ldr d3, [fp, #0x50] ldr d4, [fp, #0x48] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x78] G_M000_IG03: add x1, fp, #24 ldp q16, q17, [x1] stp q16, q17, [x0] ldr x2, [x1, #0x20] str x2, [x0, #0x20] G_M000_IG04: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 316 5430: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:FromSorted(System.Collections.Generic.IReadOnlyList`1[double]) [Tier0, IL size=124, code size=316] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.QuantileEstimatorHelper:CheckArguments(System.Collections.Generic.IReadOnlyList`1[double],double) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x80]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x78] str d0, [fp, #0x70] G_M000_IG02: ldr x0, [fp, #0x78] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x50] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x50] bl CORINFO_HELP_THROW G_M000_IG04: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x58] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x40] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x38] ldr x1, [fp, #0x40] ldr x2, [fp, #0x38] ldr x0, [fp, #0x58] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x58] bl CORINFO_HELP_THROW G_M000_IG06: ldr d16, [fp, #0x70] fcmp d16, #0.0 blo G_M000_IG07 ldr d16, [fp, #0x70] fmov d17, #1.0000 fcmp d16, d17 ble G_M000_IG08 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x68] ldr x0, [fp, #0x68] ldr d16, [fp, #0x70] str d16, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x28] ldr x0, [fp, #0x30] ldr x1, [fp, #0x28] ldr x2, [fp, #0x68] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str x0, [fp, #0x18] ldr x1, [fp, #0x20] ldr x2, [fp, #0x18] ldr x0, [fp, #0x60] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x60] bl CORINFO_HELP_THROW G_M000_IG08: ldp fp, lr, [sp], #0x80 ret lr ; Total bytes of code 500 5431: JIT compiled Perfolizer.Mathematics.QuantileEstimators.QuantileEstimatorHelper:CheckArguments(System.Collections.Generic.IReadOnlyList`1[double],double) [Tier0, IL size=95, code size=500] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:g__GetQuantile|24_0(double,byref):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x20] str d0, [fp, #0x28] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #37 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] ldr x1, [x1] ldr d0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 104 5432: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:g__GetQuantile|24_0(double,byref) [Tier0, IL size=18, code size=104] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:.cctor() ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x15, [fp, #0x18] movz x14, #0xD1FFAB1E movk x14, #0xD1FFAB1E LSL #16 movk x14, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 5433: JIT compiled Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:.cctor() [Tier0, IL size=11, code size=84] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5434: JIT compiled Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:GetQuantileFromSorted(System.Collections.Generic.IReadOnlyList`1[double],double):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str wzr, [fp, #0x34] str xzr, [fp, #0x28] str x0, [fp, #0x48] str x1, [fp, #0x40] str d0, [fp, #0x38] G_M000_IG02: ldr x0, [fp, #0x40] ldr d0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 sub w0, w0, #1 scvtf d16, w0 ldr d17, [fp, #0x38] fmul d16, d16, d17 str d16, [fp, #0x20] ldr d16, [fp, #0x20] fcvtzs w0, d16 str w0, [fp, #0x34] ldr d16, [fp, #0x20] ldr w0, [fp, #0x34] scvtf d17, w0 fsub d16, d16, d17 str d16, [fp, #0x28] ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 ldr w1, [fp, #0x34] add w1, w1, #1 cmp w0, w1 ble G_M000_IG04 ldr x0, [fp, #0x40] ldr w1, [fp, #0x34] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr d16, [fp, #0x28] fmov d17, #1.0000 fsub d16, d17, d16 fmul d16, d0, d16 str d16, [fp, #0x18] ldr w1, [fp, #0x34] add w1, w1, #1 ldr x0, [fp, #0x40] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr d16, [fp, #0x28] fmul d0, d0, d16 ldr d16, [fp, #0x18] fadd d0, d0, d16 G_M000_IG03: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG04: ldr x0, [fp, #0x40] ldr w1, [fp, #0x34] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG05: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 312 5435: JIT compiled Perfolizer.Mathematics.QuantileEstimators.SimpleQuantileEstimator:GetQuantileFromSorted(System.Collections.Generic.IReadOnlyList`1[double],double) [Tier0, IL size=76, code size=312] ; Assembly listing for method System.SZArrayHelper:get_Item[double](int):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] str x0, [fp, #0x18] ldr w0, [fp, #0x24] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x18] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 116 5436: JIT compiled System.SZArrayHelper:get_Item[double](int) [Tier0, IL size=26, code size=116] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:.ctor(double,double,double,double,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str d0, [fp, #0x30] str d1, [fp, #0x28] str d2, [fp, #0x20] str d3, [fp, #0x18] str d4, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x38] ldr d16, [fp, #0x30] str d16, [x0] ldr x0, [fp, #0x38] ldr d16, [fp, #0x28] str d16, [x0, #0x08] ldr x0, [fp, #0x38] ldr d16, [fp, #0x20] str d16, [x0, #0x10] ldr x0, [fp, #0x38] ldr d16, [fp, #0x18] str d16, [x0, #0x18] ldr x0, [fp, #0x38] ldr d16, [fp, #0x10] str d16, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 100 5437: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:.ctor(double,double,double,double,double) [Tier0, IL size=38, code size=100] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Min():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5438: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Min() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q0():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5439: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q0() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q1():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5440: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q1() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Median():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5441: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Median() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q2():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5442: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q2() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q3():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5443: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q3() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Max():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5444: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Max() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q4():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5445: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_Q4() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_InterquartileRange():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x10] fsub d0, d16, d0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 80 5446: JIT compiled Perfolizer.Mathematics.QuantileEstimators.Quartiles:get_InterquartileRange() [Tier0, IL size=14, code size=80] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:Create(System.Collections.Generic.IReadOnlyList`1[double]):Perfolizer.Mathematics.Common.Moments ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp q16, q16, [x9, #0x40] stp q16, q16, [x9, #0x60] str x0, [fp, #0x90] str x8, [fp, #0x98] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x60] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x60] str x14, [fp, #0x88] ldr x14, [fp, #0x88] add x14, x14, #8 ldr x15, [fp, #0x90] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x88] ldr x0, [x0, #0x08] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str w0, [fp, #0x84] ldr x0, [fp, #0x88] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x88] str d0, [x0, #0x10] ldr w0, [fp, #0x84] cmp w0, #1 beq G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x88] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0x84] sub w0, w0, #1 scvtf d16, w0 fdiv d16, d0, d16 str d16, [fp, #0x58] b G_M000_IG04 G_M000_IG03: str xzr, [fp, #0x58] G_M000_IG04: ldr d16, [fp, #0x58] str d16, [fp, #0x78] ldr x0, [fp, #0x88] mov w1, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str d0, [fp, #0x50] fmov d1, #1.5000 ldr d0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d16, [fp, #0x50] fdiv d16, d16, d0 str d16, [fp, #0x70] ldr x0, [fp, #0x88] mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 str d0, [fp, #0x48] fmov d1, #2.0000 ldr d0, [fp, #0x78] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 ldr d1, [fp, #0x48] fdiv d0, d1, d0 str d0, [fp, #0x68] stp xzr, xzr, [fp, #0x20] stp xzr, xzr, [fp, #0x30] str xzr, [fp, #0x40] ldr x0, [fp, #0x88] ldr d0, [x0, #0x10] add x0, fp, #32 ldr d1, [fp, #0x78] ldr d2, [fp, #0x70] ldr d3, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x98] ldp q16, q17, [fp, #0x20] stp q16, q17, [x0] ldr x1, [fp, #0x40] str x1, [x0, #0x20] G_M000_IG05: ldp fp, lr, [sp], #0xA0 ret lr ; Total bytes of code 560 5447: JIT compiled Perfolizer.Mathematics.Common.Moments:Create(System.Collections.Generic.IReadOnlyList`1[double]) [Tier0, IL size=151, code size=560] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5448: JIT compiled Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Average(System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5449: JIT compiled System.Linq.Enumerable:Average(System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Average[double,double,double](System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0xA0]! mov fp, sp str xzr, [fp, #0x80] str xzr, [fp, #0x78] add x1, sp, #160 str x1, [fp, #0x98] str x0, [fp, #0x90] G_M000_IG02: mov w1, #0xD1FFAB1E str w1, [fp, #0x48] add x1, fp, #128 ldr x0, [fp, #0x90] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w0, G_M000_IG05 add x0, fp, #128 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG03 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldr x0, [fp, #0x80] ldr x1, [fp, #0x88] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0x40] ldr d0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x50] ldr w0, [fp, #0x88] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x38] ldr d1, [fp, #0x38] ldr d0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG05: ldr x0, [fp, #0x90] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x78] G_M000_IG06: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG07 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG07: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x30] ldr d0, [fp, #0x30] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x70] mov x0, #1 str x0, [fp, #0x68] b G_M000_IG09 G_M000_IG08: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x28] ldr d0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x20] ldr d1, [fp, #0x20] ldr d0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x70] ldr x0, [fp, #0x68] add x0, x0, #1 str x0, [fp, #0x68] G_M000_IG09: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG11 G_M000_IG10: add x0, fp, #72 mov w1, #149 bl CORINFO_HELP_PATCHPOINT G_M000_IG11: ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG08 ldr d0, [fp, #0x70] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x58] ldr x0, [fp, #0x68] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d1, [fp, #0x18] ldr d0, [fp, #0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x60] b G_M000_IG12 G_M000_IG12: ldr x0, [fp, #0x98] bl G_M000_IG16 G_M000_IG13: nop G_M000_IG14: ldr d0, [fp, #0x60] G_M000_IG15: ldp fp, lr, [sp], #0xA0 ret lr G_M000_IG16: stp fp, lr, [sp, #-0x20]! add x3, fp, #160 str x3, [sp, #0x18] G_M000_IG17: ldr x0, [fp, #0x78] cbz x0, G_M000_IG18 ldr x0, [fp, #0x78] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG18: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 716 5450: JIT compiled System.Linq.Enumerable:Average[double,double,double](System.Collections.Generic.IEnumerable`1[double]) [Tier0, IL size=209, code size=716] ; Assembly listing for method System.Linq.Enumerable:Sum[double,double](System.ReadOnlySpan`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] str x0, [fp, #0x50] str x1, [fp, #0x58] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x48] G_M000_IG03: ldp x0, x1, [fp, #0x50] stp x0, x1, [fp, #0x38] G_M000_IG04: str wzr, [fp, #0x34] mov w0, #0xD1FFAB1E str w0, [fp, #0x20] b G_M000_IG06 G_M000_IG05: ldr w0, [fp, #0x34] ldr w1, [fp, #0x40] cmp w0, w1 bhs G_M000_IG10 ldr x0, [fp, #0x38] ldr w1, [fp, #0x34] mov w1, w1 lsl x1, x1, #3 ldr d0, [x0, x1] str d0, [fp, #0x28] ldr d0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x18] ldr d1, [fp, #0x18] ldr d0, [fp, #0x48] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x48] ldr w0, [fp, #0x34] add w0, w0, #1 str w0, [fp, #0x34] G_M000_IG06: ldr w0, [fp, #0x20] sub w0, w0, #1 str w0, [fp, #0x20] ldr w0, [fp, #0x20] cmp w0, #0 bgt G_M000_IG08 G_M000_IG07: add x0, fp, #32 mov w1, #61 bl CORINFO_HELP_PATCHPOINT G_M000_IG08: ldr w0, [fp, #0x34] ldr w1, [fp, #0x40] cmp w0, w1 blt G_M000_IG05 ldr d0, [fp, #0x48] G_M000_IG09: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 252 5451: JIT compiled System.Linq.Enumerable:Sum[double,double](System.ReadOnlySpan`1[double]) [Tier0, IL size=73, code size=252] ; Assembly listing for method System.Double:CreateChecked[double](double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: ldr d0, [fp, #0x18] str d0, [fp, #0x10] b G_M000_IG03 G_M000_IG03: ldr d0, [fp, #0x10] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 5452: JIT compiled System.Double:CreateChecked[double](double) [Tier0, IL size=74, code size=36] ; Assembly listing for method System.Numerics.IAdditionOperators`3[double,double,double]:op_CheckedAddition(double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] str d1, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x18] ldr d1, [fp, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5453: JIT compiled System.Numerics.IAdditionOperators`3[double,double,double]:op_CheckedAddition(double,double) [Tier0, IL size=14, code size=52] ; Assembly listing for method System.Double:CreateChecked[int](int):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str w0, [fp, #0x1C] G_M000_IG02: b G_M000_IG03 G_M000_IG03: add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 add x1, fp, #16 ldr w0, [fp, #0x1C] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr d0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 5454: JIT compiled System.Double:CreateChecked[int](int) [Tier0, IL size=74, code size=112] ; Assembly listing for method System.Double:TryConvertFrom[int](int,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str w0, [fp, #0x5C] str x1, [fp, #0x50] G_M000_IG02: b G_M000_IG03 G_M000_IG03: b G_M000_IG04 G_M000_IG04: ldr w0, [fp, #0x5C] str w0, [fp, #0x40] ldr w0, [fp, #0x40] scvtf d16, w0 ldr x0, [fp, #0x50] str d16, [x0] mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 60 5455: JIT compiled System.Double:TryConvertFrom[int](int,byref) [Tier0, IL size=391, code size=60] ; Assembly listing for method System.Linq.Enumerable:Sum[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5456: JIT compiled System.Linq.Enumerable:Sum[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]) [Tier0, IL size=8, code size=52] ; Assembly listing for method System.Linq.Enumerable:Sum[double,double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x38] add x2, sp, #96 str x2, [fp, #0x58] str x0, [fp, #0x50] str x1, [fp, #0x48] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x28] ldr x0, [fp, #0x50] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x48] cbnz x0, G_M000_IG04 mov w0, #15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x40] ldr x0, [fp, #0x50] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x38] G_M000_IG05: b G_M000_IG07 G_M000_IG06: ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x30] ldr x0, [fp, #0x48] ldr x0, [x0, #0x08] ldr d0, [fp, #0x30] ldr x1, [fp, #0x48] ldr x1, [x1, #0x18] blr x1 str d0, [fp, #0x20] ldr d0, [fp, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x18] ldr d1, [fp, #0x18] ldr d0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x40] G_M000_IG07: ldr w0, [fp, #0x28] sub w0, w0, #1 str w0, [fp, #0x28] ldr w0, [fp, #0x28] cmp w0, #0 bgt G_M000_IG09 G_M000_IG08: add x0, fp, #40 mov w1, #79 bl CORINFO_HELP_PATCHPOINT G_M000_IG09: ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG06 b G_M000_IG10 G_M000_IG10: ldr x0, [fp, #0x58] bl G_M000_IG14 G_M000_IG11: nop G_M000_IG12: ldr d0, [fp, #0x40] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG13: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG14: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG15: ldr x0, [fp, #0x38] cbz x0, G_M000_IG16 ldr x0, [fp, #0x38] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG16: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 436 5457: JIT compiled System.Linq.Enumerable:Sum[double,double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]) [Tier0, IL size=112, code size=436] ; Assembly listing for method System.SZArrayHelper:GetEnumerator[double]():System.Collections.Generic.IEnumerator`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w0, [x0, #0x08] cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #78 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 144 5458: JIT compiled System.SZArrayHelper:GetEnumerator[double]() [Tier0, IL size=24, code size=144] ; Assembly listing for method System.SZGenericArrayEnumerator`1[double]:.ctor(double[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5459: JIT compiled System.SZGenericArrayEnumerator`1[double]:.ctor(double[]) [Tier0, IL size=8, code size=52] ; Assembly listing for method System.SZGenericArrayEnumerator`1[double]:get_Current():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] str w0, [fp, #0x24] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x18] ldr w0, [fp, #0x24] ldr x1, [fp, #0x18] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr w0, [fp, #0x24] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x18] ldr w1, [fp, #0x24] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 132 5460: JIT compiled System.SZGenericArrayEnumerator`1[double]:get_Current() [Tier0, IL size=39, code size=132] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:b__0(double):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x10] ldr x0, [fp, #0x18] ldr d1, [x0, #0x10] fsub d0, d0, d1 fmov d1, #2.0000 bl System.Math:Pow(double,double):double G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5461: JIT compiled Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:b__0(double) [Tier0, IL size=23, code size=48] ; Assembly listing for method System.Double:CreateTruncating[double](double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: ldr d0, [fp, #0x18] str d0, [fp, #0x10] b G_M000_IG03 G_M000_IG03: ldr d0, [fp, #0x10] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 5462: JIT compiled System.Double:CreateTruncating[double](double) [Tier0, IL size=74, code size=36] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:g__CalcCentralMoment|1(int):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x28] str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str w1, [fp, #0x34] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x20] str x14, [fp, #0x28] ldr x14, [fp, #0x28] add x14, x14, #8 ldr x15, [fp, #0x38] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x28] ldr w1, [fp, #0x34] str w1, [x0, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x1, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x0, [fp, #0x10] ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 220 5463: JIT compiled Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_0:g__CalcCentralMoment|1(int) [Tier0, IL size=44, code size=220] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_1:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5464: JIT compiled Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_1:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method System.Linq.Enumerable:Average[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5465: JIT compiled System.Linq.Enumerable:Average[double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]) [Tier0, IL size=8, code size=52] ; Assembly listing for method System.Linq.Enumerable:Average[double,double,double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x90]! mov fp, sp str xzr, [fp, #0x70] add x2, sp, #144 str x2, [fp, #0x88] str x0, [fp, #0x80] str x1, [fp, #0x78] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x48] ldr x0, [fp, #0x80] cbnz x0, G_M000_IG03 mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x78] cbnz x0, G_M000_IG04 mov w0, #15 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x0, [fp, #0x80] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str x0, [fp, #0x70] G_M000_IG05: ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG06 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG06: ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x40] ldr d0, [fp, #0x40] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr x1, [x1, #0x18] blr x1 str d0, [fp, #0x38] ldr d0, [fp, #0x38] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x68] mov x0, #1 str x0, [fp, #0x60] b G_M000_IG08 G_M000_IG07: ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 str d0, [fp, #0x30] ldr d0, [fp, #0x30] ldr x0, [fp, #0x78] ldr x0, [x0, #0x08] ldr x1, [fp, #0x78] ldr x1, [x1, #0x18] blr x1 str d0, [fp, #0x28] ldr d0, [fp, #0x28] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x20] ldr d1, [fp, #0x20] ldr d0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x68] ldr x0, [fp, #0x60] add x0, x0, #1 str x0, [fp, #0x60] G_M000_IG08: ldr w0, [fp, #0x48] sub w0, w0, #1 str w0, [fp, #0x48] ldr w0, [fp, #0x48] cmp w0, #0 bgt G_M000_IG10 G_M000_IG09: add x0, fp, #72 mov w1, #110 bl CORINFO_HELP_PATCHPOINT G_M000_IG10: ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG07 ldr d0, [fp, #0x68] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x50] ldr x0, [fp, #0x60] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d1, [fp, #0x18] ldr d0, [fp, #0x50] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x58] b G_M000_IG11 G_M000_IG11: ldr x0, [fp, #0x88] bl G_M000_IG15 G_M000_IG12: nop G_M000_IG13: ldr d0, [fp, #0x58] G_M000_IG14: ldp fp, lr, [sp], #0x90 ret lr G_M000_IG15: stp fp, lr, [sp, #-0x20]! add x3, fp, #144 str x3, [sp, #0x18] G_M000_IG16: ldr x0, [fp, #0x70] cbz x0, G_M000_IG17 ldr x0, [fp, #0x70] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG17: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 632 5466: JIT compiled System.Linq.Enumerable:Average[double,double,double,double](System.Collections.Generic.IEnumerable`1[double],System.Func`2[double,double]) [Tier0, IL size=168, code size=632] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_1:b__2(double):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x10] ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] ldr d1, [x0, #0x10] fsub d0, d0, d1 ldr x0, [fp, #0x18] ldr w0, [x0, #0x10] scvtf d1, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 76 5467: JIT compiled Perfolizer.Mathematics.Common.Moments+<>c__DisplayClass16_1:b__2(double) [Tier0, IL size=26, code size=76] ; Assembly listing for method Perfolizer.Mathematics.Common.MathExtensions:Pow(double,double):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] str d1, [fp, #0x10] G_M000_IG02: ldr d0, [fp, #0x18] ldr d1, [fp, #0x10] bl System.Math:Pow(double,double):double G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 36 5468: JIT compiled Perfolizer.Mathematics.Common.MathExtensions:Pow(double,double) [Tier0, IL size=8, code size=36] ; Assembly listing for method System.Double:CreateChecked[long](long):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: b G_M000_IG03 G_M000_IG03: add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 add x1, fp, #16 ldr x0, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 G_M000_IG04: ldr d0, [fp, #0x10] G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 5469: JIT compiled System.Double:CreateChecked[long](long) [Tier0, IL size=74, code size=112] ; Assembly listing for method System.Double:TryConvertFrom[long](long,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str x0, [fp, #0x58] str x1, [fp, #0x50] G_M000_IG02: b G_M000_IG03 G_M000_IG03: b G_M000_IG04 G_M000_IG04: b G_M000_IG05 G_M000_IG05: ldr x0, [fp, #0x58] str x0, [fp, #0x38] ldr x0, [fp, #0x38] scvtf d16, x0 ldr x0, [fp, #0x50] str d16, [x0] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 64 5470: JIT compiled System.Double:TryConvertFrom[long](long,byref) [Tier0, IL size=391, code size=64] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:.ctor(double,double,double,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str d0, [fp, #0x30] str d1, [fp, #0x28] str d2, [fp, #0x20] str d3, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x38] stp xzr, xzr, [x0] stp xzr, xzr, [x0, #0x10] str xzr, [x0, #0x20] ldr x0, [fp, #0x38] ldr d16, [fp, #0x30] str d16, [x0] ldr x0, [fp, #0x38] ldr d16, [fp, #0x28] str d16, [x0, #0x08] ldr x0, [fp, #0x38] ldr d16, [fp, #0x20] str d16, [x0, #0x10] ldr x0, [fp, #0x38] ldr d16, [fp, #0x18] str d16, [x0, #0x18] ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x10] ldr d0, [fp, #0x10] bl System.Math:Sqrt(double):double ldr x0, [fp, #0x38] str d0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 144 5471: JIT compiled Perfolizer.Mathematics.Common.Moments:.ctor(double,double,double,double) [Tier0, IL size=54, code size=144] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:get_Variance():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5472: JIT compiled Perfolizer.Mathematics.Common.Moments:get_Variance() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:get_Mean():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5473: JIT compiled Perfolizer.Mathematics.Common.Moments:get_Mean() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:get_StandardDeviation():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x20] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5474: JIT compiled Perfolizer.Mathematics.Common.Moments:get_StandardDeviation() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:get_Skewness():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5475: JIT compiled Perfolizer.Mathematics.Common.Moments:get_Skewness() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.Common.Moments:get_Kurtosis():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5476: JIT compiled Perfolizer.Mathematics.Common.Moments:get_Kurtosis() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:FromQuartiles(Perfolizer.Mathematics.QuantileEstimators.Quartiles,double):Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp str xzr, [fp, #0x48] str xzr, [fp, #0x18] str x0, [fp, #0x58] str d0, [fp, #0x50] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x48] ldr x0, [fp, #0x48] str x0, [fp, #0x18] ldr x0, [fp, #0x58] ldp q0, q16, [x0] stp q0, q16, [fp, #0x20] ldr x1, [x0, #0x20] str x1, [fp, #0x40] ldr x0, [fp, #0x18] add x1, fp, #32 ldr d0, [fp, #0x50] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 116 5477: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:FromQuartiles(Perfolizer.Mathematics.QuantileEstimators.Quartiles,double) [Tier0, IL size=8, code size=116] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:.ctor(Perfolizer.Mathematics.QuantileEstimators.Quartiles,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] str d0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x20] ldr d16, [fp, #0x20] str d16, [fp, #0x10] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x28] fmul d16, d0, d16 ldr d17, [fp, #0x10] fsub d16, d17, d16 ldr x0, [fp, #0x38] str d16, [x0, #0x08] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str d0, [fp, #0x18] ldr d16, [fp, #0x18] str d16, [fp, #0x10] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x28] fmul d16, d0, d16 ldr d17, [fp, #0x10] fadd d16, d17, d16 ldr x0, [fp, #0x38] str d16, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 220 5478: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:.ctor(Perfolizer.Mathematics.QuantileEstimators.Quartiles,double) [Tier0, IL size=53, code size=220] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.OutlierDetector:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5479: JIT compiled Perfolizer.Mathematics.OutlierDetection.OutlierDetector:.ctor() [Tier0, IL size=7, code size=44] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:get_LowerFence():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5480: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:get_LowerFence() [Tier0, IL size=7, code size=28] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:get_UpperFence():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5481: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:get_UpperFence() [Tier0, IL size=7, code size=28] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[double]:.ctor(double[],System.Func`2[double,bool]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x0, [fp, #0x28] str x1, [fp, #0x20] str x2, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x28] add x14, x14, #24 ldr x15, [fp, #0x20] bl CORINFO_HELP_ASSIGN_REF ldr x14, [fp, #0x28] add x14, x14, #32 ldr x15, [fp, #0x18] bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5482: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[double]:.ctor(double[],System.Func`2[double,bool]) [Tier0, IL size=21, code size=84] ; Assembly listing for method System.Linq.Enumerable+WhereArrayIterator`1[double]:ToArray():double[]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x70]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp q16, q16, [x9, #0x20] stp xzr, xzr, [x9, #0x40] str xzr, [x9, #0x50] str x0, [fp, #0x68] G_M000_IG02: ldr x1, [fp, #0x68] ldr x1, [x1, #0x18] ldr w1, [x1, #0x08] add x0, fp, #56 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x68] ldr x0, [x0, #0x18] str x0, [fp, #0x30] str wzr, [fp, #0x2C] mov w0, #0xD1FFAB1E str w0, [fp, #0x18] b G_M000_IG05 G_M000_IG03: ldr x0, [fp, #0x30] ldr w1, [fp, #0x2C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG09 add x0, x0, x1, LSL #3 add x0, x0, #16 ldr d0, [x0] str d0, [fp, #0x20] ldr x0, [fp, #0x68] ldr x0, [x0, #0x20] str x0, [fp, #0x10] ldr x0, [fp, #0x10] ldr x0, [x0, #0x08] ldr d0, [fp, #0x20] ldr x1, [fp, #0x10] ldr x1, [x1, #0x18] blr x1 cbz w0, G_M000_IG04 add x0, fp, #56 ldr d0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr w0, [fp, #0x2C] add w0, w0, #1 str w0, [fp, #0x2C] G_M000_IG05: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG07 G_M000_IG06: add x0, fp, #24 mov w1, #60 bl CORINFO_HELP_PATCHPOINT G_M000_IG07: ldr w0, [fp, #0x2C] ldr x1, [fp, #0x30] ldr w1, [x1, #0x08] cmp w0, w1 blt G_M000_IG03 add x0, fp, #56 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG08: ldp fp, lr, [sp], #0x70 ret lr G_M000_IG09: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 312 5483: JIT compiled System.Linq.Enumerable+WhereArrayIterator`1[double]:ToArray() [Tier0, IL size=74, code size=312] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.OutlierDetector:IsOutlier(double):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [fp, #0x10] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cbnz w0, G_M000_IG04 ldr x0, [fp, #0x18] ldr d0, [fp, #0x10] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, #1 G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 96 5484: JIT compiled Perfolizer.Mathematics.OutlierDetection.OutlierDetector:IsOutlier(double) [Tier0, IL size=19, code size=96] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:IsLowerOutlier(double):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x10] fcmp d0, d16 cset x0, gt G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 5485: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:IsLowerOutlier(double) [Tier0, IL size=10, code size=60] ; Assembly listing for method Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:IsUpperOutlier(double):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str d0, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr d16, [fp, #0x10] fcmp d0, d16 cset x0, lo G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 60 5486: JIT compiled Perfolizer.Mathematics.OutlierDetection.TukeyOutlierDetector:IsUpperOutlier(double) [Tier0, IL size=10, code size=60] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_StandardDeviation():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x98] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5487: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_StandardDeviation() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_Mean():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x60] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5488: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_Mean() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:get_StandardError():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x88] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5489: JIT compiled BenchmarkDotNet.Mathematics.Statistics:get_StandardError() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.PercentileValues:.ctor(System.Collections.Generic.IReadOnlyList`1[double]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x14, [fp, #0x18] add x14, x14, #8 ldr x15, [fp, #0x10] bl CORINFO_HELP_ASSIGN_REF ldr x0, [fp, #0x18] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x10] ldr x0, [fp, #0x18] mov w1, #25 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x18] ldr x0, [fp, #0x18] mov w1, #50 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x20] ldr x0, [fp, #0x18] mov w1, #67 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x28] ldr x0, [fp, #0x18] mov w1, #80 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x30] ldr x0, [fp, #0x18] mov w1, #85 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x38] ldr x0, [fp, #0x18] mov w1, #90 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x40] ldr x0, [fp, #0x18] mov w1, #95 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x48] ldr x0, [fp, #0x18] mov w1, #100 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] str d0, [x0, #0x50] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 388 5490: JIT compiled BenchmarkDotNet.Mathematics.PercentileValues:.ctor(System.Collections.Generic.IReadOnlyList`1[double]) [Tier0, IL size=139, code size=388] ; Assembly listing for method BenchmarkDotNet.Mathematics.PercentileValues:Percentile(int):double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str w1, [fp, #0x24] G_M000_IG02: ldr x0, [fp, #0x28] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr w1, [fp, #0x24] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5491: JIT compiled BenchmarkDotNet.Mathematics.PercentileValues:Percentile(int) [Tier0, IL size=13, code size=84] ; Assembly listing for method BenchmarkDotNet.Mathematics.PercentileValues:get_SortedValues():System.Collections.Generic.IReadOnlyList`1[double]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5492: JIT compiled BenchmarkDotNet.Mathematics.PercentileValues:get_SortedValues() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Mathematics.PercentileValues:Percentile(System.Collections.Generic.IReadOnlyList`1[double],int):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp add x9, fp, #16 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str x0, [fp, #0x48] str w1, [fp, #0x44] G_M000_IG02: ldr x0, [fp, #0x48] cbnz x0, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x28] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x20] ldr x1, [fp, #0x20] ldr x0, [fp, #0x28] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x28] bl CORINFO_HELP_THROW G_M000_IG04: ldr w0, [fp, #0x44] tbnz w0, #31, G_M000_IG05 ldr w0, [fp, #0x44] cmp w0, #100 ble G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x38] ldr x0, [fp, #0x38] ldr w1, [fp, #0x44] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x30] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x18] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x18] ldr x3, [fp, #0x10] ldr x2, [fp, #0x38] ldr x0, [fp, #0x30] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x30] bl CORINFO_HELP_THROW G_M000_IG06: ldr x0, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG08 movi v0.16b, #0 G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr w0, [fp, #0x44] scvtf d0, w0 ldr d16, [@RWD00] fdiv d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] ldr x1, [fp, #0x48] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr RWD00 dq 4059000000000000h ; 100 ; Total bytes of code 388 5493: JIT compiled BenchmarkDotNet.Mathematics.PercentileValues:Percentile(System.Collections.Generic.IReadOnlyList`1[double],int) [Tier0, IL size=87, code size=388] ; Assembly listing for method System.SZArrayHelper:GetEnumerator[BenchmarkDotNet.Reports.Measurement]():System.Collections.Generic.IEnumerator`1[BenchmarkDotNet.Reports.Measurement]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str x0, [fp, #0x28] G_M000_IG02: ldr x0, [fp, #0x28] str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w0, [x0, #0x08] cbz w0, G_M000_IG04 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr x1, [fp, #0x20] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x18] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #79 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG05: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 144 5494: JIT compiled System.SZArrayHelper:GetEnumerator[BenchmarkDotNet.Reports.Measurement]() [Tier0, IL size=24, code size=144] ; Assembly listing for method System.SZGenericArrayEnumerator`1[BenchmarkDotNet.Reports.Measurement]:.ctor(BenchmarkDotNet.Reports.Measurement[]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x1, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 52 5495: JIT compiled System.SZGenericArrayEnumerator`1[BenchmarkDotNet.Reports.Measurement]:.ctor(BenchmarkDotNet.Reports.Measurement[]) [Tier0, IL size=8, code size=52] ; Assembly listing for method System.SZGenericArrayEnumerator`1[BenchmarkDotNet.Reports.Measurement]:get_Current():BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x28] str x8, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr w0, [x0, #0x10] str w0, [fp, #0x1C] ldr x0, [fp, #0x28] ldr x0, [x0, #0x08] str x0, [fp, #0x10] ldr w0, [fp, #0x1C] ldr x1, [fp, #0x10] ldr w1, [x1, #0x08] cmp w0, w1 blo G_M000_IG03 ldr w0, [fp, #0x1C] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldr x0, [fp, #0x10] ldr w1, [fp, #0x1C] ldr w2, [x0, #0x08] cmp w1, w2 bhs G_M000_IG05 add x0, x0, x1, LSL #5 add x0, x0, #16 ldr x1, [fp, #0x20] ldp q16, q17, [x0] stp q16, q17, [x1] G_M000_IG04: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 144 5496: JIT compiled System.SZGenericArrayEnumerator`1[BenchmarkDotNet.Reports.Measurement]:get_Current() [Tier0, IL size=39, code size=144] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:IsActualOutlier(double,int):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str xzr, [fp, #0x20] str xzr, [fp, #0x18] str xzr, [fp, #0x10] str x0, [fp, #0x38] str w1, [fp, #0x2C] str d0, [fp, #0x30] G_M000_IG02: ldr w0, [fp, #0x2C] cmp w0, #3 bhi G_M000_IG03 ldr w0, [fp, #0x2C] mov w0, w0 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M000_IG02] add x1, x1, x2 br x1 G_M000_IG03: b G_M000_IG12 G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG06: ldr x0, [fp, #0x38] ldr d0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG07: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG08: ldr x0, [fp, #0x38] ldr d0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: ldr x0, [fp, #0x38] ldr d0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG11: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x20] ldr x0, [fp, #0x20] ldr w1, [fp, #0x2C] str w1, [x0, #0x08] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x18] mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS str x0, [fp, #0x10] ldr x1, [fp, #0x10] ldr x2, [fp, #0x20] ldr x0, [fp, #0x18] mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x18] bl CORINFO_HELP_THROW brk_windows #0 RWD00 dd G_M000_IG04 - G_M000_IG02 dd G_M000_IG06 - G_M000_IG02 dd G_M000_IG08 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 320 5497: JIT compiled BenchmarkDotNet.Mathematics.Statistics:IsActualOutlier(double,int) [Tier0, IL size=68, code size=320] ; Assembly listing for method BenchmarkDotNet.Mathematics.Statistics:IsUpperOutlier(double):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x18] str x0, [fp, #0x28] str d0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x28] ldr x0, [x0, #0x38] str x0, [fp, #0x18] ldr x0, [fp, #0x18] ldr d0, [fp, #0x20] ldr x1, [fp, #0x18] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 68 5498: JIT compiled BenchmarkDotNet.Mathematics.Statistics:IsUpperOutlier(double) [Tier0, IL size=13, code size=68] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:IsSuspiciouslySmall(double):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str d0, [fp, #0x18] G_M000_IG02: ldr d16, [fp, #0x18] ldr d17, [@RWD00] fcmp d16, d17 cset x0, lo G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr RWD00 dq 3FB999999999999Ah ; 0.1 ; Total bytes of code 36 5499: JIT compiled BenchmarkDotNet.Engines.RunResults:IsSuspiciouslySmall(double) [Tier0, IL size=13, code size=36] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_LaunchIndex():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5500: JIT compiled BenchmarkDotNet.Reports.Measurement:get_LaunchIndex() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:System.Collections.Generic.IEnumerator.get_Current():BenchmarkDotNet.Reports.Measurement:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] ldp q16, q17, [x0, #0x30] stp q16, q17, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 40 5501: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:System.Collections.Generic.IEnumerator.get_Current() [Tier0, IL size=7, code size=40] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:<>m__Finally1():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movn w11, #0 str w11, [x0, #0x20] ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] cbz x0, G_M000_IG03 ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x1, [x11] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 5502: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:<>m__Finally1() [Tier0, IL size=27, code size=72] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults+d__18:System.IDisposable.Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str wzr, [fp, #0x1C] add x1, sp, #48 str x1, [fp, #0x28] str x0, [fp, #0x20] G_M000_IG02: ldr x0, [fp, #0x20] ldr w0, [x0, #0x20] str w0, [fp, #0x1C] ldr w0, [fp, #0x1C] cmn w0, #3 beq G_M000_IG03 ldr w0, [fp, #0x1C] cmp w0, #1 bne G_M000_IG06 G_M000_IG03: b G_M000_IG04 G_M000_IG04: ldr x0, [fp, #0x28] bl G_M000_IG07 G_M000_IG05: nop G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: stp fp, lr, [sp, #-0x20]! add x3, fp, #48 str x3, [sp, #0x18] G_M000_IG08: ldr x0, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG09: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 128 5503: JIT compiled BenchmarkDotNet.Engines.RunResults+d__18:System.IDisposable.Dispose() [Tier0, IL size=27, code size=128] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_GCStats():BenchmarkDotNet.Engines.GcStats:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] G_M000_IG03: add x2, x0, #24 ldp q16, q17, [x2] stp q16, q17, [x1] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 44 5504: JIT compiled BenchmarkDotNet.Engines.RunResults:get_GCStats() [Tier0, IL size=7, code size=44] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:Equals(BenchmarkDotNet.Engines.GcStats):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x2C] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x28] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x28] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr w1, [fp, #0x24] cmp w0, w1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x18] cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x10] cmp x0, x1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 356 5505: JIT compiled BenchmarkDotNet.Engines.GcStats:Equals(BenchmarkDotNet.Engines.GcStats) [Tier0, IL size=78, code size=356] ; Assembly listing for method BenchmarkDotNet.Engines.GcStats:ToOutputLine():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: add x0, fp, #48 mov w1, #5 mov w2, #6 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x2C] ldr w1, [fp, #0x2C] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x28] ldr w1, [fp, #0x28] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str w0, [fp, #0x24] ldr w1, [fp, #0x24] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x10] ldr x1, [fp, #0x10] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 588 5506: JIT compiled BenchmarkDotNet.Engines.GcStats:ToOutputLine() [Tier0, IL size=154, code size=588] ; Assembly listing for method System.Number:UInt64ToDecChars[ushort](ulong,ulong):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x50]! mov fp, sp str x0, [fp, #0x48] str x1, [fp, #0x40] G_M000_IG02: mov w0, #0xD1FFAB1E str w0, [fp, #0x18] ldr x0, [fp, #0x40] cmp x0, #10 blo G_M000_IG08 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x48] mov w1, #2 sxtw x1, w1 lsl x1, x1, #1 sub x0, x0, x1 str x0, [fp, #0x48] ldr x0, [fp, #0x40] mov x1, #100 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x20] str x1, [fp, #0x28] ldr x0, [fp, #0x20] str x0, [fp, #0x40] ldr x0, [fp, #0x28] str x0, [fp, #0x38] ldr w0, [fp, #0x38] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG04: ldr w0, [fp, #0x18] sub w0, w0, #1 str w0, [fp, #0x18] ldr w0, [fp, #0x18] cmp w0, #0 bgt G_M000_IG06 G_M000_IG05: add x0, fp, #24 mov w1, #52 bl CORINFO_HELP_PATCHPOINT G_M000_IG06: ldr x0, [fp, #0x40] cmp x0, #100 bhs G_M000_IG03 ldr x0, [fp, #0x40] cmp x0, #10 blo G_M000_IG08 ldr x0, [fp, #0x48] mov w1, #2 sxtw x1, w1 lsl x1, x1, #1 sub x0, x0, x1 str x0, [fp, #0x48] ldr w0, [fp, #0x40] ldr x1, [fp, #0x48] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x48] G_M000_IG07: ldp fp, lr, [sp], #0x50 ret lr G_M000_IG08: ldr x0, [fp, #0x48] mov w1, #2 sxtw x1, w1 sub x0, x0, x1 str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x48] ldr x0, [fp, #0x40] add x0, x0, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x30] strh w0, [x1] ldr x0, [fp, #0x48] G_M000_IG09: ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 344 5507: JIT compiled System.Number:UInt64ToDecChars[ushort](ulong,ulong) [Tier0, IL size=121, code size=344] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_ThreadingStats():BenchmarkDotNet.Engines.ThreadingStats:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] str x8, [fp, #0x10] G_M000_IG02: ldr x0, [fp, #0x18] ldr x1, [fp, #0x10] ldp x2, x3, [x0, #0x38] stp x2, x3, [x1] ldr x2, [x0, #0x48] str x2, [x1, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5508: JIT compiled BenchmarkDotNet.Engines.RunResults:get_ThreadingStats() [Tier0, IL size=7, code size=48] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:get_Empty():BenchmarkDotNet.Engines.ThreadingStats ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str x8, [fp, #0x28] G_M000_IG02: stp xzr, xzr, [fp, #0x10] str xzr, [fp, #0x20] add x0, fp, #16 mov x1, xzr mov x2, xzr mov x3, xzr movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x28] ldp x1, x2, [fp, #0x10] stp x1, x2, [x0] ldr x1, [fp, #0x20] str x1, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 84 5509: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:get_Empty() [Tier0, IL size=12, code size=84] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:Equals(BenchmarkDotNet.Engines.ThreadingStats):bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x40]! mov fp, sp str x0, [fp, #0x38] str x1, [fp, #0x30] G_M000_IG02: ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x28] cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x20] cmp x0, x1 bne G_M000_IG04 ldr x0, [fp, #0x38] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x0, [fp, #0x30] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [fp, #0x18] cmp x0, x1 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x40 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 228 5510: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:Equals(BenchmarkDotNet.Engines.ThreadingStats) [Tier0, IL size=48, code size=228] ; Assembly listing for method BenchmarkDotNet.Engines.ThreadingStats:ToOutputLine():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #48 movi v16.16b, #0 stp q16, q16, [x9] str xzr, [x9, #0x20] str x0, [fp, #0x58] G_M000_IG02: add x0, fp, #48 mov w1, #3 mov w2, #4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x1, [fp, #0x28] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x1, [fp, #0x20] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x58] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] add x0, fp, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #48 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x60 ret lr ; Total bytes of code 404 5511: JIT compiled BenchmarkDotNet.Engines.ThreadingStats:ToOutputLine() [Tier0, IL size=104, code size=404] ; Assembly listing for method BenchmarkDotNet.Engines.RunResults:get_ExceptionFrequency():double:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr d0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5512: JIT compiled BenchmarkDotNet.Engines.RunResults:get_ExceptionFrequency() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:__TrickTheJIT__():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] str x0, [fp, #0x18] G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str x0, [fp, #0x10] ldr x0, [fp, #0x10] mov w1, #123 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr x0, [fp, #0x10] mov w1, wzr mov w2, #10 ldr x3, [fp, #0x10] ldr x3, [x3] ldr x3, [x3, #0x40] ldr x3, [x3, #0x30] blr x3 ldr x1, [fp, #0x18] str w0, [x1, #0x48] ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 136 5513: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:__TrickTheJIT__() [MinOpts, IL size=29, code size=136] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0:__ForDisassemblyDiagnoser__():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr w0, [x0, #0x48] cmp w0, #11 bne G_M000_IG04 ldr x0, [fp, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: mov w0, wzr G_M000_IG05: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 5514: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0:__ForDisassemblyDiagnoser__() [MinOpts, IL size=19, code size=72] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible G_M000_IG01: stp fp, lr, [sp, #-0x60]! mov fp, sp add x9, fp, #24 movi v16.16b, #0 stp q16, q16, [x9] stp xzr, xzr, [x9, #0x20] str xzr, [x9, #0x30] add x1, sp, #96 str x1, [fp, #0x58] str x0, [fp, #0x50] G_M000_IG02: ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x40] ldr x0, [fp, #0x40] str x0, [fp, #0x38] ldr x0, [fp, #0x40] cbnz x0, G_M000_IG03 b G_M000_IG04 G_M000_IG03: ldr x0, [fp, #0x38] ldr x0, [x0, #0x08] ldr x1, [fp, #0x38] ldr x1, [x1, #0x18] blr x1 G_M000_IG04: b G_M000_IG05 G_M000_IG05: ldp fp, lr, [sp], #0x60 ret lr G_M000_IG06: stp fp, lr, [sp, #-0x20]! add x3, fp, #96 str x3, [sp, #0x18] G_M000_IG07: str x0, [fp, #0x30] ldr x0, [fp, #0x30] str x0, [fp, #0x48] ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x20] ldr x0, [fp, #0x20] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 ldr x0, [fp, #0x50] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [fp, #0x28] ldr x0, [fp, #0x48] ldr x1, [fp, #0x48] ldr x1, [x1] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 str x0, [fp, #0x18] ldr x1, [fp, #0x18] ldr x0, [fp, #0x28] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 ldr x2, [x11] blr x2 adr x0, [G_M000_IG05] G_M000_IG08: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 304 5515: JIT compiled BenchmarkDotNet.Engines.Engine:Dispose() [Tier0, IL size=56, code size=304] ; Assembly listing for method BenchmarkDotNet.Engines.Engine:get_GlobalCleanupAction():System.Action:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x48] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 28 5516: JIT compiled BenchmarkDotNet.Engines.Engine:get_GlobalCleanupAction() [Tier0, IL size=7, code size=28] ; Assembly listing for method BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_0():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 20 5517: JIT compiled BenchmarkDotNet.Autogenerated.Runnable_0+<>c:<.ctor>b__3_0() [Tier0, IL size=1, code size=20] ; Assembly listing for method BenchmarkDotNet.Engines.HostExtensions:AfterAll(BenchmarkDotNet.Engines.IHost) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] movz x11, #0xD1FFAB1E movk x11, #0xD1FFAB1E LSL #16 movk x11, #0xD1FFAB1E LSL #32 mov w1, #4 ldr x2, [x11] blr x2 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5518: JIT compiled BenchmarkDotNet.Engines.HostExtensions:AfterAll(BenchmarkDotNet.Engines.IHost) [Tier0, IL size=8, code size=48] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationMode():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5519: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationMode() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.SZGenericArrayEnumeratorBase:MoveNext():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 65340 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w1, [x0, #0x10] add w1, w1, #1 ldr x2, [x0, #0x08] ldr w2, [x2, #0x08] cmp w1, w2 blo G_M000_IG05 G_M000_IG03: str w2, [x0, #0x10] mov w0, wzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: str w1, [x0, #0x10] mov w0, #1 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 64 5520: JIT compiled System.SZGenericArrayEnumeratorBase:MoveNext() [Tier1 with Static PGO, IL size=44, code size=64] ; Assembly listing for method System.SpanHelpers:Fill[ushort](byref,ulong,ushort) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 69 ; 0 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp x1, #8 bhs G_M000_IG09 G_M000_IG03: mov x3, xzr cmp x1, #8 bhs G_M000_IG18 G_M000_IG04: tbnz w1, #2, G_M000_IG17 G_M000_IG05: tbz w1, #1, G_M000_IG07 G_M000_IG06: lsl x4, x3, #1 strh w2, [x0, x4] add x4, x4, #2 strh w2, [x0, x4] add x3, x3, #2 G_M000_IG07: tbnz w1, #0, G_M000_IG16 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: uxth w2, w2 dup v16.8h, w2 lsl x2, x1, #1 and x3, x2, #-32 mov x4, xzr cmp x1, #16 bhs G_M000_IG14 G_M000_IG10: tbz w2, #4, G_M000_IG12 G_M000_IG11: str q16, [x0, x4] G_M000_IG12: sub x2, x2, #16 str q16, [x0, x2] G_M000_IG13: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG14: str q16, [x0, x4] add x1, x4, #16 str q16, [x0, x1] add x4, x4, #32 cmp x4, x3 blo G_M000_IG14 G_M000_IG15: b G_M000_IG10 G_M000_IG16: lsl x1, x3, #1 strh w2, [x0, x1] b G_M000_IG08 G_M000_IG17: lsl x4, x3, #1 strh w2, [x0, x4] add x5, x4, #2 strh w2, [x0, x5] add x5, x4, #4 strh w2, [x0, x5] add x4, x4, #6 strh w2, [x0, x4] add x3, x3, #4 b G_M000_IG05 G_M000_IG18: and x4, x1, #-8 G_M000_IG19: lsl x5, x3, #1 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #2 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #4 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #6 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #8 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #10 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #12 strh w2, [x0, x5] lsl x5, x3, #1 add x5, x5, #14 strh w2, [x0, x5] add x3, x3, #8 cmp x3, x4 blo G_M000_IG19 b G_M000_IG04 ; Total bytes of code 312 5521: JIT compiled System.SpanHelpers:Fill[ushort](byref,ulong,ushort) [Tier1 with Static PGO, IL size=865, code size=312] ; Assembly listing for method System.Number:Dragon4Double(double,int,bool,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data G_M000_IG01: sub sp, sp, #48 stp fp, lr, [sp, #0x08] str x19, [sp, #0x28] add fp, sp, #8 mov w4, w0 mov x19, x2 G_M000_IG02: mov x6, v0.d[0] and x0, x6, #0xD1FFAB1E lsr x6, x6, #52 and w2, w6, #0xD1FFAB1E cbz w2, G_M000_IG04 G_M000_IG03: orr x0, x0, #0xD1FFAB1E sub w2, w2, #0xD1FFAB1E b G_M000_IG05 G_M000_IG04: movn w2, #0xD1FFAB1E G_M000_IG05: mov w3, wzr lsr x6, x0, #52 cbz x6, G_M000_IG07 G_M000_IG06: mov w8, #52 mov x3, #0xD1FFAB1E cmp x0, x3 cset x3, eq b G_M000_IG08 G_M000_IG07: orr x8, x0, #1 clz x6, x8 eor w8, w6, #63 G_M000_IG08: add x6, fp, #24 str x6, [sp] ldr x6, [x19, #0x10] add x7, x19, #16 ldr x7, [x7, #0x08] uxtb w5, w1 mov w1, w2 mov w2, w8 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 ldr w1, [fp, #0x18] add w1, w1, #1 str w1, [x19, #0x04] add x1, x19, #16 ldr w2, [x1, #0x08] cmp w0, w2 bhs G_M000_IG10 ldr x1, [x1] strb wzr, [x1, w0, UXTW #2] str w0, [x19] G_M000_IG09: ldr x19, [sp, #0x28] ldp fp, lr, [sp, #0x08] add sp, sp, #48 ret lr G_M000_IG10: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 220 5522: JIT compiled System.Number:Dragon4Double(double,int,bool,byref) [Tier1, IL size=114, code size=220] ; Assembly listing for method System.Number:Dragon4(ulong,int,uint,bool,int,bool,System.Span`1[ubyte],byref):uint ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 4 ; 1 inlinees with PGO data; 10 single block inlinees; 8 inlinees without PGO data G_M000_IG01: movn x9, #0xD1FFAB1E ldr wzr, [sp, x9] stp x19, x20, [sp, #-0x50]! stp x21, x22, [sp, #0x10] stp x23, x24, [sp, #0x20] stp x25, x26, [sp, #0x30] stp x27, x28, [sp, #0x40] mov x8, #0xD1FFAB1E sub sp, sp, x8 stp fp, lr, [sp] mov fp, sp movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 str x8, [fp, #0xD1FFAB1E] str x6, [fp, #0x18] str x7, [fp, #0x20] mov x21, x0 mov w20, w1 mov w22, w2 mov w19, w4 mov w23, w5 G_M000_IG02: ldr x24, [fp, #0xD1FFAB1E] mov w25, wzr tst w3, #255 bne G_M000_IG28 cmp w20, #0 bgt G_M000_IG31 lsl x0, x21, #1 mov x1, #0xD1FFAB1E cmp x0, x1 bhi G_M000_IG04 cbnz w0, G_M000_IG03 str wzr, [fp, #0xD1FFAB1E] b G_M000_IG05 G_M000_IG03: str w0, [fp, #0xD1FFAB1E] mov w0, #1 str w0, [fp, #0xD1FFAB1E] b G_M000_IG05 G_M000_IG04: str w0, [fp, #0xD1FFAB1E] lsr x0, x0, #32 str w0, [fp, #0xD1FFAB1E] mov w0, #2 str w0, [fp, #0xD1FFAB1E] G_M000_IG05: neg w0, w20 add w0, w0, #1 add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w1, #1 str w1, [fp, #0xD1FFAB1E] str w1, [fp, #0xD1FFAB1E] G_M000_IG06: add x26, fp, #0xD1FFAB1E G_M000_IG07: add w1, w22, w20 scvtf d16, w1 ldr d17, [@RWD00] fmul d16, d16, d17 ldr d17, [@RWD08] fsub d16, d16, d17 frintp d16, d16 fcvtzs w27, d16 cmp w27, #0 ble G_M000_IG32 cmp w27, #9 bhi G_M000_IG08 cmp w27, #10 bhs G_M000_IG48 ubfiz x1, x27, #2, #32 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w1, [x1, x0] add x0, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG10 G_M000_IG08: ldr w1, [fp, #0xD1FFAB1E] cbz w1, G_M000_IG10 add x1, fp, #0xD1FFAB1E mov w0, w27 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 ldr w0, [fp, #0xD1FFAB1E] cmp w0, #1 bgt G_M000_IG09 ldr w2, [fp, #0xD1FFAB1E] cmp w0, #0 csel w1, wzr, w2, le add x0, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG10 G_M000_IG09: ldr w2, [fp, #0xD1FFAB1E] str w2, [fp, #0x28] sxtw x2, w2 lsl x2, x2, #2 add x1, fp, #0xD1FFAB1E add x0, fp, #44 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #40 add x1, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG10: mvn w0, w21 and w28, w0, #1 cmn w19, #1 beq G_M000_IG33 G_M000_IG11: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 tbnz w0, #31, G_M000_IG36 G_M000_IG12: add w27, w27, #1 G_M000_IG13: ldr w22, [fp, #0x20] sub w21, w27, w22 cmn w19, #1 beq G_M000_IG14 neg w0, w19 sub w1, w27, w19 tst w23, #255 csel w0, w0, w1, eq cmp w0, w21 csel w21, w21, w0, le G_M000_IG14: sub w27, w27, #1 str w27, [x24] add x0, fp, #0xD1FFAB1E ldr w1, [fp, #0xD1FFAB1E] sub w1, w1, #1 ldr w2, [x0, w1, UXTW #2] movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 cmp w2, #8 ccmp w2, w0, c, hs bhi G_M000_IG37 G_M000_IG15: cmn w19, #1 beq G_M000_IG38 G_M000_IG16: cmp w27, w21 blt G_M000_IG43 mov w23, wzr mov w19, wzr G_M000_IG17: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w28, w0 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG19 G_M000_IG18: cmp w27, w21 ble G_M000_IG19 cmp w25, w22 bhs G_M000_IG48 ldr x0, [fp, #0x18] add w1, w28, #48 strb w1, [x0, w25, UXTW #2] add w25, w25, #1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sub w27, w27, #1 b G_M000_IG17 G_M000_IG19: cmp w23, w19 bne G_M000_IG20 add x0, fp, #0xD1FFAB1E mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 lsr w23, w0, #31 cbz w0, G_M000_IG47 G_M000_IG20: cbz w23, G_M000_IG21 cmp w25, w22 bhs G_M000_IG48 ldr x1, [fp, #0x18] add w0, w28, #48 strb w0, [x1, w25, UXTW #2] b G_M000_IG25 G_M000_IG21: cmp w28, #9 bne G_M000_IG24 G_M000_IG22: cbnz w25, G_M000_IG23 cmp w22, #0 bls G_M000_IG48 ldr x0, [fp, #0x18] mov w1, #49 strb w1, [x0] mov w25, #1 ldr w0, [x24] add w0, w0, #1 str w0, [x24] b G_M000_IG26 G_M000_IG23: sub w25, w25, #1 cmp w25, w22 bhs G_M000_IG48 ldr x0, [fp, #0x18] ldrb w0, [x0, w25, UXTW #2] cmp w0, #57 beq G_M000_IG22 ldr x0, [fp, #0x18] mov w1, w25 add x0, x0, x1 ldrb w1, [x0] add w1, w1, #1 strb w1, [x0] b G_M000_IG25 G_M000_IG24: cmp w25, w22 bhs G_M000_IG48 ldr x0, [fp, #0x18] add w1, w28, #49 strb w1, [x0, w25, UXTW #2] G_M000_IG25: add w25, w25, #1 G_M000_IG26: mov w0, w25 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG27 bl CORINFO_HELP_FAIL_FAST G_M000_IG27: ldp fp, lr, [sp] mov xip1, #0xD1FFAB1E add sp, sp, xip1 ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] ldp x23, x24, [sp, #0x20] ldp x21, x22, [sp, #0x10] ldp x19, x20, [sp], #0x50 ret lr G_M000_IG28: cmp w20, #0 ble G_M000_IG29 lsl x1, x21, #2 add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x1, fp, #0xD1FFAB1E mov w0, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add w0, w20, #1 add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG30 G_M000_IG29: lsl x1, x21, #2 add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 neg w0, w20 add w0, w0, #2 add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, #1 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG30: add x26, fp, #0xD1FFAB1E b G_M000_IG07 G_M000_IG31: lsl x1, x21, #1 add x0, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, #2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x1, fp, #0xD1FFAB1E mov w0, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG06 G_M000_IG32: tbz w27, #31, G_M000_IG10 neg w0, w27 add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E cmp x26, x0 beq G_M000_IG10 add x0, fp, #0xD1FFAB1E mov x2, x26 mov w1, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mvn w0, w21 and w28, w0, #1 cmn w19, #1 bne G_M000_IG11 G_M000_IG33: add x0, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E mov x1, x26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbnz w28, G_M000_IG34 cmp w0, #0 cset x1, gt b G_M000_IG35 G_M000_IG34: cmp w0, #0 cset x1, ge G_M000_IG35: uxtb w0, w1 cbnz w0, G_M000_IG12 G_M000_IG36: add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E cmp x26, x0 beq G_M000_IG13 add x0, fp, #0xD1FFAB1E mov x2, x26 mov w1, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG13 G_M000_IG37: orr w0, w2, #1 clz w0, w0 eor w0, w0, #31 neg w0, w0 add w0, w0, #59 and w20, w0, #31 add x0, fp, #0xD1FFAB1E mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, fp, #0xD1FFAB1E cmp x26, x0 beq G_M000_IG15 add x0, fp, #0xD1FFAB1E mov x2, x26 mov w1, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 cmn w19, #1 bne G_M000_IG16 G_M000_IG38: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w19, w0 add x0, fp, #0xD1FFAB1E add x2, fp, #0xD1FFAB1E mov x1, x26 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w20, w0 add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz w28, G_M000_IG39 cmp w20, #0 cset x23, le cmp w0, #0 cset x0, ge sxtw w20, w0 b G_M000_IG40 G_M000_IG39: lsr w23, w20, #31 cmp w0, #0 cset x20, gt G_M000_IG40: orr w0, w23, w20 cbnz w0, G_M000_IG42 mov w0, w19 mov w19, w20 mov w20, w28 mov w28, w0 cmp w27, w21 beq G_M000_IG19 cmp w25, w22 bhs G_M000_IG48 ldr x0, [fp, #0x18] add w1, w28, #48 strb w1, [x0, w25, UXTW #2] add w25, w25, #1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 add x0, fp, #0xD1FFAB1E cmp x26, x0 beq G_M000_IG41 add x0, fp, #0xD1FFAB1E mov x2, x26 mov w1, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG41: sub w27, w27, #1 mov w28, w20 b G_M000_IG38 G_M000_IG42: mov w28, w19 mov w19, w20 b G_M000_IG19 G_M000_IG43: add x0, fp, #0xD1FFAB1E add x1, fp, #0xD1FFAB1E movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 sxtw w28, w0 cmp w28, #5 bhi G_M000_IG44 cmp w28, #5 bne G_M000_IG45 ldr w0, [fp, #0xD1FFAB1E] cbz w0, G_M000_IG45 G_M000_IG44: ldr w0, [x24] add w0, w0, #1 str w0, [x24] mov w28, #1 G_M000_IG45: cmp w22, #0 bls G_M000_IG48 ldr x0, [fp, #0x18] add w1, w28, #48 strb w1, [x0] mov w0, #1 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #0xD1FFAB1E] cmp xip0, xip1 beq G_M000_IG46 bl CORINFO_HELP_FAIL_FAST G_M000_IG46: ldp fp, lr, [sp] mov xip1, #0xD1FFAB1E add sp, sp, xip1 ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] ldp x23, x24, [sp, #0x20] ldp x21, x22, [sp, #0x10] ldp x19, x20, [sp], #0x50 ret lr G_M000_IG47: mvn w0, w28 and w23, w0, #1 b G_M000_IG20 G_M000_IG48: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 3FD34413509F79FFh ; 0.301029996 RWD08 dq 3FE6147AE147AE14h ; 0.69 ; Total bytes of code 2468 5523: JIT compiled System.Number:Dragon4(ulong,int,uint,bool,int,bool,System.Span`1[ubyte],byref) [Tier1 with Static PGO, IL size=1029, code size=2468] ; Assembly listing for method System.Number+BigInteger:Pow2(uint,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov x19, x1 G_M000_IG02: and w20, w0, #31 lsr w21, w0, #5 add w0, w21, #1 str w0, [x19] cbz w21, G_M000_IG05 G_M000_IG03: add x0, x19, #4 lsl w1, w21, #2 mov w1, w1 str x1, [fp, #0x10] cbz x1, G_M000_IG05 cmp x1, #0xD1FFAB1E bhi G_M000_IG04 mov w1, wzr ldr w2, [fp, #0x10] bl CORINFO_HELP_MEMSET b G_M000_IG05 G_M000_IG04: ldr x1, [fp, #0x10] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG05: add x0, x19, #4 mov w1, #1 lsl w1, w1, w20 str w1, [x0, w21, UXTW #2] G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 140 5524: JIT compiled System.Number+BigInteger:Pow2(uint,byref) [Tier1, IL size=55, code size=140] ; Assembly listing for method System.Number+BigInteger:Multiply(byref,uint,byref) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 4 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x18] str x21, [sp, #0x28] mov fp, sp mov w20, w1 mov x19, x2 mov x2, x0 G_M000_IG02: ldr w1, [x2] cmp w1, #1 ble G_M000_IG07 cmp w20, #1 bls G_M000_IG09 mov w3, wzr mov w4, wzr cmp w1, #0 ble G_M000_IG05 G_M000_IG03: add x0, x2, #4 mov w21, w20 G_M000_IG04: sbfiz x2, x3, #2, #32 ldr w5, [x0, x2] mov w4, w4 madd x4, x5, x21, x4 ldrsb wzr, [x19] add x5, x19, #4 str w4, [x5, x2] lsr x4, x4, #32 add w3, w3, #1 cmp w3, w1 blt G_M000_IG04 G_M000_IG05: cbnz w4, G_M000_IG12 str w1, [x19] G_M000_IG06: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: mov x0, x2 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov w1, w0 mov w21, w20 mul x1, x1, x21 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG08: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 br x2 G_M000_IG09: cbnz w20, G_M000_IG10 str wzr, [x19] b G_M000_IG06 G_M000_IG10: mov x0, x19 mov x1, x2 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG11: ldr x21, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x30 br x2 G_M000_IG12: ldrsb wzr, [x19] add x0, x19, #4 str w4, [x0, w3, SXTW #2] add w0, w1, #1 str w0, [x19] b G_M000_IG06 ; Total bytes of code 288 5525: JIT compiled System.Number+BigInteger:Multiply(byref,uint,byref) [Tier1 with Static PGO, IL size=158, code size=288] ; Assembly listing for method System.Number+BigInteger:ShiftLeft(uint):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 4 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19] cbnz w0, G_M000_IG11 G_M000_IG03: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: add w22, w22, #1 add w0, w22, #1 str w0, [x19] neg w0, w20 add w0, w0, #32 mov w2, wzr b G_M000_IG09 G_M000_IG05: add x0, x19, #4 sbfiz x2, x22, #2, #32 add x0, x0, x2 add x2, x19, #4 ldr w2, [x2, w21, SXTW #2] str w2, [x0] sub w21, w21, #1 sub w22, w22, #1 G_M000_IG06: tbz w21, #31, G_M000_IG05 ldr w0, [x19] add w0, w0, w1 str w0, [x19] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG07: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG08: add x5, x19, #4 orr w2, w2, w4 str w2, [x5, w22, SXTW #2] lsl w2, w3, w20 sub w21, w21, #1 sub w22, w22, #1 G_M000_IG09: add x3, x19, #4 ldr w3, [x3, w21, SXTW #2] lsr w4, w3, w0 cmp w21, #0 bgt G_M000_IG08 add x0, x19, #4 orr w2, w2, w4 str w2, [x0, w22, SXTW #2] add x0, x19, #4 sub w2, w22, #1 lsl w3, w3, w20 str w3, [x0, w2, SXTW #2] mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 add x0, x19, #4 ldr w1, [x19] sub w1, w1, #1 ldr w0, [x0, w1, SXTW #2] cbnz w0, G_M000_IG10 ldr w0, [x19] sub w0, w0, #1 str w0, [x19] G_M000_IG10: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG11: cbz w1, G_M000_IG03 and w20, w1, #31 lsr w1, w1, #5 sub w21, w0, #1 add w22, w21, w1 cbz w20, G_M000_IG06 b G_M000_IG04 ; Total bytes of code 332 5526: JIT compiled System.Number+BigInteger:ShiftLeft(uint) [Tier1 with Static PGO, IL size=337, code size=332] ; Assembly listing for method System.Text.Unicode.Utf8Utility:TranscodeToUtf8(ulong,int,ulong,int,byref,byref):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 269137 ; 1 inlinees with PGO data; 29 single block inlinees; 13 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x20, x0 mov w22, w1 mov x21, x2 mov w19, w3 mov x23, x4 mov x24, x5 G_M000_IG02: cmp w22, w19 csel w2, w22, w19, le mov w2, w2 mov x0, x20 mov x1, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x20, x20, x0, LSL #1 add x21, x21, x0 cmp w0, w22 bne G_M000_IG09 G_M000_IG03: str x20, [x23] str x21, [x24] mov w0, wzr G_M000_IG04: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: cmp w19, #4 blt G_M000_IG67 G_M000_IG06: lsr w0, w2, #6 and w0, w0, #0xD1FFAB1E lsl w2, w2, #8 and w2, w2, #0xD1FFAB1E add w0, w0, w2 movz w2, #0xD1FFAB1E movk w2, #0xD1FFAB1E LSL #16 add w0, w0, w2 str w0, [x21] add x20, x20, #4 add x21, x21, #4 sub w19, w19, #4 cmp x20, x1 bhi G_M000_IG38 G_M000_IG07: ldr w2, [x20] sub w0, w2, #128 uxth w0, w0 cmp w0, #0xD1FFAB1E blo G_M000_IG34 G_M000_IG08: b G_M000_IG12 G_M000_IG09: sub w22, w22, w0 sub w19, w19, w0 cmp w22, #2 blt G_M000_IG39 G_M000_IG10: ubfiz x0, x22, #1, #32 add x0, x20, x0 sub x1, x0, #4 ldr q16, [@RWD00] G_M000_IG11: ldr w2, [x20] G_M000_IG12: tst w2, #0xD1FFAB1E beq G_M000_IG15 G_M000_IG13: tst w2, #0xD1FFAB1E bne G_M000_IG33 cbz w19, G_M000_IG60 G_M000_IG14: b G_M000_IG32 G_M000_IG15: cmp w19, #2 blt G_M000_IG67 G_M000_IG16: orr w2, w2, w2, LSR #8 strh w2, [x21] add x20, x20, #4 add x21, x21, #2 sub w19, w19, #2 sub x0, x1, x20 add x0, x0, x0, LSR #63 asr x0, x0, #1 add w0, w0, #2 mov w0, w0 sxtw x2, w19 cmp x0, x2 ble G_M000_IG18 G_M000_IG17: b G_M000_IG19 G_M000_IG18: mov x2, x0 G_M000_IG19: lsr w0, w2, #3 mov w3, wzr cmp w0, #0 bls G_M000_IG22 G_M000_IG20: ldr q17, [x20] cmtst v18.8h, v17.8h, v16.8h sminp v18.8h, v18.8h, v18.8h umov x4, v18.d[0] cbnz x4, G_M000_IG25 G_M000_IG21: sqxtun v17.8b, v17.8h str d17, [x21] add x20, x20, #16 add x21, x21, #8 add w3, w3, #1 cmp w3, w0 blo G_M000_IG20 G_M000_IG22: sub w19, w19, w3, LSL #3 tbz w2, #2, G_M000_IG37 G_M000_IG23: ldr x0, [x20] tst x0, #0xD1FFAB1E bne G_M000_IG26 G_M000_IG24: ins v17.d[0], x0 sqxtun v17.8b, v17.8h st1 {v17.s}[0], [x21] add x20, x20, #8 b G_M000_IG65 G_M000_IG25: sub w19, w19, w3, LSL #3 umov x0, v17.d[0] tst x0, #0xD1FFAB1E beq G_M000_IG29 G_M000_IG26: sxtw w2, w0 tst w2, #0xD1FFAB1E bne G_M000_IG13 G_M000_IG27: orr w2, w2, w2, LSR #8 strh w2, [x21] add x20, x20, #4 add x21, x21, #2 sub w19, w19, #2 lsr x2, x0, #32 b G_M000_IG13 G_M000_IG28: cmp w19, #6 blt G_M000_IG53 b G_M000_IG30 G_M000_IG29: sqxtun v18.8b, v17.8h st1 {v18.s}[0], [x21] add x20, x20, #8 add x21, x21, #4 sub w19, w19, #4 mov w0, #1 umov x0, v17.d[1] b G_M000_IG26 G_M000_IG30: lsl w3, w2, #2 and w0, w3, #0xD1FFAB1E and w3, w2, #63 orr w0, w0, w3, LSL #16 lsr w3, w2, #4 and w3, w3, #0xD1FFAB1E lsr w4, w2, #12 and w4, w4, #15 orr w3, w3, w4 add w0, w0, w3 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 add w0, w0, w3 str w0, [x21] lsr w0, w2, #22 and w0, w0, #63 lsr w2, w2, #8 and w2, w2, #0xD1FFAB1E add w0, w0, w2 mov w2, #0xD1FFAB1E add w0, w0, w2 strh w0, [x21, #0x04] add x20, x20, #4 add x21, x21, #6 sub w19, w19, #6 cmp x20, x1 bhi G_M000_IG38 G_M000_IG31: b G_M000_IG47 G_M000_IG32: strb w2, [x21] add x20, x20, #2 add x21, x21, #1 sub w19, w19, #1 cmp x20, x1 bhi G_M000_IG38 ldr w2, [x20] G_M000_IG33: tst w2, #0xD1FFAB1E bne G_M000_IG48 G_M000_IG34: sub w0, w2, #0xD1FFAB1E, LSL #12 movn w3, #0xD1FFAB1E LSL #16 cmp w0, w3 bls G_M000_IG05 G_M000_IG35: cmp w19, #2 blt G_M000_IG60 G_M000_IG36: lsl w0, w2, #2 and w0, w0, #0xD1FFAB1E and w3, w2, #63 add w0, w0, w3 mov w3, #0xD1FFAB1E add w0, w0, w3 uxth w0, w0 rev16 w0, w0 uxth w0, w0 strh w0, [x21] cmp w2, #0xD1FFAB1E, LSL #12 bhs G_M000_IG62 cmp w19, #3 blt G_M000_IG66 lsr w2, w2, #16 strb w2, [x21, #0x02] add x20, x20, #4 add x21, x21, #3 sub w19, w19, #3 G_M000_IG37: cmp x20, x1 bls G_M000_IG11 G_M000_IG38: sub x0, x1, x20 add x0, x0, x0, LSR #63 asr x0, x0, #1 add w22, w0, #2 G_M000_IG39: cbz w22, G_M000_IG44 G_M000_IG40: ldrh w3, [x20] G_M000_IG41: cmp w3, #127 bhi G_M000_IG56 G_M000_IG42: cbz w19, G_M000_IG60 strb w3, [x21] add x20, x20, #2 add x21, x21, #1 G_M000_IG43: cmp w22, #1 bgt G_M000_IG60 G_M000_IG44: mov w0, wzr G_M000_IG45: str x20, [x23] str x21, [x24] G_M000_IG46: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG47: ldr w2, [x20] tst w2, #0xD1FFAB1E beq G_M000_IG12 G_M000_IG48: movn w0, #0xD1FFAB1E add w0, w2, w0 tst w0, #0xD1FFAB1E beq G_M000_IG64 G_M000_IG49: tst w2, #0xD1FFAB1E beq G_M000_IG53 G_M000_IG50: mov w0, #0xD1FFAB1E add w0, w2, w0 mov w3, #0xD1FFAB1E cmp w0, w3 blo G_M000_IG53 G_M000_IG51: b G_M000_IG28 G_M000_IG52: cbz w19, G_M000_IG60 b G_M000_IG54 G_M000_IG53: cmp w19, #3 blt G_M000_IG60 lsl w0, w2, #2 and w0, w0, #0xD1FFAB1E uxth w3, w2 add w0, w0, w3, LSR #12 mov w3, #0xD1FFAB1E add w0, w0, w3 strh w0, [x21] and w0, w2, #63 orr w0, w0, #0xD1FFAB1E strb w0, [x21, #0x02] add x20, x20, #2 add x21, x21, #3 sub w19, w19, #3 cmp w2, #0xD1FFAB1E, LSL #12 bhs G_M000_IG63 b G_M000_IG52 G_M000_IG54: lsr w2, w2, #16 strb w2, [x21] add x20, x20, #2 add x21, x21, #1 sub w19, w19, #1 cmp x20, x1 bhi G_M000_IG38 ldr w2, [x20] tst w2, #0xD1FFAB1E bne G_M000_IG48 G_M000_IG55: b G_M000_IG12 G_M000_IG56: cmp w3, #0xD1FFAB1E bhs G_M000_IG58 G_M000_IG57: cmp w19, #2 blt G_M000_IG60 and w0, w3, #63 orr w0, w0, #0xD1FFAB1E strb w0, [x21, #0x01] lsr w3, w3, #6 orr w0, w3, #0xD1FFAB1E strb w0, [x21] add x20, x20, #2 add x21, x21, #2 b G_M000_IG43 G_M000_IG58: movn w0, #0xD1FFAB1E add w0, w3, w0 cmp w0, #0xD1FFAB1E bls G_M000_IG59 cmp w19, #3 blt G_M000_IG60 and w0, w3, #63 orr w0, w0, #0xD1FFAB1E strb w0, [x21, #0x02] lsr w0, w3, #6 and w0, w0, #63 orr w0, w0, #0xD1FFAB1E strb w0, [x21, #0x01] lsr w0, w3, #12 orr w0, w0, #0xD1FFAB1E strb w0, [x21] add x20, x20, #2 add x21, x21, #3 b G_M000_IG43 G_M000_IG59: mov w0, #0xD1FFAB1E cmp w3, w0 bhi G_M000_IG61 mov w0, #2 b G_M000_IG45 G_M000_IG60: mov w0, #1 b G_M000_IG45 G_M000_IG61: mov w0, #3 b G_M000_IG45 G_M000_IG62: add x20, x20, #2 add x21, x21, #2 sub w19, w19, #2 cmp x20, x1 bhi G_M000_IG38 ldr w2, [x20] b G_M000_IG48 G_M000_IG63: cmp x20, x1 bhi G_M000_IG38 ldr w2, [x20] b G_M000_IG13 G_M000_IG64: movz w0, #0xD1FFAB1E movk w0, #0xD1FFAB1E LSL #16 add w0, w2, w0 tst w0, #0xD1FFAB1E bne G_M000_IG61 cmp w19, #4 blt G_M000_IG60 add w2, w2, #64 and w0, w2, #3 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 orr w0, w3, w0, LSL #20 movz w3, #0xD1FFAB1E movk w3, #63 LSL #16 and w3, w2, w3 rev w3, w3 ror w3, w3, #16 orr w0, w0, w3 lsr w3, w2, #6 and w3, w3, #0xD1FFAB1E orr w0, w0, w3 and w2, w2, #252 orr w0, w0, w2, LSL #6 str w0, [x21] add x20, x20, #4 G_M000_IG65: add x21, x21, #4 sub w19, w19, #4 b G_M000_IG37 G_M000_IG66: add x20, x20, #2 add x21, x21, #2 b G_M000_IG60 G_M000_IG67: uxth w3, w2 b G_M000_IG41 RWD00 dq FF80FF80FF80FF80h, FF80FF80FF80FF80h ; Total bytes of code 1420 5527: JIT compiled System.Text.Unicode.Utf8Utility:TranscodeToUtf8(ulong,int,ulong,int,byref,byref) [Tier1 with Static PGO, IL size=1559, code size=1420] ; Assembly listing for method System.Text.Ascii:NarrowUtf16ToAscii(ulong,ulong,ulong):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 294769 ; 0 inlinees with PGO data; 10 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: mov x0, xzr cmp x21, #32 bhs G_M000_IG14 G_M000_IG03: sub x1, x21, x0 cmp x1, #4 blo G_M000_IG07 G_M000_IG04: add x2, x0, x1 sub x2, x2, #4 G_M000_IG05: lsl x3, x0, #1 ldr x22, [x19, x3] tst x22, #0xD1FFAB1E bne G_M000_IG16 G_M000_IG06: ins v16.d[0], x22 sqxtun v16.8b, v16.8h umov w3, v16.s[0] str w3, [x20, x0] add x0, x0, #4 cmp x0, x2 bls G_M000_IG05 G_M000_IG07: tbz w1, #1, G_M000_IG10 G_M000_IG08: lsl x2, x0, #1 ldr w2, [x19, x2] tst w2, #0xD1FFAB1E bne G_M000_IG17 G_M000_IG09: add x3, x20, x0 strb w2, [x3] lsr w2, w2, #16 strb w2, [x3, #0x01] add x0, x0, #2 G_M000_IG10: tbz w1, #0, G_M000_IG13 G_M000_IG11: lsl x1, x0, #1 ldrh w2, [x19, x1] cmp w2, #127 bhi G_M000_IG13 G_M000_IG12: strb w2, [x20, x0] add x0, x0, #1 G_M000_IG13: ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG14: ldr x22, [x19] tst x22, #0xD1FFAB1E bne G_M000_IG16 G_M000_IG15: mov x0, x19 mov x1, x20 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG03 G_M000_IG16: sxtw w2, w22 tst w2, #0xD1FFAB1E beq G_M000_IG18 G_M000_IG17: tst w2, #0xD1FFAB1E beq G_M000_IG12 b G_M000_IG13 G_M000_IG18: add x1, x20, x0 strb w2, [x1] lsr w2, w2, #16 strb w2, [x1, #0x01] lsr x2, x22, #32 add x0, x0, #2 b G_M000_IG17 ; Total bytes of code 288 5528: JIT compiled System.Text.Ascii:NarrowUtf16ToAscii(ulong,ulong,ulong) [Tier1 with Static PGO, IL size=491, code size=288] ; Assembly listing for method Microsoft.Win32.SafeHandles.SafeFileHandle:GetFileOptions():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! str x19, [sp, #0x28] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x40] dmb ishld cmn w0, #1 beq G_M000_IG04 G_M000_IG03: ldr x19, [sp, #0x28] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: add x2, fp, #32 add x1, fp, #16 mov x0, x19 mov w3, #4 mov w4, #16 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbnz w0, G_M000_IG06 mov w0, wzr ldr w1, [fp, #0x20] mov w2, #0xD1FFAB1E tst w1, #48 csel w0, w0, w2, ne ldr w1, [fp, #0x20] orr w2, w0, #0xD1FFAB1E tst w1, #2 csel w0, w0, w2, eq ldr w1, [fp, #0x20] orr w2, w0, #0xD1FFAB1E tst w1, #0xD1FFAB1E csel w0, w0, w2, eq ldr w1, [fp, #0x20] orr w2, w0, #0xD1FFAB1E tst w1, #4 csel w0, w0, w2, eq ldr w1, [fp, #0x20] orr w2, w0, #0xD1FFAB1E tst w1, #0xD1FFAB1E csel w0, w0, w2, eq ldr w1, [fp, #0x20] orr w2, w0, #0xD1FFAB1E tst w1, #8 csel w0, w0, w2, eq dmb ish str w0, [x19, #0x40] G_M000_IG05: ldr x19, [sp, #0x28] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG06: bl Interop+NtDll:RtlNtStatusToDosError(int):uint sxtw w19, w0 mov w0, #85 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x1, x0 mov w0, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 272 5529: JIT compiled Microsoft.Win32.SafeHandles.SafeFileHandle:GetFileOptions() [Tier1, IL size=159, code size=272] ; Assembly listing for method System.IO.RandomAccess:GetNativeOverlappedForSyncHandle(Microsoft.Win32.SafeHandles.SafeFileHandle,long):System.Threading.NativeOverlapped ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x30] mov fp, sp mov x19, x1 mov x20, x8 G_M000_IG02: stp xzr, xzr, [fp, #0x10] stp xzr, xzr, [fp, #0x20] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbz w0, G_M000_IG04 G_M000_IG03: str w19, [fp, #0x20] asr x0, x19, #32 str w0, [fp, #0x24] G_M000_IG04: ldp q16, q17, [fp, #0x10] stp q16, q17, [x20] G_M000_IG05: ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 88 5530: JIT compiled System.IO.RandomAccess:GetNativeOverlappedForSyncHandle(Microsoft.Win32.SafeHandles.SafeFileHandle,long) [Tier1, IL size=39, code size=88] ; Assembly listing for method Microsoft.Win32.SafeHandles.SafeFileHandle:get_CanSeek():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldr w0, [x19, #0x10] dmb ishld tbnz w0, #0, G_M000_IG06 G_M000_IG03: ldr w20, [x19, #0x44] dmb ishld cmn w20, #1 bne G_M000_IG04 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 sxtw w20, w0 dmb ish str w20, [x19, #0x44] G_M000_IG04: cmp w20, #1 cset x0, eq G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: mov w0, wzr G_M000_IG07: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 116 5531: JIT compiled Microsoft.Win32.SafeHandles.SafeFileHandle:get_CanSeek() [Tier1, IL size=20, code size=116] ; Assembly listing for method System.Runtime.InteropServices.SafeHandle:DangerousAddRef(byref):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 366510 ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add x2, x0, #16 ldar w3, [x2] tbnz w3, #0, G_M000_IG05 add w4, w3, #4 mov w5, w3 casal w5, w4, [x2] cmp w5, w3 bne G_M000_IG02 G_M000_IG03: mov w0, #1 strb w0, [x1] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 80 5532: JIT compiled System.Runtime.InteropServices.SafeHandle:DangerousAddRef(byref) [Tier1 with Static PGO, IL size=45, code size=80] ; Assembly listing for method System.Runtime.InteropServices.SafeHandle:InternalRelease(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 379525 ; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr w21, [x19, #0x10] dmb ishld uxtb w22, w20 cbnz w22, G_M000_IG10 G_M000_IG03: and w23, w21, #0xD1FFAB1E cbz w23, G_M000_IG18 and w0, w21, #0xD1FFAB1E cmp w0, #4 beq G_M000_IG14 G_M000_IG04: mov w0, wzr G_M000_IG05: uxtb w0, w0 sub w1, w21, #4 cmp w23, #4 beq G_M000_IG13 G_M000_IG06: cbnz w22, G_M000_IG12 G_M000_IG07: add x2, x19, #16 mov w3, w21 casal w3, w1, [x2] cmp w3, w21 bne G_M000_IG02 G_M000_IG08: cbnz w0, G_M000_IG16 G_M000_IG09: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: tbz w21, #1, G_M000_IG03 G_M000_IG11: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: orr w1, w1, #2 b G_M000_IG07 G_M000_IG13: orr w1, w1, #1 b G_M000_IG06 G_M000_IG14: ldrb w0, [x19, #0x14] cbz w0, G_M000_IG04 G_M000_IG15: mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x40] ldr x1, [x1, #0x20] blr x1 cmp w0, #0 cset x0, eq b G_M000_IG05 G_M000_IG16: bl System.Runtime.InteropServices.Marshal:GetLastPInvokeError():int sxtw w20, w0 mov x0, x19 ldr x1, [x19] ldr x1, [x1, #0x40] ldr x1, [x1, #0x38] blr x1 mov w0, w20 G_M000_IG17: ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x40 b System.Runtime.InteropServices.Marshal:SetLastPInvokeError(int) G_M000_IG18: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 292 5533: JIT compiled System.Runtime.InteropServices.SafeHandle:InternalRelease(bool) [Tier1 with Static PGO, IL size=120, code size=292] ; Assembly listing for method System.IO.Strategies.OSFileStreamStrategy:get_IsClosed():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x18] ldr w0, [x0, #0x10] dmb ishld and w0, w0, #1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 32 5534: JIT compiled System.IO.Strategies.OSFileStreamStrategy:get_IsClosed() [Tier1, IL size=12, code size=32] ; Assembly listing for method System.IO.StreamWriter:Flush(bool,bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 6 inlinees without PGO data G_M000_IG01: sub sp, sp, #80 stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] str x23, [sp, #0x38] stp fp, lr, [sp, #0x40] add fp, sp, #64 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #-0x38] mov x19, x0 mov w20, w1 mov w21, w2 G_M000_IG02: ldrb w0, [x19, #0x5B] cbnz w0, G_M000_IG15 ldr w0, [x19, #0x50] uxtb w1, w20 orr w0, w0, w1 uxtb w1, w21 orr w0, w0, w1 cbnz w0, G_M000_IG05 G_M000_IG03: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x38] cmp xip0, xip1 beq G_M000_IG04 bl CORINFO_HELP_FAIL_FAST G_M000_IG04: sub sp, fp, #64 ldp fp, lr, [sp, #0x40] ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] add sp, sp, #80 ret lr G_M000_IG05: ldrb w0, [x19, #0x59] cbnz w0, G_M000_IG06 mov w0, #1 strb w0, [x19, #0x59] ldr x0, [x19, #0x28] ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x30] blr x1 str x0, [fp, #-0x30] mov w2, w1 cmp w2, #0 ble G_M000_IG06 ldr x3, [x19, #0x20] mov x0, x3 ldr x1, [fp, #-0x30] ldr x3, [x3] ldr x3, [x3, #0x60] ldr x3, [x3, #0x38] blr x3 G_M000_IG06: ldr x0, [x19, #0x38] cbz x0, G_M000_IG07 add x22, x0, #16 ldr w23, [x0, #0x08] b G_M000_IG09 G_M000_IG07: ldr x0, [x19, #0x28] ldr w1, [x19, #0x50] ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x28] blr x2 cmp w0, #0xD1FFAB1E bgt G_M000_IG08 ldr wzr, [sp] sub sp, sp, #0xD1FFAB1E mov x22, sp mov w23, #0xD1FFAB1E b G_M000_IG09 G_M000_IG08: ldr x0, [x19, #0x28] ldr x1, [x19, #0x40] ldr w1, [x1, #0x08] ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x28] blr x2 sxtw x1, w0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #56 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF add x22, x0, #16 ldr w23, [x0, #0x08] G_M000_IG09: ldr x0, [x19, #0x30] ldr x1, [x19, #0x40] ldr w2, [x19, #0x50] cbnz x1, G_M000_IG10 cbnz w2, G_M000_IG16 mov x1, xzr mov w2, wzr b G_M000_IG11 G_M000_IG10: ldr w3, [x1, #0x08] cmp w3, w2 blo G_M000_IG16 add x1, x1, #16 G_M000_IG11: mov x3, x22 mov w4, w23 uxtb w5, w21 ldr x6, [x0] ldr x6, [x6, #0x48] ldr x6, [x6, #0x10] blr x6 sxtw w2, w0 str wzr, [x19, #0x50] cmp w2, #0 ble G_M000_IG12 ldr x0, [x19, #0x20] cmp w2, w23 bhi G_M000_IG16 mov x1, x22 ldr x3, [x0] ldr x3, [x3, #0x60] ldr x3, [x3, #0x38] blr x3 G_M000_IG12: tst w20, #255 beq G_M000_IG13 ldr x0, [x19, #0x20] ldr x1, [x0] ldr x1, [x1, #0x50] ldr x1, [x1, #0x30] blr x1 G_M000_IG13: movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x38] cmp xip0, xip1 beq G_M000_IG14 bl CORINFO_HELP_FAIL_FAST G_M000_IG14: sub sp, fp, #64 ldp fp, lr, [sp, #0x40] ldr x23, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] add sp, sp, #80 ret lr G_M000_IG15: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG16: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 620 5535: JIT compiled System.IO.StreamWriter:Flush(bool,bool) [Tier1, IL size=272, code size=620] ; Assembly listing for method System.Text.UTF8Encoding:GetMaxByteCount(int):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x20, x0 mov w19, w1 G_M000_IG02: tbnz w19, #31, G_M000_IG06 sxtw x0, w19 add x19, x0, #1 ldr x0, [x20, #0x10] ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 cmp w0, #1 ble G_M000_IG04 G_M000_IG03: ldr x0, [x20, #0x10] ldr x1, [x0] ldr x1, [x1, #0x40] ldr x1, [x1, #0x28] blr x1 sxtw x0, w0 mul x19, x0, x19 G_M000_IG04: mov x0, #3 mul x19, x19, x0 mov x0, #0xD1FFAB1E cmp x19, x0 bgt G_M000_IG07 mov w0, w19 G_M000_IG05: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG06: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG07: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 288 5536: JIT compiled System.Text.UTF8Encoding:GetMaxByteCount(int) [Tier1, IL size=79, code size=288] ; Assembly listing for method System.Text.EncoderExceptionFallback:get_MaxCharCount():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5537: JIT compiled System.Text.EncoderExceptionFallback:get_MaxCharCount() [Tier1, IL size=2, code size=20] ; Assembly listing for method System.Text.Encoder:GetBytes(System.ReadOnlySpan`1[ushort],System.Span`1[ubyte],bool):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG02: mov x6, #1 cmp w2, #0 csel x1, x1, x6, ne str x1, [fp, #0x18] cmp w4, #0 csel x3, x3, x6, ne str x3, [fp, #0x10] uxtb w5, w5 ldr x6, [x0] ldr x6, [x6, #0x48] ldr x6, [x6, #0x08] blr x6 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 72 5538: JIT compiled System.Text.Encoder:GetBytes(System.ReadOnlySpan`1[ushort],System.Span`1[ubyte],bool) [Tier1, IL size=44, code size=72] ; Assembly listing for method System.Text.EncoderNLS:GetBytes(ulong,int,ulong,int,bool):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 4 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x6, x0 mov w19, w2 mov w20, w4 G_M000_IG02: cbz x1, G_M000_IG04 cbz x3, G_M000_IG05 tbnz w20, #31, G_M000_IG06 tbnz w19, #31, G_M000_IG07 strb w5, [x6, #0x26] mov w0, #1 strb w0, [x6, #0x27] ldr x0, [x6, #0x18] mov w2, w19 mov w4, w20 mov x5, x6 ldr x6, [x0] ldr x6, [x6, #0x70] ldr x6, [x6, #0x38] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x6 G_M000_IG04: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG05: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG06: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG07: movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 288 5539: JIT compiled System.Text.EncoderNLS:GetBytes(ulong,int,ulong,int,bool) [Tier1, IL size=78, code size=288] ; Assembly listing for method System.Text.Encoding:GetBytes(ulong,int,ulong,int,System.Text.EncoderNLS):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x21, x0 mov x22, x1 mov w19, w2 mov x23, x3 mov w24, w4 mov x20, x5 G_M000_IG02: mov w25, wzr str wzr, [fp, #0x10] mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 cbnz w0, G_M000_IG05 G_M000_IG03: add x5, fp, #16 mov x0, x21 mov x1, x22 mov w2, w19 mov x3, x23 mov w4, w24 ldr x6, [x21] ldr x6, [x6, #0x78] ldr x6, [x6] blr x6 sxtw w25, w0 ldr w0, [fp, #0x10] cmp w0, w19 bne G_M000_IG05 str w19, [x20, #0x20] mov w0, w25 G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: mov x0, x21 mov x1, x22 mov w2, w19 mov x3, x23 mov w4, w24 ldr w5, [fp, #0x10] mov w6, w25 mov x7, x20 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 G_M000_IG06: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 252 5540: JIT compiled System.Text.Encoding:GetBytes(ulong,int,ulong,int,System.Text.EncoderNLS) [Tier1, IL size=57, code size=252] ; Assembly listing for method System.Text.EncoderNLS:get_HasLeftoverData():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrh w1, [x0, #0x24] cbnz w1, G_M000_IG07 G_M000_IG03: ldr x0, [x0, #0x10] cbz x0, G_M000_IG05 ldr x1, [x0] ldr x1, [x1, #0x48] ldr x1, [x1] blr x1 cmp w0, #0 cset x0, gt G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: mov w0, #1 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 80 5541: JIT compiled System.Text.EncoderNLS:get_HasLeftoverData() [Tier1, IL size=35, code size=80] ; Assembly listing for method System.Text.UTF8Encoding:GetBytesFast(ulong,int,ulong,int,byref):int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x28] str x21, [sp, #0x38] mov fp, sp mov x19, x1 mov x20, x3 mov w3, w4 mov x21, x5 G_M000_IG02: add x4, fp, #32 add x5, fp, #24 mov x0, x19 mov w1, w2 mov x2, x20 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr x0, [fp, #0x20] sub x0, x0, x19 add x0, x0, x0, LSR #63 asr x0, x0, #1 str w0, [x21] ldr x0, [fp, #0x18] sub x0, x0, x20 G_M000_IG03: ldr x21, [sp, #0x38] ldp x19, x20, [sp, #0x28] ldp fp, lr, [sp], #0x40 ret lr ; Total bytes of code 116 5542: JIT compiled System.Text.UTF8Encoding:GetBytesFast(ulong,int,ulong,int,byref) [Tier1, IL size=33, code size=116] ; Assembly listing for method System.IO.FileStream:Write(System.ReadOnlySpan`1[ubyte]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] ldr x3, [x0] ldr x3, [x3, #0x60] ldr x3, [x3, #0x38] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 32 5543: JIT compiled System.IO.FileStream:Write(System.ReadOnlySpan`1[ubyte]) [Tier1, IL size=13, code size=32] ; Assembly listing for method System.IO.Strategies.OSFileStreamStrategy:Write(System.ReadOnlySpan`1[ubyte]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w2 G_M000_IG02: ldr x2, [x19, #0x18] ldr w2, [x2, #0x10] dmb ishld tbnz w2, #0, G_M000_IG04 ldr w2, [x19, #0x30] tbz w2, #1, G_M000_IG05 mov w2, w20 ldp x0, x3, [x19, #0x18] movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [x19, #0x20] add x0, x0, w20, UXTW str x0, [x19, #0x20] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 144 5544: JIT compiled System.IO.Strategies.OSFileStreamStrategy:Write(System.ReadOnlySpan`1[ubyte]) [Tier1, IL size=75, code size=144] ; Assembly listing for method System.IO.RandomAccess:WriteAtOffset(Microsoft.Win32.SafeHandles.SafeFileHandle,System.ReadOnlySpan`1[ubyte],long) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x80]! stp x19, x20, [sp, #0x60] stp x21, x22, [sp, #0x70] mov fp, sp str xzr, [fp, #0x38] mov x19, x0 mov x22, x1 mov w21, w2 mov x20, x3 G_M000_IG02: cbnz w21, G_M000_IG04 G_M000_IG03: ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG04: ldrsb wzr, [x19] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 tbz w0, #30, G_M000_IG06 mov x1, x22 mov w2, w21 mov x0, x19 mov x3, x20 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 G_M000_IG05: ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG06: stp xzr, xzr, [fp, #0x10] stp xzr, xzr, [fp, #0x20] mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz w0, G_M000_IG07 str w20, [fp, #0x20] asr x0, x20, #32 str w0, [fp, #0x24] G_M000_IG07: ldp q16, q17, [fp, #0x10] stp q16, q17, [fp, #0x40] str x22, [fp, #0x38] mov x1, x22 mov x0, x19 add x4, fp, #64 add x3, fp, #48 mov w2, w21 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 cbz w0, G_M000_IG09 G_M000_IG08: ldp x21, x22, [sp, #0x70] ldp x19, x20, [sp, #0x60] ldp fp, lr, [sp], #0x80 ret lr G_M000_IG09: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x1, [x19, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 316 5545: JIT compiled System.IO.RandomAccess:WriteAtOffset(Microsoft.Win32.SafeHandles.SafeFileHandle,System.ReadOnlySpan`1[ubyte],long) [Tier1, IL size=89, code size=316] ; Assembly listing for method Interop+Kernel32:WriteFile(System.Runtime.InteropServices.SafeHandle,ulong,int,byref,ulong):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0xD0]! stp x19, x20, [sp, #0x80] stp x21, x22, [sp, #0x90] stp x23, x24, [sp, #0xA0] stp x25, x26, [sp, #0xB0] stp x27, x28, [sp, #0xC0] mov fp, sp str xzr, [fp, #0x68] add x5, sp, #208 str x5, [fp, #0x78] str x0, [fp, #0x60] mov x20, x1 mov w21, w2 mov x19, x3 mov x22, x4 G_M000_IG02: add x0, fp, #32 mov x1, x12 bl CORINFO_HELP_INIT_PINVOKE_FRAME mov x23, x0 mov x1, sp str x1, [fp, #0x40] mov x1, fp str x1, [fp, #0x50] str wzr, [fp, #0x70] G_M000_IG03: add x1, fp, #112 ldr x0, [fp, #0x60] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] ldr wzr, [x0] blr x2 ldr x0, [fp, #0x60] ldr x24, [x0, #0x08] G_M000_IG04: str x19, [fp, #0x68] mov w0, wzr movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 G_M000_IG05: blr x1 mov x0, x24 mov x1, x20 mov w2, w21 mov x3, x19 mov x4, x22 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 str x5, [fp, #0x30] adr x5, [G_M000_IG08] str x5, [fp, #0x48] add x5, fp, #32 str x5, [x23, #0x10] strb wzr, [x23, #0x0C] G_M000_IG06: movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 G_M000_IG07: blr x5 G_M000_IG08: mov w19, w0 mov w0, #1 strb w0, [x23, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr w0, [x0] cmp w0, #0 beq G_M000_IG09 bl CORINFO_HELP_STOP_FOR_GC G_M000_IG09: ldr x0, [fp, #0x28] str x0, [x23, #0x10] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG10: blr x0 sxtw w20, w0 G_M000_IG11: str xzr, [fp, #0x68] G_M000_IG12: ldrb w0, [fp, #0x70] cbz w0, G_M000_IG14 G_M000_IG13: ldr x0, [fp, #0x60] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG14: mov w0, w20 bl System.Runtime.InteropServices.Marshal:SetLastPInvokeError(int) sxtw w0, w19 G_M000_IG15: ldp x27, x28, [sp, #0xC0] ldp x25, x26, [sp, #0xB0] ldp x23, x24, [sp, #0xA0] ldp x21, x22, [sp, #0x90] ldp x19, x20, [sp, #0x80] ldp fp, lr, [sp], #0xD0 ret lr G_M000_IG16: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #208 str x3, [sp, #0x18] G_M000_IG17: str xzr, [fp, #0x68] G_M000_IG18: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG19: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] add x3, fp, #208 str x3, [sp, #0x18] G_M000_IG20: ldrb w0, [fp, #0x70] cbz w0, G_M000_IG21 ldr x0, [fp, #0x60] ldrsb wzr, [x0] mov w1, wzr movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG21: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 544 5546: JIT compiled Interop+Kernel32:WriteFile(System.Runtime.InteropServices.SafeHandle,ulong,int,byref,ulong) [Tier1, IL size=84, code size=544] ; Assembly listing for method System.IO.FileStream:Flush():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w1, wzr ldr x2, [x0] ldr x2, [x2, #0x68] ldr x2, [x2, #0x28] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x2 ; Total bytes of code 32 5547: JIT compiled System.IO.FileStream:Flush() [Tier1, IL size=8, code size=32] ; Assembly listing for method System.IO.FileStream:Flush(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 mov w20, w1 G_M000_IG02: ldr x0, [x19, #0x10] ldr x1, [x0] ldr x1, [x1, #0x68] ldr x1, [x1, #0x28] blr x1 cbnz w0, G_M000_IG04 ldr x0, [x19, #0x10] uxtb w1, w20 ldr x2, [x0] ldr x2, [x2, #0x70] ldr x2, [x2] G_M000_IG03: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 br x2 G_M000_IG04: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 100 5548: JIT compiled System.IO.FileStream:Flush(bool) [Tier1, IL size=31, code size=100] ; Assembly listing for method System.IO.Strategies.OSFileStreamStrategy:Flush(bool):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: tst w1, #255 beq G_M000_IG04 G_M000_IG03: ldr x1, [x0, #0x18] ldr w1, [x1, #0x10] dmb ishld tbnz w1, #0, G_M000_IG04 ldr w1, [x0, #0x30] tbnz w1, #1, G_M000_IG05 G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: ldr x0, [x0, #0x18] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 76 5549: JIT compiled System.IO.Strategies.OSFileStreamStrategy:Flush(bool) [Tier1, IL size=23, code size=76] ; Assembly listing for method System.IO.StreamWriter:WriteLine(System.String):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 7 single block inlinees; 5 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] mov fp, sp str xzr, [fp, #0x18] str xzr, [fp, #0x10] mov x19, x0 G_M000_IG02: ldr x0, [x19, #0x48] ldr w0, [x0, #0x34] dmb ishld mov w2, #0xD1FFAB1E tst w0, w2 beq G_M000_IG26 cbnz x1, G_M000_IG04 G_M000_IG03: mov x20, xzr mov w21, wzr b G_M000_IG05 align [0 bytes for IG08] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: add x20, x1, #12 ldr w21, [x1, #0x08] G_M000_IG05: ldr x0, [x19, #0x48] ldr w0, [x0, #0x34] dmb ishld mov w1, #0xD1FFAB1E tst w0, w1 beq G_M000_IG26 cmp w21, #4 bgt G_M000_IG10 G_M000_IG06: ldp w1, w0, [x19, #0x50] sub w0, w0, w1 cmp w0, w21 blt G_M000_IG10 G_M000_IG07: mov w0, wzr cmp w21, #0 ble G_M000_IG16 ldr x1, [x19, #0x40] G_M000_IG08: mov x2, x1 ldr w3, [x19, #0x50] add w4, w3, #1 str w4, [x19, #0x50] ldrh w4, [x20, w0, UXTW #2] ldr w22, [x2, #0x08] cmp w3, w22 bhs G_M000_IG29 add x2, x2, #16 strh w4, [x2, w3, UXTW #2] add w0, w0, #1 cmp w0, w21 blt G_M000_IG08 G_M000_IG09: b G_M000_IG16 G_M000_IG10: ldrb w1, [x19, #0x5B] cbnz w1, G_M000_IG27 ldr x1, [x19, #0x40] str x20, [fp, #0x18] ldr w22, [x1, #0x08] cmp w22, #0 bls G_M000_IG29 add x0, x1, #16 str x0, [fp, #0x10] ldr x23, [fp, #0x10] ldr w24, [x19, #0x50] cmp w21, #0 ble G_M000_IG15 G_M000_IG11: cmp w22, w24 beq G_M000_IG23 G_M000_IG12: sub w25, w22, w24 cmp w25, w21 bgt G_M000_IG22 G_M000_IG13: sxtw w26, w25 G_M000_IG14: lsl w0, w26, #1 sxtw x2, w0 sbfiz x0, x24, #1, #32 add x0, x23, x0 cmp x2, #0 blt G_M000_IG25 mov x1, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w0, [x19, #0x50] add w0, w0, w26 str w0, [x19, #0x50] add w24, w24, w26 sbfiz x0, x26, #1, #32 add x20, x20, x0 sub w21, w21, w26 cmp w21, #0 bgt G_M000_IG11 G_M000_IG15: str xzr, [fp, #0x10] str xzr, [fp, #0x18] G_M000_IG16: ldr x20, [x19, #0x08] mov w21, wzr ldr w0, [x20, #0x08] cmp w0, #0 ble G_M000_IG19 G_M000_IG17: ldp w0, w1, [x19, #0x50] cmp w0, w1 beq G_M000_IG28 G_M000_IG18: ldr x0, [x19, #0x40] ldr w1, [x19, #0x50] sxtw w2, w1 add x3, x20, #16 ldrh w3, [x3, w21, UXTW #2] ldr w4, [x0, #0x08] cmp w2, w4 bhs G_M000_IG29 add x0, x0, #16 strh w3, [x0, w2, UXTW #2] add w0, w1, #1 str w0, [x19, #0x50] add w21, w21, #1 ldr w0, [x20, #0x08] cmp w0, w21 bgt G_M000_IG17 G_M000_IG19: ldrb w0, [x19, #0x58] cbnz w0, G_M000_IG24 G_M000_IG20: str xzr, [fp, #0x18] str xzr, [fp, #0x10] G_M000_IG21: ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG22: sxtw w26, w21 b G_M000_IG14 G_M000_IG23: mov x0, x19 mov w1, wzr mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov w24, wzr b G_M000_IG12 G_M000_IG24: mov x0, x19 mov w1, #1 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG20 G_M000_IG25: bl CORINFO_HELP_OVERFLOW G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG27: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG28: mov x0, x19 mov w1, wzr mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG18 G_M000_IG29: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 692 5550: JIT compiled System.IO.StreamWriter:WriteLine(System.String) [Tier1, IL size=20, code size=692] ; Assembly listing for method System.Linq.Enumerable:TryGetSpan[double](System.Collections.Generic.IEnumerable`1[double],byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x1 G_M000_IG02: cbz x0, G_M000_IG08 mov w20, #1 ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG04 G_M000_IG03: add x1, x0, #16 ldr w0, [x0, #0x08] str x1, [x19] str w0, [x19, #0x08] b G_M000_IG06 G_M000_IG04: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG05 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 str x0, [x19] str w1, [x19, #0x08] b G_M000_IG06 G_M000_IG05: stp xzr, xzr, [x19] mov w20, wzr G_M000_IG06: mov w0, w20 G_M000_IG07: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 ; Total bytes of code 172 5551: JIT compiled System.Linq.Enumerable:TryGetSpan[double](System.Collections.Generic.IEnumerable`1[double],byref) [Tier1, IL size=112, code size=172] ; Assembly listing for method System.ReadOnlySpan`1[double]:op_Implicit(double[]):System.ReadOnlySpan`1[double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x0, G_M000_IG04 G_M000_IG03: mov x0, xzr mov w1, wzr b G_M000_IG05 G_M000_IG04: add x1, x0, #16 ldr w0, [x0, #0x08] mov w2, w0 mov x0, x1 mov w1, w2 G_M000_IG05: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 52 5552: JIT compiled System.ReadOnlySpan`1[double]:op_Implicit(double[]) [Tier1, IL size=7, code size=52] ; Assembly listing for method System.ReadOnlySpan`1[double]:get_IsEmpty():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x08] cmp w0, #0 cset x0, eq G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 28 5553: JIT compiled System.ReadOnlySpan`1[double]:get_IsEmpty() [Tier1, IL size=10, code size=28] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:.ctor(int,int,int,int,long,double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str x5, [x0, #0x10] str d0, [x0, #0x18] str w1, [x0, #0x08] stp w2, w3, [x0] str w4, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 36 5554: JIT compiled BenchmarkDotNet.Reports.Measurement:.ctor(int,int,int,int,long,double) [Tier1, IL size=46, code size=36] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 19 inlinees with PGO data; 27 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! str d8, [sp, #0x18] stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] mov fp, sp str xzr, [fp, #0x10] mov x19, x0 G_M000_IG02: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 movn w0, #0xD1FFAB1E LSL #16 str w0, [x20, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #16 bl CORINFO_HELP_NEWARR_1_VC add x14, x20, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF ldr w21, [x19] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str w21, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x21, x0 ldr w22, [x19, #0x04] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST str w22, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 mov x0, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov w1, #15 mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz x0, G_M000_IG04 G_M000_IG03: ldr w2, [x0, #0x08] add x1, x0, #12 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG04: ldr w0, [x20, #0x18] ldr x1, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, w0 bls G_M000_IG08 G_M000_IG05: add x1, x1, #16 mov w2, #32 strh w2, [x1, w0, UXTW #2] ldr w0, [x20, #0x18] add w0, w0, #1 str w0, [x20, #0x18] G_M000_IG06: ldr w21, [x19, #0x0C] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x22, [x0] mov x0, x22 tbz w21, #31, G_M000_IG09 G_M000_IG07: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x2, [x0, #0x28] mov w0, w21 movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG10 G_M000_IG08: mov x0, x20 mov w1, #32 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG06 G_M000_IG09: mov w0, w21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG10: mov w1, #2 mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 cbz x0, G_M000_IG12 G_M000_IG11: ldr w2, [x0, #0x08] add x1, x0, #12 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG12: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 mov x0, x20 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr x21, [x19, #0x10] mov x0, x22 tbz x21, #63, G_M000_IG14 G_M000_IG13: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 ldr x2, [x0, #0x28] mov x0, x21 movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG15 G_M000_IG14: mov x0, x21 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG15: cbz x0, G_M000_IG17 G_M000_IG16: ldr w2, [x0, #0x08] add x1, x0, #12 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG17: ldr w0, [x20, #0x18] ldr x1, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, w0 bls G_M000_IG27 G_M000_IG18: add x1, x1, #16 mov w2, #32 strh w2, [x1, w0, UXTW #2] ldr w0, [x20, #0x18] add w0, w0, #1 str w0, [x20, #0x18] G_M000_IG19: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 mov x0, x20 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x21, x1, #12 mov x1, x21 mov x0, x20 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr d8, [x19, #0x18] mov x0, x22 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 fmov d0, d8 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 cbz x0, G_M000_IG21 G_M000_IG20: ldr w2, [x0, #0x08] add x1, x0, #12 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG21: ldr w0, [x20, #0x18] ldr x1, [x20, #0x08] ldr w2, [x1, #0x08] cmp w2, w0 bls G_M000_IG28 G_M000_IG22: add x1, x1, #16 mov w2, #32 strh w2, [x1, w0, UXTW #2] ldr w0, [x20, #0x18] add w0, w0, #1 str w0, [x20, #0x18] G_M000_IG23: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 mov x0, x20 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x1, x21 mov x0, x20 mov w2, #2 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr d0, [x19, #0x18] ldr x0, [x19, #0x10] scvtf d16, x0 fdiv d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 str d0, [fp, #0x10] mov x2, x22 add x0, fp, #16 mov x1, xzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 mov x4, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 cbz x0, G_M000_IG25 G_M000_IG24: ldr w2, [x0, #0x08] add x1, x0, #12 mov x0, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG25: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 mov x0, x20 mov w2, #3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x20 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG26: ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldr d8, [sp, #0x18] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG27: mov x0, x20 mov w1, #32 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG19 G_M000_IG28: mov x0, x20 mov w1, #32 mov w2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG23 ; Total bytes of code 1368 5555: JIT compiled BenchmarkDotNet.Reports.Measurement:ToString() [Tier1, IL size=304, code size=1368] ; Assembly listing for method System.Text.StringBuilder:.ctor():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp mov x19, x0 G_M000_IG02: movn w0, #0xD1FFAB1E LSL #16 str w0, [x19, #0x20] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #16 bl CORINFO_HELP_NEWARR_1_VC add x14, x19, #8 mov x15, x0 bl CORINFO_HELP_ASSIGN_REF G_M000_IG03: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 68 5556: JIT compiled System.Text.StringBuilder:.ctor() [Tier1, IL size=31, code size=68] ; Assembly listing for method System.String:Concat(System.String,System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 65802 ; 5 inlinees with PGO data; 2 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x20, x0 mov x19, x1 G_M000_IG02: cbz x20, G_M000_IG06 G_M000_IG03: ldr w21, [x20, #0x08] cbz w21, G_M000_IG06 G_M000_IG04: cbz x19, G_M000_IG10 G_M000_IG05: b G_M000_IG12 G_M000_IG06: cbz x19, G_M000_IG15 G_M000_IG07: ldr w22, [x19, #0x08] cbz w22, G_M000_IG15 G_M000_IG08: mov x0, x19 G_M000_IG09: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG10: mov x0, x20 G_M000_IG11: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: ldr w22, [x19, #0x08] cbz w22, G_M000_IG10 G_M000_IG13: sxtw w23, w21 add w0, w22, w23 bl System.String:FastAllocateString(int):System.String mov x24, x0 ldr w2, [x24, #0x08] cmp w2, w21 blt G_M000_IG18 add x0, x24, #12 add x1, x20, #12 mov w2, w21 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldr w2, [x24, #0x08] sub w2, w2, w23 cmp w2, w22 blt G_M000_IG17 add x2, x24, #12 sbfiz x0, x23, #1, #32 add x0, x2, x0 add x1, x19, #12 mov w2, w22 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x24 G_M000_IG14: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG15: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG16: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG18: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 396 5557: JIT compiled System.String:Concat(System.String,System.String) [Tier1 with Static PGO, IL size=73, code size=396] ; Assembly listing for method System.String:PadRight(int,ushort):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 2 inlinees with PGO data; 3 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] mov fp, sp mov x20, x0 mov w19, w1 mov w21, w2 G_M000_IG02: tbnz w19, #31, G_M000_IG07 ldr w22, [x20, #0x08] sub w23, w19, w22 cmp w23, #0 bgt G_M000_IG05 G_M000_IG03: mov x0, x20 G_M000_IG04: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG05: mov w0, w19 bl System.String:FastAllocateString(int):System.String mov x19, x0 ldrsb wzr, [x19] add x24, x19, #12 mov x0, x24 add x1, x20, #12 sxtw x2, w22 lsl x20, x2, #1 mov x2, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 add x0, x24, x20 uxth w2, w21 mov w1, w23 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 G_M000_IG06: ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG07: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov w1, w19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 ; Total bytes of code 240 5558: JIT compiled System.String:PadRight(int,ushort) [Tier1, IL size=83, code size=240] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:get_IterationIndex():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5559: JIT compiled BenchmarkDotNet.Reports.Measurement:get_IterationIndex() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.Int32:ToString(System.IFormatProvider):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr w19, [x0] tbz w19, #31, G_M000_IG06 G_M000_IG03: cbz x1, G_M000_IG08 mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x2, [x0, #0x28] mov w0, w19 movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG06: mov w0, w19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG04 ; Total bytes of code 144 5560: JIT compiled System.Int32:ToString(System.IFormatProvider) [Tier1, IL size=11, code size=144] ; Assembly listing for method System.Number:UInt32ToDecStr(uint):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cmp w0, #0xD1FFAB1E bhs G_M000_IG05 G_M000_IG03: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG04: ldp fp, lr, [sp], #0x10 br x1 G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 64 5561: JIT compiled System.Number:UInt32ToDecStr(uint) [Tier1, IL size=22, code size=64] ; Assembly listing for method System.Int64:ToString(System.IFormatProvider):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str x19, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x19, [x0] tbz x19, #63, G_M000_IG06 G_M000_IG03: cbz x1, G_M000_IG08 mov x0, x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldr x2, [x0, #0x28] mov x0, x19 movn w1, #0 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG05: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x3 G_M000_IG06: mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG07: ldr x19, [sp, #0x18] ldp fp, lr, [sp], #0x20 br x1 G_M000_IG08: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 b G_M000_IG04 ; Total bytes of code 144 5562: JIT compiled System.Int64:ToString(System.IFormatProvider) [Tier1, IL size=10, code size=144] ; Assembly listing for method System.Number:UInt64ToDecStr(ulong):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 2 inlinees with PGO data; 10 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! stp x19, x20, [sp, #0x20] mov fp, sp str xzr, [fp, #0x18] mov x19, x0 G_M000_IG02: cmp x19, #0xD1FFAB1E bhs G_M000_IG05 G_M000_IG03: mov w0, w19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 G_M000_IG04: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr G_M000_IG05: orr x0, x19, #1 clz x0, x0 eor w0, w0, #63 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldrb w0, [x1, w0, SXTW #2] ubfiz x1, x0, #3, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x1, [x1, x2] cmp x19, x1 cset x1, lo sub w20, w0, w1 mov w0, w20 bl System.String:FastAllocateString(int):System.String cbnz x0, G_M000_IG06 mov x1, xzr b G_M000_IG07 align [0 bytes for IG08] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: add x1, x0, #12 str x1, [fp, #0x18] ldr x1, [fp, #0x18] G_M000_IG07: sbfiz x2, x20, #1, #32 add x1, x1, x2 cmp x19, #10 blo G_M000_IG11 cmp x19, #100 blo G_M000_IG09 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG08: sub x1, x1, #4 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 movk x3, #0xD1FFAB1E LSL #48 lsr x4, x19, #2 umulh x3, x4, x3 lsr x3, x3, #2 mov x4, #100 msub x4, x3, x4, x19 mov x19, x3 mov x3, x2 add x3, x3, #16 lsl w4, w4, #2 mov w4, w4 add x3, x3, x4 ldr w3, [x3] str w3, [x1] cmp x19, #100 bhs G_M000_IG08 G_M000_IG09: cmp x19, #10 blo G_M000_IG11 G_M000_IG10: sub x1, x1, #4 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] add x2, x2, #16 lsl w3, w19, #2 mov w3, w3 add x2, x2, x3 ldr w2, [x2] str w2, [x1] b G_M000_IG12 G_M000_IG11: add x2, x19, #48 strh w2, [x1, #-0x02] G_M000_IG12: str xzr, [fp, #0x18] G_M000_IG13: ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 356 5563: JIT compiled System.Number:UInt64ToDecStr(ulong) [Tier1, IL size=71, code size=356] ; Assembly listing for method System.Number+Grisu3:TryRunDouble(double,int,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 10 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #0xD1FFAB1E]! stp x19, x20, [sp, #0xE8] stp x21, x22, [sp, #0xF8] str x23, [sp, #0xD1FFAB1E] mov fp, sp mov w20, w0 mov x19, x1 G_M000_IG02: mov x0, v0.d[0] tbnz x0, #63, G_M000_IG04 G_M000_IG03: b G_M000_IG05 G_M000_IG04: fneg d0, d0 G_M000_IG05: cmn w20, #1 bne G_M000_IG09 G_M000_IG06: mov x0, v0.d[0] and x3, x0, #0xD1FFAB1E lsr x0, x0, #52 and w0, w0, #0xD1FFAB1E str w0, [fp, #0x98] ldr w0, [fp, #0x98] cbz w0, G_M000_IG07 orr x3, x3, #0xD1FFAB1E ldr w0, [fp, #0x98] sub w0, w0, #0xD1FFAB1E str w0, [fp, #0x98] b G_M000_IG08 G_M000_IG07: movn w0, #0xD1FFAB1E str w0, [fp, #0x98] G_M000_IG08: str x3, [fp, #0x90] add x0, fp, #144 add x3, fp, #176 add x2, fp, #192 mov w1, #52 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 ldr x0, [fp, #0x90] ldr w1, [fp, #0x98] clz x2, x0 lsl x0, x0, x2 sub w1, w1, w2 str x0, [fp, #0xD0] str w1, [fp, #0xD8] add x21, x19, #16 mov x0, x21 ldr x20, [x0] ldr w22, [x0, #0x08] ldr w0, [fp, #0xD8] add w0, w0, #64 neg w1, w0 sub w0, w1, #60 sub w1, w1, #32 add x2, fp, #136 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 stp x0, x1, [fp, #0x78] add x0, fp, #208 add x1, fp, #120 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp x0, x1, [fp, #0x68] add x0, fp, #192 add x1, fp, #120 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp x0, x1, [fp, #0x58] add x0, fp, #176 add x1, fp, #120 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp x0, x1, [fp, #0x48] mov x3, x20 mov w4, w22 add x1, fp, #104 add x2, fp, #72 add x0, fp, #88 add x5, fp, #224 add x6, fp, #64 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 ldr w1, [fp, #0x88] neg w1, w1 ldr w2, [fp, #0x40] add w20, w1, w2 b G_M000_IG12 G_M000_IG09: mov x0, v0.d[0] and x1, x0, #0xD1FFAB1E lsr x0, x0, #52 and w0, w0, #0xD1FFAB1E cbz w0, G_M000_IG10 orr x1, x1, #0xD1FFAB1E sub w0, w0, #0xD1FFAB1E b G_M000_IG11 G_M000_IG10: movn w0, #0xD1FFAB1E G_M000_IG11: clz x2, x1 lsl x1, x1, x2 sub w0, w0, w2 str x1, [fp, #0xA0] str w0, [fp, #0xA8] add x21, x19, #16 mov x0, x21 ldr x22, [x0] ldr w23, [x0, #0x08] ldr w0, [fp, #0xA8] add w0, w0, #64 neg w1, w0 sub w0, w1, #60 sub w1, w1, #32 add x2, fp, #56 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 stp x0, x1, [fp, #0x28] add x0, fp, #160 add x1, fp, #40 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp x0, x1, [fp, #0x18] mov x2, x22 mov w3, w23 add x5, fp, #16 add x0, fp, #24 add x4, fp, #224 mov w1, w20 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr w1, [fp, #0x38] neg w1, w1 ldr w2, [fp, #0x10] add w20, w1, w2 G_M000_IG12: cbz w0, G_M000_IG14 G_M000_IG13: ldr w1, [fp, #0xE0] add w1, w1, w20 str w1, [x19, #0x04] ldr w1, [fp, #0xE0] ldr w2, [x21, #0x08] cmp w1, w2 bhs G_M000_IG15 ldr x1, [x21] ldr w2, [fp, #0xE0] strb wzr, [x1, w2, UXTW #2] ldr w1, [fp, #0xE0] str w1, [x19] G_M000_IG14: ldr x23, [sp, #0xD1FFAB1E] ldp x21, x22, [sp, #0xF8] ldp x19, x20, [sp, #0xE8] ldp fp, lr, [sp], #0xD1FFAB1E ret lr G_M000_IG15: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 696 5564: JIT compiled System.Number+Grisu3:TryRunDouble(double,int,byref) [Tier1, IL size=134, code size=696] ; Assembly listing for method System.Number+DiyFp:Normalize():System.Number+DiyFp:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: ldr x1, [x0] clz x2, x1 lsl x1, x1, x2 ldr w0, [x0, #0x08] sub w0, w0, w2 str w0, [fp, #0x1C] mov x0, x1 ldr w1, [fp, #0x1C] G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 48 5565: JIT compiled System.Number+DiyFp:Normalize() [Tier1, IL size=37, code size=48] ; Assembly listing for method System.Number+Grisu3:TryRunCounted(byref,int,System.Span`1[ubyte],byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] mov fp, sp mov x19, x0 mov w22, w1 mov x23, x2 mov w24, w3 mov x20, x4 mov x21, x5 G_M000_IG02: ldr w0, [x19, #0x08] add w0, w0, #64 neg w1, w0 sub w0, w1, #60 sub w1, w1, #32 add x2, fp, #40 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 stp x0, x1, [fp, #0x30] add x1, fp, #48 mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 stp x0, x1, [fp, #0x18] mov x2, x23 mov w3, w24 add x5, fp, #16 add x0, fp, #24 mov w1, w22 mov x4, x20 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 ldr w1, [fp, #0x28] neg w1, w1 ldr w2, [fp, #0x10] add w1, w1, w2 str w1, [x21] G_M000_IG03: ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x70 ret lr ; Total bytes of code 208 5566: JIT compiled System.Number+Grisu3:TryRunCounted(byref,int,System.Span`1[ubyte],byref,byref) [Tier1, IL size=71, code size=208] ; Assembly listing for method System.Number+Grisu3:GetCachedPowerForBinaryExponentRange(int,int,byref):System.Number+DiyFp ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: add w0, w0, #63 scvtf d16, w0 ldr d17, [@RWD00] fmul d16, d16, d17 frintp d16, d16 fcvtzs w0, d16 add w0, w0, #0xD1FFAB1E asr w1, w0, #31 and w1, w1, #7 add w0, w1, w0 asr w0, w0, #3 add w0, w0, #1 cmp w0, #87 bhs G_M000_IG04 mov w0, w0 lsl x1, x0, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldrsh w3, [x1, x3] str w3, [x2] lsl x0, x0, #3 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x0, [x2, x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldrsh w1, [x1, x2] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG04: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dq 3FD34413509F79FFh ; 0.301029996 ; Total bytes of code 144 5567: JIT compiled System.Number+Grisu3:GetCachedPowerForBinaryExponentRange(int,int,byref) [Tier1, IL size=91, code size=144] ; Assembly listing for method System.Number+DiyFp:Multiply(byref):System.Number+DiyFp:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x2, [x0] lsr x2, x2, #32 ldr w3, [x0] ldr x4, [x1] lsr x4, x4, #32 ldr w5, [x1] mov w2, w2 mov w4, w4 mul x6, x2, x4 mov w3, w3 mul x4, x3, x4 mov w5, w5 mul x2, x2, x5 mul x3, x3, x5 lsr x3, x3, #32 add x3, x3, w2, UXTW add x3, x3, w4, UXTW mov x5, #0xD1FFAB1E add x3, x3, x5 ldr w0, [x0, #0x08] ldr w1, [x1, #0x08] add w0, w0, w1 add w1, w0, #64 add x0, x6, x2, LSR #32 add x0, x0, x4, LSR #32 add x0, x0, x3, LSR #32 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 120 5568: JIT compiled System.Number+DiyFp:Multiply(byref) [Tier1, IL size=136, code size=120] ; Assembly listing for method System.Number+Grisu3:TryDigitGenCounted(byref,int,System.Span`1[ubyte],byref,byref):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 4 ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x70]! stp x19, x20, [sp, #0x20] stp x21, x22, [sp, #0x30] stp x23, x24, [sp, #0x40] stp x25, x26, [sp, #0x50] stp x27, x28, [sp, #0x60] mov fp, sp str x2, [fp, #0x10] str w3, [fp, #0x1C] mov w20, w1 mov x19, x4 mov x21, x5 G_M000_IG02: mov x22, #1 ldr w1, [x0, #0x08] neg w2, w1 and w23, w2, #63 mov x2, #1 lsl x24, x2, x23 ldr x0, [x0] lsr x25, x0, x23 sub x2, x24, #1 and x26, x0, x2 cbnz x26, G_M000_IG05 cmp w20, #11 blt G_M000_IG16 G_M000_IG03: str wzr, [x19] str wzr, [x21] mov w0, wzr G_M000_IG04: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG05: neg w1, w1 neg w1, w1 add w1, w1, #64 mov w0, w25 mov x2, x21 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 str wzr, [x19] b G_M000_IG07 G_M000_IG06: cmp w0, #0 beq G_M000_IG15 udiv w3, w25, w0 msub w25, w3, w0, w25 ldr w4, [x19] ldr w27, [fp, #0x1C] cmp w4, w27 bhs G_M000_IG17 add w3, w3, #48 ldr x28, [fp, #0x10] strb w3, [x28, w4, UXTW #2] ldr w3, [x19] add w3, w3, #1 str w3, [x19] sub w20, w20, #1 ldr w3, [x21] sub w3, w3, #1 str w3, [x21] cbz w20, G_M000_IG08 movz w3, #0xD1FFAB1E movk w3, #0xD1FFAB1E LSL #16 umull x0, w0, w3 lsr x0, x0, #35 str x28, [fp, #0x10] str w27, [fp, #0x1C] G_M000_IG07: ldr w3, [x21] cmp w3, #0 bgt G_M000_IG06 ldr w27, [fp, #0x1C] ldr x28, [fp, #0x10] G_M000_IG08: cbnz w20, G_M000_IG11 mov w3, w25 lsl x3, x3, x23 add x3, x3, x26 mov w4, w0 lsl x4, x4, x23 mov x0, x28 mov w1, w27 ldr w2, [x19] mov x5, #1 mov x6, x21 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG09: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG10: mov x0, #10 mul x26, x26, x0 mul x22, x22, x0 lsr x0, x26, x23 ldr w1, [x19] cmp w1, w27 bhs G_M000_IG17 add w0, w0, #48 strb w0, [x28, w1, UXTW #2] ldr w0, [x19] add w0, w0, #1 str w0, [x19] sub w20, w20, #1 ldr w0, [x21] sub w0, w0, #1 str w0, [x21] sub x0, x24, #1 and x26, x26, x0 G_M000_IG11: cmp x26, x22 ccmp w20, #0, nzc, hi bgt G_M000_IG10 cbz w20, G_M000_IG13 cmp w27, #0 bls G_M000_IG17 strb wzr, [x28] str wzr, [x19] str wzr, [x21] mov w0, wzr G_M000_IG12: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG13: mov x0, x28 mov w1, w27 ldr w2, [x19] mov x3, x26 mov x4, x24 mov x5, x22 mov x6, x21 movz x7, #0xD1FFAB1E movk x7, #0xD1FFAB1E LSL #16 movk x7, #0xD1FFAB1E LSL #32 ldr x7, [x7] blr x7 G_M000_IG14: ldp x27, x28, [sp, #0x60] ldp x25, x26, [sp, #0x50] ldp x23, x24, [sp, #0x40] ldp x21, x22, [sp, #0x30] ldp x19, x20, [sp, #0x20] ldp fp, lr, [sp], #0x70 ret lr G_M000_IG15: bl CORINFO_HELP_THROWDIVZERO G_M000_IG16: sub w0, w20, #1 cmp w0, #10 bhs G_M000_IG17 sub w0, w20, #1 ubfiz x0, x0, #2, #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr w0, [x0, x2] cmp w25, w0 bhs G_M000_IG05 b G_M000_IG03 G_M000_IG17: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 676 5569: JIT compiled System.Number+Grisu3:TryDigitGenCounted(byref,int,System.Span`1[ubyte],byref,byref) [Tier1 with Static PGO, IL size=372, code size=676] ; Assembly listing for method System.Number:FindSection(System.ReadOnlySpan`1[ushort],int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 101 ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x30]! mov fp, sp str xzr, [fp, #0x28] str x0, [fp, #0x18] str w1, [fp, #0x24] G_M000_IG02: cbnz w2, G_M000_IG04 mov w0, wzr G_M000_IG03: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG04: ldr x0, [fp, #0x18] str x0, [fp, #0x28] mov w1, wzr G_M000_IG05: ldr w3, [fp, #0x24] cmp w1, w3 blt G_M000_IG07 mov w0, wzr G_M000_IG06: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG07: add w4, w1, #1 ldrh w1, [x0, w1, SXTW #2] sxtw w5, w1 cmp w1, #34 bhi G_M000_IG08 cbz w1, G_M000_IG15 cmp w1, #34 beq G_M000_IG09 str w3, [fp, #0x24] mov w1, w4 b G_M000_IG05 G_M000_IG08: cmp w1, #39 beq G_M000_IG09 cmp w5, #59 beq G_M000_IG13 mov w1, #92 cmp w4, w3 ccmp w5, w1, 0, lt str w3, [fp, #0x24] mov w1, w4 bne G_M000_IG05 b G_M000_IG12 G_M000_IG09: cmp w4, w3 bge G_M000_IG11 str w3, [fp, #0x24] mov w5, w1 mov w1, w4 mov w4, w5 ldrh w5, [x0, w1, SXTW #2] cbz w5, G_M000_IG05 sxtw w5, w1 add w1, w5, #1 ldrh w5, [x0, w5, SXTW #2] cmp w5, w4 bne G_M000_IG10 mov w4, w1 ldr w3, [fp, #0x24] str w3, [fp, #0x24] mov w1, w4 b G_M000_IG05 G_M000_IG10: mov w5, w1 mov w1, w4 mov w4, w5 ldr w3, [fp, #0x24] b G_M000_IG09 G_M000_IG11: str w3, [fp, #0x24] mov w1, w4 b G_M000_IG05 G_M000_IG12: ldrh w4, [x0, w1, SXTW #2] cbz w4, G_M000_IG05 add w1, w1, #1 b G_M000_IG05 G_M000_IG13: sub w2, w2, #1 str w3, [fp, #0x24] mov w1, w4 cbnz w2, G_M000_IG05 ldr w3, [fp, #0x24] cmp w1, w3 bge G_M000_IG15 ldrh w2, [x0, w1, SXTW #2] cbz w2, G_M000_IG15 ldrh w0, [x0, w1, SXTW #2] cmp w0, #59 beq G_M000_IG15 mov w0, w1 G_M000_IG14: ldp fp, lr, [sp], #0x30 ret lr G_M000_IG15: mov w0, wzr G_M000_IG16: ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 352 5570: JIT compiled System.Number:FindSection(System.ReadOnlySpan`1[ushort],int) [Tier1 with Static PGO, IL size=190, code size=352] ; Assembly listing for method BenchmarkDotNet.Reports.Measurement:GetAverageTime():Perfolizer.Horology.TimeInterval:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr d0, [x0, #0x18] ldr x0, [x0, #0x10] scvtf d16, x0 fdiv d0, d0, d16 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x0 ; Total bytes of code 48 5571: JIT compiled BenchmarkDotNet.Reports.Measurement:GetAverageTime() [Tier1, IL size=20, code size=48] ; Assembly listing for method Perfolizer.Horology.TimeInterval:FromNanoseconds(double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 5572: JIT compiled Perfolizer.Horology.TimeInterval:FromNanoseconds(double) [Tier1, IL size=12, code size=16] ; Assembly listing for method Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,double):Perfolizer.Horology.TimeInterval ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: fmul d0, d0, d1 G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5573: JIT compiled Perfolizer.Horology.TimeInterval:op_Multiply(Perfolizer.Horology.TimeInterval,double) [Tier1, IL size=15, code size=20] ; Assembly listing for method Perfolizer.Horology.TimeInterval:.ctor(double):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: str d0, [x0] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5574: JIT compiled Perfolizer.Horology.TimeInterval:.ctor(double) [Tier1, IL size=8, code size=20] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToString(System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp mov x5, x2 G_M000_IG02: mov x4, x3 mov x2, x1 mov x3, x5 mov x1, xzr movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x5 ; Total bytes of code 52 5575: JIT compiled Perfolizer.Horology.TimeInterval:ToString(System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation) [Tier1, IL size=11, code size=52] ; Assembly listing for method Perfolizer.Horology.TimeInterval:ToString(Perfolizer.Horology.TimeUnit,System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 14 inlinees with PGO data; 12 single block inlinees; 4 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x30] stp x21, x22, [sp, #0x40] stp x23, x24, [sp, #0x50] mov fp, sp mov x23, x0 mov x20, x1 mov x19, x2 mov x22, x3 mov x21, x4 G_M000_IG02: cbnz x20, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_VC ldr d16, [x23] str d16, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x20, x0 G_M000_IG04: cbnz x19, G_M000_IG06 G_M000_IG05: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x19, [x0] G_M000_IG06: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 cmp x22, #0 csel x22, x22, x0, ne movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] cmp x21, #0 csel x21, x21, x0, ne ldr d0, [x23] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str d0, [fp, #0x28] ldrb w0, [x21, #0x0C] cbz w0, G_M000_IG17 G_M000_IG07: ldr x0, [x20, #0x08] ldr w1, [x21, #0x08] ldrsb wzr, [x0] mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x20, x0 ldr d0, [fp, #0x28] str d0, [fp, #0x20] cbz x19, G_M000_IG20 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG08: ldr d0, [fp, #0x20] mov x0, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 mov x21, x0 cbz x21, G_M000_IG21 G_M000_IG09: ldr w23, [x21, #0x08] cbz w23, G_M000_IG21 G_M000_IG10: cbz x20, G_M000_IG14 G_M000_IG11: ldr w0, [x20, #0x08] cbz w0, G_M000_IG14 G_M000_IG12: add w0, w23, w0 add w0, w0, #1 bl System.String:FastAllocateString(int):System.String mov x22, x0 ldr w2, [x22, #0x08] cmp w2, w23 blt G_M000_IG24 add x0, x22, #12 add x1, x21, #12 mov w2, w23 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w1, w23 ldr w0, [x22, #0x08] sub w0, w0, w1 cmp w0, #1 blt G_M000_IG25 add x0, x22, #12 sbfiz x1, x1, #1, #32 add x1, x0, x1 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 add x0, x0, #12 ldrh w2, [x0] strh w2, [x1] add w1, w23, #1 mov x0, x22 mov x2, x20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 G_M000_IG13: ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG14: sxtw w19, w23 add w0, w19, #1 bl System.String:FastAllocateString(int):System.String mov x24, x0 ldr w22, [x24, #0x08] cmp w23, w22 bgt G_M000_IG22 G_M000_IG15: add x20, x24, #12 mov x0, x20 add x1, x21, #12 mov w2, w23 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w0, w22, w19 cmp w0, #0 ble G_M000_IG23 G_M000_IG16: sbfiz x0, x19, #1, #32 add x0, x20, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 add x1, x1, #12 ldrh w2, [x1] strh w2, [x0] mov x0, x24 b G_M000_IG13 G_M000_IG17: ldr d0, [fp, #0x28] str d0, [fp, #0x18] cbz x19, G_M000_IG26 mov x0, x19 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG18: ldr d0, [fp, #0x18] mov x0, x22 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: ldp x23, x24, [sp, #0x50] ldp x21, x22, [sp, #0x40] ldp x19, x20, [sp, #0x30] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG20: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 b G_M000_IG08 G_M000_IG21: mov x1, x20 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 b G_M000_IG13 G_M000_IG22: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x22, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x22 bl CORINFO_HELP_THROW G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG24: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG25: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG26: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x1, x0 b G_M000_IG18 ; Total bytes of code 1024 5576: JIT compiled Perfolizer.Horology.TimeInterval:ToString(Perfolizer.Horology.TimeUnit,System.Globalization.CultureInfo,System.String,Perfolizer.Common.UnitPresentation) [Tier1, IL size=141, code size=1024] ; Assembly listing for method Perfolizer.Horology.TimeUnit:GetBestTimeUnit(double[]):Perfolizer.Horology.TimeUnit ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x18] G_M000_IG02: ldr w1, [x0, #0x08] cbnz w1, G_M000_IG05 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] mov x2, x1 mov w0, wzr add x2, x2, #16 align [4 bytes for IG06] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG06: ldr x3, [x2, w0, UXTW #3] ldr x4, [x3, #0x18] mov x5, #0xD1FFAB1E mul x4, x4, x5 scvtf d16, x4 fcmp d0, d16 blo G_M000_IG09 add w0, w0, #1 cmp w0, #7 blt G_M000_IG06 G_M000_IG07: add x2, fp, #24 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldrb w1, [fp, #0x18] cbz w1, G_M000_IG11 G_M000_IG08: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG09: mov x0, x3 G_M000_IG10: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 224 5577: JIT compiled Perfolizer.Horology.TimeUnit:GetBestTimeUnit(double[]) [Tier1, IL size=71, code size=224] ; Assembly listing for method System.Linq.Enumerable:Min(System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x1 ; Total bytes of code 32 5578: JIT compiled System.Linq.Enumerable:Min(System.Collections.Generic.IEnumerable`1[double]) [Tier1, IL size=7, code size=32] ; Assembly listing for method System.Linq.Enumerable:MinFloat[double](System.Collections.Generic.IEnumerable`1[double]):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 9 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x40]! str d8, [sp, #0x30] str x19, [sp, #0x38] mov fp, sp add x1, sp, #64 str x1, [fp, #0x28] G_M000_IG02: cbz x0, G_M000_IG26 ldr x1, [x0] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG03 add x2, x0, #16 ldr w3, [x0, #0x08] b G_M000_IG04 align [0 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG03: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 cmp x1, x2 bne G_M000_IG12 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x2, x0 sxtw w3, w1 G_M000_IG04: cbz w3, G_M000_IG27 ldr d8, [x2] mov w0, #1 cmp w3, #1 bls G_M000_IG09 G_M000_IG05: cmp w0, w3 bhs G_M000_IG28 ldr d0, [x2, w0, UXTW #3] fcmp d0, d8 bhs G_M000_IG07 G_M000_IG06: fmov d8, d0 b G_M000_IG08 G_M000_IG07: fcmp d0, d0 bne G_M000_IG11 G_M000_IG08: add w0, w0, #1 cmp w0, w3 blo G_M000_IG05 G_M000_IG09: mov v0.8b, v8.8b G_M000_IG10: ldr x19, [sp, #0x38] ldr d8, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG11: ldr x19, [sp, #0x38] ldr d8, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG12: movz x19, #0xD1FFAB1E movk x19, #0xD1FFAB1E LSL #16 movk x19, #0xD1FFAB1E LSL #32 mov x11, x19 ldr x1, [x11] blr x1 str x0, [fp, #0x18] G_M000_IG13: add x11, x19, #8 ldr x1, [x11] blr x1 cbz w0, G_M000_IG17 ldr x0, [fp, #0x18] add x11, x19, #16 ldr x1, [x11] blr x1 fmov d8, d0 fcmp d8, d8 beq G_M000_IG18 str d8, [fp, #0x20] b G_M000_IG20 G_M000_IG14: ldr x0, [fp, #0x18] add x11, x19, #32 ldr x1, [x11] blr x1 fcmp d0, d8 bhs G_M000_IG15 fmov d8, d0 b G_M000_IG18 G_M000_IG15: fcmp d0, d0 beq G_M000_IG18 G_M000_IG16: str d0, [fp, #0x20] b G_M000_IG20 G_M000_IG17: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG18: ldr x0, [fp, #0x18] add x11, x19, #24 ldr x1, [x11] blr x1 cbnz w0, G_M000_IG14 G_M000_IG19: ldr x0, [fp, #0x18] add x11, x19, #40 ldr x1, [x11] blr x1 b G_M000_IG24 G_M000_IG20: ldr x0, [fp, #0x28] bl G_M000_IG29 G_M000_IG21: nop G_M000_IG22: ldr d0, [fp, #0x20] G_M000_IG23: ldr x19, [sp, #0x38] ldr d8, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG24: mov v0.8b, v8.8b G_M000_IG25: ldr x19, [sp, #0x38] ldr d8, [sp, #0x30] ldp fp, lr, [sp], #0x40 ret lr G_M000_IG26: mov w0, #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 brk_windows #0 G_M000_IG27: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG28: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 G_M000_IG29: stp fp, lr, [sp, #-0x30]! str d8, [sp, #0x20] str x19, [sp, #0x28] add x3, fp, #64 str x3, [sp, #0x18] G_M000_IG30: ldr x0, [fp, #0x18] cbz x0, G_M000_IG31 movz x19, #0xD1FFAB1E movk x19, #0xD1FFAB1E LSL #16 movk x19, #0xD1FFAB1E LSL #32 add x11, x19, #40 ldr x1, [x11] blr x1 G_M000_IG31: ldr x19, [sp, #0x28] ldr d8, [sp, #0x20] ldp fp, lr, [sp], #0x30 ret lr ; Total bytes of code 588 5579: JIT compiled System.Linq.Enumerable:MinFloat[double](System.Collections.Generic.IEnumerable`1[double]) [Tier1, IL size=235, code size=588] ; Assembly listing for method Perfolizer.Horology.TimeUnit:Convert(double,Perfolizer.Horology.TimeUnit,Perfolizer.Horology.TimeUnit):double ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! str d8, [sp, #0x18] mov fp, sp G_M000_IG02: ldr x0, [x0, #0x18] scvtf d16, x0 str d0, [fp, #0x10] fmul d8, d0, d16 cbnz x1, G_M000_IG04 G_M000_IG03: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov x1, #1 bl CORINFO_HELP_NEWARR_1_VC ldr d0, [fp, #0x10] str d0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x1, x0 G_M000_IG04: ldr x0, [x1, #0x18] scvtf d0, x0 fdiv d0, d8, d0 G_M000_IG05: ldr d8, [sp, #0x18] ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 108 5580: JIT compiled Perfolizer.Horology.TimeUnit:Convert(double,Perfolizer.Horology.TimeUnit,Perfolizer.Horology.TimeUnit) [Tier1, IL size=37, code size=108] ; Assembly listing for method Perfolizer.Common.UnitPresentation:get_IsVisible():bool:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldrb w0, [x0, #0x0C] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5581: JIT compiled Perfolizer.Common.UnitPresentation:get_IsVisible() [Tier1, IL size=7, code size=20] ; Assembly listing for method Perfolizer.Horology.TimeUnit:get_Name():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5582: JIT compiled Perfolizer.Horology.TimeUnit:get_Name() [Tier1, IL size=7, code size=20] ; Assembly listing for method Perfolizer.Common.UnitPresentation:get_MinUnitWidth():int:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w0, [x0, #0x08] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5583: JIT compiled Perfolizer.Common.UnitPresentation:get_MinUnitWidth() [Tier1, IL size=7, code size=20] ; Assembly listing for method System.String:PadLeft(int):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: mov w2, #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG03: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 36 5584: JIT compiled System.String:PadLeft(int) [Tier1, IL size=10, code size=36] ; Assembly listing for method System.Number+BigInteger:Clear(uint):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp G_M000_IG02: ldrsb wzr, [x0] add x0, x0, #4 lsl w1, w1, #2 mov w1, w1 str x1, [fp, #0x18] cbz x1, G_M000_IG04 G_M000_IG03: cmp x1, #0xD1FFAB1E bhi G_M000_IG05 mov w1, wzr ldr w2, [fp, #0x18] bl CORINFO_HELP_MEMSET G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: ldr x1, [fp, #0x18] movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG06: ldp fp, lr, [sp], #0x20 br x2 ; Total bytes of code 88 5585: JIT compiled System.Number+BigInteger:Clear(uint) [Tier1, IL size=26, code size=88] ; Assembly listing for method System.Number:NumberToString[ushort](byref,byref,ushort,int,System.Globalization.NumberFormatInfo) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; partially interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 78 ; 1 inlinees with PGO data; 29 single block inlinees; 15 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] stp x25, x26, [sp, #0x48] str x27, [sp, #0x58] mov fp, sp mov x22, x0 mov x19, x1 mov w21, w2 mov w20, w3 mov x23, x4 G_M000_IG02: ldrb w0, [x19, #0x0A] cmp w0, #3 cset x2, eq uxth w24, w21 cmp w24, #82 bhi G_M000_IG14 sub w25, w24, #67 cmp w25, #4 bne G_M000_IG07 G_M000_IG03: mov w27, wzr cmp w20, #0 ble G_M000_IG33 G_M000_IG04: mov x0, x19 mov w1, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldrb w4, [x19, #0x08] cbnz w4, G_M000_IG35 G_M000_IG06: sub w4, w21, #2 uxth w4, w4 mov x0, x22 mov x1, x19 mov w2, w20 mov x3, x23 mov w5, w27 movz x6, #0xD1FFAB1E movk x6, #0xD1FFAB1E LSL #16 movk x6, #0xD1FFAB1E LSL #32 ldr x6, [x6] blr x6 b G_M000_IG08 G_M000_IG07: cmp w25, #4 bhi G_M000_IG09 mov w1, w25 adr x0, [@RWD00] ldr w0, [x0, x1, LSL #2] adr x3, [G_M000_IG02] add x0, x0, x3 br x0 G_M000_IG08: ldr x27, [sp, #0x58] ldp x25, x26, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG09: sub w26, w24, #78 cmp w26, #4 bhi G_M000_IG11 mov w1, w26 adr x0, [@RWD20] ldr w0, [x0, x1, LSL #2] adr x3, [G_M000_IG02] add x0, x0, x3 br x0 G_M000_IG10: sub w21, w24, #11 b G_M000_IG03 G_M000_IG11: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG12: bl CORINFO_HELP_THROWDIVZERO G_M000_IG13: bl CORINFO_HELP_OVERFLOW G_M000_IG14: sub w25, w24, #99 cmp w25, #4 bhi G_M000_IG15 mov w0, w25 adr x1, [@RWD40] ldr w1, [x1, x0, LSL #2] adr x3, [G_M000_IG02] add x1, x1, x3 br x1 G_M000_IG15: sub w26, w24, #110 cmp w26, #4 bhi G_M000_IG11 mov w0, w26 adr x1, [@RWD60] ldr w1, [x1, x0, LSL #2] adr x3, [G_M000_IG02] add x1, x1, x3 br x1 G_M000_IG16: tbz w20, #31, G_M000_IG17 ldr w20, [x23, #0xD1FFAB1E] G_M000_IG17: ldr w1, [x19, #0x04] add w1, w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 mov x1, x19 mov w2, w20 mov x3, x23 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG08 G_M000_IG18: tbz w20, #31, G_M000_IG19 ldr w20, [x23, #0xD1FFAB1E] G_M000_IG19: ldr w1, [x19, #0x04] add w1, w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldrb w1, [x19, #0x08] cbz w1, G_M000_IG23 ldr x1, [x23, #0x28] cbnz x1, G_M000_IG20 mov x2, xzr mov w0, wzr b G_M000_IG21 G_M000_IG20: add x2, x1, #12 ldr w0, [x1, #0x08] G_M000_IG21: mov x1, x2 ldr w2, [x22, #0x08] add x3, x22, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 ccmp w0, #1, 0, lo bne G_M000_IG22 ubfiz x0, x2, #1, #32 add x0, x4, x0 ldrh w1, [x1] strh w1, [x0] add w1, w2, #1 str w1, [x22, #0x08] b G_M000_IG23 G_M000_IG22: mov w2, w0 mov x0, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG23: ldr x4, [x23, #0x30] cbnz x4, G_M000_IG24 mov x5, xzr mov w6, wzr b G_M000_IG25 G_M000_IG24: add x5, x4, #12 ldr w6, [x4, #0x08] G_M000_IG25: mov x4, x5 sxtw w5, w6 mov x6, xzr mov w7, wzr mov x0, x22 mov x1, x19 mov w2, w20 mov x3, xzr movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 b G_M000_IG08 G_M000_IG26: tbz w20, #31, G_M000_IG27 ldr w20, [x23, #0xD1FFAB1E] G_M000_IG27: ldr w1, [x19, #0x04] add w1, w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 mov x1, x19 mov w2, w20 mov x3, x23 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG08 G_M000_IG28: mov w0, #6 cmp w20, #0 csel w20, w20, w0, ge add w20, w20, #1 mov x0, x19 mov w1, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 ldrb w1, [x19, #0x08] cbz w1, G_M000_IG32 ldr x1, [x23, #0x28] cbnz x1, G_M000_IG29 mov x2, xzr mov w0, wzr b G_M000_IG30 G_M000_IG29: add x2, x1, #12 ldr w0, [x1, #0x08] G_M000_IG30: mov x1, x2 ldr w2, [x22, #0x08] add x3, x22, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 ccmp w0, #1, 0, lo bne G_M000_IG31 ubfiz x0, x2, #1, #32 add x0, x4, x0 ldrh w1, [x1] strh w1, [x0] add w1, w2, #1 str w1, [x22, #0x08] b G_M000_IG32 G_M000_IG31: mov w2, w0 mov x0, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG32: mov w4, w24 mov x0, x22 mov x1, x19 mov w2, w20 mov x3, x23 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 b G_M000_IG08 G_M000_IG33: ldrb w1, [x19, #0x0A] cmp w1, #2 bne G_M000_IG34 cmn w20, #1 bne G_M000_IG34 mov w27, #1 add x2, x19, #16 ldr w1, [x2, #0x08] cmp w1, #0 bls G_M000_IG41 ldr x1, [x2] ldrb w1, [x1] cbnz w1, G_M000_IG05 b G_M000_IG06 G_M000_IG34: ldr w20, [x19] b G_M000_IG04 G_M000_IG35: ldr x1, [x23, #0x28] cbnz x1, G_M000_IG36 mov x2, xzr mov w0, wzr b G_M000_IG37 G_M000_IG36: add x2, x1, #12 ldr w0, [x1, #0x08] G_M000_IG37: mov x1, x2 ldr w2, [x22, #0x08] add x3, x22, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 ccmp w0, #1, 0, lo bne G_M000_IG38 ubfiz x0, x2, #1, #32 add x0, x4, x0 ldrh w1, [x1] strh w1, [x0] add w1, w2, #1 str w1, [x22, #0x08] b G_M000_IG06 G_M000_IG38: mov w2, w0 mov x0, x22 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG06 G_M000_IG39: tbz w20, #31, G_M000_IG40 ldr w20, [x23, #0xD1FFAB1E] G_M000_IG40: add x1, x19, #4 ldr w0, [x1] add w0, w0, #2 str w0, [x1] ldr w1, [x19, #0x04] add w1, w1, w20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x22 mov x1, x19 mov w2, w20 mov x3, x23 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 b G_M000_IG08 G_M000_IG41: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 RWD00 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG03 - G_M000_IG02 RWD20 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 RWD40 dd G_M000_IG16 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG28 - G_M000_IG02 dd G_M000_IG18 - G_M000_IG02 dd G_M000_IG03 - G_M000_IG02 RWD60 dd G_M000_IG26 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG39 - G_M000_IG02 dd G_M000_IG11 - G_M000_IG02 dd G_M000_IG10 - G_M000_IG02 ; Total bytes of code 1300 5586: JIT compiled System.Number:NumberToString[ushort](byref,byref,ushort,int,System.Globalization.NumberFormatInfo) [Tier1 with Static PGO, IL size=503, code size=1300] ; Assembly listing for method System.Number:FormatNumber[ushort](byref,byref,int,System.Globalization.NumberFormatInfo) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 0 inlinees with PGO data; 20 single block inlinees; 11 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 mov x21, x1 mov w22, w2 mov x20, x3 G_M000_IG02: ldrb w4, [x21, #0x08] cbnz w4, G_M000_IG04 G_M000_IG03: movz x23, #0xD1FFAB1E movk x23, #0xD1FFAB1E LSL #16 movk x23, #0xD1FFAB1E LSL #32 b G_M000_IG05 G_M000_IG04: movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] ldr w5, [x20, #0xD1FFAB1E] cmp w5, #5 bhs G_M000_IG23 add x4, x4, #16 ldr x23, [x4, w5, UXTW #3] G_M000_IG05: mov w24, wzr ldr w25, [x23, #0x08] cmp w25, #0 ble G_M000_IG20 G_M000_IG06: add x4, x23, #12 ldrh w1, [x4, w24, UXTW #2] cmp w1, #35 beq G_M000_IG08 G_M000_IG07: cmp w1, #45 beq G_M000_IG13 b G_M000_IG17 G_M000_IG08: ldr x3, [x20, #0x08] ldr x4, [x20, #0x30] cbnz x4, G_M000_IG09 mov x5, xzr mov w6, wzr b G_M000_IG10 G_M000_IG09: add x5, x4, #12 ldr w6, [x4, #0x08] G_M000_IG10: mov x4, x5 sxtw w5, w6 ldr x6, [x20, #0x38] cbnz x6, G_M000_IG11 mov x7, xzr mov w0, wzr b G_M000_IG12 G_M000_IG11: add x7, x6, #12 ldr w0, [x6, #0x08] G_M000_IG12: mov x6, x7 sxtw w7, w0 mov x0, x19 mov x1, x21 mov w2, w22 movz x8, #0xD1FFAB1E movk x8, #0xD1FFAB1E LSL #16 movk x8, #0xD1FFAB1E LSL #32 ldr x8, [x8] blr x8 b G_M000_IG19 G_M000_IG13: ldr x1, [x20, #0x28] cbnz x1, G_M000_IG14 mov x2, xzr mov w0, wzr b G_M000_IG15 G_M000_IG14: add x2, x1, #12 ldr w0, [x1, #0x08] G_M000_IG15: mov x1, x2 ldr w2, [x19, #0x08] add x3, x19, #16 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w2, w3 ccmp w0, #1, 0, lo bne G_M000_IG16 ubfiz x0, x2, #1, #32 add x0, x4, x0 ldrh w1, [x1] strh w1, [x0] add w1, w2, #1 str w1, [x19, #0x08] b G_M000_IG19 G_M000_IG16: mov w2, w0 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 b G_M000_IG19 G_M000_IG17: ldr w0, [x19, #0x08] add x2, x19, #16 ldr x3, [x2] ldr w2, [x2, #0x08] cmp w0, w2 bhs G_M000_IG18 strh w1, [x3, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] b G_M000_IG19 G_M000_IG18: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG19: add w24, w24, #1 cmp w25, w24 bgt G_M000_IG06 G_M000_IG20: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG21: bl CORINFO_HELP_THROWDIVZERO G_M000_IG22: bl CORINFO_HELP_OVERFLOW G_M000_IG23: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 492 5587: JIT compiled System.Number:FormatNumber[ushort](byref,byref,int,System.Globalization.NumberFormatInfo) [Tier1, IL size=128, code size=492] ; Assembly listing for method System.Globalization.NumberFormatInfo:NumberDecimalSeparatorTChar[ushort]():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x30] cbnz x0, G_M000_IG04 G_M000_IG03: mov x2, xzr mov w1, wzr b G_M000_IG05 G_M000_IG04: add x2, x0, #12 ldr w1, [x0, #0x08] G_M000_IG05: mov x0, x2 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: bl CORINFO_HELP_THROWDIVZERO G_M000_IG08: bl CORINFO_HELP_OVERFLOW brk_windows #0 ; Total bytes of code 60 5588: JIT compiled System.Globalization.NumberFormatInfo:NumberDecimalSeparatorTChar[ushort]() [Tier1, IL size=95, code size=60] ; Assembly listing for method System.Globalization.NumberFormatInfo:NumberGroupSeparatorTChar[ushort]():System.ReadOnlySpan`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 6 single block inlinees; 2 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x38] cbnz x0, G_M000_IG04 G_M000_IG03: mov x2, xzr mov w1, wzr b G_M000_IG05 G_M000_IG04: add x2, x0, #12 ldr w1, [x0, #0x08] G_M000_IG05: mov x0, x2 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG07: bl CORINFO_HELP_THROWDIVZERO G_M000_IG08: bl CORINFO_HELP_OVERFLOW brk_windows #0 ; Total bytes of code 60 5589: JIT compiled System.Globalization.NumberFormatInfo:NumberGroupSeparatorTChar[ushort]() [Tier1, IL size=95, code size=60] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:Cast[ushort,ushort](System.ReadOnlySpan`1[ushort]):System.ReadOnlySpan`1[ushort] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG03: bl CORINFO_HELP_THROWDIVZERO G_M000_IG04: bl CORINFO_HELP_OVERFLOW brk_windows #0 ; Total bytes of code 28 5590: JIT compiled System.Runtime.InteropServices.MemoryMarshal:Cast[ushort,ushort](System.ReadOnlySpan`1[ushort]) [Tier1, IL size=114, code size=28] ; Assembly listing for method System.Number:FormatFixed[ushort](byref,byref,int,int[],System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]) ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 7 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x90]! stp x19, x20, [sp, #0x40] stp x21, x22, [sp, #0x50] stp x23, x24, [sp, #0x60] stp x25, x26, [sp, #0x70] stp x27, x28, [sp, #0x80] mov fp, sp str xzr, [fp, #0x28] mov x19, x0 mov w21, w2 mov x23, x3 mov x24, x4 mov w25, w5 mov x22, x6 mov w20, w7 G_M000_IG02: ldr w26, [x1, #0x04] ldr x27, [x1, #0x10] cmp w26, #0 ble G_M000_IG32 G_M000_IG03: cbz x23, G_M000_IG24 mov w28, wzr sxtw w2, w26 mov w3, wzr ldr w4, [x23, #0x08] str w4, [fp, #0x24] cbz w4, G_M000_IG08 add x5, x23, #16 ldr w0, [x5] sxtw w6, w0 cmp w2, w6 ble G_M000_IG07 align [4 bytes for IG04] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG04: cmp w28, w4 bhs G_M000_IG53 ldr w3, [x5, w28, UXTW #2] cbz w3, G_M000_IG07 add w2, w2, w20 sub w3, w4, #1 cmp w3, w28 ble G_M000_IG06 G_M000_IG05: add w28, w28, #1 G_M000_IG06: cmp w28, w4 bhs G_M000_IG53 ldr w3, [x5, w28, UXTW #2] add w6, w3, w6 orr w3, w6, w2 tbnz w3, #31, G_M000_IG52 cmp w26, w6 ldr w4, [fp, #0x24] bgt G_M000_IG04 G_M000_IG07: cmp w6, #0 csel w3, wzr, w0, eq str w3, [fp, #0x38] ldr w3, [fp, #0x38] G_M000_IG08: mov w28, wzr str wzr, [fp, #0x34] ldr w0, [x1] cmp w26, w0 csel w7, w26, w0, lt str w7, [fp, #0x30] ldr w0, [x19, #0x08] add x8, x19, #16 str x8, [fp, #0x18] mov x1, x8 ldr x5, [x1] ldr w1, [x1, #0x08] mov w9, w0 add x10, x9, w2, UXTW mov w1, w1 cmp x10, x1 bhi G_M000_IG09 add w0, w0, w2 str w0, [x19, #0x08] lsl x0, x9, #1 add x5, x5, x0 b G_M000_IG10 G_M000_IG09: str w3, [fp, #0x38] mov x0, x19 str w2, [fp, #0x3C] mov w1, w2 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 mov x5, x0 ldp w3, w2, [fp, #0x38] ldr w4, [fp, #0x24] G_M000_IG10: str x5, [fp, #0x28] sbfiz x0, x2, #1, #32 add x0, x5, x0 sub x0, x0, #2 sub w1, w26, #1 tbnz w1, #31, G_M000_IG13 G_M000_IG11: sub x2, x0, #2 ldr w7, [fp, #0x30] cmp w1, w7 blt G_M000_IG14 G_M000_IG12: mov w5, #48 b G_M000_IG15 G_M000_IG13: ldr w7, [fp, #0x30] b G_M000_IG21 G_M000_IG14: ldrb w5, [x27, w1, SXTW #2] G_M000_IG15: strh w5, [x0] cmp w3, #0 ble G_M000_IG20 G_M000_IG16: ldr w6, [fp, #0x34] add w6, w6, #1 cmp w6, w3 bne G_M000_IG23 str w6, [fp, #0x34] cbz w1, G_M000_IG20 sub w6, w20, #1 tbnz w6, #31, G_M000_IG18 align [0 bytes for IG17] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG17: mov x0, x2 sub x2, x0, #2 cmp w6, w20 bhs G_M000_IG53 ldrh w5, [x22, w6, UXTW #2] strh w5, [x0] sub w6, w6, #1 tbz w6, #31, G_M000_IG17 G_M000_IG18: sub w0, w4, #1 cmp w0, w28 ble G_M000_IG19 add w28, w28, #1 cmp w28, w4 bhs G_M000_IG53 add x5, x23, #16 ldr w3, [x5, w28, UXTW #2] G_M000_IG19: mov w0, wzr str w0, [fp, #0x34] G_M000_IG20: sub w1, w1, #1 mov x0, x2 tbz w1, #31, G_M000_IG22 G_M000_IG21: add x27, x27, w7, SXTW str xzr, [fp, #0x28] b G_M000_IG34 G_M000_IG22: b G_M000_IG11 G_M000_IG23: str w6, [fp, #0x34] b G_M000_IG20 G_M000_IG24: ldrb w8, [x27] cbnz w8, G_M000_IG26 G_M000_IG25: mov w0, #48 b G_M000_IG27 G_M000_IG26: add x0, x27, #1 mov x20, x0 ldrb w0, [x27] mov x27, x20 G_M000_IG27: uxth w1, w0 ldr w0, [x19, #0x08] add x8, x19, #16 mov x20, x8 mov x2, x20 ldr x3, [x2] ldr w2, [x2, #0x08] cmp w0, w2 bhs G_M000_IG29 G_M000_IG28: strh w1, [x3, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] b G_M000_IG30 G_M000_IG29: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG30: sub w26, w26, #1 cmp w26, #0 bgt G_M000_IG24 G_M000_IG31: str x20, [fp, #0x18] b G_M000_IG34 G_M000_IG32: ldr w0, [x19, #0x08] add x20, x19, #16 mov x1, x20 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG33 mov w1, #48 strh w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] str x20, [fp, #0x18] b G_M000_IG34 G_M000_IG33: mov x0, x19 mov w1, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x20, [fp, #0x18] G_M000_IG34: cmp w21, #0 ble G_M000_IG51 G_M000_IG35: mov x1, x24 sxtw w2, w25 ldr w0, [x19, #0x08] ldr x8, [fp, #0x18] mov x3, x8 ldr x4, [x3] ldr w3, [x3, #0x08] cmp w0, w3 ccmp w2, #1, 0, lo bne G_M000_IG36 ubfiz x2, x0, #1, #32 add x2, x4, x2 ldrh w1, [x1] strh w1, [x2] add w1, w0, #1 str w1, [x19, #0x08] b G_M000_IG37 G_M000_IG36: mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG37: tbz w26, #31, G_M000_IG43 neg w0, w26 cmp w0, w21 csel w20, w0, w21, le mov w22, wzr cmp w20, #0 ble G_M000_IG42 G_M000_IG38: ldr w0, [x19, #0x08] ldr x8, [fp, #0x18] mov x1, x8 ldr x2, [x1] ldr w1, [x1, #0x08] cmp w0, w1 bhs G_M000_IG40 G_M000_IG39: mov w1, #48 strh w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] b G_M000_IG41 G_M000_IG40: mov x0, x19 mov w1, #48 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG41: add w22, w22, #1 cmp w22, w20 blt G_M000_IG38 G_M000_IG42: sub w21, w21, w20 G_M000_IG43: cmp w21, #0 ble G_M000_IG51 G_M000_IG44: ldrb w0, [x27] cbnz w0, G_M000_IG46 G_M000_IG45: mov w0, #48 b G_M000_IG47 G_M000_IG46: mov x0, x27 add x27, x0, #1 ldrb w0, [x0] G_M000_IG47: uxth w1, w0 ldr w0, [x19, #0x08] ldr x8, [fp, #0x18] mov x2, x8 ldr x3, [x2] ldr w2, [x2, #0x08] cmp w0, w2 bhs G_M000_IG49 G_M000_IG48: strh w1, [x3, w0, UXTW #2] add w0, w0, #1 str w0, [x19, #0x08] b G_M000_IG50 G_M000_IG49: mov x0, x19 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG50: sub w21, w21, #1 cmp w21, #0 bgt G_M000_IG44 G_M000_IG51: ldp x27, x28, [sp, #0x80] ldp x25, x26, [sp, #0x70] ldp x23, x24, [sp, #0x60] ldp x21, x22, [sp, #0x50] ldp x19, x20, [sp, #0x40] ldp fp, lr, [sp], #0x90 ret lr G_M000_IG52: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 G_M000_IG53: bl CORINFO_HELP_RNGCHKFAIL brk_windows #0 ; Total bytes of code 1176 5591: JIT compiled System.Number:FormatFixed[ushort](byref,byref,int,int[],System.ReadOnlySpan`1[ushort],System.ReadOnlySpan`1[ushort]) [Tier1, IL size=542, code size=1176] ; Assembly listing for method System.Number+NumberBuffer:GetDigitsPointer():ulong:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr x0, [x0, #0x10] G_M000_IG03: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 20 5592: JIT compiled System.Number+NumberBuffer:GetDigitsPointer() [Tier1, IL size=17, code size=20] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[ushort]:AppendSpan(int):System.Span`1[ushort]:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 0 inlinees with PGO data; 1 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str xzr, [fp, #0x10] G_M000_IG02: ldr w2, [x0, #0x08] add x3, x0, #16 ldr x4, [x3] ldr w3, [x3, #0x08] mov w5, w2 add x5, x5, w1, UXTW mov w3, w3 cmp x5, x3 bhi G_M000_IG05 G_M000_IG03: add w3, w2, w1 str w3, [x0, #0x08] ubfiz x0, x2, #1, #32 add x0, x4, x0 G_M000_IG04: ldp fp, lr, [sp], #0x20 ret lr G_M000_IG05: movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 str x0, [fp, #0x10] str x1, [fp, #0x18] ldp x0, x1, [fp, #0x10] G_M000_IG06: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 112 5593: JIT compiled System.Collections.Generic.ValueListBuilder`1[ushort]:AppendSpan(int) [Tier1, IL size=56, code size=112] ; Assembly listing for method System.Runtime.InteropServices.MemoryMarshal:GetReference[ushort](System.Span`1[ushort]):byref ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 16 5594: JIT compiled System.Runtime.InteropServices.MemoryMarshal:GetReference[ushort](System.Span`1[ushort]) [Tier1, IL size=8, code size=16] ; Assembly listing for method System.Collections.Generic.ValueListBuilder`1[ushort]:Append(System.ReadOnlySpan`1[ushort]):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr w3, [x0, #0x08] add x4, x0, #16 ldr x5, [x4] ldr w4, [x4, #0x08] cmp w3, w4 ccmp w2, #1, 0, lo bne G_M000_IG05 G_M000_IG03: ubfiz x2, x3, #1, #32 add x2, x5, x2 ldrh w1, [x1] strh w1, [x2] add w1, w3, #1 str w1, [x0, #0x08] G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG06: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 96 5595: JIT compiled System.Collections.Generic.ValueListBuilder`1[ushort]:Append(System.ReadOnlySpan`1[ushort]) [Tier1, IL size=78, code size=96] ; Assembly listing for method System.String:Concat(System.String,System.String,System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 37810 ; 6 inlinees with PGO data; 3 single block inlinees; 3 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x60]! stp x19, x20, [sp, #0x10] stp x21, x22, [sp, #0x20] stp x23, x24, [sp, #0x30] stp x25, x26, [sp, #0x40] stp x27, x28, [sp, #0x50] mov fp, sp mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: cbz x19, G_M000_IG15 G_M000_IG03: ldr w22, [x19, #0x08] cbz w22, G_M000_IG15 G_M000_IG04: cbz x20, G_M000_IG17 G_M000_IG05: ldr w23, [x20, #0x08] cbz w23, G_M000_IG17 G_M000_IG06: cbz x21, G_M000_IG10 G_M000_IG07: ldr w24, [x21, #0x08] cbz w24, G_M000_IG10 G_M000_IG08: add w25, w23, w22 add w0, w25, w24 bl System.String:FastAllocateString(int):System.String mov x26, x0 ldr w27, [x26, #0x08] cmp w27, w22 blt G_M000_IG12 add x28, x26, #12 mov x0, x28 add x1, x19, #12 mov w2, w22 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w2, w27, w22 cmp w2, w23 blt G_M000_IG13 sbfiz x2, x22, #1, #32 add x0, x28, x2 add x1, x20, #12 mov w2, w23 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sub w2, w27, w25 cmp w2, w24 blt G_M000_IG14 sbfiz x2, x25, #1, #32 add x0, x28, x2 add x1, x21, #12 mov w2, w24 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x26 G_M000_IG09: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 ret lr G_M000_IG10: mov x0, x19 mov x1, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG11: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 br x2 G_M000_IG12: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG13: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG14: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] blr x1 mov x0, x19 bl CORINFO_HELP_THROW G_M000_IG15: mov x0, x20 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG16: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 br x2 G_M000_IG17: mov x0, x19 mov x1, x21 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] G_M000_IG18: ldp x27, x28, [sp, #0x50] ldp x25, x26, [sp, #0x40] ldp x23, x24, [sp, #0x30] ldp x21, x22, [sp, #0x20] ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x60 br x2 ; Total bytes of code 580 5596: JIT compiled System.String:Concat(System.String,System.String,System.String) [Tier1 with Static PGO, IL size=119, code size=580] ; Assembly listing for method BenchmarkDotNet.Helpers.AsciiHelper:ToAscii(System.String):System.String ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: cbnz x0, G_M000_IG05 G_M000_IG03: mov x0, xzr G_M000_IG04: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG05: movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] G_M000_IG06: ldp fp, lr, [sp], #0x10 br x3 ; Total bytes of code 72 5597: JIT compiled BenchmarkDotNet.Helpers.AsciiHelper:ToAscii(System.String) [Tier1, IL size=22, code size=72] ; Assembly listing for method System.String:Replace(System.String,System.String):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 9 single block inlinees; 6 inlinees without PGO data G_M000_IG01: sub sp, sp, #112 stp x19, x20, [sp, #0x28] stp x21, x22, [sp, #0x38] stp x23, x24, [sp, #0x48] str x25, [sp, #0x58] stp fp, lr, [sp, #0x60] add fp, sp, #96 str xzr, [fp, #-0x58] str xzr, [fp, #-0x48] movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 str x3, [fp, #-0x60] mov x19, x0 mov x20, x1 mov x21, x2 G_M000_IG02: cbz x20, G_M000_IG22 G_M000_IG03: ldr w22, [x20, #0x08] cbz w22, G_M000_IG22 G_M000_IG04: movz x1, #8 movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 cmp x21, #0 csel x21, x21, x1, ne ldp x1, xzr, [sp], #0xD1FFAB1E mov x1, sp str x1, [fp, #-0x48] mov w1, #128 str w1, [fp, #-0x40] str xzr, [fp, #-0x58] str wzr, [fp, #-0x50] cmp w22, #1 bne G_M000_IG12 G_M000_IG05: ldr w1, [x21, #0x08] cmp w1, #1 bne G_M000_IG07 ldrh w1, [x20, #0x0C] ldrh w2, [x21, #0x0C] mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x60] cmp xip0, xip1 beq G_M000_IG06 bl CORINFO_HELP_FAIL_FAST G_M000_IG06: sub sp, fp, #96 ldp fp, lr, [sp, #0x60] ldr x25, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] add sp, sp, #112 ret lr G_M000_IG07: ldrh w20, [x20, #0x0C] mov w23, wzr add x24, x19, #12 G_M000_IG08: sbfiz x0, x23, #1, #32 add x0, x24, x0 ldr w25, [x19, #0x08] sub w2, w25, w23 sxth w1, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 tbnz w0, #31, G_M000_IG17 add w23, w23, w0 sxtw w1, w23 ldr w0, [fp, #-0x50] ldr x2, [fp, #-0x48] ldr w3, [fp, #-0x40] cmp w0, w3 bhs G_M000_IG10 G_M000_IG09: str w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0x50] b G_M000_IG11 G_M000_IG10: sub x0, fp, #88 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG11: add w23, w23, #1 b G_M000_IG08 G_M000_IG12: mov w23, wzr add x24, x19, #12 ldr w25, [x19, #0x08] G_M000_IG13: sbfiz x0, x23, #1, #32 add x0, x24, x0 sub w1, w25, w23 add x2, x20, #12 mov w3, w22 movz x4, #0xD1FFAB1E movk x4, #0xD1FFAB1E LSL #16 movk x4, #0xD1FFAB1E LSL #32 ldr x4, [x4] blr x4 tbnz w0, #31, G_M000_IG17 add w23, w23, w0 sxtw w1, w23 ldr w0, [fp, #-0x50] ldr x2, [fp, #-0x48] ldr w3, [fp, #-0x40] cmp w0, w3 bhs G_M000_IG15 G_M000_IG14: str w1, [x2, w0, UXTW #2] add w0, w0, #1 str w0, [fp, #-0x50] b G_M000_IG16 G_M000_IG15: sub x0, fp, #88 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 G_M000_IG16: add w23, w23, w22 b G_M000_IG13 G_M000_IG17: ldr w0, [fp, #-0x50] cbnz w0, G_M000_IG19 mov x0, x19 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x60] cmp xip0, xip1 beq G_M000_IG18 bl CORINFO_HELP_FAIL_FAST G_M000_IG18: sub sp, fp, #96 ldp fp, lr, [sp, #0x60] ldr x25, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] add sp, sp, #112 ret lr G_M000_IG19: sxtw w1, w22 ldr w4, [fp, #-0x50] ldr w3, [fp, #-0x40] cmp w4, w3 bhi G_M000_IG23 ldr x3, [fp, #-0x48] mov x0, x19 mov x2, x21 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 mov x20, x0 ldr x19, [fp, #-0x58] cbz x19, G_M000_IG20 str xzr, [fp, #-0x58] movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 mov w1, #50 bl CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] mov x1, x19 mov w2, wzr movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] ldr wzr, [x0] blr x3 G_M000_IG20: mov x0, x20 movz xip0, #0xD1FFAB1E movk xip0, #0xD1FFAB1E LSL #16 movk xip0, #0xD1FFAB1E LSL #32 ldr xip1, [fp, #-0x60] cmp xip0, xip1 beq G_M000_IG21 bl CORINFO_HELP_FAIL_FAST G_M000_IG21: sub sp, fp, #96 ldp fp, lr, [sp, #0x60] ldr x25, [sp, #0x58] ldp x23, x24, [sp, #0x48] ldp x21, x22, [sp, #0x38] ldp x19, x20, [sp, #0x28] add sp, sp, #112 ret lr G_M000_IG22: mov w0, #0xD1FFAB1E movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x1, x0 mov x0, x20 movz x2, #0xD1FFAB1E movk x2, #0xD1FFAB1E LSL #16 movk x2, #0xD1FFAB1E LSL #32 ldr x2, [x2] blr x2 brk_windows #0 G_M000_IG23: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 brk_windows #0 ; Total bytes of code 848 5598: JIT compiled System.String:Replace(System.String,System.String) [Tier1, IL size=280, code size=848] ; Assembly listing for method System.String:Replace(ushort,ushort):System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; partially interruptible ; No PGO data ; 1 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x50]! stp x19, x20, [sp, #0x18] stp x21, x22, [sp, #0x28] stp x23, x24, [sp, #0x38] str x25, [sp, #0x48] mov fp, sp mov x19, x0 mov w20, w1 mov w21, w2 G_M000_IG02: uxth w0, w20 uxth w2, w21 cmp w0, w2 bne G_M000_IG05 G_M000_IG03: mov x0, x19 G_M000_IG04: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG05: add x22, x19, #12 mov x0, x22 ldr w23, [x19, #0x08] mov w2, w23 sxth w1, w20 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 sxtw w24, w0 tbz w24, #31, G_M000_IG07 mov x0, x19 G_M000_IG06: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr G_M000_IG07: sub w0, w23, w24 mov w19, w0 mov w0, w23 bl System.String:FastAllocateString(int):System.String mov x25, x0 cmp w24, #0 ble G_M000_IG08 ldrsb wzr, [x25] add x0, x25, #12 mov x1, x22 mov w2, w24 lsl x2, x2, #1 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG08: ubfiz x2, x24, #1, #32 add x0, x22, x2 ldrsb wzr, [x25] add x3, x25, #12 add x1, x3, x2 mov w2, w23 cmp x2, #8 blo G_M000_IG09 sub x2, x2, x19 and x2, x2, #7 lsl x3, x2, #1 sub x0, x0, x3 sub x1, x1, x3 add x19, x19, x2 G_M000_IG09: uxth w2, w20 uxth w3, w21 mov x4, x19 movz x5, #0xD1FFAB1E movk x5, #0xD1FFAB1E LSL #16 movk x5, #0xD1FFAB1E LSL #32 ldr x5, [x5] blr x5 mov x0, x25 G_M000_IG10: ldr x25, [sp, #0x48] ldp x23, x24, [sp, #0x38] ldp x21, x22, [sp, #0x28] ldp x19, x20, [sp, #0x18] ldp fp, lr, [sp], #0x50 ret lr ; Total bytes of code 340 5599: JIT compiled System.String:Replace(ushort,ushort) [Tier1, IL size=179, code size=340] ; Assembly listing for method System.Text.StringBuilder:ToString():System.String:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are invalid, and fgCalledCount is 65851 ; 1 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x20]! stp x19, x20, [sp, #0x10] mov fp, sp mov x19, x0 G_M000_IG02: ldp w1, w0, [x19, #0x18] add w0, w0, w1 cbz w0, G_M000_IG08 G_M000_IG03: bl System.String:FastAllocateString(int):System.String mov x20, x0 G_M000_IG04: ldr w2, [x19, #0x18] cmp w2, #0 ble G_M000_IG05 ldr x0, [x19, #0x08] ldr w1, [x19, #0x1C] add w3, w2, w1 ldr w4, [x20, #0x08] cmp w3, w4 bhi G_M000_IG10 ldr w3, [x0, #0x08] cmp w3, w2 blo G_M000_IG10 add x3, x20, #12 sbfiz x1, x1, #1, #32 add x1, x3, x1 add x3, x0, #16 sxtw x2, w2 lsl x2, x2, #1 mov x0, x1 mov x1, x3 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 G_M000_IG05: ldr x19, [x19, #0x10] cbnz x19, G_M000_IG04 G_M000_IG06: mov x0, x20 G_M000_IG07: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG08: movz x0, #8 movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 G_M000_IG09: ldp x19, x20, [sp, #0x10] ldp fp, lr, [sp], #0x20 ret lr G_M000_IG10: movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 movz w0, #0xD1FFAB1E movk w0, #1 LSL #16 movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 bl CORINFO_HELP_STRCNS mov x20, x0 movz x0, #0xD1FFAB1E movk x0, #0xD1FFAB1E LSL #16 movk x0, #0xD1FFAB1E LSL #32 ldr x0, [x0] blr x0 mov x2, x0 mov x1, x20 mov x0, x19 movz x3, #0xD1FFAB1E movk x3, #0xD1FFAB1E LSL #16 movk x3, #0xD1FFAB1E LSL #32 ldr x3, [x3] blr x3 mov x0, x19 bl CORINFO_HELP_THROW brk_windows #0 ; Total bytes of code 296 5600: JIT compiled System.Text.StringBuilder:ToString() [Tier1 with Static PGO, IL size=132, code size=296] ; Assembly listing for method System.Text.Ascii:NarrowUtf16ToAscii_Intrinsified(ulong,ulong,ulong):ulong ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; optimized using Static PGO ; fp based frame ; fully interruptible ; with Static PGO: edge weights are valid, and fgCalledCount is 56852 ; 0 inlinees with PGO data; 0 single block inlinees; 8 inlinees without PGO data G_M000_IG01: stp fp, lr, [sp, #-0x10]! mov fp, sp G_M000_IG02: ldr q16, [x0] umaxp v17.8h, v16.8h, v16.8h umov x3, v17.d[0] tst x3, #0xD1FFAB1E bne G_M000_IG11 mov x3, x1 uzp1 v16.16b, v16.16b, v16.16b str d16, [x3] mov x4, #8 tbnz w1, #3, G_M000_IG04 G_M000_IG03: ldr q16, [x0, #0x10] umaxp v17.8h, v16.8h, v16.8h umov x5, v17.d[0] tst x5, #0xD1FFAB1E bne G_M000_IG07 uzp1 v16.16b, v16.16b, v16.16b str d16, [x3, #0x08] G_M000_IG04: and x4, x1, #15 mov x1, #16 sub x4, x1, x4 sub x1, x2, #16 align [4 bytes for IG05] align [0 bytes] align [0 bytes] align [0 bytes] G_M000_IG05: lsl x2, x4, #1 ldr q16, [x0, x2] lsl x2, x4, #1 add x2, x2, #16 ldr q17, [x0, x2] orr v18.8h, v16.8h, v17.8h umaxp v18.8h, v18.8h, v18.8h umov x2, v18.d[0] tst x2, #0xD1FFAB1E bne G_M000_IG09 G_M000_IG06: uzp1 v16.16b, v16.16b, v17.16b str q16, [x3, x4] add x4, x4, #16 cmp x4, x1 bls G_M000_IG05 G_M000_IG07: mov x0, x4 G_M000_IG08: ldp fp, lr, [sp], #0x10 ret lr G_M000_IG09: umaxp v17.8h, v16.8h, v16.8h umov x0, v17.d[0] tst x0, #0xD1FFAB1E bne G_M000_IG07 G_M000_IG10: uzp1 v16.16b, v16.16b, v16.16b str d16, [x3, x4] add x4, x4, #8 b G_M000_IG07 G_M000_IG11: mov x0, xzr G_M000_IG12: ldp fp, lr, [sp], #0x10 ret lr ; Total bytes of code 212 5601: JIT compiled System.Text.Ascii:NarrowUtf16ToAscii_Intrinsified(ulong,ulong,ulong) [Tier1 with Static PGO, IL size=251, code size=212] ; Assembly listing for method BenchmarkDotNet.Engines.AnonymousPipesHost:Dispose():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible G_M000_IG01: stp fp, lr, [sp, #-0x20]! mov fp, sp str x0, [fp, #0x18] G_M000_IG02: ldr x0, [fp, #0x18] ldr x0, [x0, #0x08] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 ldr x0, [fp, #0x18] ldr x0, [x0, #0x10] movz x1, #0xD1FFAB1E movk x1, #0xD1FFAB1E LSL #16 movk x1, #0xD1FFAB1E LSL #32 ldr x1, [x1] ldr wzr, [x0] blr x1 G_M000_IG03: ldp fp, lr, [sp], #0x20 ret lr ; Total bytes of code 84 5602: JIT compiled BenchmarkDotNet.Engines.AnonymousPipesHost:Dispose() [Tier0, IL size=23, code size=84]